Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: power: Add starfive,jh7110-pmu

Add bindings for the Power Management Unit on the StarFive JH7110 SoC.

Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

authored by

Walker Chen and committed by
Conor Dooley
1fc7606d 1b929c02

+62
+45
Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/power/starfive,jh7110-pmu.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: StarFive JH7110 Power Management Unit 8 + 9 + maintainers: 10 + - Walker Chen <walker.chen@starfivetech.com> 11 + 12 + description: | 13 + StarFive JH7110 SoC includes support for multiple power domains which can be 14 + powered on/off by software based on different application scenes to save power. 15 + 16 + properties: 17 + compatible: 18 + enum: 19 + - starfive,jh7110-pmu 20 + 21 + reg: 22 + maxItems: 1 23 + 24 + interrupts: 25 + maxItems: 1 26 + 27 + "#power-domain-cells": 28 + const: 1 29 + 30 + required: 31 + - compatible 32 + - reg 33 + - interrupts 34 + - "#power-domain-cells" 35 + 36 + additionalProperties: false 37 + 38 + examples: 39 + - | 40 + pwrc: power-controller@17030000 { 41 + compatible = "starfive,jh7110-pmu"; 42 + reg = <0x17030000 0x10000>; 43 + interrupts = <111>; 44 + #power-domain-cells = <1>; 45 + };
+17
include/dt-bindings/power/starfive,jh7110-pmu.h
··· 1 + /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 + /* 3 + * Copyright (C) 2022 StarFive Technology Co., Ltd. 4 + * Author: Walker Chen <walker.chen@starfivetech.com> 5 + */ 6 + #ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__ 7 + #define __DT_BINDINGS_POWER_JH7110_POWER_H__ 8 + 9 + #define JH7110_PD_SYSTOP 0 10 + #define JH7110_PD_CPU 1 11 + #define JH7110_PD_GPUA 2 12 + #define JH7110_PD_VDEC 3 13 + #define JH7110_PD_VOUT 4 14 + #define JH7110_PD_ISP 5 15 + #define JH7110_PD_VENC 6 16 + 17 + #endif