Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

gpio: dt-bindings: Add documentation for gpio controllers on Armada 7K/8K

Document the device tree binding for the gpio controllers found on the
Marvell Armada 7K and Armada 8K SoCs.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

+60 -8
+20
Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt
··· 64 64 mpp18 18 gpio 65 65 mpp19 19 gpio, uart0(rxd), sdio(pw_off) 66 66 67 + GPIO: 68 + ----- 69 + For common binding part and usage, refer to 70 + Documentation/devicetree/bindings/gpio/gpio-mvebu.txt. 71 + 72 + Required properties: 73 + 74 + - compatible: "marvell,armada-8k-gpio" 75 + 76 + - offset: offset address inside the syscon block 77 + 67 78 Example: 68 79 ap_syscon: system-controller@6f4000 { 69 80 compatible = "syscon", "simple-mfd"; ··· 87 76 88 77 ap_pinctrl: pinctrl { 89 78 compatible = "marvell,ap806-pinctrl"; 79 + }; 80 + 81 + ap_gpio: gpio { 82 + compatible = "marvell,armada-8k-gpio"; 83 + offset = <0x1040>; 84 + ngpios = <19>; 85 + gpio-controller; 86 + #gpio-cells = <2>; 87 + gpio-ranges = <&ap_pinctrl 0 0 19>; 90 88 }; 91 89 };
+23 -1
Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt
··· 149 149 mpp61 61 gpio, mss_gpio5, ptp(clk), tdm(pclk), au(i2sextclk), spi0(csn2), uart0(txd), uart2(txd), sata1(present_act), ge(mdio), sdio(d3) 150 150 mpp62 62 gpio, mss_gpio4, synce1(clk), ptp(pclk_out), sata1(present_act), spi0(csn3), uart0(rxd), uart2(rxd), sata0(present_act), ge(mdc) 151 151 152 + GPIO: 153 + ----- 154 + 155 + For common binding part and usage, refer to 156 + Documentation/devicetree/bindings/gpio/gpio-mvebu.txt. 157 + 158 + Required properties: 159 + 160 + - compatible: "marvell,armada-8k-gpio" 161 + 162 + - offset: offset address inside the syscon block 163 + 152 164 Example: 153 165 154 166 cpm_syscon0: system-controller@440000 { ··· 175 163 cpm_pinctrl: pinctrl { 176 164 compatible = "marvell,armada-8k-cpm-pinctrl"; 177 165 }; 178 - }; 179 166 167 + cpm_gpio1: gpio@100 { 168 + compatible = "marvell,armada-8k-gpio"; 169 + offset = <0x100>; 170 + ngpios = <32>; 171 + gpio-controller; 172 + #gpio-cells = <2>; 173 + gpio-ranges = <&cpm_pinctrl 0 0 32>; 174 + status = "disabled"; 175 + }; 176 + 177 + };
+17 -7
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
··· 2 2 3 3 Required properties: 4 4 5 - - compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio" 6 - or "marvell,armadaxp-gpio". "marvell,orion-gpio" should be used for 7 - Orion, Kirkwood, Dove, Discovery (except MV78200) and Armada 8 - 370. "marvell,mv78200-gpio" should be used for the Discovery 9 - MV78200. "marvel,armadaxp-gpio" should be used for all Armada XP 10 - SoCs (MV78230, MV78260, MV78460). 5 + - compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio", 6 + "marvell,armadaxp-gpio" or "marvell,armada-8k-gpio". 7 + 8 + "marvell,orion-gpio" should be used for Orion, Kirkwood, Dove, 9 + Discovery (except MV78200) and Armada 370. "marvell,mv78200-gpio" 10 + should be used for the Discovery MV78200. 11 + 12 + "marvel,armadaxp-gpio" should be used for all Armada XP SoCs 13 + (MV78230, MV78260, MV78460). 14 + 15 + "marvell,armada-8k-gpio" should be used for the Armada 7K and 8K 16 + SoCs (either from AP or CP), see 17 + Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt 18 + and 19 + Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt 20 + for specific details about the offset property. 11 21 12 22 - reg: Address and length of the register set for the device. Only one 13 23 entry is expected, except for the "marvell,armadaxp-gpio" variant 14 24 for which two entries are expected: one for the general registers, 15 - one for the per-cpu registers. 25 + one for the per-cpu registers. Not used for marvell,armada-8k-gpio. 16 26 17 27 - interrupts: The list of interrupts that are used for all the pins 18 28 managed by this GPIO bank. There can be more than one interrupt