Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'tegra-for-3.12-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt

From: Stephen Warren:
ARM: tegra: device tree changes for 3.12

This branch contains all *.dts (device tree) changes for Tegra.
New features enabled are:

* PMICs on Dalmore
* CPU power-gating on Dalmore
* HDMI output on Beaver
* LP1 system suspend mode on almost all boards
* PCIe support on numerous Tegra20/30 boards
* USB support on Tegra30/114 boards
* Audio capture on Beaver and Dalmore
* Temperature sensor on Cardhu.

... along with a few DT cleanups.

* tag 'tegra-for-3.12-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (25 commits)
ARM: tegra: add Mic Jack to Dalmore device tree
ARM: tegra: add Mic Jack to Beaver device tree
ARM: tegra: add USB DT entries for Tegra114, Dalmore
ARM: tegra: add USB DT entries for Tegra30
ARM: dts: tegra: Increase prefetchable PCI memory space
ARM: tegra: Fix Beaver's PCIe lane configuration
ARM: tegra: Enable PCIe controller on Beaver
ARM: tegra: Enable PCIe controller on Cardhu
ARM: tegra: Add Tegra30 PCIe support
ARM: tegra: trimslice: Initialize PCIe from DT
ARM: tegra: harmony: Initialize PCIe from DT
ARM: tegra: tec: Add PCIe support
ARM: tegra: tamonten: Add PCIe support
ARM: tegra: Add Tegra20 PCIe support to DT
ARM: tegra: enable LP1 suspend mode
ARM: tegra: beaver: Enable HDMI output
ARM: tegra: use TEGRA_GPIO() in a couple more places
ARM: tegra: dalmore: fix the irq trigger type of Palmas MFD device
ARM: tegra: define valid function names in DT document
ARM: tegra: dalmore: add PM configurations for PMC
...

+728 -71
+11
Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt
··· 80 80 dbg, sdio3, spi, uaa, uab, uart2, uart3, sdio1, ddc, gma, gme, gmf, gmg, 81 81 gmh, owr, uda. 82 82 83 + Valid values for nvidia,functions are: 84 + 85 + blink, cec, cldvfs, clk12, cpu, dap, dap1, dap2, dev3, displaya, 86 + displaya_alt, displayb, dtv, emc_dll, extperiph1, extperiph2, 87 + extperiph3, gmi, gmi_alt, hda, hsi, i2c1, i2c2, i2c3, i2c4, i2cpwr, 88 + i2s0, i2s1, i2s2, i2s3, i2s4, irda, kbc, nand, nand_alt, owr, pmi, 89 + pwm0, pwm1, pwm2, pwm3, pwron, reset_out_n, rsvd1, rsvd2, rsvd3, 90 + rsvd4, sdmmc1, sdmmc2, sdmmc3, sdmmc4, soc, spdif, spi1, spi2, spi3, 91 + spi4, spi5, spi6, sysclk, trace, uarta, uartb, uartc, uartd, ulpi, 92 + usb, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6, vi, vi_alt1, vi_alt3 93 + 83 94 Example: 84 95 85 96 pinmux: pinmux {
+11
Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt
··· 103 103 drive_gma, drive_gmb, drive_gmc, drive_gmd, drive_gme, drive_owr, 104 104 drive_uda. 105 105 106 + Valid values for nvidia,functions are: 107 + 108 + ahb_clk, apb_clk, audio_sync, crt, dap1, dap2, dap3, dap4, dap5, 109 + displaya, displayb, emc_test0_dll, emc_test1_dll, gmi, gmi_int, 110 + hdmi, i2cp, i2c1, i2c2, i2c3, ide, irda, kbc, mio, mipi_hs, nand, 111 + osc, owr, pcie, plla_out, pllc_out1, pllm_out1, pllp_out2, pllp_out3, 112 + pllp_out4, pwm, pwr_intr, pwr_on, rsvd1, rsvd2, rsvd3, rsvd4, rtck, 113 + sdio1, sdio2, sdio3, sdio4, sflash, spdif, spi1, spi2, spi2_alt, 114 + spi3, spi4, trace, twc, uarta, uartb, uartc, uartd, uarte, ulpi, 115 + vi, vi_sensor_clk, xio 116 + 106 117 Example: 107 118 108 119 pinctrl@70000000 {
+12
Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt
··· 91 91 gmh, gpv, lcd1, lcd2, owr, sdio1, sdio2, sdio3, spi, uaa, uab, uart2, 92 92 uart3, uda, vi1. 93 93 94 + Valid values for nvidia,functions are: 95 + 96 + blink, cec, clk_12m_out, clk_32k_in, core_pwr_req, cpu_pwr_req, crt, 97 + dap, ddr, dev3, displaya, displayb, dtv, extperiph1, extperiph2, 98 + extperiph3, gmi, gmi_alt, hda, hdcp, hdmi, hsi, i2c1, i2c2, i2c3, 99 + i2c4, i2cpwr, i2s0, i2s1, i2s2, i2s3, i2s4, invalid, kbc, mio, nand, 100 + nand_alt, owr, pcie, pwm0, pwm1, pwm2, pwm3, pwr_int_n, rsvd1, rsvd2, 101 + rsvd3, rsvd4, rtck, sata, sdmmc1, sdmmc2, sdmmc3, sdmmc4, spdif, spi1, 102 + spi2, spi2_alt, spi3, spi4, spi5, spi6, sysclk, test, trace, uarta, 103 + uartb, uartc, uartd, uarte, ulpi, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6, 104 + vi, vi_alt1, vi_alt2, vi_alt3 105 + 94 106 Example: 95 107 96 108 pinctrl@70000000 {
+1 -2
arch/arm/boot/dts/Makefile
··· 226 226 tegra30-beaver.dtb \ 227 227 tegra30-cardhu-a02.dtb \ 228 228 tegra30-cardhu-a04.dtb \ 229 - tegra114-dalmore.dtb \ 230 - tegra114-pluto.dtb 229 + tegra114-dalmore.dtb 231 230 dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \ 232 231 versatile-pb.dtb 233 232 dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
+233 -2
arch/arm/boot/dts/tegra114-dalmore.dts
··· 791 791 regulator-boot-on; 792 792 }; 793 793 794 - dcdc3 { 794 + tps65090_dcdc3_reg: dcdc3 { 795 795 regulator-name = "vdd-ao"; 796 796 regulator-always-on; 797 797 regulator-boot-on; ··· 836 836 }; 837 837 }; 838 838 }; 839 + 840 + palmas: tps65913 { 841 + compatible = "ti,palmas"; 842 + reg = <0x58>; 843 + interrupts = <0 86 IRQ_TYPE_LEVEL_LOW>; 844 + 845 + #interrupt-cells = <2>; 846 + interrupt-controller; 847 + 848 + palmas_gpio: gpio { 849 + compatible = "ti,palmas-gpio"; 850 + gpio-controller; 851 + #gpio-cells = <2>; 852 + }; 853 + 854 + pmic { 855 + compatible = "ti,tps65913-pmic", "ti,palmas-pmic"; 856 + smps1-in-supply = <&tps65090_dcdc3_reg>; 857 + smps3-in-supply = <&tps65090_dcdc3_reg>; 858 + smps4-in-supply = <&tps65090_dcdc2_reg>; 859 + smps7-in-supply = <&tps65090_dcdc2_reg>; 860 + smps8-in-supply = <&tps65090_dcdc2_reg>; 861 + smps9-in-supply = <&tps65090_dcdc2_reg>; 862 + ldo1-in-supply = <&tps65090_dcdc2_reg>; 863 + ldo2-in-supply = <&tps65090_dcdc2_reg>; 864 + ldo3-in-supply = <&palmas_smps3_reg>; 865 + ldo4-in-supply = <&tps65090_dcdc2_reg>; 866 + ldo5-in-supply = <&vdd_ac_bat_reg>; 867 + ldo6-in-supply = <&tps65090_dcdc2_reg>; 868 + ldo7-in-supply = <&tps65090_dcdc2_reg>; 869 + ldo8-in-supply = <&tps65090_dcdc3_reg>; 870 + ldo9-in-supply = <&palmas_smps9_reg>; 871 + ldoln-in-supply = <&tps65090_dcdc1_reg>; 872 + ldousb-in-supply = <&tps65090_dcdc1_reg>; 873 + 874 + regulators { 875 + smps12 { 876 + regulator-name = "vddio-ddr"; 877 + regulator-min-microvolt = <1350000>; 878 + regulator-max-microvolt = <1350000>; 879 + regulator-always-on; 880 + regulator-boot-on; 881 + }; 882 + 883 + palmas_smps3_reg: smps3 { 884 + regulator-name = "vddio-1v8"; 885 + regulator-min-microvolt = <1800000>; 886 + regulator-max-microvolt = <1800000>; 887 + regulator-always-on; 888 + regulator-boot-on; 889 + }; 890 + 891 + smps45 { 892 + regulator-name = "vdd-core"; 893 + regulator-min-microvolt = <900000>; 894 + regulator-max-microvolt = <1400000>; 895 + regulator-always-on; 896 + regulator-boot-on; 897 + }; 898 + 899 + smps457 { 900 + regulator-name = "vdd-core"; 901 + regulator-min-microvolt = <900000>; 902 + regulator-max-microvolt = <1400000>; 903 + regulator-always-on; 904 + regulator-boot-on; 905 + }; 906 + 907 + smps8 { 908 + regulator-name = "avdd-pll"; 909 + regulator-min-microvolt = <1050000>; 910 + regulator-max-microvolt = <1050000>; 911 + regulator-always-on; 912 + regulator-boot-on; 913 + }; 914 + 915 + palmas_smps9_reg: smps9 { 916 + regulator-name = "sdhci-vdd-sd-slot"; 917 + regulator-min-microvolt = <2800000>; 918 + regulator-max-microvolt = <2800000>; 919 + regulator-always-on; 920 + }; 921 + 922 + ldo1 { 923 + regulator-name = "avdd-cam1"; 924 + regulator-min-microvolt = <2800000>; 925 + regulator-max-microvolt = <2800000>; 926 + }; 927 + 928 + ldo2 { 929 + regulator-name = "avdd-cam2"; 930 + regulator-min-microvolt = <2800000>; 931 + regulator-max-microvolt = <2800000>; 932 + }; 933 + 934 + ldo3 { 935 + regulator-name = "avdd-dsi-csi"; 936 + regulator-min-microvolt = <1200000>; 937 + regulator-max-microvolt = <1200000>; 938 + regulator-always-on; 939 + regulator-boot-on; 940 + }; 941 + 942 + ldo4 { 943 + regulator-name = "vpp-fuse"; 944 + regulator-min-microvolt = <1800000>; 945 + regulator-max-microvolt = <1800000>; 946 + }; 947 + 948 + ldo6 { 949 + regulator-name = "vdd-sensor-2v85"; 950 + regulator-min-microvolt = <2850000>; 951 + regulator-max-microvolt = <2850000>; 952 + }; 953 + 954 + ldo7 { 955 + regulator-name = "vdd-af-cam1"; 956 + regulator-min-microvolt = <2800000>; 957 + regulator-max-microvolt = <2800000>; 958 + }; 959 + 960 + ldo8 { 961 + regulator-name = "vdd-rtc"; 962 + regulator-min-microvolt = <900000>; 963 + regulator-max-microvolt = <900000>; 964 + regulator-always-on; 965 + regulator-boot-on; 966 + ti,enable-ldo8-tracking; 967 + }; 968 + 969 + ldo9 { 970 + regulator-name = "vddio-sdmmc-2"; 971 + regulator-min-microvolt = <1800000>; 972 + regulator-max-microvolt = <3300000>; 973 + regulator-always-on; 974 + regulator-boot-on; 975 + }; 976 + 977 + ldoln { 978 + regulator-name = "hvdd-usb"; 979 + regulator-min-microvolt = <3300000>; 980 + regulator-max-microvolt = <3300000>; 981 + }; 982 + 983 + ldousb { 984 + regulator-name = "avdd-usb"; 985 + regulator-min-microvolt = <3300000>; 986 + regulator-max-microvolt = <3300000>; 987 + regulator-always-on; 988 + regulator-boot-on; 989 + }; 990 + 991 + regen1 { 992 + regulator-name = "rail-3v3"; 993 + regulator-max-microvolt = <3300000>; 994 + regulator-always-on; 995 + regulator-boot-on; 996 + }; 997 + 998 + regen2 { 999 + regulator-name = "rail-5v0"; 1000 + regulator-max-microvolt = <5000000>; 1001 + regulator-always-on; 1002 + regulator-boot-on; 1003 + }; 1004 + }; 1005 + }; 1006 + 1007 + rtc { 1008 + compatible = "ti,palmas-rtc"; 1009 + interrupt-parent = <&palmas>; 1010 + interrupts = <8 0>; 1011 + }; 1012 + }; 839 1013 }; 840 1014 841 1015 spi@7000da00 { ··· 1024 850 1025 851 pmc { 1026 852 nvidia,invert-interrupt; 853 + nvidia,suspend-mode = <1>; 854 + nvidia,cpu-pwr-good-time = <500>; 855 + nvidia,cpu-pwr-off-time = <300>; 856 + nvidia,core-pwr-good-time = <641 3845>; 857 + nvidia,core-pwr-off-time = <61036>; 858 + nvidia,core-power-req-active-high; 859 + nvidia,sys-clock-req-active-high; 1027 860 }; 1028 861 1029 862 ahub { ··· 1051 870 non-removable; 1052 871 }; 1053 872 873 + usb@7d008000 { 874 + status = "okay"; 875 + }; 876 + 877 + usb-phy@7d008000 { 878 + status = "okay"; 879 + vbus-supply = <&usb3_vbus_reg>; 880 + }; 881 + 1054 882 clocks { 1055 883 compatible = "simple-bus"; 1056 884 #address-cells = <1>; ··· 1070 880 reg=<0>; 1071 881 #clock-cells = <0>; 1072 882 clock-frequency = <32768>; 883 + }; 884 + }; 885 + 886 + gpio-keys { 887 + compatible = "gpio-keys"; 888 + 889 + home { 890 + label = "Home"; 891 + gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; 892 + linux,code = <102>; /* KEY_HOME */ 893 + }; 894 + 895 + power { 896 + label = "Power"; 897 + gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; 898 + linux,code = <116>; /* KEY_POWER */ 899 + gpio-key,wakeup; 900 + }; 901 + 902 + volume_down { 903 + label = "Volume Down"; 904 + gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; 905 + linux,code = <114>; /* KEY_VOLUMEDOWN */ 906 + }; 907 + 908 + volume_up { 909 + label = "Volume Up"; 910 + gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; 911 + linux,code = <115>; /* KEY_VOLUMEUP */ 1073 912 }; 1074 913 }; 1075 914 ··· 1170 951 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; 1171 952 vin-supply = <&tps65090_dcdc1_reg>; 1172 953 }; 954 + 955 + vdd_cam_1v8_reg: regulator@6 { 956 + compatible = "regulator-fixed"; 957 + reg = <6>; 958 + regulator-name = "vdd_cam_1v8_reg"; 959 + regulator-min-microvolt = <1800000>; 960 + regulator-max-microvolt = <1800000>; 961 + enable-active-high; 962 + gpio = <&palmas_gpio 6 0>; 963 + }; 1173 964 }; 1174 965 1175 966 sound { ··· 1193 964 "Speakers", "SPORP", 1194 965 "Speakers", "SPORN", 1195 966 "Speakers", "SPOLP", 1196 - "Speakers", "SPOLN"; 967 + "Speakers", "SPOLN", 968 + "Mic Jack", "MICBIAS1", 969 + "IN2P", "Mic Jack"; 1197 970 1198 971 nvidia,i2s-controller = <&tegra_i2s1>; 1199 972 nvidia,audio-codec = <&rt5640>;
-33
arch/arm/boot/dts/tegra114-pluto.dts
··· 1 - /dts-v1/; 2 - 3 - #include "tegra114.dtsi" 4 - 5 - / { 6 - model = "NVIDIA Tegra114 Pluto evaluation board"; 7 - compatible = "nvidia,pluto", "nvidia,tegra114"; 8 - 9 - memory { 10 - reg = <0x80000000 0x40000000>; 11 - }; 12 - 13 - serial@70006300 { 14 - status = "okay"; 15 - }; 16 - 17 - pmc { 18 - nvidia,invert-interrupt; 19 - }; 20 - 21 - clocks { 22 - compatible = "simple-bus"; 23 - #address-cells = <1>; 24 - #size-cells = <0>; 25 - 26 - clk32k_in: clock { 27 - compatible = "fixed-clock"; 28 - reg=<0>; 29 - #clock-cells = <0>; 30 - clock-frequency = <32768>; 31 - }; 32 - }; 33 - };
+62
arch/arm/boot/dts/tegra114.dtsi
··· 430 430 status = "disable"; 431 431 }; 432 432 433 + usb@7d000000 { 434 + compatible = "nvidia,tegra30-ehci", "usb-ehci"; 435 + reg = <0x7d000000 0x4000>; 436 + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 437 + phy_type = "utmi"; 438 + clocks = <&tegra_car TEGRA114_CLK_USBD>; 439 + nvidia,phy = <&phy1>; 440 + status = "disabled"; 441 + }; 442 + 443 + phy1: usb-phy@7d000000 { 444 + compatible = "nvidia,tegra30-usb-phy"; 445 + reg = <0x7d000000 0x4000 0x7d000000 0x4000>; 446 + phy_type = "utmi"; 447 + clocks = <&tegra_car TEGRA114_CLK_USBD>, 448 + <&tegra_car TEGRA114_CLK_PLL_U>, 449 + <&tegra_car TEGRA114_CLK_USBD>; 450 + clock-names = "reg", "pll_u", "utmi-pads"; 451 + nvidia,hssync-start-delay = <0>; 452 + nvidia,idle-wait-delay = <17>; 453 + nvidia,elastic-limit = <16>; 454 + nvidia,term-range-adj = <6>; 455 + nvidia,xcvr-setup = <9>; 456 + nvidia,xcvr-lsfslew = <0>; 457 + nvidia,xcvr-lsrslew = <3>; 458 + nvidia,hssquelch-level = <2>; 459 + nvidia,hsdiscon-level = <5>; 460 + nvidia,xcvr-hsslew = <12>; 461 + status = "disabled"; 462 + }; 463 + 464 + usb@7d008000 { 465 + compatible = "nvidia,tegra30-ehci", "usb-ehci"; 466 + reg = <0x7d008000 0x4000>; 467 + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 468 + phy_type = "utmi"; 469 + clocks = <&tegra_car TEGRA114_CLK_USB3>; 470 + nvidia,phy = <&phy3>; 471 + status = "disabled"; 472 + }; 473 + 474 + phy3: usb-phy@7d008000 { 475 + compatible = "nvidia,tegra30-usb-phy"; 476 + reg = <0x7d008000 0x4000 0x7d000000 0x4000>; 477 + phy_type = "utmi"; 478 + clocks = <&tegra_car TEGRA114_CLK_USB3>, 479 + <&tegra_car TEGRA114_CLK_PLL_U>, 480 + <&tegra_car TEGRA114_CLK_USBD>; 481 + clock-names = "reg", "pll_u", "utmi-pads"; 482 + nvidia,hssync-start-delay = <0>; 483 + nvidia,idle-wait-delay = <17>; 484 + nvidia,elastic-limit = <16>; 485 + nvidia,term-range-adj = <6>; 486 + nvidia,xcvr-setup = <9>; 487 + nvidia,xcvr-lsfslew = <0>; 488 + nvidia,xcvr-lsrslew = <3>; 489 + nvidia,hssquelch-level = <2>; 490 + nvidia,hsdiscon-level = <5>; 491 + nvidia,xcvr-hsslew = <12>; 492 + status = "disabled"; 493 + }; 494 + 433 495 cpus { 434 496 #address-cells = <1>; 435 497 #size-cells = <0>;
+1 -1
arch/arm/boot/dts/tegra20-colibri-512.dtsi
··· 363 363 }; 364 364 365 365 pmc { 366 - nvidia,suspend-mode = <2>; 366 + nvidia,suspend-mode = <1>; 367 367 nvidia,cpu-pwr-good-time = <5000>; 368 368 nvidia,cpu-pwr-off-time = <5000>; 369 369 nvidia,core-pwr-good-time = <3845 3845>;
+17 -5
arch/arm/boot/dts/tegra20-harmony.dts
··· 335 335 regulator-always-on; 336 336 }; 337 337 338 - ldo0 { 338 + pci_clk_reg: ldo0 { 339 339 regulator-name = "vdd_ldo0,vddio_pex_clk"; 340 340 regulator-min-microvolt = <3300000>; 341 341 regulator-max-microvolt = <3300000>; ··· 417 417 418 418 pmc { 419 419 nvidia,invert-interrupt; 420 - nvidia,suspend-mode = <2>; 420 + nvidia,suspend-mode = <1>; 421 421 nvidia,cpu-pwr-good-time = <5000>; 422 422 nvidia,cpu-pwr-off-time = <5000>; 423 423 nvidia,core-pwr-good-time = <3845 3845>; 424 424 nvidia,core-pwr-off-time = <3875>; 425 425 nvidia,sys-clock-req-active-high; 426 + }; 427 + 428 + pcie-controller { 429 + pex-clk-supply = <&pci_clk_reg>; 430 + vdd-supply = <&pci_vdd_reg>; 431 + status = "okay"; 432 + 433 + pci@1,0 { 434 + status = "okay"; 435 + }; 436 + 437 + pci@2,0 { 438 + status = "okay"; 439 + }; 426 440 }; 427 441 428 442 usb@c5000000 { ··· 657 643 enable-active-high; 658 644 }; 659 645 660 - regulator@3 { 646 + pci_vdd_reg: regulator@3 { 661 647 compatible = "regulator-fixed"; 662 648 reg = <3>; 663 649 regulator-name = "vdd_1v05"; ··· 665 651 regulator-max-microvolt = <1050000>; 666 652 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>; 667 653 enable-active-high; 668 - /* Hack until board-harmony-pcie.c is removed */ 669 - status = "disabled"; 670 654 }; 671 655 672 656 regulator@4 {
+1 -1
arch/arm/boot/dts/tegra20-paz00.dts
··· 417 417 418 418 pmc { 419 419 nvidia,invert-interrupt; 420 - nvidia,suspend-mode = <2>; 420 + nvidia,suspend-mode = <1>; 421 421 nvidia,cpu-pwr-good-time = <2000>; 422 422 nvidia,cpu-pwr-off-time = <0>; 423 423 nvidia,core-pwr-good-time = <3845 3845>;
+2 -2
arch/arm/boot/dts/tegra20-seaboard.dts
··· 518 518 519 519 pmc { 520 520 nvidia,invert-interrupt; 521 - nvidia,suspend-mode = <2>; 521 + nvidia,suspend-mode = <1>; 522 522 nvidia,cpu-pwr-good-time = <5000>; 523 523 nvidia,cpu-pwr-off-time = <5000>; 524 524 nvidia,core-pwr-good-time = <3845 3845>; ··· 829 829 regulator-min-microvolt = <5000000>; 830 830 regulator-max-microvolt = <5000000>; 831 831 enable-active-high; 832 - gpio = <&gpio 24 0>; /* PD0 */ 832 + gpio = <&gpio TEGRA_GPIO(D, 0) 0>; 833 833 }; 834 834 }; 835 835
+17 -2
arch/arm/boot/dts/tegra20-tamonten.dtsi
··· 366 366 regulator-always-on; 367 367 }; 368 368 369 - ldo0 { 369 + pci_clk_reg: ldo0 { 370 370 regulator-name = "vdd_ldo0,vddio_pex_clk"; 371 371 regulator-min-microvolt = <3300000>; 372 372 regulator-max-microvolt = <3300000>; ··· 459 459 460 460 pmc { 461 461 nvidia,invert-interrupt; 462 - nvidia,suspend-mode = <2>; 462 + nvidia,suspend-mode = <1>; 463 463 nvidia,cpu-pwr-good-time = <5000>; 464 464 nvidia,cpu-pwr-off-time = <5000>; 465 465 nvidia,core-pwr-good-time = <3845 3845>; 466 466 nvidia,core-pwr-off-time = <3875>; 467 467 nvidia,sys-clock-req-active-high; 468 + }; 469 + 470 + pcie-controller { 471 + pex-clk-supply = <&pci_clk_reg>; 472 + vdd-supply = <&pci_vdd_reg>; 468 473 }; 469 474 470 475 usb@c5008000 { ··· 513 508 regulator-min-microvolt = <5000000>; 514 509 regulator-max-microvolt = <5000000>; 515 510 regulator-always-on; 511 + }; 512 + 513 + pci_vdd_reg: regulator@1 { 514 + compatible = "regulator-fixed"; 515 + reg = <1>; 516 + regulator-name = "vdd_1v05"; 517 + regulator-min-microvolt = <1050000>; 518 + regulator-max-microvolt = <1050000>; 519 + gpio = <&pmic 2 0>; 520 + enable-active-high; 516 521 }; 517 522 }; 518 523 };
+8
arch/arm/boot/dts/tegra20-tec.dts
··· 32 32 }; 33 33 }; 34 34 35 + pcie-controller { 36 + status = "okay"; 37 + 38 + pci@1,0 { 39 + status = "okay"; 40 + }; 41 + }; 42 + 35 43 sound { 36 44 compatible = "ad,tegra-audio-wm8903-tec", 37 45 "nvidia,tegra-audio-wm8903";
+30 -2
arch/arm/boot/dts/tegra20-trimslice.dts
··· 302 302 }; 303 303 304 304 pmc { 305 - nvidia,suspend-mode = <2>; 305 + nvidia,suspend-mode = <1>; 306 306 nvidia,cpu-pwr-good-time = <5000>; 307 307 nvidia,cpu-pwr-off-time = <5000>; 308 308 nvidia,core-pwr-good-time = <3845 3845>; 309 309 nvidia,core-pwr-off-time = <3875>; 310 310 nvidia,sys-clock-req-active-high; 311 + }; 312 + 313 + pcie-controller { 314 + status = "okay"; 315 + pex-clk-supply = <&pci_clk_reg>; 316 + vdd-supply = <&pci_vdd_reg>; 317 + 318 + pci@1,0 { 319 + status = "okay"; 320 + }; 311 321 }; 312 322 313 323 usb@c5000000 { ··· 421 411 regulator-min-microvolt = <5000000>; 422 412 regulator-max-microvolt = <5000000>; 423 413 enable-active-high; 424 - gpio = <&gpio 170 0>; /* PV2 */ 414 + gpio = <&gpio TEGRA_GPIO(V, 2) 0>; 415 + }; 416 + 417 + pci_clk_reg: regulator@3 { 418 + compatible = "regulator-fixed"; 419 + reg = <3>; 420 + regulator-name = "pci_clk"; 421 + regulator-min-microvolt = <3300000>; 422 + regulator-max-microvolt = <3300000>; 423 + regulator-always-on; 424 + }; 425 + 426 + pci_vdd_reg: regulator@4 { 427 + compatible = "regulator-fixed"; 428 + reg = <4>; 429 + regulator-name = "pci_vdd"; 430 + regulator-min-microvolt = <1050000>; 431 + regulator-max-microvolt = <1050000>; 432 + regulator-always-on; 425 433 }; 426 434 }; 427 435
+1 -1
arch/arm/boot/dts/tegra20-ventana.dts
··· 494 494 495 495 pmc { 496 496 nvidia,invert-interrupt; 497 - nvidia,suspend-mode = <2>; 497 + nvidia,suspend-mode = <1>; 498 498 nvidia,cpu-pwr-good-time = <2000>; 499 499 nvidia,cpu-pwr-off-time = <100>; 500 500 nvidia,core-pwr-good-time = <3845 3845>;
+1 -1
arch/arm/boot/dts/tegra20-whistler.dts
··· 497 497 498 498 pmc { 499 499 nvidia,invert-interrupt; 500 - nvidia,suspend-mode = <2>; 500 + nvidia,suspend-mode = <1>; 501 501 nvidia,cpu-pwr-good-time = <2000>; 502 502 nvidia,cpu-pwr-off-time = <1000>; 503 503 nvidia,core-pwr-good-time = <0 3845>;
+55
arch/arm/boot/dts/tegra20.dtsi
··· 455 455 #size-cells = <0>; 456 456 }; 457 457 458 + pcie-controller { 459 + compatible = "nvidia,tegra20-pcie"; 460 + device_type = "pci"; 461 + reg = <0x80003000 0x00000800 /* PADS registers */ 462 + 0x80003800 0x00000200 /* AFI registers */ 463 + 0x90000000 0x10000000>; /* configuration space */ 464 + reg-names = "pads", "afi", "cs"; 465 + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH /* controller interrupt */ 466 + GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ 467 + interrupt-names = "intr", "msi"; 468 + 469 + bus-range = <0x00 0xff>; 470 + #address-cells = <3>; 471 + #size-cells = <2>; 472 + 473 + ranges = <0x82000000 0 0x80000000 0x80000000 0 0x00001000 /* port 0 registers */ 474 + 0x82000000 0 0x80001000 0x80001000 0 0x00001000 /* port 1 registers */ 475 + 0x81000000 0 0 0x82000000 0 0x00010000 /* downstream I/O */ 476 + 0x82000000 0 0xa0000000 0xa0000000 0 0x08000000 /* non-prefetchable memory */ 477 + 0xc2000000 0 0xa8000000 0xa8000000 0 0x18000000>; /* prefetchable memory */ 478 + 479 + clocks = <&tegra_car TEGRA20_CLK_PEX>, 480 + <&tegra_car TEGRA20_CLK_AFI>, 481 + <&tegra_car TEGRA20_CLK_PCIE_XCLK>, 482 + <&tegra_car TEGRA20_CLK_PLL_E>; 483 + clock-names = "pex", "afi", "pcie_xclk", "pll_e"; 484 + status = "disabled"; 485 + 486 + pci@1,0 { 487 + device_type = "pci"; 488 + assigned-addresses = <0x82000800 0 0x80000000 0 0x1000>; 489 + reg = <0x000800 0 0 0 0>; 490 + status = "disabled"; 491 + 492 + #address-cells = <3>; 493 + #size-cells = <2>; 494 + ranges; 495 + 496 + nvidia,num-lanes = <2>; 497 + }; 498 + 499 + pci@2,0 { 500 + device_type = "pci"; 501 + assigned-addresses = <0x82001000 0 0x80001000 0 0x1000>; 502 + reg = <0x001000 0 0 0 0>; 503 + status = "disabled"; 504 + 505 + #address-cells = <3>; 506 + #size-cells = <2>; 507 + ranges; 508 + 509 + nvidia,num-lanes = <2>; 510 + }; 511 + }; 512 + 458 513 usb@c5000000 { 459 514 compatible = "nvidia,tegra20-ehci", "usb-ehci"; 460 515 reg = <0xc5000000 0x4000>;
+59 -5
arch/arm/boot/dts/tegra30-beaver.dts
··· 10 10 reg = <0x80000000 0x7ff00000>; 11 11 }; 12 12 13 + pcie-controller { 14 + status = "okay"; 15 + pex-clk-supply = <&sys_3v3_pexs_reg>; 16 + vdd-supply = <&ldo1_reg>; 17 + avdd-supply = <&ldo2_reg>; 18 + 19 + pci@1,0 { 20 + status = "okay"; 21 + nvidia,num-lanes = <2>; 22 + }; 23 + 24 + pci@2,0 { 25 + nvidia,num-lanes = <2>; 26 + }; 27 + 28 + pci@3,0 { 29 + status = "okay"; 30 + nvidia,num-lanes = <2>; 31 + }; 32 + }; 33 + 34 + host1x { 35 + hdmi { 36 + status = "okay"; 37 + 38 + vdd-supply = <&sys_3v3_reg>; 39 + pll-supply = <&vio_reg>; 40 + 41 + nvidia,hpd-gpio = 42 + <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; 43 + nvidia,ddc-i2c-bus = <&hdmiddc>; 44 + }; 45 + }; 46 + 13 47 pinmux { 14 48 pinctrl-names = "default"; 15 49 pinctrl-0 = <&state_default>; ··· 110 76 nvidia,pull = <0>; 111 77 nvidia,tristate = <0>; 112 78 }; 79 + pex_l1_prsnt_n_pdd4 { 80 + nvidia,pins = "pex_l1_prsnt_n_pdd4", 81 + "pex_l1_clkreq_n_pdd6"; 82 + nvidia,pull = <2>; 83 + }; 113 84 sdio3 { 114 85 nvidia,pins = "drive_sdio3"; 115 86 nvidia,high-speed-mode = <0>; ··· 123 84 nvidia,pull-up-strength = <42>; 124 85 nvidia,slew-rate-rising = <1>; 125 86 nvidia,slew-rate-falling = <1>; 87 + }; 88 + gpv { 89 + nvidia,pins = "drive_gpv"; 90 + nvidia,pull-up-strength = <16>; 126 91 }; 127 92 }; 128 93 }; ··· 150 107 clock-frequency = <100000>; 151 108 }; 152 109 153 - i2c@7000c700 { 110 + hdmiddc: i2c@7000c700 { 154 111 status = "okay"; 155 112 clock-frequency = <100000>; 156 113 }; ··· 305 262 pmc { 306 263 status = "okay"; 307 264 nvidia,invert-interrupt; 308 - nvidia,suspend-mode = <2>; 265 + nvidia,suspend-mode = <1>; 309 266 nvidia,cpu-pwr-good-time = <2000>; 310 267 nvidia,cpu-pwr-off-time = <200>; 311 268 nvidia,core-pwr-good-time = <3845 3845>; ··· 326 283 status = "okay"; 327 284 bus-width = <8>; 328 285 non-removable; 286 + }; 287 + 288 + usb@7d008000 { 289 + status = "okay"; 290 + }; 291 + 292 + usb-phy@7d008000 { 293 + vbus-supply = <&usb3_vbus_reg>; 294 + status = "okay"; 329 295 }; 330 296 331 297 clocks { ··· 409 357 regulator-min-microvolt = <5000000>; 410 358 regulator-max-microvolt = <5000000>; 411 359 enable-active-high; 412 - gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>; 360 + gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>; 413 361 gpio-open-drain; 414 362 vin-supply = <&vdd_5v_in_reg>; 415 363 }; ··· 421 369 regulator-min-microvolt = <5000000>; 422 370 regulator-max-microvolt = <5000000>; 423 371 enable-active-high; 424 - gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; 372 + gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>; 425 373 gpio-open-drain; 426 374 vin-supply = <&vdd_5v_in_reg>; 427 375 }; ··· 473 421 474 422 nvidia,audio-routing = 475 423 "Headphones", "HPOR", 476 - "Headphones", "HPOL"; 424 + "Headphones", "HPOL", 425 + "Mic Jack", "MICBIAS1", 426 + "IN2P", "Mic Jack"; 477 427 478 428 nvidia,i2s-controller = <&tegra_i2s1>; 479 429 nvidia,audio-codec = <&rt5640>;
+50 -14
arch/arm/boot/dts/tegra30-cardhu.dtsi
··· 31 31 reg = <0x80000000 0x40000000>; 32 32 }; 33 33 34 + pcie-controller { 35 + status = "okay"; 36 + pex-clk-supply = <&pex_hvdd_3v3_reg>; 37 + vdd-supply = <&ldo1_reg>; 38 + avdd-supply = <&ldo2_reg>; 39 + 40 + pci@1,0 { 41 + nvidia,num-lanes = <4>; 42 + }; 43 + 44 + pci@2,0 { 45 + nvidia,num-lanes = <1>; 46 + }; 47 + 48 + pci@3,0 { 49 + status = "okay"; 50 + nvidia,num-lanes = <1>; 51 + }; 52 + }; 53 + 34 54 pinmux { 35 55 pinctrl-names = "default"; 36 56 pinctrl-0 = <&state_default>; ··· 193 173 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; 194 174 }; 195 175 196 - tps62361 { 197 - compatible = "ti,tps62361"; 198 - reg = <0x60>; 199 - 200 - regulator-name = "tps62361-vout"; 201 - regulator-min-microvolt = <500000>; 202 - regulator-max-microvolt = <1500000>; 203 - regulator-boot-on; 204 - regulator-always-on; 205 - ti,vsel0-state-high; 206 - ti,vsel1-state-high; 207 - }; 208 - 209 176 pmic: tps65911@2d { 210 177 compatible = "ti,tps65911"; 211 178 reg = <0x2d>; ··· 293 286 }; 294 287 }; 295 288 }; 289 + 290 + nct1008 { 291 + compatible = "onnn,nct1008"; 292 + reg = <0x4c>; 293 + interrupt-parent = <&gpio>; 294 + interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>; 295 + }; 296 + 297 + tps62361 { 298 + compatible = "ti,tps62361"; 299 + reg = <0x60>; 300 + 301 + regulator-name = "tps62361-vout"; 302 + regulator-min-microvolt = <500000>; 303 + regulator-max-microvolt = <1500000>; 304 + regulator-boot-on; 305 + regulator-always-on; 306 + ti,vsel0-state-high; 307 + ti,vsel1-state-high; 308 + }; 296 309 }; 297 310 298 311 spi@7000da00 { ··· 334 307 pmc { 335 308 status = "okay"; 336 309 nvidia,invert-interrupt; 337 - nvidia,suspend-mode = <2>; 310 + nvidia,suspend-mode = <1>; 338 311 nvidia,cpu-pwr-good-time = <2000>; 339 312 nvidia,cpu-pwr-off-time = <200>; 340 313 nvidia,core-pwr-good-time = <3845 3845>; ··· 355 328 status = "okay"; 356 329 bus-width = <8>; 357 330 non-removable; 331 + }; 332 + 333 + usb@7d008000 { 334 + status = "okay"; 335 + }; 336 + 337 + usb-phy@7d008000 { 338 + vbus-supply = <&usb3_vbus_reg>; 339 + status = "okay"; 358 340 }; 359 341 360 342 clocks {
+156
arch/arm/boot/dts/tegra30.dtsi
··· 16 16 serial4 = &uarte; 17 17 }; 18 18 19 + pcie-controller { 20 + compatible = "nvidia,tegra30-pcie"; 21 + device_type = "pci"; 22 + reg = <0x00003000 0x00000800 /* PADS registers */ 23 + 0x00003800 0x00000200 /* AFI registers */ 24 + 0x10000000 0x10000000>; /* configuration space */ 25 + reg-names = "pads", "afi", "cs"; 26 + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH /* controller interrupt */ 27 + GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ 28 + interrupt-names = "intr", "msi"; 29 + 30 + bus-range = <0x00 0xff>; 31 + #address-cells = <3>; 32 + #size-cells = <2>; 33 + 34 + ranges = <0x82000000 0 0x00000000 0x00000000 0 0x00001000 /* port 0 configuration space */ 35 + 0x82000000 0 0x00001000 0x00001000 0 0x00001000 /* port 1 configuration space */ 36 + 0x82000000 0 0x00004000 0x00004000 0 0x00001000 /* port 2 configuration space */ 37 + 0x81000000 0 0 0x02000000 0 0x00010000 /* downstream I/O */ 38 + 0x82000000 0 0x20000000 0x20000000 0 0x08000000 /* non-prefetchable memory */ 39 + 0xc2000000 0 0x28000000 0x28000000 0 0x18000000>; /* prefetchable memory */ 40 + 41 + clocks = <&tegra_car TEGRA30_CLK_PCIE>, 42 + <&tegra_car TEGRA30_CLK_AFI>, 43 + <&tegra_car TEGRA30_CLK_PCIEX>, 44 + <&tegra_car TEGRA30_CLK_PLL_E>, 45 + <&tegra_car TEGRA30_CLK_CML0>; 46 + clock-names = "pex", "afi", "pcie_xclk", "pll_e", "cml"; 47 + status = "disabled"; 48 + 49 + pci@1,0 { 50 + device_type = "pci"; 51 + assigned-addresses = <0x82000800 0 0x00000000 0 0x1000>; 52 + reg = <0x000800 0 0 0 0>; 53 + status = "disabled"; 54 + 55 + #address-cells = <3>; 56 + #size-cells = <2>; 57 + ranges; 58 + 59 + nvidia,num-lanes = <2>; 60 + }; 61 + 62 + pci@2,0 { 63 + device_type = "pci"; 64 + assigned-addresses = <0x82001000 0 0x00001000 0 0x1000>; 65 + reg = <0x001000 0 0 0 0>; 66 + status = "disabled"; 67 + 68 + #address-cells = <3>; 69 + #size-cells = <2>; 70 + ranges; 71 + 72 + nvidia,num-lanes = <2>; 73 + }; 74 + 75 + pci@3,0 { 76 + device_type = "pci"; 77 + assigned-addresses = <0x82001800 0 0x00004000 0 0x1000>; 78 + reg = <0x001800 0 0 0 0>; 79 + status = "disabled"; 80 + 81 + #address-cells = <3>; 82 + #size-cells = <2>; 83 + ranges; 84 + 85 + nvidia,num-lanes = <2>; 86 + }; 87 + }; 88 + 19 89 host1x { 20 90 compatible = "nvidia,tegra30-host1x", "simple-bus"; 21 91 reg = <0x50000000 0x00024000>; ··· 628 558 reg = <0x78000600 0x200>; 629 559 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 630 560 clocks = <&tegra_car TEGRA30_CLK_SDMMC4>; 561 + status = "disabled"; 562 + }; 563 + 564 + usb@7d000000 { 565 + compatible = "nvidia,tegra30-ehci", "usb-ehci"; 566 + reg = <0x7d000000 0x4000>; 567 + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 568 + phy_type = "utmi"; 569 + clocks = <&tegra_car TEGRA30_CLK_USBD>; 570 + nvidia,needs-double-reset; 571 + nvidia,phy = <&phy1>; 572 + status = "disabled"; 573 + }; 574 + 575 + phy1: usb-phy@7d000000 { 576 + compatible = "nvidia,tegra30-usb-phy"; 577 + reg = <0x7d000000 0x4000 0x7d000000 0x4000>; 578 + phy_type = "utmi"; 579 + clocks = <&tegra_car TEGRA30_CLK_USBD>, 580 + <&tegra_car TEGRA30_CLK_PLL_U>, 581 + <&tegra_car TEGRA30_CLK_USBD>; 582 + clock-names = "reg", "pll_u", "utmi-pads"; 583 + nvidia,hssync-start-delay = <9>; 584 + nvidia,idle-wait-delay = <17>; 585 + nvidia,elastic-limit = <16>; 586 + nvidia,term-range-adj = <6>; 587 + nvidia,xcvr-setup = <51>; 588 + nvidia.xcvr-setup-use-fuses; 589 + nvidia,xcvr-lsfslew = <1>; 590 + nvidia,xcvr-lsrslew = <1>; 591 + nvidia,xcvr-hsslew = <32>; 592 + nvidia,hssquelch-level = <2>; 593 + nvidia,hsdiscon-level = <5>; 594 + status = "disabled"; 595 + }; 596 + 597 + usb@7d004000 { 598 + compatible = "nvidia,tegra30-ehci", "usb-ehci"; 599 + reg = <0x7d004000 0x4000>; 600 + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 601 + phy_type = "ulpi"; 602 + clocks = <&tegra_car TEGRA30_CLK_USB2>; 603 + nvidia,phy = <&phy2>; 604 + status = "disabled"; 605 + }; 606 + 607 + phy2: usb-phy@7d004000 { 608 + compatible = "nvidia,tegra30-usb-phy"; 609 + reg = <0x7d004000 0x4000>; 610 + phy_type = "ulpi"; 611 + clocks = <&tegra_car TEGRA30_CLK_USB2>, 612 + <&tegra_car TEGRA30_CLK_PLL_U>, 613 + <&tegra_car TEGRA30_CLK_CDEV2>; 614 + clock-names = "reg", "pll_u", "ulpi-link"; 615 + status = "disabled"; 616 + }; 617 + 618 + usb@7d008000 { 619 + compatible = "nvidia,tegra30-ehci", "usb-ehci"; 620 + reg = <0x7d008000 0x4000>; 621 + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 622 + phy_type = "utmi"; 623 + clocks = <&tegra_car TEGRA30_CLK_USB3>; 624 + nvidia,phy = <&phy3>; 625 + status = "disabled"; 626 + }; 627 + 628 + phy3: usb-phy@7d008000 { 629 + compatible = "nvidia,tegra30-usb-phy"; 630 + reg = <0x7d008000 0x4000 0x7d000000 0x4000>; 631 + phy_type = "utmi"; 632 + clocks = <&tegra_car TEGRA30_CLK_USB3>, 633 + <&tegra_car TEGRA30_CLK_PLL_U>, 634 + <&tegra_car TEGRA30_CLK_USBD>; 635 + clock-names = "reg", "pll_u", "utmi-pads"; 636 + nvidia,hssync-start-delay = <0>; 637 + nvidia,idle-wait-delay = <17>; 638 + nvidia,elastic-limit = <16>; 639 + nvidia,term-range-adj = <6>; 640 + nvidia,xcvr-setup = <51>; 641 + nvidia.xcvr-setup-use-fuses; 642 + nvidia,xcvr-lsfslew = <2>; 643 + nvidia,xcvr-lsrslew = <2>; 644 + nvidia,xcvr-hsslew = <32>; 645 + nvidia,hssquelch-level = <2>; 646 + nvidia,hsdiscon-level = <5>; 631 647 status = "disabled"; 632 648 }; 633 649