Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu: Add generic capability class

Define a utility macro for defining capabilities and their attributes.
Capability attributes are read-only, write-only, read-write.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Lijo Lazar and committed by
Alex Deucher
1f9ba8ea c3cdc3be

+92
+1
drivers/gpu/drm/amd/amdgpu/amdgpu.h
··· 63 63 #include "kgd_pp_interface.h" 64 64 65 65 #include "amd_shared.h" 66 + #include "amdgpu_utils.h" 66 67 #include "amdgpu_mode.h" 67 68 #include "amdgpu_ih.h" 68 69 #include "amdgpu_irq.h"
+91
drivers/gpu/drm/amd/amdgpu/amdgpu_utils.h
··· 1 + /* SPDX-License-Identifier: MIT */ 2 + /* 3 + * Copyright 2025 Advanced Micro Devices, Inc. 4 + * 5 + * Permission is hereby granted, free of charge, to any person obtaining a 6 + * copy of this software and associated documentation files (the "Software"), 7 + * to deal in the Software without restriction, including without limitation 8 + * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 + * and/or sell copies of the Software, and to permit persons to whom the 10 + * Software is furnished to do so, subject to the following conditions: 11 + * 12 + * The above copyright notice and this permission notice shall be included in 13 + * all copies or substantial portions of the Software. 14 + * 15 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 + * OTHER DEALINGS IN THE SOFTWARE. 22 + * 23 + */ 24 + 25 + #ifndef AMDGPU_UTILS_H_ 26 + #define AMDGPU_UTILS_H_ 27 + 28 + /* ---------- Generic 2‑bit capability attribute encoding ---------- 29 + * 00 INVALID, 01 RO, 10 WO, 11 RW 30 + */ 31 + enum amdgpu_cap_attr { 32 + AMDGPU_CAP_ATTR_INVALID = 0, 33 + AMDGPU_CAP_ATTR_RO = 1 << 0, 34 + AMDGPU_CAP_ATTR_WO = 1 << 1, 35 + AMDGPU_CAP_ATTR_RW = (AMDGPU_CAP_ATTR_RO | AMDGPU_CAP_ATTR_WO), 36 + }; 37 + 38 + #define AMDGPU_CAP_ATTR_BITS 2 39 + #define AMDGPU_CAP_ATTR_MAX ((1U << AMDGPU_CAP_ATTR_BITS) - 1) 40 + 41 + /* Internal helper to build helpers for a given enum NAME */ 42 + #define DECLARE_ATTR_CAP_CLASS_HELPERS(NAME) \ 43 + enum { NAME##_BITMAP_BITS = NAME##_COUNT * AMDGPU_CAP_ATTR_BITS }; \ 44 + struct NAME##_caps { \ 45 + DECLARE_BITMAP(bmap, NAME##_BITMAP_BITS); \ 46 + }; \ 47 + static inline unsigned int NAME##_ATTR_START(enum NAME##_cap_id cap) \ 48 + { return (unsigned int)cap * AMDGPU_CAP_ATTR_BITS; } \ 49 + static inline void NAME##_attr_init(struct NAME##_caps *c) \ 50 + { if (c) bitmap_zero(c->bmap, NAME##_BITMAP_BITS); } \ 51 + static inline int NAME##_attr_set(struct NAME##_caps *c, \ 52 + enum NAME##_cap_id cap, enum amdgpu_cap_attr attr) \ 53 + { \ 54 + if (!c) \ 55 + return -EINVAL; \ 56 + if (cap >= NAME##_COUNT) \ 57 + return -EINVAL; \ 58 + if ((unsigned int)attr > AMDGPU_CAP_ATTR_MAX) \ 59 + return -EINVAL; \ 60 + bitmap_write(c->bmap, (unsigned long)attr, \ 61 + NAME##_ATTR_START(cap), AMDGPU_CAP_ATTR_BITS); \ 62 + return 0; \ 63 + } \ 64 + static inline int NAME##_attr_get(const struct NAME##_caps *c, \ 65 + enum NAME##_cap_id cap, enum amdgpu_cap_attr *out) \ 66 + { \ 67 + unsigned long v; \ 68 + if (!c || !out) \ 69 + return -EINVAL; \ 70 + if (cap >= NAME##_COUNT) \ 71 + return -EINVAL; \ 72 + v = bitmap_read(c->bmap, NAME##_ATTR_START(cap), AMDGPU_CAP_ATTR_BITS); \ 73 + *out = (enum amdgpu_cap_attr)v; \ 74 + return 0; \ 75 + } \ 76 + static inline bool NAME##_cap_is_ro(const struct NAME##_caps *c, enum NAME##_cap_id id) \ 77 + { enum amdgpu_cap_attr a; return !NAME##_attr_get(c, id, &a) && a == AMDGPU_CAP_ATTR_RO; } \ 78 + static inline bool NAME##_cap_is_wo(const struct NAME##_caps *c, enum NAME##_cap_id id) \ 79 + { enum amdgpu_cap_attr a; return !NAME##_attr_get(c, id, &a) && a == AMDGPU_CAP_ATTR_WO; } \ 80 + static inline bool NAME##_cap_is_rw(const struct NAME##_caps *c, enum NAME##_cap_id id) \ 81 + { enum amdgpu_cap_attr a; return !NAME##_attr_get(c, id, &a) && a == AMDGPU_CAP_ATTR_RW; } 82 + 83 + /* Element expander for enum creation */ 84 + #define _CAP_ENUM_ELEM(x) x, 85 + 86 + /* Public macro: declare enum + helpers from an X‑macro list */ 87 + #define DECLARE_ATTR_CAP_CLASS(NAME, LIST_MACRO) \ 88 + enum NAME##_cap_id { LIST_MACRO(_CAP_ENUM_ELEM) NAME##_COUNT }; \ 89 + DECLARE_ATTR_CAP_CLASS_HELPERS(NAME) 90 + 91 + #endif /* AMDGPU_UTILS_H_ */