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arch: ia64: Remove rest of perfmon support

Perfmon support (used by oprofile earlier) was removed by commit
ecf5b72d5f66 ("ia64: Remove perfmon") earlier, but it missed few files
to remove/update.

Clean it up.

Suggested-by: Arnd Bergmann <arnd@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Robert Richter <rric@kernel.org>
Acked-by: William Cohen <wcohen@redhat.com>
Acked-by: Al Viro <viro@zeniv.linux.org.uk>
Acked-by: Thomas Gleixner <tglx@linutronix.de>

Viresh Kumar 1f4e74c0 1941b389

+1 -1219
-1
arch/ia64/include/asm/hw_irq.h
··· 69 69 #define IA64_NUM_DEVICE_VECTORS (IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1) 70 70 71 71 #define IA64_MCA_RENDEZ_VECTOR 0xe8 /* MCA rendez interrupt */ 72 - #define IA64_PERFMON_VECTOR 0xee /* performance monitor interrupt vector */ 73 72 #define IA64_TIMER_VECTOR 0xef /* use highest-prio group 15 interrupt for timer */ 74 73 #define IA64_MCA_WAKEUP_VECTOR 0xf0 /* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */ 75 74 #define IA64_IPI_LOCAL_TLB_FLUSH 0xfc /* SMP flush local TLB */
-111
arch/ia64/include/asm/perfmon.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * Copyright (C) 2001-2003 Hewlett-Packard Co 4 - * Stephane Eranian <eranian@hpl.hp.com> 5 - */ 6 - #ifndef _ASM_IA64_PERFMON_H 7 - #define _ASM_IA64_PERFMON_H 8 - 9 - #include <uapi/asm/perfmon.h> 10 - 11 - 12 - extern long perfmonctl(int fd, int cmd, void *arg, int narg); 13 - 14 - typedef struct { 15 - void (*handler)(int irq, void *arg, struct pt_regs *regs); 16 - } pfm_intr_handler_desc_t; 17 - 18 - extern void pfm_save_regs (struct task_struct *); 19 - extern void pfm_load_regs (struct task_struct *); 20 - 21 - extern void pfm_exit_thread(struct task_struct *); 22 - extern int pfm_use_debug_registers(struct task_struct *); 23 - extern int pfm_release_debug_registers(struct task_struct *); 24 - extern void pfm_syst_wide_update_task(struct task_struct *, unsigned long info, int is_ctxswin); 25 - extern void pfm_inherit(struct task_struct *task, struct pt_regs *regs); 26 - extern void pfm_init_percpu(void); 27 - extern void pfm_handle_work(void); 28 - extern int pfm_install_alt_pmu_interrupt(pfm_intr_handler_desc_t *h); 29 - extern int pfm_remove_alt_pmu_interrupt(pfm_intr_handler_desc_t *h); 30 - 31 - 32 - 33 - /* 34 - * Reset PMD register flags 35 - */ 36 - #define PFM_PMD_SHORT_RESET 0 37 - #define PFM_PMD_LONG_RESET 1 38 - 39 - typedef union { 40 - unsigned int val; 41 - struct { 42 - unsigned int notify_user:1; /* notify user program of overflow */ 43 - unsigned int reset_ovfl_pmds:1; /* reset overflowed PMDs */ 44 - unsigned int block_task:1; /* block monitored task on kernel exit */ 45 - unsigned int mask_monitoring:1; /* mask monitors via PMCx.plm */ 46 - unsigned int reserved:28; /* for future use */ 47 - } bits; 48 - } pfm_ovfl_ctrl_t; 49 - 50 - typedef struct { 51 - unsigned char ovfl_pmd; /* index of overflowed PMD */ 52 - unsigned char ovfl_notify; /* =1 if monitor requested overflow notification */ 53 - unsigned short active_set; /* event set active at the time of the overflow */ 54 - pfm_ovfl_ctrl_t ovfl_ctrl; /* return: perfmon controls to set by handler */ 55 - 56 - unsigned long pmd_last_reset; /* last reset value of of the PMD */ 57 - unsigned long smpl_pmds[4]; /* bitmask of other PMD of interest on overflow */ 58 - unsigned long smpl_pmds_values[PMU_MAX_PMDS]; /* values for the other PMDs of interest */ 59 - unsigned long pmd_value; /* current 64-bit value of the PMD */ 60 - unsigned long pmd_eventid; /* eventid associated with PMD */ 61 - } pfm_ovfl_arg_t; 62 - 63 - 64 - typedef struct { 65 - char *fmt_name; 66 - pfm_uuid_t fmt_uuid; 67 - size_t fmt_arg_size; 68 - unsigned long fmt_flags; 69 - 70 - int (*fmt_validate)(struct task_struct *task, unsigned int flags, int cpu, void *arg); 71 - int (*fmt_getsize)(struct task_struct *task, unsigned int flags, int cpu, void *arg, unsigned long *size); 72 - int (*fmt_init)(struct task_struct *task, void *buf, unsigned int flags, int cpu, void *arg); 73 - int (*fmt_handler)(struct task_struct *task, void *buf, pfm_ovfl_arg_t *arg, struct pt_regs *regs, unsigned long stamp); 74 - int (*fmt_restart)(struct task_struct *task, pfm_ovfl_ctrl_t *ctrl, void *buf, struct pt_regs *regs); 75 - int (*fmt_restart_active)(struct task_struct *task, pfm_ovfl_ctrl_t *ctrl, void *buf, struct pt_regs *regs); 76 - int (*fmt_exit)(struct task_struct *task, void *buf, struct pt_regs *regs); 77 - 78 - struct list_head fmt_list; 79 - } pfm_buffer_fmt_t; 80 - 81 - extern int pfm_register_buffer_fmt(pfm_buffer_fmt_t *fmt); 82 - extern int pfm_unregister_buffer_fmt(pfm_uuid_t uuid); 83 - 84 - /* 85 - * perfmon interface exported to modules 86 - */ 87 - extern int pfm_mod_read_pmds(struct task_struct *, void *req, unsigned int nreq, struct pt_regs *regs); 88 - extern int pfm_mod_write_pmcs(struct task_struct *, void *req, unsigned int nreq, struct pt_regs *regs); 89 - extern int pfm_mod_write_ibrs(struct task_struct *task, void *req, unsigned int nreq, struct pt_regs *regs); 90 - extern int pfm_mod_write_dbrs(struct task_struct *task, void *req, unsigned int nreq, struct pt_regs *regs); 91 - 92 - /* 93 - * describe the content of the local_cpu_date->pfm_syst_info field 94 - */ 95 - #define PFM_CPUINFO_SYST_WIDE 0x1 /* if set a system wide session exists */ 96 - #define PFM_CPUINFO_DCR_PP 0x2 /* if set the system wide session has started */ 97 - #define PFM_CPUINFO_EXCL_IDLE 0x4 /* the system wide session excludes the idle task */ 98 - 99 - /* 100 - * sysctl control structure. visible to sampling formats 101 - */ 102 - typedef struct { 103 - int debug; /* turn on/off debugging via syslog */ 104 - int debug_ovfl; /* turn on/off debug printk in overflow handler */ 105 - int fastctxsw; /* turn on/off fast (unsecure) ctxsw */ 106 - int expert_mode; /* turn on/off value checking */ 107 - } pfm_sysctl_t; 108 - extern pfm_sysctl_t pfm_sysctl; 109 - 110 - 111 - #endif /* _ASM_IA64_PERFMON_H */
-178
arch/ia64/include/uapi/asm/perfmon.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 - /* 3 - * Copyright (C) 2001-2003 Hewlett-Packard Co 4 - * Stephane Eranian <eranian@hpl.hp.com> 5 - */ 6 - 7 - #ifndef _UAPI_ASM_IA64_PERFMON_H 8 - #define _UAPI_ASM_IA64_PERFMON_H 9 - 10 - /* 11 - * perfmon commands supported on all CPU models 12 - */ 13 - #define PFM_WRITE_PMCS 0x01 14 - #define PFM_WRITE_PMDS 0x02 15 - #define PFM_READ_PMDS 0x03 16 - #define PFM_STOP 0x04 17 - #define PFM_START 0x05 18 - #define PFM_ENABLE 0x06 /* obsolete */ 19 - #define PFM_DISABLE 0x07 /* obsolete */ 20 - #define PFM_CREATE_CONTEXT 0x08 21 - #define PFM_DESTROY_CONTEXT 0x09 /* obsolete use close() */ 22 - #define PFM_RESTART 0x0a 23 - #define PFM_PROTECT_CONTEXT 0x0b /* obsolete */ 24 - #define PFM_GET_FEATURES 0x0c 25 - #define PFM_DEBUG 0x0d 26 - #define PFM_UNPROTECT_CONTEXT 0x0e /* obsolete */ 27 - #define PFM_GET_PMC_RESET_VAL 0x0f 28 - #define PFM_LOAD_CONTEXT 0x10 29 - #define PFM_UNLOAD_CONTEXT 0x11 30 - 31 - /* 32 - * PMU model specific commands (may not be supported on all PMU models) 33 - */ 34 - #define PFM_WRITE_IBRS 0x20 35 - #define PFM_WRITE_DBRS 0x21 36 - 37 - /* 38 - * context flags 39 - */ 40 - #define PFM_FL_NOTIFY_BLOCK 0x01 /* block task on user level notifications */ 41 - #define PFM_FL_SYSTEM_WIDE 0x02 /* create a system wide context */ 42 - #define PFM_FL_OVFL_NO_MSG 0x80 /* do not post overflow/end messages for notification */ 43 - 44 - /* 45 - * event set flags 46 - */ 47 - #define PFM_SETFL_EXCL_IDLE 0x01 /* exclude idle task (syswide only) XXX: DO NOT USE YET */ 48 - 49 - /* 50 - * PMC flags 51 - */ 52 - #define PFM_REGFL_OVFL_NOTIFY 0x1 /* send notification on overflow */ 53 - #define PFM_REGFL_RANDOM 0x2 /* randomize sampling interval */ 54 - 55 - /* 56 - * PMD/PMC/IBR/DBR return flags (ignored on input) 57 - * 58 - * Those flags are used on output and must be checked in case EAGAIN is returned 59 - * by any of the calls using a pfarg_reg_t or pfarg_dbreg_t structure. 60 - */ 61 - #define PFM_REG_RETFL_NOTAVAIL (1UL<<31) /* set if register is implemented but not available */ 62 - #define PFM_REG_RETFL_EINVAL (1UL<<30) /* set if register entry is invalid */ 63 - #define PFM_REG_RETFL_MASK (PFM_REG_RETFL_NOTAVAIL|PFM_REG_RETFL_EINVAL) 64 - 65 - #define PFM_REG_HAS_ERROR(flag) (((flag) & PFM_REG_RETFL_MASK) != 0) 66 - 67 - typedef unsigned char pfm_uuid_t[16]; /* custom sampling buffer identifier type */ 68 - 69 - /* 70 - * Request structure used to define a context 71 - */ 72 - typedef struct { 73 - pfm_uuid_t ctx_smpl_buf_id; /* which buffer format to use (if needed) */ 74 - unsigned long ctx_flags; /* noblock/block */ 75 - unsigned short ctx_nextra_sets; /* number of extra event sets (you always get 1) */ 76 - unsigned short ctx_reserved1; /* for future use */ 77 - int ctx_fd; /* return arg: unique identification for context */ 78 - void *ctx_smpl_vaddr; /* return arg: virtual address of sampling buffer, is used */ 79 - unsigned long ctx_reserved2[11];/* for future use */ 80 - } pfarg_context_t; 81 - 82 - /* 83 - * Request structure used to write/read a PMC or PMD 84 - */ 85 - typedef struct { 86 - unsigned int reg_num; /* which register */ 87 - unsigned short reg_set; /* event set for this register */ 88 - unsigned short reg_reserved1; /* for future use */ 89 - 90 - unsigned long reg_value; /* initial pmc/pmd value */ 91 - unsigned long reg_flags; /* input: pmc/pmd flags, return: reg error */ 92 - 93 - unsigned long reg_long_reset; /* reset after buffer overflow notification */ 94 - unsigned long reg_short_reset; /* reset after counter overflow */ 95 - 96 - unsigned long reg_reset_pmds[4]; /* which other counters to reset on overflow */ 97 - unsigned long reg_random_seed; /* seed value when randomization is used */ 98 - unsigned long reg_random_mask; /* bitmask used to limit random value */ 99 - unsigned long reg_last_reset_val;/* return: PMD last reset value */ 100 - 101 - unsigned long reg_smpl_pmds[4]; /* which pmds are accessed when PMC overflows */ 102 - unsigned long reg_smpl_eventid; /* opaque sampling event identifier */ 103 - 104 - unsigned long reg_reserved2[3]; /* for future use */ 105 - } pfarg_reg_t; 106 - 107 - typedef struct { 108 - unsigned int dbreg_num; /* which debug register */ 109 - unsigned short dbreg_set; /* event set for this register */ 110 - unsigned short dbreg_reserved1; /* for future use */ 111 - unsigned long dbreg_value; /* value for debug register */ 112 - unsigned long dbreg_flags; /* return: dbreg error */ 113 - unsigned long dbreg_reserved2[1]; /* for future use */ 114 - } pfarg_dbreg_t; 115 - 116 - typedef struct { 117 - unsigned int ft_version; /* perfmon: major [16-31], minor [0-15] */ 118 - unsigned int ft_reserved; /* reserved for future use */ 119 - unsigned long reserved[4]; /* for future use */ 120 - } pfarg_features_t; 121 - 122 - typedef struct { 123 - pid_t load_pid; /* process to load the context into */ 124 - unsigned short load_set; /* first event set to load */ 125 - unsigned short load_reserved1; /* for future use */ 126 - unsigned long load_reserved2[3]; /* for future use */ 127 - } pfarg_load_t; 128 - 129 - typedef struct { 130 - int msg_type; /* generic message header */ 131 - int msg_ctx_fd; /* generic message header */ 132 - unsigned long msg_ovfl_pmds[4]; /* which PMDs overflowed */ 133 - unsigned short msg_active_set; /* active set at the time of overflow */ 134 - unsigned short msg_reserved1; /* for future use */ 135 - unsigned int msg_reserved2; /* for future use */ 136 - unsigned long msg_tstamp; /* for perf tuning/debug */ 137 - } pfm_ovfl_msg_t; 138 - 139 - typedef struct { 140 - int msg_type; /* generic message header */ 141 - int msg_ctx_fd; /* generic message header */ 142 - unsigned long msg_tstamp; /* for perf tuning */ 143 - } pfm_end_msg_t; 144 - 145 - typedef struct { 146 - int msg_type; /* type of the message */ 147 - int msg_ctx_fd; /* unique identifier for the context */ 148 - unsigned long msg_tstamp; /* for perf tuning */ 149 - } pfm_gen_msg_t; 150 - 151 - #define PFM_MSG_OVFL 1 /* an overflow happened */ 152 - #define PFM_MSG_END 2 /* task to which context was attached ended */ 153 - 154 - typedef union { 155 - pfm_ovfl_msg_t pfm_ovfl_msg; 156 - pfm_end_msg_t pfm_end_msg; 157 - pfm_gen_msg_t pfm_gen_msg; 158 - } pfm_msg_t; 159 - 160 - /* 161 - * Define the version numbers for both perfmon as a whole and the sampling buffer format. 162 - */ 163 - #define PFM_VERSION_MAJ 2U 164 - #define PFM_VERSION_MIN 0U 165 - #define PFM_VERSION (((PFM_VERSION_MAJ&0xffff)<<16)|(PFM_VERSION_MIN & 0xffff)) 166 - #define PFM_VERSION_MAJOR(x) (((x)>>16) & 0xffff) 167 - #define PFM_VERSION_MINOR(x) ((x) & 0xffff) 168 - 169 - 170 - /* 171 - * miscellaneous architected definitions 172 - */ 173 - #define PMU_FIRST_COUNTER 4 /* first counting monitor (PMC/PMD) */ 174 - #define PMU_MAX_PMCS 256 /* maximum architected number of PMC registers */ 175 - #define PMU_MAX_PMDS 256 /* maximum architected number of PMD registers */ 176 - 177 - 178 - #endif /* _UAPI_ASM_IA64_PERFMON_H */
-84
arch/ia64/include/uapi/asm/perfmon_default_smpl.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 - /* 3 - * Copyright (C) 2002-2003 Hewlett-Packard Co 4 - * Stephane Eranian <eranian@hpl.hp.com> 5 - * 6 - * This file implements the default sampling buffer format 7 - * for Linux/ia64 perfmon subsystem. 8 - */ 9 - #ifndef __PERFMON_DEFAULT_SMPL_H__ 10 - #define __PERFMON_DEFAULT_SMPL_H__ 1 11 - 12 - #define PFM_DEFAULT_SMPL_UUID { \ 13 - 0x4d, 0x72, 0xbe, 0xc0, 0x06, 0x64, 0x41, 0x43, 0x82, 0xb4, 0xd3, 0xfd, 0x27, 0x24, 0x3c, 0x97} 14 - 15 - /* 16 - * format specific parameters (passed at context creation) 17 - */ 18 - typedef struct { 19 - unsigned long buf_size; /* size of the buffer in bytes */ 20 - unsigned int flags; /* buffer specific flags */ 21 - unsigned int res1; /* for future use */ 22 - unsigned long reserved[2]; /* for future use */ 23 - } pfm_default_smpl_arg_t; 24 - 25 - /* 26 - * combined context+format specific structure. Can be passed 27 - * to PFM_CONTEXT_CREATE 28 - */ 29 - typedef struct { 30 - pfarg_context_t ctx_arg; 31 - pfm_default_smpl_arg_t buf_arg; 32 - } pfm_default_smpl_ctx_arg_t; 33 - 34 - /* 35 - * This header is at the beginning of the sampling buffer returned to the user. 36 - * It is directly followed by the first record. 37 - */ 38 - typedef struct { 39 - unsigned long hdr_count; /* how many valid entries */ 40 - unsigned long hdr_cur_offs; /* current offset from top of buffer */ 41 - unsigned long hdr_reserved2; /* reserved for future use */ 42 - 43 - unsigned long hdr_overflows; /* how many times the buffer overflowed */ 44 - unsigned long hdr_buf_size; /* how many bytes in the buffer */ 45 - 46 - unsigned int hdr_version; /* contains perfmon version (smpl format diffs) */ 47 - unsigned int hdr_reserved1; /* for future use */ 48 - unsigned long hdr_reserved[10]; /* for future use */ 49 - } pfm_default_smpl_hdr_t; 50 - 51 - /* 52 - * Entry header in the sampling buffer. The header is directly followed 53 - * with the values of the PMD registers of interest saved in increasing 54 - * index order: PMD4, PMD5, and so on. How many PMDs are present depends 55 - * on how the session was programmed. 56 - * 57 - * In the case where multiple counters overflow at the same time, multiple 58 - * entries are written consecutively. 59 - * 60 - * last_reset_value member indicates the initial value of the overflowed PMD. 61 - */ 62 - typedef struct { 63 - int pid; /* thread id (for NPTL, this is gettid()) */ 64 - unsigned char reserved1[3]; /* reserved for future use */ 65 - unsigned char ovfl_pmd; /* index of overflowed PMD */ 66 - 67 - unsigned long last_reset_val; /* initial value of overflowed PMD */ 68 - unsigned long ip; /* where did the overflow interrupt happened */ 69 - unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */ 70 - 71 - unsigned short cpu; /* cpu on which the overflow occurred */ 72 - unsigned short set; /* event set active when overflow occurred */ 73 - int tgid; /* thread group id (for NPTL, this is getpid()) */ 74 - } pfm_default_smpl_entry_t; 75 - 76 - #define PFM_DEFAULT_MAX_PMDS 64 /* how many pmds supported by data structures (sizeof(unsigned long) */ 77 - #define PFM_DEFAULT_MAX_ENTRY_SIZE (sizeof(pfm_default_smpl_entry_t)+(sizeof(unsigned long)*PFM_DEFAULT_MAX_PMDS)) 78 - #define PFM_DEFAULT_SMPL_MIN_BUF_SIZE (sizeof(pfm_default_smpl_hdr_t)+PFM_DEFAULT_MAX_ENTRY_SIZE) 79 - 80 - #define PFM_DEFAULT_SMPL_VERSION_MAJ 2U 81 - #define PFM_DEFAULT_SMPL_VERSION_MIN 0U 82 - #define PFM_DEFAULT_SMPL_VERSION (((PFM_DEFAULT_SMPL_VERSION_MAJ&0xffff)<<16)|(PFM_DEFAULT_SMPL_VERSION_MIN & 0xffff)) 83 - 84 - #endif /* __PERFMON_DEFAULT_SMPL_H__ */
-41
arch/ia64/kernel/palinfo.c
··· 648 648 return 0; 649 649 } 650 650 651 - static int perfmon_info(struct seq_file *m) 652 - { 653 - u64 pm_buffer[16]; 654 - pal_perf_mon_info_u_t pm_info; 655 - 656 - if (ia64_pal_perf_mon_info(pm_buffer, &pm_info) != 0) 657 - return 0; 658 - 659 - seq_printf(m, 660 - "PMC/PMD pairs : %d\n" 661 - "Counter width : %d bits\n" 662 - "Cycle event number : %d\n" 663 - "Retired event number : %d\n" 664 - "Implemented PMC : ", 665 - pm_info.pal_perf_mon_info_s.generic, 666 - pm_info.pal_perf_mon_info_s.width, 667 - pm_info.pal_perf_mon_info_s.cycles, 668 - pm_info.pal_perf_mon_info_s.retired); 669 - 670 - bitregister_process(m, pm_buffer, 256); 671 - seq_puts(m, "\nImplemented PMD : "); 672 - bitregister_process(m, pm_buffer+4, 256); 673 - seq_puts(m, "\nCycles count capable : "); 674 - bitregister_process(m, pm_buffer+8, 256); 675 - seq_puts(m, "\nRetired bundles count capable : "); 676 - 677 - #ifdef CONFIG_ITANIUM 678 - /* 679 - * PAL_PERF_MON_INFO reports that only PMC4 can be used to count CPU_CYCLES 680 - * which is wrong, both PMC4 and PMD5 support it. 681 - */ 682 - if (pm_buffer[12] == 0x10) 683 - pm_buffer[12]=0x30; 684 - #endif 685 - 686 - bitregister_process(m, pm_buffer+12, 256); 687 - seq_putc(m, '\n'); 688 - return 0; 689 - } 690 - 691 651 static int frequency_info(struct seq_file *m) 692 652 { 693 653 struct pal_freq_ratio proc, itc, bus; ··· 776 816 { "power_info", power_info, }, 777 817 { "register_info", register_info, }, 778 818 { "processor_info", processor_info, }, 779 - { "perfmon_info", perfmon_info, }, 780 819 { "frequency_info", frequency_info, }, 781 820 { "bus_info", bus_info }, 782 821 { "tr_info", tr_info, }
-297
arch/ia64/kernel/perfmon_default_smpl.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * Copyright (C) 2002-2003 Hewlett-Packard Co 4 - * Stephane Eranian <eranian@hpl.hp.com> 5 - * 6 - * This file implements the default sampling buffer format 7 - * for the Linux/ia64 perfmon-2 subsystem. 8 - */ 9 - #include <linux/kernel.h> 10 - #include <linux/types.h> 11 - #include <linux/module.h> 12 - #include <linux/init.h> 13 - #include <asm/delay.h> 14 - #include <linux/smp.h> 15 - 16 - #include <asm/perfmon.h> 17 - #include <asm/perfmon_default_smpl.h> 18 - 19 - MODULE_AUTHOR("Stephane Eranian <eranian@hpl.hp.com>"); 20 - MODULE_DESCRIPTION("perfmon default sampling format"); 21 - MODULE_LICENSE("GPL"); 22 - 23 - #define DEFAULT_DEBUG 1 24 - 25 - #ifdef DEFAULT_DEBUG 26 - #define DPRINT(a) \ 27 - do { \ 28 - if (unlikely(pfm_sysctl.debug >0)) { printk("%s.%d: CPU%d ", __func__, __LINE__, smp_processor_id()); printk a; } \ 29 - } while (0) 30 - 31 - #define DPRINT_ovfl(a) \ 32 - do { \ 33 - if (unlikely(pfm_sysctl.debug > 0 && pfm_sysctl.debug_ovfl >0)) { printk("%s.%d: CPU%d ", __func__, __LINE__, smp_processor_id()); printk a; } \ 34 - } while (0) 35 - 36 - #else 37 - #define DPRINT(a) 38 - #define DPRINT_ovfl(a) 39 - #endif 40 - 41 - static int 42 - default_validate(struct task_struct *task, unsigned int flags, int cpu, void *data) 43 - { 44 - pfm_default_smpl_arg_t *arg = (pfm_default_smpl_arg_t*)data; 45 - int ret = 0; 46 - 47 - if (data == NULL) { 48 - DPRINT(("[%d] no argument passed\n", task_pid_nr(task))); 49 - return -EINVAL; 50 - } 51 - 52 - DPRINT(("[%d] validate flags=0x%x CPU%d\n", task_pid_nr(task), flags, cpu)); 53 - 54 - /* 55 - * must hold at least the buffer header + one minimally sized entry 56 - */ 57 - if (arg->buf_size < PFM_DEFAULT_SMPL_MIN_BUF_SIZE) return -EINVAL; 58 - 59 - DPRINT(("buf_size=%lu\n", arg->buf_size)); 60 - 61 - return ret; 62 - } 63 - 64 - static int 65 - default_get_size(struct task_struct *task, unsigned int flags, int cpu, void *data, unsigned long *size) 66 - { 67 - pfm_default_smpl_arg_t *arg = (pfm_default_smpl_arg_t *)data; 68 - 69 - /* 70 - * size has been validated in default_validate 71 - */ 72 - *size = arg->buf_size; 73 - 74 - return 0; 75 - } 76 - 77 - static int 78 - default_init(struct task_struct *task, void *buf, unsigned int flags, int cpu, void *data) 79 - { 80 - pfm_default_smpl_hdr_t *hdr; 81 - pfm_default_smpl_arg_t *arg = (pfm_default_smpl_arg_t *)data; 82 - 83 - hdr = (pfm_default_smpl_hdr_t *)buf; 84 - 85 - hdr->hdr_version = PFM_DEFAULT_SMPL_VERSION; 86 - hdr->hdr_buf_size = arg->buf_size; 87 - hdr->hdr_cur_offs = sizeof(*hdr); 88 - hdr->hdr_overflows = 0UL; 89 - hdr->hdr_count = 0UL; 90 - 91 - DPRINT(("[%d] buffer=%p buf_size=%lu hdr_size=%lu hdr_version=%u cur_offs=%lu\n", 92 - task_pid_nr(task), 93 - buf, 94 - hdr->hdr_buf_size, 95 - sizeof(*hdr), 96 - hdr->hdr_version, 97 - hdr->hdr_cur_offs)); 98 - 99 - return 0; 100 - } 101 - 102 - static int 103 - default_handler(struct task_struct *task, void *buf, pfm_ovfl_arg_t *arg, struct pt_regs *regs, unsigned long stamp) 104 - { 105 - pfm_default_smpl_hdr_t *hdr; 106 - pfm_default_smpl_entry_t *ent; 107 - void *cur, *last; 108 - unsigned long *e, entry_size; 109 - unsigned int npmds, i; 110 - unsigned char ovfl_pmd; 111 - unsigned char ovfl_notify; 112 - 113 - if (unlikely(buf == NULL || arg == NULL|| regs == NULL || task == NULL)) { 114 - DPRINT(("[%d] invalid arguments buf=%p arg=%p\n", task->pid, buf, arg)); 115 - return -EINVAL; 116 - } 117 - 118 - hdr = (pfm_default_smpl_hdr_t *)buf; 119 - cur = buf+hdr->hdr_cur_offs; 120 - last = buf+hdr->hdr_buf_size; 121 - ovfl_pmd = arg->ovfl_pmd; 122 - ovfl_notify = arg->ovfl_notify; 123 - 124 - /* 125 - * precheck for sanity 126 - */ 127 - if ((last - cur) < PFM_DEFAULT_MAX_ENTRY_SIZE) goto full; 128 - 129 - npmds = hweight64(arg->smpl_pmds[0]); 130 - 131 - ent = (pfm_default_smpl_entry_t *)cur; 132 - 133 - prefetch(arg->smpl_pmds_values); 134 - 135 - entry_size = sizeof(*ent) + (npmds << 3); 136 - 137 - /* position for first pmd */ 138 - e = (unsigned long *)(ent+1); 139 - 140 - hdr->hdr_count++; 141 - 142 - DPRINT_ovfl(("[%d] count=%lu cur=%p last=%p free_bytes=%lu ovfl_pmd=%d ovfl_notify=%d npmds=%u\n", 143 - task->pid, 144 - hdr->hdr_count, 145 - cur, last, 146 - last-cur, 147 - ovfl_pmd, 148 - ovfl_notify, npmds)); 149 - 150 - /* 151 - * current = task running at the time of the overflow. 152 - * 153 - * per-task mode: 154 - * - this is usually the task being monitored. 155 - * Under certain conditions, it might be a different task 156 - * 157 - * system-wide: 158 - * - this is not necessarily the task controlling the session 159 - */ 160 - ent->pid = current->pid; 161 - ent->ovfl_pmd = ovfl_pmd; 162 - ent->last_reset_val = arg->pmd_last_reset; //pmd[0].reg_last_reset_val; 163 - 164 - /* 165 - * where did the fault happen (includes slot number) 166 - */ 167 - ent->ip = regs->cr_iip | ((regs->cr_ipsr >> 41) & 0x3); 168 - 169 - ent->tstamp = stamp; 170 - ent->cpu = smp_processor_id(); 171 - ent->set = arg->active_set; 172 - ent->tgid = current->tgid; 173 - 174 - /* 175 - * selectively store PMDs in increasing index number 176 - */ 177 - if (npmds) { 178 - unsigned long *val = arg->smpl_pmds_values; 179 - for(i=0; i < npmds; i++) { 180 - *e++ = *val++; 181 - } 182 - } 183 - 184 - /* 185 - * update position for next entry 186 - */ 187 - hdr->hdr_cur_offs += entry_size; 188 - cur += entry_size; 189 - 190 - /* 191 - * post check to avoid losing the last sample 192 - */ 193 - if ((last - cur) < PFM_DEFAULT_MAX_ENTRY_SIZE) goto full; 194 - 195 - /* 196 - * keep same ovfl_pmds, ovfl_notify 197 - */ 198 - arg->ovfl_ctrl.bits.notify_user = 0; 199 - arg->ovfl_ctrl.bits.block_task = 0; 200 - arg->ovfl_ctrl.bits.mask_monitoring = 0; 201 - arg->ovfl_ctrl.bits.reset_ovfl_pmds = 1; /* reset before returning from interrupt handler */ 202 - 203 - return 0; 204 - full: 205 - DPRINT_ovfl(("sampling buffer full free=%lu, count=%lu, ovfl_notify=%d\n", last-cur, hdr->hdr_count, ovfl_notify)); 206 - 207 - /* 208 - * increment number of buffer overflow. 209 - * important to detect duplicate set of samples. 210 - */ 211 - hdr->hdr_overflows++; 212 - 213 - /* 214 - * if no notification requested, then we saturate the buffer 215 - */ 216 - if (ovfl_notify == 0) { 217 - arg->ovfl_ctrl.bits.notify_user = 0; 218 - arg->ovfl_ctrl.bits.block_task = 0; 219 - arg->ovfl_ctrl.bits.mask_monitoring = 1; 220 - arg->ovfl_ctrl.bits.reset_ovfl_pmds = 0; 221 - } else { 222 - arg->ovfl_ctrl.bits.notify_user = 1; 223 - arg->ovfl_ctrl.bits.block_task = 1; /* ignored for non-blocking context */ 224 - arg->ovfl_ctrl.bits.mask_monitoring = 1; 225 - arg->ovfl_ctrl.bits.reset_ovfl_pmds = 0; /* no reset now */ 226 - } 227 - return -1; /* we are full, sorry */ 228 - } 229 - 230 - static int 231 - default_restart(struct task_struct *task, pfm_ovfl_ctrl_t *ctrl, void *buf, struct pt_regs *regs) 232 - { 233 - pfm_default_smpl_hdr_t *hdr; 234 - 235 - hdr = (pfm_default_smpl_hdr_t *)buf; 236 - 237 - hdr->hdr_count = 0UL; 238 - hdr->hdr_cur_offs = sizeof(*hdr); 239 - 240 - ctrl->bits.mask_monitoring = 0; 241 - ctrl->bits.reset_ovfl_pmds = 1; /* uses long-reset values */ 242 - 243 - return 0; 244 - } 245 - 246 - static int 247 - default_exit(struct task_struct *task, void *buf, struct pt_regs *regs) 248 - { 249 - DPRINT(("[%d] exit(%p)\n", task_pid_nr(task), buf)); 250 - return 0; 251 - } 252 - 253 - static pfm_buffer_fmt_t default_fmt={ 254 - .fmt_name = "default_format", 255 - .fmt_uuid = PFM_DEFAULT_SMPL_UUID, 256 - .fmt_arg_size = sizeof(pfm_default_smpl_arg_t), 257 - .fmt_validate = default_validate, 258 - .fmt_getsize = default_get_size, 259 - .fmt_init = default_init, 260 - .fmt_handler = default_handler, 261 - .fmt_restart = default_restart, 262 - .fmt_restart_active = default_restart, 263 - .fmt_exit = default_exit, 264 - }; 265 - 266 - static int __init 267 - pfm_default_smpl_init_module(void) 268 - { 269 - int ret; 270 - 271 - ret = pfm_register_buffer_fmt(&default_fmt); 272 - if (ret == 0) { 273 - printk("perfmon_default_smpl: %s v%u.%u registered\n", 274 - default_fmt.fmt_name, 275 - PFM_DEFAULT_SMPL_VERSION_MAJ, 276 - PFM_DEFAULT_SMPL_VERSION_MIN); 277 - } else { 278 - printk("perfmon_default_smpl: %s cannot register ret=%d\n", 279 - default_fmt.fmt_name, 280 - ret); 281 - } 282 - 283 - return ret; 284 - } 285 - 286 - static void __exit 287 - pfm_default_smpl_cleanup_module(void) 288 - { 289 - int ret; 290 - ret = pfm_unregister_buffer_fmt(default_fmt.fmt_uuid); 291 - 292 - printk("perfmon_default_smpl: unregister %s=%d\n", default_fmt.fmt_name, ret); 293 - } 294 - 295 - module_init(pfm_default_smpl_init_module); 296 - module_exit(pfm_default_smpl_cleanup_module); 297 -
-46
arch/ia64/kernel/perfmon_generic.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * This file contains the generic PMU register description tables 4 - * and pmc checker used by perfmon.c. 5 - * 6 - * Copyright (C) 2002-2003 Hewlett Packard Co 7 - * Stephane Eranian <eranian@hpl.hp.com> 8 - */ 9 - 10 - static pfm_reg_desc_t pfm_gen_pmc_desc[PMU_MAX_PMCS]={ 11 - /* pmc0 */ { PFM_REG_CONTROL , 0, 0x1UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 12 - /* pmc1 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 13 - /* pmc2 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 14 - /* pmc3 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 15 - /* pmc4 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(4),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 16 - /* pmc5 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(5),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 17 - /* pmc6 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(6),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 18 - /* pmc7 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(7),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 19 - { PFM_REG_END , 0, 0x0UL, -1UL, NULL, NULL, {0,}, {0,}}, /* end marker */ 20 - }; 21 - 22 - static pfm_reg_desc_t pfm_gen_pmd_desc[PMU_MAX_PMDS]={ 23 - /* pmd0 */ { PFM_REG_NOTIMPL , 0, 0x0UL, -1UL, NULL, NULL, {0,}, {0,}}, 24 - /* pmd1 */ { PFM_REG_NOTIMPL , 0, 0x0UL, -1UL, NULL, NULL, {0,}, {0,}}, 25 - /* pmd2 */ { PFM_REG_NOTIMPL , 0, 0x0UL, -1UL, NULL, NULL, {0,}, {0,}}, 26 - /* pmd3 */ { PFM_REG_NOTIMPL , 0, 0x0UL, -1UL, NULL, NULL, {0,}, {0,}}, 27 - /* pmd4 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(4),0UL, 0UL, 0UL}}, 28 - /* pmd5 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(5),0UL, 0UL, 0UL}}, 29 - /* pmd6 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(6),0UL, 0UL, 0UL}}, 30 - /* pmd7 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(7),0UL, 0UL, 0UL}}, 31 - { PFM_REG_END , 0, 0x0UL, -1UL, NULL, NULL, {0,}, {0,}}, /* end marker */ 32 - }; 33 - 34 - /* 35 - * impl_pmcs, impl_pmds are computed at runtime to minimize errors! 36 - */ 37 - static pmu_config_t pmu_conf_gen={ 38 - .pmu_name = "Generic", 39 - .pmu_family = 0xff, /* any */ 40 - .ovfl_val = (1UL << 32) - 1, 41 - .num_ibrs = 0, /* does not use */ 42 - .num_dbrs = 0, /* does not use */ 43 - .pmd_desc = pfm_gen_pmd_desc, 44 - .pmc_desc = pfm_gen_pmc_desc 45 - }; 46 -
+1 -1
arch/ia64/kernel/perfmon_itanium.h
··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 2 /* 3 3 * This file contains the Itanium PMU register description tables 4 - * and pmc checker used by perfmon.c. 4 + * and pmc checker. 5 5 * 6 6 * Copyright (C) 2002-2003 Hewlett Packard Co 7 7 * Stephane Eranian <eranian@hpl.hp.com>
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arch/ia64/kernel/perfmon_mckinley.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * This file contains the McKinley PMU register description tables 4 - * and pmc checker used by perfmon.c. 5 - * 6 - * Copyright (C) 2002-2003 Hewlett Packard Co 7 - * Stephane Eranian <eranian@hpl.hp.com> 8 - */ 9 - static int pfm_mck_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnum, unsigned long *val, struct pt_regs *regs); 10 - 11 - static pfm_reg_desc_t pfm_mck_pmc_desc[PMU_MAX_PMCS]={ 12 - /* pmc0 */ { PFM_REG_CONTROL , 0, 0x1UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 13 - /* pmc1 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 14 - /* pmc2 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 15 - /* pmc3 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 16 - /* pmc4 */ { PFM_REG_COUNTING, 6, 0x0000000000800000UL, 0xfffff7fUL, NULL, pfm_mck_pmc_check, {RDEP(4),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 17 - /* pmc5 */ { PFM_REG_COUNTING, 6, 0x0UL, 0xfffff7fUL, NULL, pfm_mck_pmc_check, {RDEP(5),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 18 - /* pmc6 */ { PFM_REG_COUNTING, 6, 0x0UL, 0xfffff7fUL, NULL, pfm_mck_pmc_check, {RDEP(6),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 19 - /* pmc7 */ { PFM_REG_COUNTING, 6, 0x0UL, 0xfffff7fUL, NULL, pfm_mck_pmc_check, {RDEP(7),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 20 - /* pmc8 */ { PFM_REG_CONFIG , 0, 0xffffffff3fffffffUL, 0xffffffff3ffffffbUL, NULL, pfm_mck_pmc_check, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 21 - /* pmc9 */ { PFM_REG_CONFIG , 0, 0xffffffff3ffffffcUL, 0xffffffff3ffffffbUL, NULL, pfm_mck_pmc_check, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 22 - /* pmc10 */ { PFM_REG_MONITOR , 4, 0x0UL, 0xffffUL, NULL, pfm_mck_pmc_check, {RDEP(0)|RDEP(1),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 23 - /* pmc11 */ { PFM_REG_MONITOR , 6, 0x0UL, 0x30f01cf, NULL, pfm_mck_pmc_check, {RDEP(2)|RDEP(3)|RDEP(17),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 24 - /* pmc12 */ { PFM_REG_MONITOR , 6, 0x0UL, 0xffffUL, NULL, pfm_mck_pmc_check, {RDEP(8)|RDEP(9)|RDEP(10)|RDEP(11)|RDEP(12)|RDEP(13)|RDEP(14)|RDEP(15)|RDEP(16),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 25 - /* pmc13 */ { PFM_REG_CONFIG , 0, 0x00002078fefefefeUL, 0x1e00018181818UL, NULL, pfm_mck_pmc_check, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 26 - /* pmc14 */ { PFM_REG_CONFIG , 0, 0x0db60db60db60db6UL, 0x2492UL, NULL, pfm_mck_pmc_check, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 27 - /* pmc15 */ { PFM_REG_CONFIG , 0, 0x00000000fffffff0UL, 0xfUL, NULL, pfm_mck_pmc_check, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}}, 28 - { PFM_REG_END , 0, 0x0UL, -1UL, NULL, NULL, {0,}, {0,}}, /* end marker */ 29 - }; 30 - 31 - static pfm_reg_desc_t pfm_mck_pmd_desc[PMU_MAX_PMDS]={ 32 - /* pmd0 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(1),0UL, 0UL, 0UL}, {RDEP(10),0UL, 0UL, 0UL}}, 33 - /* pmd1 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(0),0UL, 0UL, 0UL}, {RDEP(10),0UL, 0UL, 0UL}}, 34 - /* pmd2 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(3)|RDEP(17),0UL, 0UL, 0UL}, {RDEP(11),0UL, 0UL, 0UL}}, 35 - /* pmd3 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(2)|RDEP(17),0UL, 0UL, 0UL}, {RDEP(11),0UL, 0UL, 0UL}}, 36 - /* pmd4 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(4),0UL, 0UL, 0UL}}, 37 - /* pmd5 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(5),0UL, 0UL, 0UL}}, 38 - /* pmd6 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(6),0UL, 0UL, 0UL}}, 39 - /* pmd7 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(7),0UL, 0UL, 0UL}}, 40 - /* pmd8 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(9)|RDEP(10)|RDEP(11)|RDEP(12)|RDEP(13)|RDEP(14)|RDEP(15)|RDEP(16),0UL, 0UL, 0UL}, {RDEP(12),0UL, 0UL, 0UL}}, 41 - /* pmd9 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(8)|RDEP(10)|RDEP(11)|RDEP(12)|RDEP(13)|RDEP(14)|RDEP(15)|RDEP(16),0UL, 0UL, 0UL}, {RDEP(12),0UL, 0UL, 0UL}}, 42 - /* pmd10 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(8)|RDEP(9)|RDEP(11)|RDEP(12)|RDEP(13)|RDEP(14)|RDEP(15)|RDEP(16),0UL, 0UL, 0UL}, {RDEP(12),0UL, 0UL, 0UL}}, 43 - /* pmd11 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(8)|RDEP(9)|RDEP(10)|RDEP(12)|RDEP(13)|RDEP(14)|RDEP(15)|RDEP(16),0UL, 0UL, 0UL}, {RDEP(12),0UL, 0UL, 0UL}}, 44 - /* pmd12 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(8)|RDEP(9)|RDEP(10)|RDEP(11)|RDEP(13)|RDEP(14)|RDEP(15)|RDEP(16),0UL, 0UL, 0UL}, {RDEP(12),0UL, 0UL, 0UL}}, 45 - /* pmd13 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(8)|RDEP(9)|RDEP(10)|RDEP(11)|RDEP(12)|RDEP(14)|RDEP(15)|RDEP(16),0UL, 0UL, 0UL}, {RDEP(12),0UL, 0UL, 0UL}}, 46 - /* pmd14 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(8)|RDEP(9)|RDEP(10)|RDEP(11)|RDEP(12)|RDEP(13)|RDEP(15)|RDEP(16),0UL, 0UL, 0UL}, {RDEP(12),0UL, 0UL, 0UL}}, 47 - /* pmd15 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(8)|RDEP(9)|RDEP(10)|RDEP(11)|RDEP(12)|RDEP(13)|RDEP(14)|RDEP(16),0UL, 0UL, 0UL}, {RDEP(12),0UL, 0UL, 0UL}}, 48 - /* pmd16 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(8)|RDEP(9)|RDEP(10)|RDEP(11)|RDEP(12)|RDEP(13)|RDEP(14)|RDEP(15),0UL, 0UL, 0UL}, {RDEP(12),0UL, 0UL, 0UL}}, 49 - /* pmd17 */ { PFM_REG_BUFFER , 0, 0x0UL, -1UL, NULL, NULL, {RDEP(2)|RDEP(3),0UL, 0UL, 0UL}, {RDEP(11),0UL, 0UL, 0UL}}, 50 - { PFM_REG_END , 0, 0x0UL, -1UL, NULL, NULL, {0,}, {0,}}, /* end marker */ 51 - }; 52 - 53 - /* 54 - * PMC reserved fields must have their power-up values preserved 55 - */ 56 - static int 57 - pfm_mck_reserved(unsigned int cnum, unsigned long *val, struct pt_regs *regs) 58 - { 59 - unsigned long tmp1, tmp2, ival = *val; 60 - 61 - /* remove reserved areas from user value */ 62 - tmp1 = ival & PMC_RSVD_MASK(cnum); 63 - 64 - /* get reserved fields values */ 65 - tmp2 = PMC_DFL_VAL(cnum) & ~PMC_RSVD_MASK(cnum); 66 - 67 - *val = tmp1 | tmp2; 68 - 69 - DPRINT(("pmc[%d]=0x%lx, mask=0x%lx, reset=0x%lx, val=0x%lx\n", 70 - cnum, ival, PMC_RSVD_MASK(cnum), PMC_DFL_VAL(cnum), *val)); 71 - return 0; 72 - } 73 - 74 - /* 75 - * task can be NULL if the context is unloaded 76 - */ 77 - static int 78 - pfm_mck_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnum, unsigned long *val, struct pt_regs *regs) 79 - { 80 - int ret = 0, check_case1 = 0; 81 - unsigned long val8 = 0, val14 = 0, val13 = 0; 82 - int is_loaded; 83 - 84 - /* first preserve the reserved fields */ 85 - pfm_mck_reserved(cnum, val, regs); 86 - 87 - /* sanitfy check */ 88 - if (ctx == NULL) return -EINVAL; 89 - 90 - is_loaded = ctx->ctx_state == PFM_CTX_LOADED || ctx->ctx_state == PFM_CTX_MASKED; 91 - 92 - /* 93 - * we must clear the debug registers if pmc13 has a value which enable 94 - * memory pipeline event constraints. In this case we need to clear the 95 - * the debug registers if they have not yet been accessed. This is required 96 - * to avoid picking stale state. 97 - * PMC13 is "active" if: 98 - * one of the pmc13.cfg_dbrpXX field is different from 0x3 99 - * AND 100 - * at the corresponding pmc13.ena_dbrpXX is set. 101 - */ 102 - DPRINT(("cnum=%u val=0x%lx, using_dbreg=%d loaded=%d\n", cnum, *val, ctx->ctx_fl_using_dbreg, is_loaded)); 103 - 104 - if (cnum == 13 && is_loaded 105 - && (*val & 0x1e00000000000UL) && (*val & 0x18181818UL) != 0x18181818UL && ctx->ctx_fl_using_dbreg == 0) { 106 - 107 - DPRINT(("pmc[%d]=0x%lx has active pmc13 settings, clearing dbr\n", cnum, *val)); 108 - 109 - /* don't mix debug with perfmon */ 110 - if (task && (task->thread.flags & IA64_THREAD_DBG_VALID) != 0) return -EINVAL; 111 - 112 - /* 113 - * a count of 0 will mark the debug registers as in use and also 114 - * ensure that they are properly cleared. 115 - */ 116 - ret = pfm_write_ibr_dbr(PFM_DATA_RR, ctx, NULL, 0, regs); 117 - if (ret) return ret; 118 - } 119 - /* 120 - * we must clear the (instruction) debug registers if any pmc14.ibrpX bit is enabled 121 - * before they are (fl_using_dbreg==0) to avoid picking up stale information. 122 - */ 123 - if (cnum == 14 && is_loaded && ((*val & 0x2222UL) != 0x2222UL) && ctx->ctx_fl_using_dbreg == 0) { 124 - 125 - DPRINT(("pmc[%d]=0x%lx has active pmc14 settings, clearing ibr\n", cnum, *val)); 126 - 127 - /* don't mix debug with perfmon */ 128 - if (task && (task->thread.flags & IA64_THREAD_DBG_VALID) != 0) return -EINVAL; 129 - 130 - /* 131 - * a count of 0 will mark the debug registers as in use and also 132 - * ensure that they are properly cleared. 133 - */ 134 - ret = pfm_write_ibr_dbr(PFM_CODE_RR, ctx, NULL, 0, regs); 135 - if (ret) return ret; 136 - 137 - } 138 - 139 - switch(cnum) { 140 - case 4: *val |= 1UL << 23; /* force power enable bit */ 141 - break; 142 - case 8: val8 = *val; 143 - val13 = ctx->ctx_pmcs[13]; 144 - val14 = ctx->ctx_pmcs[14]; 145 - check_case1 = 1; 146 - break; 147 - case 13: val8 = ctx->ctx_pmcs[8]; 148 - val13 = *val; 149 - val14 = ctx->ctx_pmcs[14]; 150 - check_case1 = 1; 151 - break; 152 - case 14: val8 = ctx->ctx_pmcs[8]; 153 - val13 = ctx->ctx_pmcs[13]; 154 - val14 = *val; 155 - check_case1 = 1; 156 - break; 157 - } 158 - /* check illegal configuration which can produce inconsistencies in tagging 159 - * i-side events in L1D and L2 caches 160 - */ 161 - if (check_case1) { 162 - ret = ((val13 >> 45) & 0xf) == 0 163 - && ((val8 & 0x1) == 0) 164 - && ((((val14>>1) & 0x3) == 0x2 || ((val14>>1) & 0x3) == 0x0) 165 - ||(((val14>>4) & 0x3) == 0x2 || ((val14>>4) & 0x3) == 0x0)); 166 - 167 - if (ret) DPRINT((KERN_DEBUG "perfmon: failure check_case1\n")); 168 - } 169 - 170 - return ret ? -EINVAL : 0; 171 - } 172 - 173 - /* 174 - * impl_pmcs, impl_pmds are computed at runtime to minimize errors! 175 - */ 176 - static pmu_config_t pmu_conf_mck={ 177 - .pmu_name = "Itanium 2", 178 - .pmu_family = 0x1f, 179 - .flags = PFM_PMU_IRQ_RESEND, 180 - .ovfl_val = (1UL << 47) - 1, 181 - .pmd_desc = pfm_mck_pmd_desc, 182 - .pmc_desc = pfm_mck_pmc_desc, 183 - .num_ibrs = 8, 184 - .num_dbrs = 8, 185 - .use_rr_dbregs = 1 /* debug register are use for range restrictions */ 186 - }; 187 - 188 -
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arch/ia64/kernel/perfmon_montecito.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * This file contains the Montecito PMU register description tables 4 - * and pmc checker used by perfmon.c. 5 - * 6 - * Copyright (c) 2005-2006 Hewlett-Packard Development Company, L.P. 7 - * Contributed by Stephane Eranian <eranian@hpl.hp.com> 8 - */ 9 - static int pfm_mont_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnum, unsigned long *val, struct pt_regs *regs); 10 - 11 - #define RDEP_MONT_ETB (RDEP(38)|RDEP(39)|RDEP(48)|RDEP(49)|RDEP(50)|RDEP(51)|RDEP(52)|RDEP(53)|RDEP(54)|\ 12 - RDEP(55)|RDEP(56)|RDEP(57)|RDEP(58)|RDEP(59)|RDEP(60)|RDEP(61)|RDEP(62)|RDEP(63)) 13 - #define RDEP_MONT_DEAR (RDEP(32)|RDEP(33)|RDEP(36)) 14 - #define RDEP_MONT_IEAR (RDEP(34)|RDEP(35)) 15 - 16 - static pfm_reg_desc_t pfm_mont_pmc_desc[PMU_MAX_PMCS]={ 17 - /* pmc0 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}}, 18 - /* pmc1 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}}, 19 - /* pmc2 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}}, 20 - /* pmc3 */ { PFM_REG_CONTROL , 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {0,0, 0, 0}}, 21 - /* pmc4 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(4),0, 0, 0}, {0,0, 0, 0}}, 22 - /* pmc5 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(5),0, 0, 0}, {0,0, 0, 0}}, 23 - /* pmc6 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(6),0, 0, 0}, {0,0, 0, 0}}, 24 - /* pmc7 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(7),0, 0, 0}, {0,0, 0, 0}}, 25 - /* pmc8 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(8),0, 0, 0}, {0,0, 0, 0}}, 26 - /* pmc9 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(9),0, 0, 0}, {0,0, 0, 0}}, 27 - /* pmc10 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(10),0, 0, 0}, {0,0, 0, 0}}, 28 - /* pmc11 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(11),0, 0, 0}, {0,0, 0, 0}}, 29 - /* pmc12 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(12),0, 0, 0}, {0,0, 0, 0}}, 30 - /* pmc13 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(13),0, 0, 0}, {0,0, 0, 0}}, 31 - /* pmc14 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(14),0, 0, 0}, {0,0, 0, 0}}, 32 - /* pmc15 */ { PFM_REG_COUNTING, 6, 0x2000000, 0x7c7fff7f, NULL, pfm_mont_pmc_check, {RDEP(15),0, 0, 0}, {0,0, 0, 0}}, 33 - /* pmc16 */ { PFM_REG_NOTIMPL, }, 34 - /* pmc17 */ { PFM_REG_NOTIMPL, }, 35 - /* pmc18 */ { PFM_REG_NOTIMPL, }, 36 - /* pmc19 */ { PFM_REG_NOTIMPL, }, 37 - /* pmc20 */ { PFM_REG_NOTIMPL, }, 38 - /* pmc21 */ { PFM_REG_NOTIMPL, }, 39 - /* pmc22 */ { PFM_REG_NOTIMPL, }, 40 - /* pmc23 */ { PFM_REG_NOTIMPL, }, 41 - /* pmc24 */ { PFM_REG_NOTIMPL, }, 42 - /* pmc25 */ { PFM_REG_NOTIMPL, }, 43 - /* pmc26 */ { PFM_REG_NOTIMPL, }, 44 - /* pmc27 */ { PFM_REG_NOTIMPL, }, 45 - /* pmc28 */ { PFM_REG_NOTIMPL, }, 46 - /* pmc29 */ { PFM_REG_NOTIMPL, }, 47 - /* pmc30 */ { PFM_REG_NOTIMPL, }, 48 - /* pmc31 */ { PFM_REG_NOTIMPL, }, 49 - /* pmc32 */ { PFM_REG_CONFIG, 0, 0x30f01ffffffffffUL, 0x30f01ffffffffffUL, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, 50 - /* pmc33 */ { PFM_REG_CONFIG, 0, 0x0, 0x1ffffffffffUL, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, 51 - /* pmc34 */ { PFM_REG_CONFIG, 0, 0xf01ffffffffffUL, 0xf01ffffffffffUL, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, 52 - /* pmc35 */ { PFM_REG_CONFIG, 0, 0x0, 0x1ffffffffffUL, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, 53 - /* pmc36 */ { PFM_REG_CONFIG, 0, 0xfffffff0, 0xf, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, 54 - /* pmc37 */ { PFM_REG_MONITOR, 4, 0x0, 0x3fff, NULL, pfm_mont_pmc_check, {RDEP_MONT_IEAR, 0, 0, 0}, {0, 0, 0, 0}}, 55 - /* pmc38 */ { PFM_REG_CONFIG, 0, 0xdb6, 0x2492, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, 56 - /* pmc39 */ { PFM_REG_MONITOR, 6, 0x0, 0xffcf, NULL, pfm_mont_pmc_check, {RDEP_MONT_ETB,0, 0, 0}, {0,0, 0, 0}}, 57 - /* pmc40 */ { PFM_REG_MONITOR, 6, 0x2000000, 0xf01cf, NULL, pfm_mont_pmc_check, {RDEP_MONT_DEAR,0, 0, 0}, {0,0, 0, 0}}, 58 - /* pmc41 */ { PFM_REG_CONFIG, 0, 0x00002078fefefefeUL, 0x1e00018181818UL, NULL, pfm_mont_pmc_check, {0,0, 0, 0}, {0,0, 0, 0}}, 59 - /* pmc42 */ { PFM_REG_MONITOR, 6, 0x0, 0x7ff4f, NULL, pfm_mont_pmc_check, {RDEP_MONT_ETB,0, 0, 0}, {0,0, 0, 0}}, 60 - { PFM_REG_END , 0, 0x0, -1, NULL, NULL, {0,}, {0,}}, /* end marker */ 61 - }; 62 - 63 - static pfm_reg_desc_t pfm_mont_pmd_desc[PMU_MAX_PMDS]={ 64 - /* pmd0 */ { PFM_REG_NOTIMPL, }, 65 - /* pmd1 */ { PFM_REG_NOTIMPL, }, 66 - /* pmd2 */ { PFM_REG_NOTIMPL, }, 67 - /* pmd3 */ { PFM_REG_NOTIMPL, }, 68 - /* pmd4 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(4),0, 0, 0}}, 69 - /* pmd5 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(5),0, 0, 0}}, 70 - /* pmd6 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(6),0, 0, 0}}, 71 - /* pmd7 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(7),0, 0, 0}}, 72 - /* pmd8 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(8),0, 0, 0}}, 73 - /* pmd9 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(9),0, 0, 0}}, 74 - /* pmd10 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(10),0, 0, 0}}, 75 - /* pmd11 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(11),0, 0, 0}}, 76 - /* pmd12 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(12),0, 0, 0}}, 77 - /* pmd13 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(13),0, 0, 0}}, 78 - /* pmd14 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(14),0, 0, 0}}, 79 - /* pmd15 */ { PFM_REG_COUNTING, 0, 0x0, -1, NULL, NULL, {0,0, 0, 0}, {RDEP(15),0, 0, 0}}, 80 - /* pmd16 */ { PFM_REG_NOTIMPL, }, 81 - /* pmd17 */ { PFM_REG_NOTIMPL, }, 82 - /* pmd18 */ { PFM_REG_NOTIMPL, }, 83 - /* pmd19 */ { PFM_REG_NOTIMPL, }, 84 - /* pmd20 */ { PFM_REG_NOTIMPL, }, 85 - /* pmd21 */ { PFM_REG_NOTIMPL, }, 86 - /* pmd22 */ { PFM_REG_NOTIMPL, }, 87 - /* pmd23 */ { PFM_REG_NOTIMPL, }, 88 - /* pmd24 */ { PFM_REG_NOTIMPL, }, 89 - /* pmd25 */ { PFM_REG_NOTIMPL, }, 90 - /* pmd26 */ { PFM_REG_NOTIMPL, }, 91 - /* pmd27 */ { PFM_REG_NOTIMPL, }, 92 - /* pmd28 */ { PFM_REG_NOTIMPL, }, 93 - /* pmd29 */ { PFM_REG_NOTIMPL, }, 94 - /* pmd30 */ { PFM_REG_NOTIMPL, }, 95 - /* pmd31 */ { PFM_REG_NOTIMPL, }, 96 - /* pmd32 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(33)|RDEP(36),0, 0, 0}, {RDEP(40),0, 0, 0}}, 97 - /* pmd33 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(32)|RDEP(36),0, 0, 0}, {RDEP(40),0, 0, 0}}, 98 - /* pmd34 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(35),0, 0, 0}, {RDEP(37),0, 0, 0}}, 99 - /* pmd35 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(34),0, 0, 0}, {RDEP(37),0, 0, 0}}, 100 - /* pmd36 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP(32)|RDEP(33),0, 0, 0}, {RDEP(40),0, 0, 0}}, 101 - /* pmd37 */ { PFM_REG_NOTIMPL, }, 102 - /* pmd38 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 103 - /* pmd39 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 104 - /* pmd40 */ { PFM_REG_NOTIMPL, }, 105 - /* pmd41 */ { PFM_REG_NOTIMPL, }, 106 - /* pmd42 */ { PFM_REG_NOTIMPL, }, 107 - /* pmd43 */ { PFM_REG_NOTIMPL, }, 108 - /* pmd44 */ { PFM_REG_NOTIMPL, }, 109 - /* pmd45 */ { PFM_REG_NOTIMPL, }, 110 - /* pmd46 */ { PFM_REG_NOTIMPL, }, 111 - /* pmd47 */ { PFM_REG_NOTIMPL, }, 112 - /* pmd48 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 113 - /* pmd49 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 114 - /* pmd50 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 115 - /* pmd51 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 116 - /* pmd52 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 117 - /* pmd53 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 118 - /* pmd54 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 119 - /* pmd55 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 120 - /* pmd56 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 121 - /* pmd57 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 122 - /* pmd58 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 123 - /* pmd59 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 124 - /* pmd60 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 125 - /* pmd61 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 126 - /* pmd62 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 127 - /* pmd63 */ { PFM_REG_BUFFER, 0, 0x0, -1, NULL, NULL, {RDEP_MONT_ETB,0, 0, 0}, {RDEP(39),0, 0, 0}}, 128 - { PFM_REG_END , 0, 0x0, -1, NULL, NULL, {0,}, {0,}}, /* end marker */ 129 - }; 130 - 131 - /* 132 - * PMC reserved fields must have their power-up values preserved 133 - */ 134 - static int 135 - pfm_mont_reserved(unsigned int cnum, unsigned long *val, struct pt_regs *regs) 136 - { 137 - unsigned long tmp1, tmp2, ival = *val; 138 - 139 - /* remove reserved areas from user value */ 140 - tmp1 = ival & PMC_RSVD_MASK(cnum); 141 - 142 - /* get reserved fields values */ 143 - tmp2 = PMC_DFL_VAL(cnum) & ~PMC_RSVD_MASK(cnum); 144 - 145 - *val = tmp1 | tmp2; 146 - 147 - DPRINT(("pmc[%d]=0x%lx, mask=0x%lx, reset=0x%lx, val=0x%lx\n", 148 - cnum, ival, PMC_RSVD_MASK(cnum), PMC_DFL_VAL(cnum), *val)); 149 - return 0; 150 - } 151 - 152 - /* 153 - * task can be NULL if the context is unloaded 154 - */ 155 - static int 156 - pfm_mont_pmc_check(struct task_struct *task, pfm_context_t *ctx, unsigned int cnum, unsigned long *val, struct pt_regs *regs) 157 - { 158 - int ret = 0; 159 - unsigned long val32 = 0, val38 = 0, val41 = 0; 160 - unsigned long tmpval; 161 - int check_case1 = 0; 162 - int is_loaded; 163 - 164 - /* first preserve the reserved fields */ 165 - pfm_mont_reserved(cnum, val, regs); 166 - 167 - tmpval = *val; 168 - 169 - /* sanity check */ 170 - if (ctx == NULL) return -EINVAL; 171 - 172 - is_loaded = ctx->ctx_state == PFM_CTX_LOADED || ctx->ctx_state == PFM_CTX_MASKED; 173 - 174 - /* 175 - * we must clear the debug registers if pmc41 has a value which enable 176 - * memory pipeline event constraints. In this case we need to clear the 177 - * the debug registers if they have not yet been accessed. This is required 178 - * to avoid picking stale state. 179 - * PMC41 is "active" if: 180 - * one of the pmc41.cfg_dtagXX field is different from 0x3 181 - * AND 182 - * at the corresponding pmc41.en_dbrpXX is set. 183 - * AND 184 - * ctx_fl_using_dbreg == 0 (i.e., dbr not yet used) 185 - */ 186 - DPRINT(("cnum=%u val=0x%lx, using_dbreg=%d loaded=%d\n", cnum, tmpval, ctx->ctx_fl_using_dbreg, is_loaded)); 187 - 188 - if (cnum == 41 && is_loaded 189 - && (tmpval & 0x1e00000000000UL) && (tmpval & 0x18181818UL) != 0x18181818UL && ctx->ctx_fl_using_dbreg == 0) { 190 - 191 - DPRINT(("pmc[%d]=0x%lx has active pmc41 settings, clearing dbr\n", cnum, tmpval)); 192 - 193 - /* don't mix debug with perfmon */ 194 - if (task && (task->thread.flags & IA64_THREAD_DBG_VALID) != 0) return -EINVAL; 195 - 196 - /* 197 - * a count of 0 will mark the debug registers if: 198 - * AND 199 - */ 200 - ret = pfm_write_ibr_dbr(PFM_DATA_RR, ctx, NULL, 0, regs); 201 - if (ret) return ret; 202 - } 203 - /* 204 - * we must clear the (instruction) debug registers if: 205 - * pmc38.ig_ibrpX is 0 (enabled) 206 - * AND 207 - * ctx_fl_using_dbreg == 0 (i.e., dbr not yet used) 208 - */ 209 - if (cnum == 38 && is_loaded && ((tmpval & 0x492UL) != 0x492UL) && ctx->ctx_fl_using_dbreg == 0) { 210 - 211 - DPRINT(("pmc38=0x%lx has active pmc38 settings, clearing ibr\n", tmpval)); 212 - 213 - /* don't mix debug with perfmon */ 214 - if (task && (task->thread.flags & IA64_THREAD_DBG_VALID) != 0) return -EINVAL; 215 - 216 - /* 217 - * a count of 0 will mark the debug registers as in use and also 218 - * ensure that they are properly cleared. 219 - */ 220 - ret = pfm_write_ibr_dbr(PFM_CODE_RR, ctx, NULL, 0, regs); 221 - if (ret) return ret; 222 - 223 - } 224 - switch(cnum) { 225 - case 32: val32 = *val; 226 - val38 = ctx->ctx_pmcs[38]; 227 - val41 = ctx->ctx_pmcs[41]; 228 - check_case1 = 1; 229 - break; 230 - case 38: val38 = *val; 231 - val32 = ctx->ctx_pmcs[32]; 232 - val41 = ctx->ctx_pmcs[41]; 233 - check_case1 = 1; 234 - break; 235 - case 41: val41 = *val; 236 - val32 = ctx->ctx_pmcs[32]; 237 - val38 = ctx->ctx_pmcs[38]; 238 - check_case1 = 1; 239 - break; 240 - } 241 - /* check illegal configuration which can produce inconsistencies in tagging 242 - * i-side events in L1D and L2 caches 243 - */ 244 - if (check_case1) { 245 - ret = (((val41 >> 45) & 0xf) == 0 && ((val32>>57) & 0x1) == 0) 246 - && ((((val38>>1) & 0x3) == 0x2 || ((val38>>1) & 0x3) == 0) 247 - || (((val38>>4) & 0x3) == 0x2 || ((val38>>4) & 0x3) == 0)); 248 - if (ret) { 249 - DPRINT(("invalid config pmc38=0x%lx pmc41=0x%lx pmc32=0x%lx\n", val38, val41, val32)); 250 - return -EINVAL; 251 - } 252 - } 253 - *val = tmpval; 254 - return 0; 255 - } 256 - 257 - /* 258 - * impl_pmcs, impl_pmds are computed at runtime to minimize errors! 259 - */ 260 - static pmu_config_t pmu_conf_mont={ 261 - .pmu_name = "Montecito", 262 - .pmu_family = 0x20, 263 - .flags = PFM_PMU_IRQ_RESEND, 264 - .ovfl_val = (1UL << 47) - 1, 265 - .pmd_desc = pfm_mont_pmd_desc, 266 - .pmc_desc = pfm_mont_pmc_desc, 267 - .num_ibrs = 8, 268 - .num_dbrs = 8, 269 - .use_rr_dbregs = 1 /* debug register are use for range retrictions */ 270 - };
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usr/include/Makefile
··· 67 67 ifeq ($(SRCARCH),ia64) 68 68 no-header-test += asm/setup.h 69 69 no-header-test += asm/sigcontext.h 70 - no-header-test += asm/perfmon.h 71 - no-header-test += asm/perfmon_default_smpl.h 72 70 no-header-test += linux/if_bonding.h 73 71 endif 74 72