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Documentation: fpga: dfl: add description for performance reporting support

This patch adds description for performance reporting support for
Device Feature List (DFL) based FPGA.

Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Link: https://lore.kernel.org/r/1587949583-12058-2-git-send-email-hao.wu@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Xu Yilun and committed by
Greg Kroah-Hartman
1f03ac94 a2cc220a

+84
+84
Documentation/fpga/dfl.rst
··· 118 118 management information (current temperature, thresholds, threshold status, 119 119 etc.). 120 120 121 + Performance reporting 122 + performance counters are exposed through perf PMU APIs. Standard perf tool 123 + can be used to monitor all available perf events. Please see performance 124 + counter section below for more detailed information. 125 + 121 126 122 127 FIU - PORT 123 128 ========== ··· 381 376 382 377 /sys/class/fpga_region/<regionX>/<dfl-fme.n>/dev 383 378 /sys/class/fpga_region/<regionX>/<dfl-port.n>/dev 379 + 380 + 381 + Performance Counters 382 + ==================== 383 + Performance reporting is one private feature implemented in FME. It could 384 + supports several independent, system-wide, device counter sets in hardware to 385 + monitor and count for performance events, including "basic", "cache", "fabric", 386 + "vtd" and "vtd_sip" counters. Users could use standard perf tool to monitor 387 + FPGA cache hit/miss rate, transaction number, interface clock counter of AFU 388 + and other FPGA performance events. 389 + 390 + Different FPGA devices may have different counter sets, depending on hardware 391 + implementation. E.g., some discrete FPGA cards don't have any cache. User could 392 + use "perf list" to check which perf events are supported by target hardware. 393 + 394 + In order to allow user to use standard perf API to access these performance 395 + counters, driver creates a perf PMU, and related sysfs interfaces in 396 + /sys/bus/event_source/devices/dfl_fme* to describe available perf events and 397 + configuration options. 398 + 399 + The "format" directory describes the format of the config field of struct 400 + perf_event_attr. There are 3 bitfields for config: "evtype" defines which type 401 + the perf event belongs to; "event" is the identity of the event within its 402 + category; "portid" is introduced to decide counters set to monitor on FPGA 403 + overall data or a specific port. 404 + 405 + The "events" directory describes the configuration templates for all available 406 + events which can be used with perf tool directly. For example, fab_mmio_read 407 + has the configuration "event=0x06,evtype=0x02,portid=0xff", which shows this 408 + event belongs to fabric type (0x02), the local event id is 0x06 and it is for 409 + overall monitoring (portid=0xff). 410 + 411 + Example usage of perf:: 412 + 413 + $# perf list |grep dfl_fme 414 + 415 + dfl_fme0/fab_mmio_read/ [Kernel PMU event] 416 + <...> 417 + dfl_fme0/fab_port_mmio_read,portid=?/ [Kernel PMU event] 418 + <...> 419 + 420 + $# perf stat -a -e dfl_fme0/fab_mmio_read/ <command> 421 + or 422 + $# perf stat -a -e dfl_fme0/event=0x06,evtype=0x02,portid=0xff/ <command> 423 + or 424 + $# perf stat -a -e dfl_fme0/config=0xff2006/ <command> 425 + 426 + Another example, fab_port_mmio_read monitors mmio read of a specific port. So 427 + its configuration template is "event=0x06,evtype=0x01,portid=?". The portid 428 + should be explicitly set. 429 + 430 + Its usage of perf:: 431 + 432 + $# perf stat -a -e dfl_fme0/fab_port_mmio_read,portid=0x0/ <command> 433 + or 434 + $# perf stat -a -e dfl_fme0/event=0x06,evtype=0x02,portid=0x0/ <command> 435 + or 436 + $# perf stat -a -e dfl_fme0/config=0x2006/ <command> 437 + 438 + Please note for fabric counters, overall perf events (fab_*) and port perf 439 + events (fab_port_*) actually share one set of counters in hardware, so it can't 440 + monitor both at the same time. If this set of counters is configured to monitor 441 + overall data, then per port perf data is not supported. See below example:: 442 + 443 + $# perf stat -e dfl_fme0/fab_mmio_read/,dfl_fme0/fab_port_mmio_write,\ 444 + portid=0/ sleep 1 445 + 446 + Performance counter stats for 'system wide': 447 + 448 + 3 dfl_fme0/fab_mmio_read/ 449 + <not supported> dfl_fme0/fab_port_mmio_write,portid=0x0/ 450 + 451 + 1.001750904 seconds time elapsed 452 + 453 + The driver also provides a "cpumask" sysfs attribute, which contains only one 454 + CPU id used to access these perf events. Counting on multiple CPU is not allowed 455 + since they are system-wide counters on FPGA device. 456 + 457 + The current driver does not support sampling. So "perf record" is unsupported. 384 458 385 459 386 460 Add new FIUs support