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ARM: dts: Group omap3 CONTROL_DEVCONF1 clocks
The clksel related registers on omap3 cause unique_unit_address and
node_name_chars_strict warnings with the W=1 or W=2 make flags enabled.
With the clock drivers updated, we can now avoid most of these warnings
by grouping the TI component clocks using the TI clksel binding, and
with the use of clock-output-names property to avoid non-standard node
names for the clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
+28
-20
+28
-20
arch/arm/boot/dts/omap3xxx-clocks.dtsi
+28
-20
arch/arm/boot/dts/omap3xxx-clocks.dtsi
···
78
78
};
79
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&scm_clocks {
81
-
mcbsp5_mux_fck: mcbsp5_mux_fck@68 {
82
-
#clock-cells = <0>;
83
-
compatible = "ti,composite-mux-clock";
84
-
clocks = <&core_96m_fck>, <&mcbsp_clks>;
85
-
ti,bit-shift = <4>;
81
+
/* CONTROL_DEVCONF1 */
82
+
clock@68 {
83
+
compatible = "ti,clksel";
86
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reg = <0x68>;
85
+
#clock-cells = <2>;
86
+
#address-cells = <0>;
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+
88
+
mcbsp5_mux_fck: clock-mcbsp5-mux-fck {
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+
#clock-cells = <0>;
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+
compatible = "ti,composite-mux-clock";
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+
clock-output-names = "mcbsp5_mux_fck";
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+
clocks = <&core_96m_fck>, <&mcbsp_clks>;
93
+
ti,bit-shift = <4>;
94
+
};
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+
96
+
mcbsp3_mux_fck: clock-mcbsp3-mux-fck {
97
+
#clock-cells = <0>;
98
+
compatible = "ti,composite-mux-clock";
99
+
clock-output-names = "mcbsp3_mux_fck";
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+
clocks = <&per_96m_fck>, <&mcbsp_clks>;
101
+
};
102
+
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+
mcbsp4_mux_fck: clock-mcbsp4-mux-fck {
104
+
#clock-cells = <0>;
105
+
compatible = "ti,composite-mux-clock";
106
+
clock-output-names = "mcbsp4_mux_fck";
107
+
clocks = <&per_96m_fck>, <&mcbsp_clks>;
108
+
ti,bit-shift = <2>;
109
+
};
87
110
};
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mcbsp5_fck: mcbsp5_fck {
···
151
128
clocks = <&mcbsp2_gate_fck>, <&mcbsp2_mux_fck>;
152
129
};
153
130
154
-
mcbsp3_mux_fck: mcbsp3_mux_fck@68 {
155
-
#clock-cells = <0>;
156
-
compatible = "ti,composite-mux-clock";
157
-
clocks = <&per_96m_fck>, <&mcbsp_clks>;
158
-
reg = <0x68>;
159
-
};
160
-
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131
mcbsp3_fck: mcbsp3_fck {
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#clock-cells = <0>;
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compatible = "ti,composite-clock";
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clocks = <&mcbsp3_gate_fck>, <&mcbsp3_mux_fck>;
165
-
};
166
-
167
-
mcbsp4_mux_fck: mcbsp4_mux_fck@68 {
168
-
#clock-cells = <0>;
169
-
compatible = "ti,composite-mux-clock";
170
-
clocks = <&per_96m_fck>, <&mcbsp_clks>;
171
-
ti,bit-shift = <2>;
172
-
reg = <0x68>;
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135
};
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mcbsp4_fck: mcbsp4_fck {