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kernel os linux

memory: renesas-rpc-if: Add support for R-Car Gen4

The SPI Multi I/O Bus Controller (RPC-IF) on R-Car Gen4 SoCs is very
similar to the RPC-IF on R-Car Gen3 SoCs. It does support four instead
of three bits of strobe timing adjustment (STRTIM), and thus requires a
new mask and new settings.

Inspired by a patch in the BSP by Cong Dang.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/4d0824bf5ed0fb95c51cd36f9a3f0f562b1a6bf8.1665583089.git.geert+renesas@glider.be
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

authored by

Geert Uytterhoeven and committed by
Krzysztof Kozlowski
1de3866f 5192481f

+13 -7
+12 -7
drivers/memory/renesas-rpc-if.c
··· 136 136 #define RPCIF_PHYCNT_DDRCAL BIT(19) 137 137 #define RPCIF_PHYCNT_HS BIT(18) 138 138 #define RPCIF_PHYCNT_CKSEL(v) (((v) & 0x3) << 16) /* valid only for RZ/G2L */ 139 - #define RPCIF_PHYCNT_STRTIM(v) (((v) & 0x7) << 15) /* valid for R-Car and RZ/G2{E,H,M,N} */ 139 + #define RPCIF_PHYCNT_STRTIM(v) (((v) & 0x7) << 15 | ((v) & 0x8) << 24) /* valid for R-Car and RZ/G2{E,H,M,N} */ 140 + 140 141 #define RPCIF_PHYCNT_WBUF2 BIT(4) 141 142 #define RPCIF_PHYCNT_WBUF BIT(2) 142 143 #define RPCIF_PHYCNT_PHYMEM(v) (((v) & 0x3) << 0) ··· 324 323 if (rpc->type == RPCIF_RCAR_GEN3) 325 324 regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, 326 325 RPCIF_PHYCNT_STRTIM(7), RPCIF_PHYCNT_STRTIM(7)); 326 + else if (rpc->type == RPCIF_RCAR_GEN4) 327 + regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, 328 + RPCIF_PHYCNT_STRTIM(15), RPCIF_PHYCNT_STRTIM(15)); 327 329 328 330 regmap_update_bits(rpc->regmap, RPCIF_PHYOFFSET1, RPCIF_PHYOFFSET1_DDRTMG(3), 329 331 RPCIF_PHYOFFSET1_DDRTMG(3)); ··· 337 333 regmap_update_bits(rpc->regmap, RPCIF_PHYINT, 338 334 RPCIF_PHYINT_WPVAL, 0); 339 335 340 - if (rpc->type == RPCIF_RCAR_GEN3) 341 - regmap_update_bits(rpc->regmap, RPCIF_CMNCR, 342 - RPCIF_CMNCR_MOIIO(3) | RPCIF_CMNCR_BSZ(3), 343 - RPCIF_CMNCR_MOIIO(3) | 344 - RPCIF_CMNCR_BSZ(hyperflash ? 1 : 0)); 345 - else 336 + if (rpc->type == RPCIF_RZ_G2L) 346 337 regmap_update_bits(rpc->regmap, RPCIF_CMNCR, 347 338 RPCIF_CMNCR_MOIIO(3) | RPCIF_CMNCR_IOFV(3) | 348 339 RPCIF_CMNCR_BSZ(3), 349 340 RPCIF_CMNCR_MOIIO(1) | RPCIF_CMNCR_IOFV(2) | 341 + RPCIF_CMNCR_BSZ(hyperflash ? 1 : 0)); 342 + else 343 + regmap_update_bits(rpc->regmap, RPCIF_CMNCR, 344 + RPCIF_CMNCR_MOIIO(3) | RPCIF_CMNCR_BSZ(3), 345 + RPCIF_CMNCR_MOIIO(3) | 350 346 RPCIF_CMNCR_BSZ(hyperflash ? 1 : 0)); 351 347 352 348 /* Set RCF after BSZ update */ ··· 722 718 723 719 static const struct of_device_id rpcif_of_match[] = { 724 720 { .compatible = "renesas,rcar-gen3-rpc-if", .data = (void *)RPCIF_RCAR_GEN3 }, 721 + { .compatible = "renesas,rcar-gen4-rpc-if", .data = (void *)RPCIF_RCAR_GEN4 }, 725 722 { .compatible = "renesas,rzg2l-rpc-if", .data = (void *)RPCIF_RZ_G2L }, 726 723 {}, 727 724 };
+1
include/memory/renesas-rpc-if.h
··· 59 59 60 60 enum rpcif_type { 61 61 RPCIF_RCAR_GEN3, 62 + RPCIF_RCAR_GEN4, 62 63 RPCIF_RZ_G2L, 63 64 }; 64 65