Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
Merge master.kernel.org:/home/rmk/linux-2.6-arm
+2
arch/arm/common/gic.c
+2
arch/arm/common/gic.c
···
68
68
writel(mask, gic_dist_base + GIC_DIST_ENABLE_SET + (irq / 32) * 4);
69
69
}
70
70
71
+
#ifdef CONFIG_SMP
71
72
static void gic_set_cpu(struct irqdesc *desc, unsigned int irq, unsigned int cpu)
72
73
{
73
74
void __iomem *reg = gic_dist_base + GIC_DIST_TARGET + (irq & ~3);
···
79
78
val |= 1 << (cpu + shift);
80
79
writel(val, reg);
81
80
}
81
+
#endif
82
82
83
83
static struct irqchip gic_chip = {
84
84
.ack = gic_ack_irq,
-1
arch/arm/common/locomo.c
-1
arch/arm/common/locomo.c
-1
arch/arm/mach-imx/leds-mx1ads.c
-1
arch/arm/mach-imx/leds-mx1ads.c
-1
arch/arm/mach-iop3xx/common.c
-1
arch/arm/mach-iop3xx/common.c
-1
arch/arm/mach-iop3xx/iop321-time.c
-1
arch/arm/mach-iop3xx/iop321-time.c
-1
arch/arm/mach-iop3xx/iop331-time.c
-1
arch/arm/mach-iop3xx/iop331-time.c
-1
arch/arm/mach-iop3xx/iq31244-mm.c
-1
arch/arm/mach-iop3xx/iq31244-mm.c
-1
arch/arm/mach-iop3xx/iq80321-mm.c
-1
arch/arm/mach-iop3xx/iq80321-mm.c
-1
arch/arm/mach-iop3xx/iq80331-mm.c
-1
arch/arm/mach-iop3xx/iq80331-mm.c
-1
arch/arm/mach-iop3xx/iq80332-mm.c
-1
arch/arm/mach-iop3xx/iq80332-mm.c
-1
arch/arm/mach-ixp2000/core.c
-1
arch/arm/mach-ixp2000/core.c
-1
arch/arm/mach-ixp2000/pci.c
-1
arch/arm/mach-ixp2000/pci.c
-1
arch/arm/mach-l7200/core.c
-1
arch/arm/mach-l7200/core.c
-1
arch/arm/mach-pxa/corgi_lcd.c
-1
arch/arm/mach-pxa/corgi_lcd.c
+1
arch/arm/mach-pxa/generic.c
+1
arch/arm/mach-pxa/generic.c
-1
arch/arm/mach-s3c2410/usb-simtec.c
-1
arch/arm/mach-s3c2410/usb-simtec.c
-1
arch/arm/mach-versatile/core.c
-1
arch/arm/mach-versatile/core.c
-1
arch/arm/mach-versatile/pci.c
-1
arch/arm/mach-versatile/pci.c
+8
-1
arch/arm/mm/cache-v6.S
+8
-1
arch/arm/mm/cache-v6.S
···
18
18
#define HARVARD_CACHE
19
19
#define CACHE_LINE_SIZE 32
20
20
#define D_CACHE_LINE_SIZE 32
21
+
#define BTB_FLUSH_SIZE 8
21
22
22
23
/*
23
24
* v6_flush_cache_all()
···
99
98
mcr p15, 0, r0, c7, c5, 1 @ invalidate I line
100
99
#endif
101
100
mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry
102
-
add r0, r0, #CACHE_LINE_SIZE
101
+
add r0, r0, #BTB_FLUSH_SIZE
102
+
mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry
103
+
add r0, r0, #BTB_FLUSH_SIZE
104
+
mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry
105
+
add r0, r0, #BTB_FLUSH_SIZE
106
+
mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry
107
+
add r0, r0, #BTB_FLUSH_SIZE
103
108
cmp r0, r1
104
109
blo 1b
105
110
#ifdef HARVARD_CACHE
+18
-18
arch/arm/mm/flush.c
+18
-18
arch/arm/mm/flush.c
···
17
17
18
18
#ifdef CONFIG_CPU_CACHE_VIPT
19
19
20
+
#define ALIAS_FLUSH_START 0xffff4000
21
+
22
+
#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
23
+
24
+
static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
25
+
{
26
+
unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
27
+
28
+
set_pte(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL));
29
+
flush_tlb_kernel_page(to);
30
+
31
+
asm( "mcrr p15, 0, %1, %0, c14\n"
32
+
" mcrr p15, 0, %1, %0, c5\n"
33
+
:
34
+
: "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES)
35
+
: "cc");
36
+
}
37
+
20
38
void flush_cache_mm(struct mm_struct *mm)
21
39
{
22
40
if (cache_is_vivt()) {
···
84
66
85
67
if (cache_is_vipt_aliasing())
86
68
flush_pfn_alias(pfn, user_addr);
87
-
}
88
-
89
-
#define ALIAS_FLUSH_START 0xffff4000
90
-
91
-
#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
92
-
93
-
static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
94
-
{
95
-
unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
96
-
97
-
set_pte(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL));
98
-
flush_tlb_kernel_page(to);
99
-
100
-
asm( "mcrr p15, 0, %1, %0, c14\n"
101
-
" mcrr p15, 0, %1, %0, c5\n"
102
-
:
103
-
: "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES)
104
-
: "cc");
105
69
}
106
70
#else
107
71
#define flush_pfn_alias(pfn,vaddr) do { } while (0)
-1
arch/arm/plat-omap/common.c
-1
arch/arm/plat-omap/common.c
-1
arch/arm/plat-omap/cpu-omap.c
-1
arch/arm/plat-omap/cpu-omap.c
-1
arch/arm/plat-omap/usb.c
-1
arch/arm/plat-omap/usb.c
-1
drivers/mtd/maps/bast-flash.c
-1
drivers/mtd/maps/bast-flash.c
-1
drivers/mtd/maps/ixp2000.c
-1
drivers/mtd/maps/ixp2000.c
-1
drivers/mtd/maps/ixp4xx.c
-1
drivers/mtd/maps/ixp4xx.c
-1
drivers/mtd/maps/omap_nor.c
-1
drivers/mtd/maps/omap_nor.c
-1
drivers/mtd/maps/sa1100-flash.c
-1
drivers/mtd/maps/sa1100-flash.c
-1
drivers/mtd/nand/s3c2410.c
-1
drivers/mtd/nand/s3c2410.c
-1
drivers/pcmcia/omap_cf.c
-1
drivers/pcmcia/omap_cf.c
-2
drivers/serial/s3c2410.c
-2
drivers/serial/s3c2410.c
-2
drivers/usb/host/ohci-lh7a404.c
-2
drivers/usb/host/ohci-lh7a404.c
-1
drivers/usb/host/ohci-omap.c
-1
drivers/usb/host/ohci-omap.c
-1
drivers/usb/host/ohci-s3c2410.c
-1
drivers/usb/host/ohci-s3c2410.c
-1
drivers/video/backlight/corgi_bl.c
-1
drivers/video/backlight/corgi_bl.c
-1
drivers/video/imxfb.c
-1
drivers/video/imxfb.c
+51
-51
drivers/video/pxafb.c
+51
-51
drivers/video/pxafb.c
···
260
260
}
261
261
262
262
#ifdef CONFIG_CPU_FREQ
263
-
DPRINTK("dma period = %d ps, clock = %d kHz\n",
264
-
pxafb_display_dma_period(var),
265
-
get_clk_frequency_khz(0));
263
+
pr_debug("pxafb: dma period = %d ps, clock = %d kHz\n",
264
+
pxafb_display_dma_period(var),
265
+
get_clk_frequency_khz(0));
266
266
#endif
267
267
268
268
return 0;
···
270
270
271
271
static inline void pxafb_set_truecolor(u_int is_true_color)
272
272
{
273
-
DPRINTK("true_color = %d\n", is_true_color);
273
+
pr_debug("pxafb: true_color = %d\n", is_true_color);
274
274
// do your machine-specific setup if needed
275
275
}
276
276
···
284
284
struct fb_var_screeninfo *var = &info->var;
285
285
unsigned long palette_mem_size;
286
286
287
-
DPRINTK("set_par\n");
287
+
pr_debug("pxafb: set_par\n");
288
288
289
289
if (var->bits_per_pixel == 16)
290
290
fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
···
308
308
309
309
palette_mem_size = fbi->palette_size * sizeof(u16);
310
310
311
-
DPRINTK("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size);
311
+
pr_debug("pxafb: palette_mem_size = 0x%08lx\n", palette_mem_size);
312
312
313
313
fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size);
314
314
fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size;
···
369
369
struct pxafb_info *fbi = (struct pxafb_info *)info;
370
370
int i;
371
371
372
-
DPRINTK("pxafb_blank: blank=%d\n", blank);
372
+
pr_debug("pxafb: blank=%d\n", blank);
373
373
374
374
switch (blank) {
375
375
case FB_BLANK_POWERDOWN:
···
508
508
u_long flags;
509
509
u_int lines_per_panel, pcd = get_pcd(var->pixclock);
510
510
511
-
DPRINTK("Configuring PXA LCD\n");
511
+
pr_debug("pxafb: Configuring PXA LCD\n");
512
512
513
-
DPRINTK("var: xres=%d hslen=%d lm=%d rm=%d\n",
514
-
var->xres, var->hsync_len,
515
-
var->left_margin, var->right_margin);
516
-
DPRINTK("var: yres=%d vslen=%d um=%d bm=%d\n",
517
-
var->yres, var->vsync_len,
518
-
var->upper_margin, var->lower_margin);
519
-
DPRINTK("var: pixclock=%d pcd=%d\n", var->pixclock, pcd);
513
+
pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
514
+
var->xres, var->hsync_len,
515
+
var->left_margin, var->right_margin);
516
+
pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n",
517
+
var->yres, var->vsync_len,
518
+
var->upper_margin, var->lower_margin);
519
+
pr_debug("var: pixclock=%d pcd=%d\n", var->pixclock, pcd);
520
520
521
521
#if DEBUG_VAR
522
522
if (var->xres < 16 || var->xres > 1024)
···
589
589
if (pcd)
590
590
new_regs.lccr3 |= LCCR3_PixClkDiv(pcd);
591
591
592
-
DPRINTK("nlccr0 = 0x%08x\n", new_regs.lccr0);
593
-
DPRINTK("nlccr1 = 0x%08x\n", new_regs.lccr1);
594
-
DPRINTK("nlccr2 = 0x%08x\n", new_regs.lccr2);
595
-
DPRINTK("nlccr3 = 0x%08x\n", new_regs.lccr3);
592
+
pr_debug("nlccr0 = 0x%08x\n", new_regs.lccr0);
593
+
pr_debug("nlccr1 = 0x%08x\n", new_regs.lccr1);
594
+
pr_debug("nlccr2 = 0x%08x\n", new_regs.lccr2);
595
+
pr_debug("nlccr3 = 0x%08x\n", new_regs.lccr3);
596
596
597
597
/* Update shadow copy atomically */
598
598
local_irq_save(flags);
···
637
637
}
638
638
639
639
#if 0
640
-
DPRINTK("fbi->dmadesc_fblow_cpu = 0x%p\n", fbi->dmadesc_fblow_cpu);
641
-
DPRINTK("fbi->dmadesc_fbhigh_cpu = 0x%p\n", fbi->dmadesc_fbhigh_cpu);
642
-
DPRINTK("fbi->dmadesc_palette_cpu = 0x%p\n", fbi->dmadesc_palette_cpu);
643
-
DPRINTK("fbi->dmadesc_fblow_dma = 0x%x\n", fbi->dmadesc_fblow_dma);
644
-
DPRINTK("fbi->dmadesc_fbhigh_dma = 0x%x\n", fbi->dmadesc_fbhigh_dma);
645
-
DPRINTK("fbi->dmadesc_palette_dma = 0x%x\n", fbi->dmadesc_palette_dma);
640
+
pr_debug("fbi->dmadesc_fblow_cpu = 0x%p\n", fbi->dmadesc_fblow_cpu);
641
+
pr_debug("fbi->dmadesc_fbhigh_cpu = 0x%p\n", fbi->dmadesc_fbhigh_cpu);
642
+
pr_debug("fbi->dmadesc_palette_cpu = 0x%p\n", fbi->dmadesc_palette_cpu);
643
+
pr_debug("fbi->dmadesc_fblow_dma = 0x%x\n", fbi->dmadesc_fblow_dma);
644
+
pr_debug("fbi->dmadesc_fbhigh_dma = 0x%x\n", fbi->dmadesc_fbhigh_dma);
645
+
pr_debug("fbi->dmadesc_palette_dma = 0x%x\n", fbi->dmadesc_palette_dma);
646
646
647
-
DPRINTK("fbi->dmadesc_fblow_cpu->fdadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fdadr);
648
-
DPRINTK("fbi->dmadesc_fbhigh_cpu->fdadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fdadr);
649
-
DPRINTK("fbi->dmadesc_palette_cpu->fdadr = 0x%x\n", fbi->dmadesc_palette_cpu->fdadr);
647
+
pr_debug("fbi->dmadesc_fblow_cpu->fdadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fdadr);
648
+
pr_debug("fbi->dmadesc_fbhigh_cpu->fdadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fdadr);
649
+
pr_debug("fbi->dmadesc_palette_cpu->fdadr = 0x%x\n", fbi->dmadesc_palette_cpu->fdadr);
650
650
651
-
DPRINTK("fbi->dmadesc_fblow_cpu->fsadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fsadr);
652
-
DPRINTK("fbi->dmadesc_fbhigh_cpu->fsadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fsadr);
653
-
DPRINTK("fbi->dmadesc_palette_cpu->fsadr = 0x%x\n", fbi->dmadesc_palette_cpu->fsadr);
651
+
pr_debug("fbi->dmadesc_fblow_cpu->fsadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fsadr);
652
+
pr_debug("fbi->dmadesc_fbhigh_cpu->fsadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fsadr);
653
+
pr_debug("fbi->dmadesc_palette_cpu->fsadr = 0x%x\n", fbi->dmadesc_palette_cpu->fsadr);
654
654
655
-
DPRINTK("fbi->dmadesc_fblow_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fblow_cpu->ldcmd);
656
-
DPRINTK("fbi->dmadesc_fbhigh_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fbhigh_cpu->ldcmd);
657
-
DPRINTK("fbi->dmadesc_palette_cpu->ldcmd = 0x%x\n", fbi->dmadesc_palette_cpu->ldcmd);
655
+
pr_debug("fbi->dmadesc_fblow_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fblow_cpu->ldcmd);
656
+
pr_debug("fbi->dmadesc_fbhigh_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fbhigh_cpu->ldcmd);
657
+
pr_debug("fbi->dmadesc_palette_cpu->ldcmd = 0x%x\n", fbi->dmadesc_palette_cpu->ldcmd);
658
658
#endif
659
659
660
660
fbi->reg_lccr0 = new_regs.lccr0;
···
684
684
*/
685
685
static inline void __pxafb_backlight_power(struct pxafb_info *fbi, int on)
686
686
{
687
-
DPRINTK("backlight o%s\n", on ? "n" : "ff");
687
+
pr_debug("pxafb: backlight o%s\n", on ? "n" : "ff");
688
688
689
689
if (pxafb_backlight_power)
690
690
pxafb_backlight_power(on);
···
692
692
693
693
static inline void __pxafb_lcd_power(struct pxafb_info *fbi, int on)
694
694
{
695
-
DPRINTK("LCD power o%s\n", on ? "n" : "ff");
695
+
pr_debug("pxafb: LCD power o%s\n", on ? "n" : "ff");
696
696
697
697
if (pxafb_lcd_power)
698
698
pxafb_lcd_power(on);
···
740
740
741
741
static void pxafb_enable_controller(struct pxafb_info *fbi)
742
742
{
743
-
DPRINTK("Enabling LCD controller\n");
744
-
DPRINTK("fdadr0 0x%08x\n", (unsigned int) fbi->fdadr0);
745
-
DPRINTK("fdadr1 0x%08x\n", (unsigned int) fbi->fdadr1);
746
-
DPRINTK("reg_lccr0 0x%08x\n", (unsigned int) fbi->reg_lccr0);
747
-
DPRINTK("reg_lccr1 0x%08x\n", (unsigned int) fbi->reg_lccr1);
748
-
DPRINTK("reg_lccr2 0x%08x\n", (unsigned int) fbi->reg_lccr2);
749
-
DPRINTK("reg_lccr3 0x%08x\n", (unsigned int) fbi->reg_lccr3);
743
+
pr_debug("pxafb: Enabling LCD controller\n");
744
+
pr_debug("fdadr0 0x%08x\n", (unsigned int) fbi->fdadr0);
745
+
pr_debug("fdadr1 0x%08x\n", (unsigned int) fbi->fdadr1);
746
+
pr_debug("reg_lccr0 0x%08x\n", (unsigned int) fbi->reg_lccr0);
747
+
pr_debug("reg_lccr1 0x%08x\n", (unsigned int) fbi->reg_lccr1);
748
+
pr_debug("reg_lccr2 0x%08x\n", (unsigned int) fbi->reg_lccr2);
749
+
pr_debug("reg_lccr3 0x%08x\n", (unsigned int) fbi->reg_lccr3);
750
750
751
751
/* enable LCD controller clock */
752
752
pxa_set_cken(CKEN16_LCD, 1);
···
761
761
FDADR1 = fbi->fdadr1;
762
762
LCCR0 |= LCCR0_ENB;
763
763
764
-
DPRINTK("FDADR0 0x%08x\n", (unsigned int) FDADR0);
765
-
DPRINTK("FDADR1 0x%08x\n", (unsigned int) FDADR1);
766
-
DPRINTK("LCCR0 0x%08x\n", (unsigned int) LCCR0);
767
-
DPRINTK("LCCR1 0x%08x\n", (unsigned int) LCCR1);
768
-
DPRINTK("LCCR2 0x%08x\n", (unsigned int) LCCR2);
769
-
DPRINTK("LCCR3 0x%08x\n", (unsigned int) LCCR3);
764
+
pr_debug("FDADR0 0x%08x\n", (unsigned int) FDADR0);
765
+
pr_debug("FDADR1 0x%08x\n", (unsigned int) FDADR1);
766
+
pr_debug("LCCR0 0x%08x\n", (unsigned int) LCCR0);
767
+
pr_debug("LCCR1 0x%08x\n", (unsigned int) LCCR1);
768
+
pr_debug("LCCR2 0x%08x\n", (unsigned int) LCCR2);
769
+
pr_debug("LCCR3 0x%08x\n", (unsigned int) LCCR3);
770
770
}
771
771
772
772
static void pxafb_disable_controller(struct pxafb_info *fbi)
773
773
{
774
774
DECLARE_WAITQUEUE(wait, current);
775
775
776
-
DPRINTK("Disabling LCD controller\n");
776
+
pr_debug("pxafb: disabling LCD controller\n");
777
777
778
778
set_current_state(TASK_UNINTERRUPTIBLE);
779
779
add_wait_queue(&fbi->ctrlr_wait, &wait);
···
1039
1039
fbi->palette_size = fbi->fb.var.bits_per_pixel == 8 ? 256 : 16;
1040
1040
1041
1041
palette_mem_size = fbi->palette_size * sizeof(u16);
1042
-
DPRINTK("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size);
1042
+
pr_debug("pxafb: palette_mem_size = 0x%08lx\n", palette_mem_size);
1043
1043
1044
1044
fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size);
1045
1045
fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size;
-9
drivers/video/pxafb.h
-9
drivers/video/pxafb.h
···
114
114
#define PXA_NAME "PXA"
115
115
116
116
/*
117
-
* Debug macros
118
-
*/
119
-
#if DEBUG
120
-
# define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args)
121
-
#else
122
-
# define DPRINTK(fmt, args...)
123
-
#endif
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-
125
-
/*
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* Minimum X and Y resolutions
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*/
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#define MIN_XRES 64