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ARM: dts: rockchip: restyle emac nodes

The emac_rockchip.txt file is converted to YAML.
Phy nodes are now a subnode of mdio, so restyle
the emac nodes of rk3036/rk3066/rk3188.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220603163539.537-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

authored by

Johan Jonker and committed by
Heiko Stuebner
1dabb749 d28b680a

+52 -37
+10 -6
arch/arm/boot/dts/rk3036-evb.dts
··· 15 15 }; 16 16 17 17 &emac { 18 + phy = <&phy0>; 19 + phy-reset-duration = <10>; /* millisecond */ 20 + phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */ 18 21 pinctrl-names = "default"; 19 22 pinctrl-0 = <&emac_xfer>, <&emac_mdio>; 20 - phy = <&phy0>; 21 - phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */ 22 - phy-reset-duration = <10>; /* millisecond */ 23 - 24 23 status = "okay"; 25 24 26 - phy0: ethernet-phy@0 { 27 - reg = <0>; 25 + mdio { 26 + #address-cells = <1>; 27 + #size-cells = <0>; 28 + 29 + phy0: ethernet-phy@0 { 30 + reg = <0>; 31 + }; 28 32 }; 29 33 }; 30 34
+10 -6
arch/arm/boot/dts/rk3036-kylin.dts
··· 80 80 }; 81 81 82 82 &emac { 83 + phy = <&phy0>; 84 + phy-reset-duration = <10>; /* millisecond */ 85 + phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */ 83 86 pinctrl-names = "default"; 84 87 pinctrl-0 = <&emac_xfer>, <&emac_mdio>; 85 - phy = <&phy0>; 86 - phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */ 87 - phy-reset-duration = <10>; /* millisecond */ 88 - 89 88 status = "okay"; 90 89 91 - phy0: ethernet-phy@0 { 92 - reg = <0>; 90 + mdio { 91 + #address-cells = <1>; 92 + #size-cells = <0>; 93 + 94 + phy0: ethernet-phy@0 { 95 + reg = <0>; 96 + }; 93 97 }; 94 98 }; 95 99
-2
arch/arm/boot/dts/rk3036.dtsi
··· 228 228 compatible = "rockchip,rk3036-emac"; 229 229 reg = <0x10200000 0x4000>; 230 230 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 231 - #address-cells = <1>; 232 - #size-cells = <0>; 233 231 rockchip,grf = <&grf>; 234 232 clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>; 235 233 clock-names = "hclk", "macref", "macclk";
+10 -7
arch/arm/boot/dts/rk3066a-marsboard.dts
··· 150 150 #include "tps65910.dtsi" 151 151 152 152 &emac { 153 - status = "okay"; 154 - 155 153 phy = <&phy0>; 156 154 phy-supply = <&vcc_rmii>; 157 - 158 155 pinctrl-names = "default"; 159 156 pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>; 157 + status = "okay"; 160 158 161 - phy0: ethernet-phy@0 { 162 - reg = <0>; 163 - interrupt-parent = <&gpio1>; 164 - interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>; 159 + mdio { 160 + #address-cells = <1>; 161 + #size-cells = <0>; 162 + 163 + phy0: ethernet-phy@0 { 164 + reg = <0>; 165 + interrupt-parent = <&gpio1>; 166 + interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>; 167 + }; 165 168 }; 166 169 }; 167 170
+10 -5
arch/arm/boot/dts/rk3066a-rayeager.dts
··· 142 142 }; 143 143 144 144 &emac { 145 - pinctrl-names = "default"; 146 - pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; 147 145 phy = <&phy0>; 148 146 phy-supply = <&vcc_rmii>; 147 + pinctrl-names = "default"; 148 + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; 149 149 status = "okay"; 150 150 151 - phy0: ethernet-phy@0 { 152 - reg = <0>; 153 - reset-gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; 151 + mdio { 152 + #address-cells = <1>; 153 + #size-cells = <0>; 154 + 155 + phy0: ethernet-phy@0 { 156 + reg = <0>; 157 + reset-gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; 158 + }; 154 159 }; 155 160 }; 156 161
+12 -9
arch/arm/boot/dts/rk3188-radxarock.dts
··· 126 126 }; 127 127 128 128 &emac { 129 - status = "okay"; 130 - 131 - pinctrl-names = "default"; 132 - pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>; 133 - 134 129 phy = <&phy0>; 135 130 phy-supply = <&vcc_rmii>; 131 + pinctrl-names = "default"; 132 + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>; 133 + status = "okay"; 136 134 137 - phy0: ethernet-phy@0 { 138 - reg = <0>; 139 - interrupt-parent = <&gpio3>; 140 - interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>; 135 + mdio { 136 + #address-cells = <1>; 137 + #size-cells = <0>; 138 + 139 + phy0: ethernet-phy@0 { 140 + reg = <0>; 141 + interrupt-parent = <&gpio3>; 142 + interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>; 143 + }; 141 144 }; 142 145 }; 143 146
-2
arch/arm/boot/dts/rk3xxx.dtsi
··· 186 186 compatible = "snps,arc-emac"; 187 187 reg = <0x10204000 0x3c>; 188 188 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 189 - #address-cells = <1>; 190 - #size-cells = <0>; 191 189 192 190 rockchip,grf = <&grf>; 193 191