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kernel
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linux
dt-bindings: display: imx: Add i.MX8qxp Display Controller processing units
Freescale i.MX8qxp Display Controller is implemented as construction set of
building blocks with unified concept and standardized interfaces. Document
all existing processing units.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250414035028.1561475-2-victor.liu@nxp.com
+963
+41
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blitblend.yaml
+41
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blitblend.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-blitblend.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Blit Blend Unit
8
+
9
+
description:
10
+
Combines two input frames to a single output frame, all frames having the
11
+
same dimension.
12
+
13
+
maintainers:
14
+
- Liu Ying <victor.liu@nxp.com>
15
+
16
+
properties:
17
+
compatible:
18
+
const: fsl,imx8qxp-dc-blitblend
19
+
20
+
reg:
21
+
maxItems: 2
22
+
23
+
reg-names:
24
+
items:
25
+
- const: pec
26
+
- const: cfg
27
+
28
+
required:
29
+
- compatible
30
+
- reg
31
+
- reg-names
32
+
33
+
additionalProperties: false
34
+
35
+
examples:
36
+
- |
37
+
blitblend@56180920 {
38
+
compatible = "fsl,imx8qxp-dc-blitblend";
39
+
reg = <0x56180920 0x10>, <0x56183c00 0x3c>;
40
+
reg-names = "pec", "cfg";
41
+
};
+44
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-clut.yaml
+44
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-clut.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-clut.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
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title: Freescale i.MX8qxp Display Controller Color Lookup Table
8
+
9
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description: |
10
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The unit implements 3 look-up tables with 256 x 10 bit entries each. These
11
+
can be used for different kinds of applications. From 10-bit input values
12
+
only upper 8 bits are used.
13
+
14
+
The unit supports color lookup, index lookup, dithering and alpha masking.
15
+
16
+
maintainers:
17
+
- Liu Ying <victor.liu@nxp.com>
18
+
19
+
properties:
20
+
compatible:
21
+
const: fsl,imx8qxp-dc-clut
22
+
23
+
reg:
24
+
maxItems: 2
25
+
26
+
reg-names:
27
+
items:
28
+
- const: pec
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+
- const: cfg
30
+
31
+
required:
32
+
- compatible
33
+
- reg
34
+
- reg-names
35
+
36
+
additionalProperties: false
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+
38
+
examples:
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+
- |
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clut@56180880 {
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compatible = "fsl,imx8qxp-dc-clut";
42
+
reg = <0x56180880 0x10>, <0x56182400 0x404>;
43
+
reg-names = "pec", "cfg";
44
+
};
+44
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-constframe.yaml
+44
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-constframe.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-constframe.yaml#
5
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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title: Freescale i.MX8qxp Display Controller Constant Frame
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+
9
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description: |
10
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The Constant Frame unit is used instead of a Fetch unit where generation of
11
+
constant color frames only is sufficient. This is the case for the background
12
+
planes of content and safety streams in a Display Controller.
13
+
14
+
The color can be setup to any RGBA value.
15
+
16
+
maintainers:
17
+
- Liu Ying <victor.liu@nxp.com>
18
+
19
+
properties:
20
+
compatible:
21
+
const: fsl,imx8qxp-dc-constframe
22
+
23
+
reg:
24
+
maxItems: 2
25
+
26
+
reg-names:
27
+
items:
28
+
- const: pec
29
+
- const: cfg
30
+
31
+
required:
32
+
- compatible
33
+
- reg
34
+
- reg-names
35
+
36
+
additionalProperties: false
37
+
38
+
examples:
39
+
- |
40
+
constframe@56180960 {
41
+
compatible = "fsl,imx8qxp-dc-constframe";
42
+
reg = <0x56180960 0xc>, <0x56184400 0x20>;
43
+
reg-names = "pec", "cfg";
44
+
};
+45
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-dither.yaml
+45
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-dither.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-dither.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
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title: Freescale i.MX8qxp Display Controller Dither Unit
8
+
9
+
description: |
10
+
The unit can increase the physical color resolution of a display from 5, 6, 7
11
+
or 8 bits per RGB channel to a virtual resolution of 10 bits. The physical
12
+
resolution can be set individually for each channel.
13
+
14
+
The resolution is increased by mixing the two physical colors that are nearest
15
+
to the virtual color code in a variable ratio either by time (temporal
16
+
dithering) or by position (spatial dithering).
17
+
18
+
An optimized algorithm for temporal dithering minimizes noise artifacts on the
19
+
output image.
20
+
21
+
The dither operation can be individually enabled or disabled for each pixel
22
+
using the alpha input bit.
23
+
24
+
maintainers:
25
+
- Liu Ying <victor.liu@nxp.com>
26
+
27
+
properties:
28
+
compatible:
29
+
const: fsl,imx8qxp-dc-dither
30
+
31
+
reg:
32
+
maxItems: 1
33
+
34
+
required:
35
+
- compatible
36
+
- reg
37
+
38
+
additionalProperties: false
39
+
40
+
examples:
41
+
- |
42
+
dither@5618c400 {
43
+
compatible = "fsl,imx8qxp-dc-dither";
44
+
reg = <0x5618c400 0x14>;
45
+
};
+72
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-extdst.yaml
+72
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-extdst.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-extdst.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
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title: Freescale i.MX8qxp Display Controller External Destination Interface
8
+
9
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description: |
10
+
The External Destination unit is the interface between the internal pixel
11
+
processing pipeline of the Pixel Engine, which is 30-bit RGB plus 8-bit Alpha,
12
+
and a Display Engine.
13
+
14
+
It comprises the following built-in Gamma apply function.
15
+
16
+
+------X-----------------------+
17
+
| | ExtDst Unit |
18
+
| V |
19
+
| +-------+ |
20
+
| | Gamma | |
21
+
| +-------+ |
22
+
| | |
23
+
| V +
24
+
+------X-----------------------+
25
+
26
+
The output format is 24-bit RGB plus 1-bit Alpha. Conversion from 10 to 8
27
+
bits is done by LSBit truncation. Alpha output bit is 1 for input 255, 0
28
+
otherwise.
29
+
30
+
maintainers:
31
+
- Liu Ying <victor.liu@nxp.com>
32
+
33
+
properties:
34
+
compatible:
35
+
const: fsl,imx8qxp-dc-extdst
36
+
37
+
reg:
38
+
maxItems: 2
39
+
40
+
reg-names:
41
+
items:
42
+
- const: pec
43
+
- const: cfg
44
+
45
+
interrupts:
46
+
maxItems: 3
47
+
48
+
interrupt-names:
49
+
items:
50
+
- const: shdload
51
+
- const: framecomplete
52
+
- const: seqcomplete
53
+
54
+
required:
55
+
- compatible
56
+
- reg
57
+
- reg-names
58
+
- interrupts
59
+
- interrupt-names
60
+
61
+
additionalProperties: false
62
+
63
+
examples:
64
+
- |
65
+
extdst@56180980 {
66
+
compatible = "fsl,imx8qxp-dc-extdst";
67
+
reg = <0x56180980 0x1c>, <0x56184800 0x28>;
68
+
reg-names = "pec", "cfg";
69
+
interrupt-parent = <&dc0_intc>;
70
+
interrupts = <3>, <4>, <5>;
71
+
interrupt-names = "shdload", "framecomplete", "seqcomplete";
72
+
};
+141
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-fetchunit.yaml
+141
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-fetchunit.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-fetchunit.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Fetch Unit
8
+
9
+
description: |
10
+
The Fetch Unit is the interface between the AXI bus for source buffer access
11
+
and the internal pixel processing pipeline, which is 30-bit RGB plus 8-bit
12
+
Alpha.
13
+
14
+
It is used to generate foreground planes in Display Controllers and source
15
+
planes in Blit Engines, and comprises the following built-in functions to
16
+
convert a wide range of frame buffer types.
17
+
18
+
+---------X-----------------------------------------+
19
+
| | Fetch Unit |
20
+
| V |
21
+
| +---------+ |
22
+
| | | |
23
+
| | Decode | Decompression [Decode] |
24
+
| | | |
25
+
| +---------+ |
26
+
| | |
27
+
| V |
28
+
| +---------+ |
29
+
| | Clip & | Clip Window [All] |
30
+
| | Overlay | Plane composition [Layer, Warp] |
31
+
| | | |
32
+
| +---------+ |
33
+
| | |
34
+
| V |
35
+
| +---------+ |
36
+
| | Re- | Flip/Rotate/Repl./Drop [All] |
37
+
X--> | sample | Perspective/Affine warping [Persp] |
38
+
| | | | Arbitrary warping [Warp, Persp] |
39
+
| | +---------+ |
40
+
| | | |
41
+
| | V |
42
+
| | +---------+ |
43
+
| | | | |
44
+
| | | Palette | Color Palette [Layer, Decode] |
45
+
| | | | |
46
+
| | +---------+ |
47
+
| | | |
48
+
| | V |
49
+
| | +---------+ |
50
+
| | | Extract | Raw to RGBA/YUV [All] |
51
+
| | | & | Bit width expansion [All] |
52
+
| | | Expand | |
53
+
| | +---------+ |
54
+
| | | |
55
+
| | V |
56
+
| | +---------+ |
57
+
| | | | Planar to packed |
58
+
| |->| Combine | [Decode, Warp, Persp] |
59
+
| | | | |
60
+
| | +---------+ |
61
+
| | | |
62
+
| | V |
63
+
| | +---------+ |
64
+
| | | | YUV422 to YUV444 |
65
+
| | | Chroma | [Decode, Persp] |
66
+
| | | | |
67
+
| | +---------+ |
68
+
| | | |
69
+
| | V |
70
+
| | +---------+ |
71
+
| | | | YUV to RGB |
72
+
| | | Color | [Warp, Persp, Decode, Layer] |
73
+
| | | | |
74
+
| | +---------+ |
75
+
| | | |
76
+
| | V |
77
+
| | +---------+ |
78
+
| | | | Gamma removal |
79
+
| | | Gamma | [Warp, Persp, Decode, Layer] |
80
+
| | | | |
81
+
| | +---------+ |
82
+
| | | |
83
+
| | V |
84
+
| | +---------+ |
85
+
| | | | Alpla multiply, RGB pre-multiply |
86
+
| ->| Multiply| [Warp, Persp, Decode, Layer] |
87
+
| | | |
88
+
| --------- |
89
+
| | |
90
+
| V |
91
+
| +---------+ |
92
+
| | | Bilinear filter |
93
+
| | Filter | [Warp, Persp] |
94
+
| | | |
95
+
| +---------+ |
96
+
| | |
97
+
| V |
98
+
+---------X-----------------------------------------+
99
+
100
+
Note that different derivatives of the Fetch Unit exist. Each implements a
101
+
specific subset only of the pipeline stages shown above. Restrictions for the
102
+
units are specified in [square brackets].
103
+
104
+
maintainers:
105
+
- Liu Ying <victor.liu@nxp.com>
106
+
107
+
properties:
108
+
compatible:
109
+
enum:
110
+
- fsl,imx8qxp-dc-fetchdecode
111
+
- fsl,imx8qxp-dc-fetcheco
112
+
- fsl,imx8qxp-dc-fetchlayer
113
+
- fsl,imx8qxp-dc-fetchwarp
114
+
115
+
reg:
116
+
maxItems: 2
117
+
118
+
reg-names:
119
+
items:
120
+
- const: pec
121
+
- const: cfg
122
+
123
+
fsl,prg:
124
+
$ref: /schemas/types.yaml#/definitions/phandle
125
+
description:
126
+
Optional Prefetch Resolve Gasket associated with the Fetch Unit.
127
+
128
+
required:
129
+
- compatible
130
+
- reg
131
+
- reg-names
132
+
133
+
additionalProperties: false
134
+
135
+
examples:
136
+
- |
137
+
fetchlayer@56180ac0 {
138
+
compatible = "fsl,imx8qxp-dc-fetchlayer";
139
+
reg = <0x56180ac0 0xc>, <0x56188400 0x404>;
140
+
reg-names = "pec", "cfg";
141
+
};
+43
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-filter.yaml
+43
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-filter.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-filter.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Filter Unit
8
+
9
+
description: |
10
+
5x5 FIR filter with 25 programmable coefficients.
11
+
12
+
Typical applications are image blurring, sharpening or support for edge
13
+
detection algorithms.
14
+
15
+
maintainers:
16
+
- Liu Ying <victor.liu@nxp.com>
17
+
18
+
properties:
19
+
compatible:
20
+
const: fsl,imx8qxp-dc-filter
21
+
22
+
reg:
23
+
maxItems: 2
24
+
25
+
reg-names:
26
+
items:
27
+
- const: pec
28
+
- const: cfg
29
+
30
+
required:
31
+
- compatible
32
+
- reg
33
+
- reg-names
34
+
35
+
additionalProperties: false
36
+
37
+
examples:
38
+
- |
39
+
filter@56180900 {
40
+
compatible = "fsl,imx8qxp-dc-filter";
41
+
reg = <0x56180900 0x10>, <0x56183800 0x30>;
42
+
reg-names = "pec", "cfg";
43
+
};
+64
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-framegen.yaml
+64
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-framegen.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-framegen.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Frame Generator
8
+
9
+
description:
10
+
The Frame Generator (FrameGen) module generates a programmable video timing
11
+
and optionally allows to synchronize the generated video timing to external
12
+
synchronization signals.
13
+
14
+
maintainers:
15
+
- Liu Ying <victor.liu@nxp.com>
16
+
17
+
properties:
18
+
compatible:
19
+
const: fsl,imx8qxp-dc-framegen
20
+
21
+
reg:
22
+
maxItems: 1
23
+
24
+
clocks:
25
+
maxItems: 1
26
+
27
+
interrupts:
28
+
maxItems: 8
29
+
30
+
interrupt-names:
31
+
items:
32
+
- const: int0
33
+
- const: int1
34
+
- const: int2
35
+
- const: int3
36
+
- const: primsync_on
37
+
- const: primsync_off
38
+
- const: secsync_on
39
+
- const: secsync_off
40
+
41
+
required:
42
+
- compatible
43
+
- reg
44
+
- clocks
45
+
- interrupts
46
+
- interrupt-names
47
+
48
+
additionalProperties: false
49
+
50
+
examples:
51
+
- |
52
+
#include <dt-bindings/clock/imx8-lpcg.h>
53
+
#include <dt-bindings/firmware/imx/rsrc.h>
54
+
55
+
framegen@5618b800 {
56
+
compatible = "fsl,imx8qxp-dc-framegen";
57
+
reg = <0x5618b800 0x98>;
58
+
clocks = <&dc0_disp_lpcg IMX_LPCG_CLK_0>;
59
+
interrupt-parent = <&dc0_intc>;
60
+
interrupts = <18>, <19>, <20>, <21>, <41>, <42>, <43>, <44>;
61
+
interrupt-names = "int0", "int1", "int2", "int3",
62
+
"primsync_on", "primsync_off",
63
+
"secsync_on", "secsync_off";
64
+
};
+32
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-gammacor.yaml
+32
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-gammacor.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-gammacor.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Gamma Correction Unit
8
+
9
+
description: The unit supports non-linear color transformation.
10
+
11
+
maintainers:
12
+
- Liu Ying <victor.liu@nxp.com>
13
+
14
+
properties:
15
+
compatible:
16
+
const: fsl,imx8qxp-dc-gammacor
17
+
18
+
reg:
19
+
maxItems: 1
20
+
21
+
required:
22
+
- compatible
23
+
- reg
24
+
25
+
additionalProperties: false
26
+
27
+
examples:
28
+
- |
29
+
gammacor@5618c000 {
30
+
compatible = "fsl,imx8qxp-dc-gammacor";
31
+
reg = <0x5618c000 0x20>;
32
+
};
+39
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-layerblend.yaml
+39
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-layerblend.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-layerblend.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Layer Blend Unit
8
+
9
+
description: Combines two input frames to a single output frame.
10
+
11
+
maintainers:
12
+
- Liu Ying <victor.liu@nxp.com>
13
+
14
+
properties:
15
+
compatible:
16
+
const: fsl,imx8qxp-dc-layerblend
17
+
18
+
reg:
19
+
maxItems: 2
20
+
21
+
reg-names:
22
+
items:
23
+
- const: pec
24
+
- const: cfg
25
+
26
+
required:
27
+
- compatible
28
+
- reg
29
+
- reg-names
30
+
31
+
additionalProperties: false
32
+
33
+
examples:
34
+
- |
35
+
layerblend@56180ba0 {
36
+
compatible = "fsl,imx8qxp-dc-layerblend";
37
+
reg = <0x56180ba0 0x10>, <0x5618a400 0x20>;
38
+
reg-names = "pec", "cfg";
39
+
};
+44
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-matrix.yaml
+44
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-matrix.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-matrix.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Color Matrix
8
+
9
+
description:
10
+
The unit supports linear color transformation, alpha pre-multiply and
11
+
alpha masking.
12
+
13
+
maintainers:
14
+
- Liu Ying <victor.liu@nxp.com>
15
+
16
+
properties:
17
+
compatible:
18
+
const: fsl,imx8qxp-dc-matrix
19
+
20
+
reg:
21
+
minItems: 1
22
+
maxItems: 2
23
+
24
+
reg-names:
25
+
oneOf:
26
+
- const: cfg # matrix in display engine
27
+
- items: # matrix in pixel engine
28
+
- const: pec
29
+
- const: cfg
30
+
31
+
required:
32
+
- compatible
33
+
- reg
34
+
- reg-names
35
+
36
+
additionalProperties: false
37
+
38
+
examples:
39
+
- |
40
+
matrix@5618bc00 {
41
+
compatible = "fsl,imx8qxp-dc-matrix";
42
+
reg = <0x5618bc00 0x3c>;
43
+
reg-names = "cfg";
44
+
};
+43
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-rop.yaml
+43
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-rop.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-rop.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Raster Operation Unit
8
+
9
+
description: |
10
+
The unit can combine up to three input frames to a single output frame, all
11
+
having the same dimension.
12
+
13
+
The unit supports logic operations, arithmetic operations and packing.
14
+
15
+
maintainers:
16
+
- Liu Ying <victor.liu@nxp.com>
17
+
18
+
properties:
19
+
compatible:
20
+
const: fsl,imx8qxp-dc-rop
21
+
22
+
reg:
23
+
maxItems: 2
24
+
25
+
reg-names:
26
+
items:
27
+
- const: pec
28
+
- const: cfg
29
+
30
+
required:
31
+
- compatible
32
+
- reg
33
+
- reg-names
34
+
35
+
additionalProperties: false
36
+
37
+
examples:
38
+
- |
39
+
rop@56180860 {
40
+
compatible = "fsl,imx8qxp-dc-rop";
41
+
reg = <0x56180860 0x10>, <0x56182000 0x20>;
42
+
reg-names = "pec", "cfg";
43
+
};
+34
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-safety.yaml
+34
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-safety.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-safety.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Safety Unit
8
+
9
+
description:
10
+
The unit allows corresponding processing units to be configured in a path
11
+
leading to multiple endpoints.
12
+
13
+
maintainers:
14
+
- Liu Ying <victor.liu@nxp.com>
15
+
16
+
properties:
17
+
compatible:
18
+
const: fsl,imx8qxp-dc-safety
19
+
20
+
reg:
21
+
maxItems: 1
22
+
23
+
required:
24
+
- compatible
25
+
- reg
26
+
27
+
additionalProperties: false
28
+
29
+
examples:
30
+
- |
31
+
safety@56180800 {
32
+
compatible = "fsl,imx8qxp-dc-safety";
33
+
reg = <0x56180800 0x1c>;
34
+
};
+83
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-scaling-engine.yaml
+83
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-scaling-engine.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-scaling-engine.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Scaling Engine
8
+
9
+
description: |
10
+
The unit can change the dimension of the input frame by nearest or linear
11
+
re-sampling with 1/32 sub pixel precision.
12
+
13
+
Internally it consist of two independent blocks for horizontal and vertical
14
+
scaling. The sequence of both operations is arbitrary.
15
+
16
+
Any frame dimensions between 1 and 16384 pixels in width and height are
17
+
supported, except that the vertical scaler has a frame width maximum
18
+
depending of the system's functional limitations.
19
+
20
+
In general all scale factors are supported inside the supported frame
21
+
dimensions. In range of scale factors 1/16..16 the filtered output colors
22
+
are LSBit precise (e.g. DC ripple free).
23
+
24
+
+-----------+
25
+
| Line |
26
+
| Buffer |
27
+
+-----------+
28
+
^
29
+
|
30
+
V
31
+
|\ +-----------+
32
+
------+ | | |
33
+
| | +-->| Vertical |----
34
+
| ----+ | | Scaler | |
35
+
| | |/ +-----------+ |
36
+
| | |
37
+
| | |
38
+
| | | |\
39
+
| ------------- -------------+-----+ |
40
+
Input --+ X | +--> Output
41
+
| ------------- -------------+-----+ |
42
+
| | | |/
43
+
| | |
44
+
| | |\ +-----------+ |
45
+
| ----+ | | | |
46
+
| | +-->| Horizontal|----
47
+
------+ | | Scaler |
48
+
|/ +-----------+
49
+
50
+
The unit supports downscaling, upscaling, sub pixel translation and bob
51
+
de-interlacing.
52
+
53
+
maintainers:
54
+
- Liu Ying <victor.liu@nxp.com>
55
+
56
+
properties:
57
+
compatible:
58
+
enum:
59
+
- fsl,imx8qxp-dc-hscaler
60
+
- fsl,imx8qxp-dc-vscaler
61
+
62
+
reg:
63
+
maxItems: 2
64
+
65
+
reg-names:
66
+
items:
67
+
- const: pec
68
+
- const: cfg
69
+
70
+
required:
71
+
- compatible
72
+
- reg
73
+
- reg-names
74
+
75
+
additionalProperties: false
76
+
77
+
examples:
78
+
- |
79
+
hscaler@561808c0 {
80
+
compatible = "fsl,imx8qxp-dc-hscaler";
81
+
reg = <0x561808c0 0x10>, <0x56183000 0x18>;
82
+
reg-names = "pec", "cfg";
83
+
};
+53
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-signature.yaml
+53
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-signature.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-signature.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Signature Unit
8
+
9
+
description: |
10
+
In order to control the correctness of display output, signature values can
11
+
be computed for each frame and compared against reference values. In case of
12
+
a mismatch (signature violation) a HW event can be triggered, for example a
13
+
SW interrupt.
14
+
15
+
This unit supports signature computation, reference check, evaluation windows,
16
+
alpha masking and panic modes.
17
+
18
+
maintainers:
19
+
- Liu Ying <victor.liu@nxp.com>
20
+
21
+
properties:
22
+
compatible:
23
+
const: fsl,imx8qxp-dc-signature
24
+
25
+
reg:
26
+
maxItems: 1
27
+
28
+
interrupts:
29
+
maxItems: 3
30
+
31
+
interrupt-names:
32
+
items:
33
+
- const: shdload
34
+
- const: valid
35
+
- const: error
36
+
37
+
required:
38
+
- compatible
39
+
- reg
40
+
- interrupts
41
+
- interrupt-names
42
+
43
+
additionalProperties: false
44
+
45
+
examples:
46
+
- |
47
+
signature@5618d000 {
48
+
compatible = "fsl,imx8qxp-dc-signature";
49
+
reg = <0x5618d000 0x140>;
50
+
interrupt-parent = <&dc0_intc>;
51
+
interrupts = <22>, <23>, <24>;
52
+
interrupt-names = "shdload", "valid", "error";
53
+
};
+96
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-store.yaml
+96
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-store.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-store.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Store Unit
8
+
9
+
description: |
10
+
The Store unit is the interface between the internal pixel processing
11
+
pipeline, which is 30-bit RGB plus 8-bit Alpha, and the AXI bus for
12
+
destination buffer access. It is used for the destination of Blit Engines.
13
+
It comprises a set of built-in functions to generate a wide range of buffer
14
+
formats. Note, that these are exactly inverse to corresponding functions in
15
+
the Fetch Unit.
16
+
17
+
+------X-------------------------+
18
+
| | Store Unit |
19
+
| V |
20
+
| +-------+ |
21
+
| | Gamma | Gamma apply |
22
+
| +-------+ |
23
+
| | |
24
+
| V |
25
+
| +-------+ |
26
+
| | Color | RGB to YUV |
27
+
| +-------+ |
28
+
| | |
29
+
| V |
30
+
| +-------+ |
31
+
| | Chroma| YUV444 to 422 |
32
+
| +-------+ |
33
+
| | |
34
+
| V |
35
+
| +-------+ |
36
+
| | Reduce| Bit width reduction |
37
+
| | | dithering |
38
+
| +-------+ |
39
+
| | |
40
+
| V |
41
+
| +-------+ |
42
+
| | Pack | RGBA/YUV to RAW |
43
+
| | Encode| or Compression |
44
+
| +-------+ |
45
+
| | |
46
+
| V |
47
+
+------X-------------------------+
48
+
49
+
maintainers:
50
+
- Liu Ying <victor.liu@nxp.com>
51
+
52
+
properties:
53
+
compatible:
54
+
const: fsl,imx8qxp-dc-store
55
+
56
+
reg:
57
+
maxItems: 2
58
+
59
+
reg-names:
60
+
items:
61
+
- const: pec
62
+
- const: cfg
63
+
64
+
interrupts:
65
+
maxItems: 3
66
+
67
+
interrupt-names:
68
+
items:
69
+
- const: shdload
70
+
- const: framecomplete
71
+
- const: seqcomplete
72
+
73
+
fsl,lts:
74
+
$ref: /schemas/types.yaml#/definitions/phandle
75
+
description:
76
+
Optional Linear Tile Store associated with the Store Unit.
77
+
78
+
required:
79
+
- compatible
80
+
- reg
81
+
- reg-names
82
+
- interrupts
83
+
- interrupt-names
84
+
85
+
additionalProperties: false
86
+
87
+
examples:
88
+
- |
89
+
store@56180940 {
90
+
compatible = "fsl,imx8qxp-dc-store";
91
+
reg = <0x56180940 0x1c>, <0x56184000 0x5c>;
92
+
reg-names = "pec", "cfg";
93
+
interrupt-parent = <&dc0_intc>;
94
+
interrupts = <0>, <1>, <2>;
95
+
interrupt-names = "shdload", "framecomplete", "seqcomplete";
96
+
};
+45
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-tcon.yaml
+45
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-tcon.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-tcon.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Freescale i.MX8qxp Display Controller Timing Controller
8
+
9
+
description:
10
+
The TCon can generate a wide range of customized synchronization signals and
11
+
does the mapping of the color bits to the output.
12
+
13
+
maintainers:
14
+
- Liu Ying <victor.liu@nxp.com>
15
+
16
+
properties:
17
+
compatible:
18
+
const: fsl,imx8qxp-dc-tcon
19
+
20
+
reg:
21
+
maxItems: 1
22
+
23
+
port:
24
+
$ref: /schemas/graph.yaml#/properties/port
25
+
description: video output
26
+
27
+
required:
28
+
- compatible
29
+
- reg
30
+
- port
31
+
32
+
additionalProperties: false
33
+
34
+
examples:
35
+
- |
36
+
tcon@5618c800 {
37
+
compatible = "fsl,imx8qxp-dc-tcon";
38
+
reg = <0x5618c800 0x588>;
39
+
40
+
port {
41
+
dc0_disp0_dc0_pixel_combiner_ch0: endpoint {
42
+
remote-endpoint = <&dc0_pixel_combiner_ch0_dc0_disp0>;
43
+
};
44
+
};
45
+
};