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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
kselftest/arm64: Add a stress test program for ZT0
Following the pattern for the other register sets add a stress test program
for ZT0 which continually loads and verifies patterns in the register in
an effort to discover context switching problems.
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20221208-arm64-sme2-v4-14-f2fa0aef982f@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
authored by
Mark Brown
and committed by
Catalin Marinas
1c07425e
7d5d8601
+341
+1
tools/testing/selftests/arm64/fp/.gitignore
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tools/testing/selftests/arm64/fp/.gitignore
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tools/testing/selftests/arm64/fp/Makefile
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tools/testing/selftests/arm64/fp/Makefile
···
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sve-test \
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ssve-test \
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za-test \
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zt-test \
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vlset
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TEST_PROGS_EXTENDED := fpsimd-stress sve-stress ssve-stress za-stress
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···
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-static -ffreestanding -Wall $^ -o $@
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$(OUTPUT)/za-ptrace: za-ptrace.c
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$(OUTPUT)/za-test: za-test.S $(OUTPUT)/asm-utils.o
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$(CC) -nostdlib $^ -o $@
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$(OUTPUT)/zt-test: zt-test.S $(OUTPUT)/asm-utils.o
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$(CC) -nostdlib $^ -o $@
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include ../../lib.mk
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tools/testing/selftests/arm64/fp/sme-inst.h
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tools/testing/selftests/arm64/fp/sme-inst.h
···
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| ((\offset) & 7)
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.endm
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/*
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* LDR (ZT0)
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*
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* LDR ZT0, nx
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*/
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.macro _ldr_zt nx
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.inst 0xe11f8000 \
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| (((\nx) & 0x1f) << 5)
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.endm
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/*
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* STR (ZT0)
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*
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* STR ZT0, nx
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*/
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.macro _str_zt nx
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.inst 0xe13f8000 \
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| (((\nx) & 0x1f) << 5)
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.endm
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#endif
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tools/testing/selftests/arm64/fp/zt-test.S
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tools/testing/selftests/arm64/fp/zt-test.S
···
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// SPDX-License-Identifier: GPL-2.0-only
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// Copyright (C) 2021-2 ARM Limited.
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// Original author: Mark Brown <broonie@kernel.org>
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//
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// Scalable Matrix Extension ZT context switch test
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// Repeatedly writes unique test patterns into ZT0
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// and reads them back to verify integrity.
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#include <asm/unistd.h>
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#include "assembler.h"
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#include "asm-offsets.h"
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#include "sme-inst.h"
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+
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.arch_extension sve
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+
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#define ZT_SZ 512
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#define ZT_B (ZT_SZ / 8)
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+
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// Declare some storage space to shadow ZT register contents and a
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// scratch buffer.
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.pushsection .text
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.data
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.align 4
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ztref:
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.space ZT_B
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scratch:
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.space ZT_B
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.popsection
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+
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// Generate a test pattern for storage in ZT
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// x0: pid
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// x1: generation
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// These values are used to construct a 32-bit pattern that is repeated in the
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// scratch buffer as many times as will fit:
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// bits 31:24 generation number (increments once per test_loop)
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// bits 23: 8 pid
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// bits 7: 0 32-bit lane index
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function pattern
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mov w3, wzr
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bfi w3, w0, #8, #16 // PID
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bfi w3, w1, #24, #8 // Generation
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+
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ldr x0, =scratch
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mov w1, #ZT_B / 4
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0: str w3, [x0], #4
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add w3, w3, #1 // Lane
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subs w1, w1, #1
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b.ne 0b
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ret
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endfunction
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// Set up test pattern in a ZT horizontal vector
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// x0: pid
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// x1: generation
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function setup_zt
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mov x4, x30
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bl pattern // Get pattern in scratch buffer
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ldr x0, =ztref
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ldr x1, =scratch
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mov x2, #ZT_B
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bl memcpy
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ldr x0, =ztref
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_ldr_zt 0 // load zt0 from pointer x0
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ret x4
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endfunction
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// Trivial memory compare: compare x2 bytes starting at address x0 with
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// bytes starting at address x1.
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// Returns only if all bytes match; otherwise, the program is aborted.
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// Clobbers x0-x5.
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function memcmp
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cbz x2, 2f
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stp x0, x1, [sp, #-0x20]!
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str x2, [sp, #0x10]
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mov x5, #0
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0: ldrb w3, [x0, x5]
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ldrb w4, [x1, x5]
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add x5, x5, #1
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cmp w3, w4
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b.ne 1f
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subs x2, x2, #1
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b.ne 0b
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1: ldr x2, [sp, #0x10]
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ldp x0, x1, [sp], #0x20
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b.ne barf
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2: ret
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endfunction
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// Verify that a ZT vector matches its shadow in memory, else abort
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// Clobbers x0-x3
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function check_zt
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mov x3, x30
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ldr x0, =scratch // Poison scratch
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mov x1, #ZT_B
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bl memfill_ae
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ldr x0, =scratch
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_str_zt 0
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ldr x0, =ztref
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ldr x1, =scratch
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mov x2, #ZT_B
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mov x30, x3
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b memcmp
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endfunction
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// Any SME register modified here can cause corruption in the main
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// thread -- but *only* the locations modified here.
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function irritator_handler
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// Increment the irritation signal count (x23):
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ldr x0, [x2, #ucontext_regs + 8 * 23]
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add x0, x0, #1
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str x0, [x2, #ucontext_regs + 8 * 23]
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// Corrupt some random ZT data
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#if 0
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adr x0, .text + (irritator_handler - .text) / 16 * 16
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movi v0.8b, #1
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movi v9.16b, #2
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movi v31.8b, #3
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#endif
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ret
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endfunction
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function tickle_handler
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// Increment the signal count (x23):
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ldr x0, [x2, #ucontext_regs + 8 * 23]
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add x0, x0, #1
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str x0, [x2, #ucontext_regs + 8 * 23]
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ret
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endfunction
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function terminate_handler
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mov w21, w0
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mov x20, x2
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puts "Terminated by signal "
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mov w0, w21
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bl putdec
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puts ", no error, iterations="
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ldr x0, [x20, #ucontext_regs + 8 * 22]
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bl putdec
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puts ", signals="
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ldr x0, [x20, #ucontext_regs + 8 * 23]
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bl putdecn
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mov x0, #0
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mov x8, #__NR_exit
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svc #0
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endfunction
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// w0: signal number
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// x1: sa_action
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// w2: sa_flags
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// Clobbers x0-x6,x8
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function setsignal
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str x30, [sp, #-((sa_sz + 15) / 16 * 16 + 16)]!
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mov w4, w0
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mov x5, x1
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mov w6, w2
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add x0, sp, #16
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mov x1, #sa_sz
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bl memclr
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mov w0, w4
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add x1, sp, #16
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str w6, [x1, #sa_flags]
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str x5, [x1, #sa_handler]
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mov x2, #0
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mov x3, #sa_mask_sz
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mov x8, #__NR_rt_sigaction
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svc #0
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cbz w0, 1f
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puts "sigaction failure\n"
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b .Labort
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1: ldr x30, [sp], #((sa_sz + 15) / 16 * 16 + 16)
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ret
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endfunction
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// Main program entry point
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.globl _start
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function _start
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_start:
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mov x23, #0 // signal count
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mov w0, #SIGINT
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adr x1, terminate_handler
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mov w2, #SA_SIGINFO
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bl setsignal
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mov w0, #SIGTERM
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adr x1, terminate_handler
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mov w2, #SA_SIGINFO
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bl setsignal
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mov w0, #SIGUSR1
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adr x1, irritator_handler
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mov w2, #SA_SIGINFO
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orr w2, w2, #SA_NODEFER
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bl setsignal
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mov w0, #SIGUSR2
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adr x1, tickle_handler
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mov w2, #SA_SIGINFO
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orr w2, w2, #SA_NODEFER
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bl setsignal
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smstart_za
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// Obtain our PID, to ensure test pattern uniqueness between processes
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mov x8, #__NR_getpid
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svc #0
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mov x20, x0
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puts "PID:\t"
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mov x0, x20
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bl putdecn
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mov x22, #0 // generation number, increments per iteration
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.Ltest_loop:
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mov x0, x20
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mov x1, x22
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bl setup_zt
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mov x8, #__NR_sched_yield // Encourage preemption
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svc #0
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mrs x0, S3_3_C4_C2_2 // SVCR should have ZA=1,SM=0
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and x1, x0, #3
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cmp x1, #2
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b.ne svcr_barf
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bl check_zt
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add x22, x22, #1 // Everything still working
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b .Ltest_loop
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.Labort:
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mov x0, #0
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mov x1, #SIGABRT
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mov x8, #__NR_kill
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svc #0
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endfunction
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function barf
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// fpsimd.c acitivty log dump hack
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// ldr w0, =0xdeadc0de
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// mov w8, #__NR_exit
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// svc #0
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// end hack
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smstop
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mov x10, x0 // expected data
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mov x11, x1 // actual data
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mov x12, x2 // data size
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puts "Mismatch: PID="
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mov x0, x20
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bl putdec
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puts ", iteration="
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mov x0, x22
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bl putdec
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puts "\tExpected ["
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mov x0, x10
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mov x1, x12
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bl dumphex
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puts "]\n\tGot ["
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mov x0, x11
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mov x1, x12
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bl dumphex
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puts "]\n"
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mov x8, #__NR_getpid
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svc #0
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// fpsimd.c acitivty log dump hack
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// ldr w0, =0xdeadc0de
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// mov w8, #__NR_exit
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// svc #0
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// ^ end of hack
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mov x1, #SIGABRT
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mov x8, #__NR_kill
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svc #0
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// mov x8, #__NR_exit
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// mov x1, #1
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// svc #0
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endfunction
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function svcr_barf
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mov x10, x0
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puts "Bad SVCR: "
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mov x0, x10
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bl putdecn
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mov x8, #__NR_exit
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mov x1, #1
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svc #0
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endfunction