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ARM: dts: UniPhier: add on-chip UART device nodes
The UniPhier on-chip UART driver was merged into the mainline by
commit 1a8d2903cb6a ("serial: 8250_uniphier: add UniPhier serial
driver").
Add device nodes to make it really available.
We no longer have to depend on the on-board UART device (16550A),
so let's change the chosen and aliases to point to the on-chip ones.
Also, turn on the on-board Ethernet device.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
authored by
Masahiro Yamada
and committed by
Olof Johansson
1bf42507
475c3eef
+230
-12
+18
-3
arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
+18
-3
arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
···
57
57
58
58
chosen {
59
59
bootargs = "console=ttyS0,115200";
60
-
stdout-path = &serialsc;
60
+
stdout-path = &serial0;
61
61
};
62
62
63
63
aliases {
64
-
serial0 = &serialsc;
64
+
serial0 = &serial0;
65
+
serial1 = &serial1;
66
+
serial2 = &serial2;
67
+
serial3 = &serial3;
65
68
};
66
69
};
67
70
···
77
74
ranges = <0x00000000 1 0x03f00000 0x00100000>;
78
75
};
79
76
80
-
&serialsc {
77
+
ðsc {
81
78
interrupts = <0 49 4>;
79
+
};
80
+
81
+
&serial0 {
82
+
status = "okay";
83
+
};
84
+
85
+
&serial2 {
86
+
status = "okay";
87
+
};
88
+
89
+
&serial3 {
90
+
status = "okay";
82
91
};
+42
arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
+42
arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
···
64
64
compatible = "fixed-clock";
65
65
clock-frequency = <50000000>;
66
66
};
67
+
68
+
uart_clk: uart_clk {
69
+
#clock-cells = <0>;
70
+
compatible = "fixed-clock";
71
+
clock-frequency = <36864000>;
72
+
};
67
73
};
68
74
69
75
soc {
···
83
77
compatible = "simple-bus";
84
78
#address-cells = <2>;
85
79
#size-cells = <1>;
80
+
};
81
+
82
+
serial0: serial@54006800 {
83
+
compatible = "socionext,uniphier-uart";
84
+
status = "disabled";
85
+
reg = <0x54006800 0x40>;
86
+
interrupts = <0 33 4>;
87
+
clocks = <&uart_clk>;
88
+
fifo-size = <64>;
89
+
};
90
+
91
+
serial1: serial@54006900 {
92
+
compatible = "socionext,uniphier-uart";
93
+
status = "disabled";
94
+
reg = <0x54006900 0x40>;
95
+
interrupts = <0 35 4>;
96
+
clocks = <&uart_clk>;
97
+
fifo-size = <64>;
98
+
};
99
+
100
+
serial2: serial@54006a00 {
101
+
compatible = "socionext,uniphier-uart";
102
+
status = "disabled";
103
+
reg = <0x54006a00 0x40>;
104
+
interrupts = <0 37 4>;
105
+
clocks = <&uart_clk>;
106
+
fifo-size = <64>;
107
+
};
108
+
109
+
serial3: serial@54006b00 {
110
+
compatible = "socionext,uniphier-uart";
111
+
status = "disabled";
112
+
reg = <0x54006b00 0x40>;
113
+
interrupts = <0 29 4>;
114
+
clocks = <&uart_clk>;
115
+
fifo-size = <64>;
86
116
};
87
117
88
118
system-bus-controller-misc@59800000 {
+18
-3
arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
+18
-3
arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
···
57
57
58
58
chosen {
59
59
bootargs = "console=ttyS0,115200";
60
-
stdout-path = &serialsc;
60
+
stdout-path = &serial0;
61
61
};
62
62
63
63
aliases {
64
-
serial0 = &serialsc;
64
+
serial0 = &serial0;
65
+
serial1 = &serial1;
66
+
serial2 = &serial2;
67
+
serial3 = &serial3;
65
68
};
66
69
};
67
70
···
77
74
ranges = <0x00000000 1 0x03f00000 0x00100000>;
78
75
};
79
76
80
-
&serialsc {
77
+
ðsc {
81
78
interrupts = <0 50 4>;
79
+
};
80
+
81
+
&serial0 {
82
+
status = "okay";
83
+
};
84
+
85
+
&serial1 {
86
+
status = "okay";
87
+
};
88
+
89
+
&serial2 {
90
+
status = "okay";
82
91
};
+42
arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+42
arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
···
71
71
compatible = "fixed-clock";
72
72
clock-frequency = <50000000>;
73
73
};
74
+
75
+
uart_clk: uart_clk {
76
+
#clock-cells = <0>;
77
+
compatible = "fixed-clock";
78
+
clock-frequency = <73728000>;
79
+
};
74
80
};
75
81
76
82
soc {
···
90
84
compatible = "simple-bus";
91
85
#address-cells = <2>;
92
86
#size-cells = <1>;
87
+
};
88
+
89
+
serial0: serial@54006800 {
90
+
compatible = "socionext,uniphier-uart";
91
+
status = "disabled";
92
+
reg = <0x54006800 0x40>;
93
+
interrupts = <0 33 4>;
94
+
clocks = <&uart_clk>;
95
+
fifo-size = <64>;
96
+
};
97
+
98
+
serial1: serial@54006900 {
99
+
compatible = "socionext,uniphier-uart";
100
+
status = "disabled";
101
+
reg = <0x54006900 0x40>;
102
+
interrupts = <0 35 4>;
103
+
clocks = <&uart_clk>;
104
+
fifo-size = <64>;
105
+
};
106
+
107
+
serial2: serial@54006a00 {
108
+
compatible = "socionext,uniphier-uart";
109
+
status = "disabled";
110
+
reg = <0x54006a00 0x40>;
111
+
interrupts = <0 37 4>;
112
+
clocks = <&uart_clk>;
113
+
fifo-size = <64>;
114
+
};
115
+
116
+
serial3: serial@54006b00 {
117
+
compatible = "socionext,uniphier-uart";
118
+
status = "disabled";
119
+
reg = <0x54006b00 0x40>;
120
+
interrupts = <0 29 4>;
121
+
clocks = <&uart_clk>;
122
+
fifo-size = <64>;
93
123
};
94
124
95
125
system-bus-controller-misc@59800000 {
+17
-3
arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
+17
-3
arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
···
58
58
59
59
chosen {
60
60
bootargs = "console=ttyS0,115200";
61
-
stdout-path = &serialsc;
61
+
stdout-path = &serial0;
62
62
};
63
63
64
64
aliases {
65
-
serial0 = &serialsc;
65
+
serial0 = &serial0;
66
+
serial1 = &serial1;
67
+
serial2 = &serial2;
66
68
};
67
69
};
68
70
···
77
75
ranges = <0x00000000 1 0x03f00000 0x00100000>;
78
76
};
79
77
80
-
&serialsc {
78
+
ðsc {
81
79
interrupts = <0 49 4>;
80
+
};
81
+
82
+
&serial0 {
83
+
status = "okay";
84
+
};
85
+
86
+
&serial1 {
87
+
status = "okay";
88
+
};
89
+
90
+
&serial2 {
91
+
status = "okay";
82
92
};
+33
arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+33
arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
···
71
71
compatible = "fixed-clock";
72
72
clock-frequency = <50000000>;
73
73
};
74
+
75
+
uart_clk: uart_clk {
76
+
#clock-cells = <0>;
77
+
compatible = "fixed-clock";
78
+
clock-frequency = <36864000>;
79
+
};
74
80
};
75
81
76
82
soc {
···
112
106
interrupt-controller;
113
107
reg = <0x20001000 0x1000>,
114
108
<0x20000100 0x100>;
109
+
};
110
+
111
+
serial0: serial@54006800 {
112
+
compatible = "socionext,uniphier-uart";
113
+
status = "disabled";
114
+
reg = <0x54006800 0x40>;
115
+
interrupts = <0 33 4>;
116
+
clocks = <&uart_clk>;
117
+
fifo-size = <64>;
118
+
};
119
+
120
+
serial1: serial@54006900 {
121
+
compatible = "socionext,uniphier-uart";
122
+
status = "disabled";
123
+
reg = <0x54006900 0x40>;
124
+
interrupts = <0 35 4>;
125
+
clocks = <&uart_clk>;
126
+
fifo-size = <64>;
127
+
};
128
+
129
+
serial2: serial@54006a00 {
130
+
compatible = "socionext,uniphier-uart";
131
+
status = "disabled";
132
+
reg = <0x54006a00 0x40>;
133
+
interrupts = <0 37 4>;
134
+
clocks = <&uart_clk>;
135
+
fifo-size = <64>;
115
136
};
116
137
117
138
system-bus-controller-misc@59800000 {
+18
-3
arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
+18
-3
arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
···
57
57
58
58
chosen {
59
59
bootargs = "console=ttyS0,115200";
60
-
stdout-path = &serialsc;
60
+
stdout-path = &serial0;
61
61
};
62
62
63
63
aliases {
64
-
serial0 = &serialsc;
64
+
serial0 = &serial0;
65
+
serial1 = &serial1;
66
+
serial2 = &serial2;
67
+
serial3 = &serial3;
65
68
};
66
69
};
67
70
···
77
74
ranges = <0x00000000 1 0x03f00000 0x00100000>;
78
75
};
79
76
80
-
&serialsc {
77
+
ðsc {
81
78
interrupts = <0 48 4>;
79
+
};
80
+
81
+
&serial0 {
82
+
status = "okay";
83
+
};
84
+
85
+
&serial2 {
86
+
status = "okay";
87
+
};
88
+
89
+
&serial3 {
90
+
status = "okay";
82
91
};
+42
arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
+42
arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
···
64
64
compatible = "fixed-clock";
65
65
clock-frequency = <50000000>;
66
66
};
67
+
68
+
uart_clk: uart_clk {
69
+
#clock-cells = <0>;
70
+
compatible = "fixed-clock";
71
+
clock-frequency = <80000000>;
72
+
};
67
73
};
68
74
69
75
soc {
···
83
77
compatible = "simple-bus";
84
78
#address-cells = <2>;
85
79
#size-cells = <1>;
80
+
};
81
+
82
+
serial0: serial@54006800 {
83
+
compatible = "socionext,uniphier-uart";
84
+
status = "disabled";
85
+
reg = <0x54006800 0x40>;
86
+
interrupts = <0 33 4>;
87
+
clocks = <&uart_clk>;
88
+
fifo-size = <64>;
89
+
};
90
+
91
+
serial1: serial@54006900 {
92
+
compatible = "socionext,uniphier-uart";
93
+
status = "disabled";
94
+
reg = <0x54006900 0x40>;
95
+
interrupts = <0 35 4>;
96
+
clocks = <&uart_clk>;
97
+
fifo-size = <64>;
98
+
};
99
+
100
+
serial2: serial@54006a00 {
101
+
compatible = "socionext,uniphier-uart";
102
+
status = "disabled";
103
+
reg = <0x54006a00 0x40>;
104
+
interrupts = <0 37 4>;
105
+
clocks = <&uart_clk>;
106
+
fifo-size = <64>;
107
+
};
108
+
109
+
serial3: serial@54006b00 {
110
+
compatible = "socionext,uniphier-uart";
111
+
status = "disabled";
112
+
reg = <0x54006b00 0x40>;
113
+
interrupts = <0 29 4>;
114
+
clocks = <&uart_clk>;
115
+
fifo-size = <64>;
86
116
};
87
117
88
118
system-bus-controller-misc@59800000 {