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ARM: dts: mvebu: Add CRS305-1G-4S board

MikroTik CRS305-1G-4S board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.

This commit includes two board variants, namely the factory
default one and a Bit variant. The Bit variant has a
bigger Macronix flash.

This device tree includes basic Linux support.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

authored by

Luka Kovacic and committed by
Gregory CLEMENT
1b7b86f6 b08770ff

+166
+2
arch/arm/boot/dts/Makefile
··· 1340 1340 armada-398-db.dtb 1341 1341 dtb-$(CONFIG_MACH_ARMADA_XP) += \ 1342 1342 armada-xp-axpwifiap.dtb \ 1343 + armada-xp-crs305-1g-4s.dtb \ 1344 + armada-xp-crs305-1g-4s-bit.dtb \ 1343 1345 armada-xp-crs326-24g-2s.dtb \ 1344 1346 armada-xp-crs326-24g-2s-bit.dtb \ 1345 1347 armada-xp-db.dtb \
+43
arch/arm/boot/dts/armada-xp-crs305-1g-4s-bit.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Device Tree file for MikroTik CRS305-1G-4S+ Bit board 4 + * 5 + * Copyright (C) 2020 Sartura Ltd. 6 + * Author: Luka Kovacic <luka.kovacic@sartura.hr> 7 + */ 8 + 9 + #include "armada-xp-crs305-1g-4s.dtsi" 10 + 11 + / { 12 + model = "MikroTik CRS305-1G-4S+ Bit"; 13 + }; 14 + 15 + &spi0 { 16 + status = "okay"; 17 + 18 + spi-flash@0 { 19 + #address-cells = <1>; 20 + #size-cells = <1>; 21 + compatible = "jedec,spi-nor"; 22 + reg = <0>; /* Chip select 0 */ 23 + spi-max-frequency = <108000000>; 24 + m25p,fast-read; 25 + 26 + partition@u-boot { 27 + reg = <0x00000000 0x001f0000>; 28 + label = "u-boot"; 29 + }; 30 + partition@u-boot-env { 31 + reg = <0x001f0000 0x00010000>; 32 + label = "u-boot-env"; 33 + }; 34 + partition@ubi1 { 35 + reg = <0x00200000 0x03f00000>; 36 + label = "ubi1"; 37 + }; 38 + partition@ubi2 { 39 + reg = <0x04100000 0x03f00000>; 40 + label = "ubi2"; 41 + }; 42 + }; 43 + };
+17
arch/arm/boot/dts/armada-xp-crs305-1g-4s.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Device Tree file for MikroTik CRS305-1G-4S+ board 4 + * 5 + * Copyright (C) 2020 Sartura Ltd. 6 + * Author: Luka Kovacic <luka.kovacic@sartura.hr> 7 + */ 8 + 9 + #include "armada-xp-crs305-1g-4s.dtsi" 10 + 11 + / { 12 + model = "MikroTik CRS305-1G-4S+"; 13 + }; 14 + 15 + &spi0 { 16 + status = "okay"; 17 + };
+104
arch/arm/boot/dts/armada-xp-crs305-1g-4s.dtsi
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Device Tree file for CRS305-1G-4S board 4 + * 5 + * Copyright (C) 2016 Allied Telesis Labs 6 + * Copyright (C) 2020 Sartura Ltd. 7 + * 8 + * Based on armada-xp-db.dts 9 + * 10 + * Note: this Device Tree assumes that the bootloader has remapped the 11 + * internal registers to 0xf1000000 (instead of the default 12 + * 0xd0000000). The 0xf1000000 is the default used by the recent, 13 + * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 14 + * boards were delivered with an older version of the bootloader that 15 + * left internal registers mapped at 0xd0000000. If you are in this 16 + * situation, you should either update your bootloader (preferred 17 + * solution) or the below Device Tree should be adjusted. 18 + */ 19 + 20 + /dts-v1/; 21 + #include "armada-xp-98dx3236.dtsi" 22 + 23 + / { 24 + model = "CRS305-1G-4S+"; 25 + compatible = "mikrotik,crs305-1g-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp"; 26 + 27 + chosen { 28 + bootargs = "console=ttyS0,115200 earlyprintk"; 29 + }; 30 + 31 + memory { 32 + device_type = "memory"; 33 + reg = <0 0x00000000 0 0x20000000>; /* 512 MB */ 34 + }; 35 + }; 36 + 37 + &L2 { 38 + arm,parity-enable; 39 + marvell,ecc-enable; 40 + }; 41 + 42 + &devbus_bootcs { 43 + status = "okay"; 44 + 45 + /* Device Bus parameters are required */ 46 + 47 + /* Read parameters */ 48 + devbus,bus-width = <16>; 49 + devbus,turn-off-ps = <60000>; 50 + devbus,badr-skew-ps = <0>; 51 + devbus,acc-first-ps = <124000>; 52 + devbus,acc-next-ps = <248000>; 53 + devbus,rd-setup-ps = <0>; 54 + devbus,rd-hold-ps = <0>; 55 + 56 + /* Write parameters */ 57 + devbus,sync-enable = <0>; 58 + devbus,wr-high-ps = <60000>; 59 + devbus,wr-low-ps = <60000>; 60 + devbus,ale-wr-ps = <60000>; 61 + }; 62 + 63 + &uart0 { 64 + status = "okay"; 65 + }; 66 + 67 + &uart1 { 68 + status = "okay"; 69 + }; 70 + 71 + &i2c0 { 72 + clock-frequency = <100000>; 73 + status = "okay"; 74 + }; 75 + 76 + &usb0 { 77 + status = "okay"; 78 + }; 79 + 80 + &spi0 { 81 + status = "okay"; 82 + 83 + spi-flash@0 { 84 + #address-cells = <1>; 85 + #size-cells = <1>; 86 + compatible = "jedec,spi-nor"; 87 + reg = <0>; /* Chip select 0 */ 88 + spi-max-frequency = <108000000>; 89 + m25p,fast-read; 90 + 91 + partition@u-boot { 92 + reg = <0x00000000 0x001f0000>; 93 + label = "u-boot"; 94 + }; 95 + partition@u-boot-env { 96 + reg = <0x001f0000 0x00010000>; 97 + label = "u-boot-env"; 98 + }; 99 + partition@ubi1 { 100 + reg = <0x00200000 0x00e00000>; 101 + label = "ubi1"; 102 + }; 103 + }; 104 + };