x86, SFI, irq: Provide basic irqdomain support

Enhance SFI to provide basic support of irqdomain with identity mapping
between GSIs and IRQs.

Some Intel MID platforms assumes identity mapping between GSI and IRQ,
so we can't dynamically allocate IRQ number on demand.

Signed-off-by: Jiang Liu <[e-mail]>
Cc: Konrad Rzeszutek Wilk <[e-mail]>
Cc: Tony Luck <[e-mail]>
Cc: Joerg Roedel <[e-mail]>
Cc: Paul Gortmaker <[e-mail]>
Cc: Greg Kroah-Hartman <[e-mail]>
Cc: H. Peter Anvin <[e-mail]>
Cc: [e-mail]
Cc: Benjamin Herrenschmidt <[e-mail]>
Cc: Grant Likely <[e-mail]>
Cc: Rafael J. Wysocki <[e-mail]>
Cc: Bjorn Helgaas <[e-mail]>
Cc: Randy Dunlap <[e-mail]>
Cc: Yinghai Lu <[e-mail]>
Cc: Len Brown <[e-mail]>
Cc: David Cohen <[e-mail]>
Cc: Kuppuswamy Sathyanarayanan <[e-mail]>
Link: http://lkml.kernel.org/r/[e-mail]
Signed-off-by: Thomas Gleixner <[e-mail]>

arch/x86/pci/intel_mid_pci.c

···
 	 * MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to
 	 * IOAPIC RTE entries, so we just enable RTE for the device.
 	 */
+	if (mp_map_gsi_to_irq(dev->irq, IOAPIC_MAP_ALLOC) < 0)
+		return -EBUSY;
+
 	irq_attr.ioapic = mp_find_ioapic(dev->irq);
 	irq_attr.ioapic_pin = dev->irq;
 	irq_attr.trigger = 1; /* level */

arch/x86/platform/intel-mid/sfi.c

···
 					/* PNW and CLV go with active low */
 					irq_attr.polarity = 1;
 				}
+				WARN_ON(mp_map_gsi_to_irq(irq,
+						IOAPIC_MAP_ALLOC) < 0);
 				io_apic_set_pci_routing(NULL, irq, &irq_attr);
 			}
 		} else {

arch/x86/platform/sfi/sfi.c

···
 #include <linux/init.h>
 #include <linux/sfi.h>
 #include <linux/io.h>
+#include <linux/irqdomain.h>
 
 #include <asm/io_apic.h>
 #include <asm/mpspec.h>
···
 #endif /* CONFIG_X86_LOCAL_APIC */
 
 #ifdef CONFIG_X86_IO_APIC
+static struct irq_domain_ops sfi_ioapic_irqdomain_ops;
 
 static int __init sfi_parse_ioapic(struct sfi_table_header *table)
 {
 	struct sfi_table_simple *sb;
 	struct sfi_apic_table_entry *pentry;
 	int i, num;
+	struct ioapic_domain_cfg cfg = {
+		.type = IOAPIC_DOMAIN_STRICT,
+		.ops = &sfi_ioapic_irqdomain_ops,
+	};
 
 	sb = (struct sfi_table_simple *)table;
 	num = SFI_GET_NUM_ENTRIES(sb, struct sfi_apic_table_entry);
 	pentry = (struct sfi_apic_table_entry *)sb->pentry;
 
 	for (i = 0; i < num; i++) {
-		mp_register_ioapic(i, pentry->phys_addr, gsi_top, NULL);
+		mp_register_ioapic(i, pentry->phys_addr, gsi_top, &cfg);
 		pentry++;
 	}