Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915/audio: convert to struct intel_display

Going forward, struct intel_display will be the main display device
structure. Convert intel_audio.[ch] to it, as much as possible
anyway. Do some minor checkpatch fixes while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/4ddcc2e704fc6b1592a878c80e15fadd82c63550.1736345025.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

+226 -218
+212 -201
drivers/gpu/drm/i915/display/intel_audio.c
··· 188 188 * WA_14020863754: Implement Audio Workaround 189 189 * Corner case with Min Hblank Fix can cause audio hang 190 190 */ 191 - static bool needs_wa_14020863754(struct drm_i915_private *i915) 191 + static bool needs_wa_14020863754(struct intel_display *display) 192 192 { 193 - return (DISPLAY_VER(i915) == 20 || IS_BATTLEMAGE(i915)); 193 + return DISPLAY_VER(display) == 20 || display->platform.battlemage; 194 194 } 195 195 196 196 /* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */ 197 197 static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_state) 198 198 { 199 - struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); 199 + struct intel_display *display = to_intel_display(crtc_state); 200 200 const struct drm_display_mode *adjusted_mode = 201 201 &crtc_state->hw.adjusted_mode; 202 202 int i; ··· 206 206 break; 207 207 } 208 208 209 - if (DISPLAY_VER(i915) < 12 && adjusted_mode->crtc_clock > 148500) 209 + if (DISPLAY_VER(display) < 12 && adjusted_mode->crtc_clock > 148500) 210 210 i = ARRAY_SIZE(hdmi_audio_clock); 211 211 212 212 if (i == ARRAY_SIZE(hdmi_audio_clock)) { 213 - drm_dbg_kms(&i915->drm, 213 + drm_dbg_kms(display->drm, 214 214 "HDMI audio pixel clock setting for %d not found, falling back to defaults\n", 215 215 adjusted_mode->crtc_clock); 216 216 i = 1; 217 217 } 218 218 219 - drm_dbg_kms(&i915->drm, 219 + drm_dbg_kms(display->drm, 220 220 "Configuring HDMI audio for pixel clock %d (0x%08x)\n", 221 221 hdmi_audio_clock[i].clock, 222 222 hdmi_audio_clock[i].config); ··· 251 251 } 252 252 253 253 /* ELD buffer size in dwords */ 254 - static int g4x_eld_buffer_size(struct drm_i915_private *i915) 254 + static int g4x_eld_buffer_size(struct intel_display *display) 255 255 { 256 256 u32 tmp; 257 257 258 - tmp = intel_de_read(i915, G4X_AUD_CNTL_ST); 258 + tmp = intel_de_read(display, G4X_AUD_CNTL_ST); 259 259 260 260 return REG_FIELD_GET(G4X_ELD_BUFFER_SIZE_MASK, tmp); 261 261 } ··· 263 263 static void g4x_audio_codec_get_config(struct intel_encoder *encoder, 264 264 struct intel_crtc_state *crtc_state) 265 265 { 266 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 266 + struct intel_display *display = to_intel_display(encoder); 267 267 u32 *eld = (u32 *)crtc_state->eld; 268 268 int eld_buffer_size, len, i; 269 269 u32 tmp; 270 270 271 - tmp = intel_de_read(i915, G4X_AUD_CNTL_ST); 271 + tmp = intel_de_read(display, G4X_AUD_CNTL_ST); 272 272 if ((tmp & G4X_ELD_VALID) == 0) 273 273 return; 274 274 275 - intel_de_rmw(i915, G4X_AUD_CNTL_ST, G4X_ELD_ADDRESS_MASK, 0); 275 + intel_de_rmw(display, G4X_AUD_CNTL_ST, G4X_ELD_ADDRESS_MASK, 0); 276 276 277 - eld_buffer_size = g4x_eld_buffer_size(i915); 277 + eld_buffer_size = g4x_eld_buffer_size(display); 278 278 len = min_t(int, sizeof(crtc_state->eld) / 4, eld_buffer_size); 279 279 280 280 for (i = 0; i < len; i++) 281 - eld[i] = intel_de_read(i915, G4X_HDMIW_HDMIEDID); 281 + eld[i] = intel_de_read(display, G4X_HDMIW_HDMIEDID); 282 282 } 283 283 284 284 static void g4x_audio_codec_disable(struct intel_encoder *encoder, 285 285 const struct intel_crtc_state *old_crtc_state, 286 286 const struct drm_connector_state *old_conn_state) 287 287 { 288 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 288 + struct intel_display *display = to_intel_display(encoder); 289 289 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); 290 290 291 291 /* Invalidate ELD */ 292 - intel_de_rmw(i915, G4X_AUD_CNTL_ST, 292 + intel_de_rmw(display, G4X_AUD_CNTL_ST, 293 293 G4X_ELD_VALID, 0); 294 294 295 295 intel_crtc_wait_for_next_vblank(crtc); ··· 300 300 const struct intel_crtc_state *crtc_state, 301 301 const struct drm_connector_state *conn_state) 302 302 { 303 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 303 + struct intel_display *display = to_intel_display(encoder); 304 304 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 305 305 const u32 *eld = (const u32 *)crtc_state->eld; 306 306 int eld_buffer_size, len, i; 307 307 308 308 intel_crtc_wait_for_next_vblank(crtc); 309 309 310 - intel_de_rmw(i915, G4X_AUD_CNTL_ST, 310 + intel_de_rmw(display, G4X_AUD_CNTL_ST, 311 311 G4X_ELD_VALID | G4X_ELD_ADDRESS_MASK, 0); 312 312 313 - eld_buffer_size = g4x_eld_buffer_size(i915); 313 + eld_buffer_size = g4x_eld_buffer_size(display); 314 314 len = min(drm_eld_size(crtc_state->eld) / 4, eld_buffer_size); 315 315 316 316 for (i = 0; i < len; i++) 317 - intel_de_write(i915, G4X_HDMIW_HDMIEDID, eld[i]); 317 + intel_de_write(display, G4X_HDMIW_HDMIEDID, eld[i]); 318 318 for (; i < eld_buffer_size; i++) 319 - intel_de_write(i915, G4X_HDMIW_HDMIEDID, 0); 319 + intel_de_write(display, G4X_HDMIW_HDMIEDID, 0); 320 320 321 - drm_WARN_ON(&i915->drm, 322 - (intel_de_read(i915, G4X_AUD_CNTL_ST) & G4X_ELD_ADDRESS_MASK) != 0); 321 + drm_WARN_ON(display->drm, 322 + (intel_de_read(display, G4X_AUD_CNTL_ST) & G4X_ELD_ADDRESS_MASK) != 0); 323 323 324 - intel_de_rmw(i915, G4X_AUD_CNTL_ST, 324 + intel_de_rmw(display, G4X_AUD_CNTL_ST, 325 325 0, G4X_ELD_VALID); 326 326 } 327 327 ··· 329 329 hsw_dp_audio_config_update(struct intel_encoder *encoder, 330 330 const struct intel_crtc_state *crtc_state) 331 331 { 332 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 332 + struct intel_display *display = to_intel_display(encoder); 333 333 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 334 334 335 335 /* Enable time stamps. Let HW calculate Maud/Naud values */ 336 - intel_de_rmw(i915, HSW_AUD_CFG(cpu_transcoder), 336 + intel_de_rmw(display, HSW_AUD_CFG(cpu_transcoder), 337 337 AUD_CONFIG_N_VALUE_INDEX | 338 338 AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK | 339 339 AUD_CONFIG_UPPER_N_MASK | ··· 347 347 hsw_hdmi_audio_config_update(struct intel_encoder *encoder, 348 348 const struct intel_crtc_state *crtc_state) 349 349 { 350 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 351 - struct i915_audio_component *acomp = i915->display.audio.component; 350 + struct intel_display *display = to_intel_display(encoder); 351 + struct i915_audio_component *acomp = display->audio.component; 352 352 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 353 353 enum port port = encoder->port; 354 354 int n, rate; ··· 356 356 357 357 rate = acomp ? acomp->aud_sample_rate[port] : 0; 358 358 359 - tmp = intel_de_read(i915, HSW_AUD_CFG(cpu_transcoder)); 359 + tmp = intel_de_read(display, HSW_AUD_CFG(cpu_transcoder)); 360 360 tmp &= ~AUD_CONFIG_N_VALUE_INDEX; 361 361 tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK; 362 362 tmp &= ~AUD_CONFIG_N_PROG_ENABLE; ··· 364 364 365 365 n = audio_config_hdmi_get_n(crtc_state, rate); 366 366 if (n != 0) { 367 - drm_dbg_kms(&i915->drm, "using N %d\n", n); 367 + drm_dbg_kms(display->drm, "using N %d\n", n); 368 368 369 369 tmp &= ~AUD_CONFIG_N_MASK; 370 370 tmp |= AUD_CONFIG_N(n); 371 371 tmp |= AUD_CONFIG_N_PROG_ENABLE; 372 372 } else { 373 - drm_dbg_kms(&i915->drm, "using automatic N\n"); 373 + drm_dbg_kms(display->drm, "using automatic N\n"); 374 374 } 375 375 376 - intel_de_write(i915, HSW_AUD_CFG(cpu_transcoder), tmp); 376 + intel_de_write(display, HSW_AUD_CFG(cpu_transcoder), tmp); 377 377 378 378 /* 379 379 * Let's disable "Enable CTS or M Prog bit" 380 380 * and let HW calculate the value 381 381 */ 382 - tmp = intel_de_read(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); 382 + tmp = intel_de_read(display, HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); 383 383 tmp &= ~AUD_M_CTS_M_PROG_ENABLE; 384 384 tmp &= ~AUD_M_CTS_M_VALUE_INDEX; 385 - intel_de_write(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); 385 + intel_de_write(display, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); 386 386 } 387 387 388 388 static void ··· 399 399 const struct intel_crtc_state *old_crtc_state, 400 400 const struct drm_connector_state *old_conn_state) 401 401 { 402 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 402 + struct intel_display *display = to_intel_display(encoder); 403 403 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); 404 404 enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; 405 405 406 - mutex_lock(&i915->display.audio.mutex); 406 + mutex_lock(&display->audio.mutex); 407 407 408 408 /* Disable timestamps */ 409 - intel_de_rmw(i915, HSW_AUD_CFG(cpu_transcoder), 409 + intel_de_rmw(display, HSW_AUD_CFG(cpu_transcoder), 410 410 AUD_CONFIG_N_VALUE_INDEX | 411 411 AUD_CONFIG_UPPER_N_MASK | 412 412 AUD_CONFIG_LOWER_N_MASK, ··· 415 415 AUD_CONFIG_N_VALUE_INDEX : 0)); 416 416 417 417 /* Invalidate ELD */ 418 - intel_de_rmw(i915, HSW_AUD_PIN_ELD_CP_VLD, 418 + intel_de_rmw(display, HSW_AUD_PIN_ELD_CP_VLD, 419 419 AUDIO_ELD_VALID(cpu_transcoder), 0); 420 420 421 421 intel_crtc_wait_for_next_vblank(crtc); 422 422 intel_crtc_wait_for_next_vblank(crtc); 423 423 424 424 /* Disable audio presence detect */ 425 - intel_de_rmw(i915, HSW_AUD_PIN_ELD_CP_VLD, 425 + intel_de_rmw(display, HSW_AUD_PIN_ELD_CP_VLD, 426 426 AUDIO_OUTPUT_ENABLE(cpu_transcoder), 0); 427 427 428 - if (needs_wa_14020863754(i915)) 429 - intel_de_rmw(i915, AUD_CHICKENBIT_REG3, DACBE_DISABLE_MIN_HBLANK_FIX, 0); 428 + if (needs_wa_14020863754(display)) 429 + intel_de_rmw(display, AUD_CHICKENBIT_REG3, DACBE_DISABLE_MIN_HBLANK_FIX, 0); 430 430 431 - mutex_unlock(&i915->display.audio.mutex); 431 + mutex_unlock(&display->audio.mutex); 432 432 } 433 433 434 434 static unsigned int calc_hblank_early_prog(struct intel_encoder *encoder, 435 435 const struct intel_crtc_state *crtc_state) 436 436 { 437 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 437 + struct intel_display *display = to_intel_display(encoder); 438 438 unsigned int link_clks_available, link_clks_required; 439 439 unsigned int tu_data, tu_line, link_clks_active; 440 440 unsigned int h_active, h_total, hblank_delta, pixel_clk; ··· 446 446 h_total = crtc_state->hw.adjusted_mode.crtc_htotal; 447 447 pixel_clk = crtc_state->hw.adjusted_mode.crtc_clock; 448 448 vdsc_bppx16 = crtc_state->dsc.compressed_bpp_x16; 449 - cdclk = i915->display.cdclk.hw.cdclk; 449 + cdclk = display->cdclk.hw.cdclk; 450 450 /* fec= 0.972261, using rounding multiplier of 1000000 */ 451 451 fec_coeff = 972261; 452 452 link_clk = crtc_state->port_clock; 453 453 lanes = crtc_state->lane_count; 454 454 455 - drm_dbg_kms(&i915->drm, 455 + drm_dbg_kms(display->drm, 456 456 "h_active = %u link_clk = %u : lanes = %u vdsc_bpp = " FXP_Q4_FMT " cdclk = %u\n", 457 457 h_active, link_clk, lanes, FXP_Q4_ARGS(vdsc_bppx16), cdclk); 458 458 ··· 497 497 static void enable_audio_dsc_wa(struct intel_encoder *encoder, 498 498 const struct intel_crtc_state *crtc_state) 499 499 { 500 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 500 + struct intel_display *display = to_intel_display(encoder); 501 501 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 502 502 unsigned int hblank_early_prog, samples_room; 503 503 unsigned int val; 504 504 505 - if (DISPLAY_VER(i915) < 11) 505 + if (DISPLAY_VER(display) < 11) 506 506 return; 507 507 508 - val = intel_de_read(i915, AUD_CONFIG_BE); 508 + val = intel_de_read(display, AUD_CONFIG_BE); 509 509 510 - if (DISPLAY_VER(i915) == 11) 510 + if (DISPLAY_VER(display) == 11) 511 511 val |= HBLANK_EARLY_ENABLE_ICL(cpu_transcoder); 512 - else if (DISPLAY_VER(i915) >= 12) 512 + else if (DISPLAY_VER(display) >= 12) 513 513 val |= HBLANK_EARLY_ENABLE_TGL(cpu_transcoder); 514 514 515 515 if (crtc_state->dsc.compression_enable && ··· 536 536 val |= NUMBER_SAMPLES_PER_LINE(cpu_transcoder, 0x0); 537 537 } 538 538 539 - intel_de_write(i915, AUD_CONFIG_BE, val); 539 + intel_de_write(display, AUD_CONFIG_BE, val); 540 540 } 541 541 542 542 static void hsw_audio_codec_enable(struct intel_encoder *encoder, 543 543 const struct intel_crtc_state *crtc_state, 544 544 const struct drm_connector_state *conn_state) 545 545 { 546 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 546 + struct intel_display *display = to_intel_display(encoder); 547 547 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 548 548 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 549 549 550 - mutex_lock(&i915->display.audio.mutex); 550 + mutex_lock(&display->audio.mutex); 551 551 552 552 /* Enable Audio WA for 4k DSC usecases */ 553 553 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP)) 554 554 enable_audio_dsc_wa(encoder, crtc_state); 555 555 556 - if (needs_wa_14020863754(i915)) 557 - intel_de_rmw(i915, AUD_CHICKENBIT_REG3, 0, DACBE_DISABLE_MIN_HBLANK_FIX); 556 + if (needs_wa_14020863754(display)) 557 + intel_de_rmw(display, AUD_CHICKENBIT_REG3, 0, DACBE_DISABLE_MIN_HBLANK_FIX); 558 558 559 559 /* Enable audio presence detect */ 560 - intel_de_rmw(i915, HSW_AUD_PIN_ELD_CP_VLD, 560 + intel_de_rmw(display, HSW_AUD_PIN_ELD_CP_VLD, 561 561 0, AUDIO_OUTPUT_ENABLE(cpu_transcoder)); 562 562 563 563 intel_crtc_wait_for_next_vblank(crtc); 564 564 565 565 /* Invalidate ELD */ 566 - intel_de_rmw(i915, HSW_AUD_PIN_ELD_CP_VLD, 566 + intel_de_rmw(display, HSW_AUD_PIN_ELD_CP_VLD, 567 567 AUDIO_ELD_VALID(cpu_transcoder), 0); 568 568 569 569 /* ··· 574 574 /* Enable timestamps */ 575 575 hsw_audio_config_update(encoder, crtc_state); 576 576 577 - mutex_unlock(&i915->display.audio.mutex); 577 + mutex_unlock(&display->audio.mutex); 578 578 } 579 579 580 580 struct ibx_audio_regs { 581 581 i915_reg_t hdmiw_hdmiedid, aud_config, aud_cntl_st, aud_cntrl_st2; 582 582 }; 583 583 584 - static void ibx_audio_regs_init(struct drm_i915_private *i915, 584 + static void ibx_audio_regs_init(struct intel_display *display, 585 585 enum pipe pipe, 586 586 struct ibx_audio_regs *regs) 587 587 { 588 - if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { 588 + struct drm_i915_private *i915 = to_i915(display->drm); 589 + 590 + if (display->platform.valleyview || display->platform.cherryview) { 589 591 regs->hdmiw_hdmiedid = VLV_HDMIW_HDMIEDID(pipe); 590 592 regs->aud_config = VLV_AUD_CFG(pipe); 591 593 regs->aud_cntl_st = VLV_AUD_CNTL_ST(pipe); ··· 609 607 const struct intel_crtc_state *old_crtc_state, 610 608 const struct drm_connector_state *old_conn_state) 611 609 { 612 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 610 + struct intel_display *display = to_intel_display(encoder); 613 611 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); 614 612 enum port port = encoder->port; 615 613 enum pipe pipe = crtc->pipe; 616 614 struct ibx_audio_regs regs; 617 615 618 - if (drm_WARN_ON(&i915->drm, port == PORT_A)) 616 + if (drm_WARN_ON(display->drm, port == PORT_A)) 619 617 return; 620 618 621 - ibx_audio_regs_init(i915, pipe, &regs); 619 + ibx_audio_regs_init(display, pipe, &regs); 622 620 623 - mutex_lock(&i915->display.audio.mutex); 621 + mutex_lock(&display->audio.mutex); 624 622 625 623 /* Disable timestamps */ 626 - intel_de_rmw(i915, regs.aud_config, 624 + intel_de_rmw(display, regs.aud_config, 627 625 AUD_CONFIG_N_VALUE_INDEX | 628 626 AUD_CONFIG_UPPER_N_MASK | 629 627 AUD_CONFIG_LOWER_N_MASK, ··· 632 630 AUD_CONFIG_N_VALUE_INDEX : 0)); 633 631 634 632 /* Invalidate ELD */ 635 - intel_de_rmw(i915, regs.aud_cntrl_st2, 633 + intel_de_rmw(display, regs.aud_cntrl_st2, 636 634 IBX_ELD_VALID(port), 0); 637 635 638 - mutex_unlock(&i915->display.audio.mutex); 636 + mutex_unlock(&display->audio.mutex); 639 637 640 638 intel_crtc_wait_for_next_vblank(crtc); 641 639 intel_crtc_wait_for_next_vblank(crtc); ··· 645 643 const struct intel_crtc_state *crtc_state, 646 644 const struct drm_connector_state *conn_state) 647 645 { 648 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 646 + struct intel_display *display = to_intel_display(encoder); 649 647 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 650 648 enum port port = encoder->port; 651 649 enum pipe pipe = crtc->pipe; 652 650 struct ibx_audio_regs regs; 653 651 654 - if (drm_WARN_ON(&i915->drm, port == PORT_A)) 652 + if (drm_WARN_ON(display->drm, port == PORT_A)) 655 653 return; 656 654 657 655 intel_crtc_wait_for_next_vblank(crtc); 658 656 659 - ibx_audio_regs_init(i915, pipe, &regs); 657 + ibx_audio_regs_init(display, pipe, &regs); 660 658 661 - mutex_lock(&i915->display.audio.mutex); 659 + mutex_lock(&display->audio.mutex); 662 660 663 661 /* Invalidate ELD */ 664 - intel_de_rmw(i915, regs.aud_cntrl_st2, 662 + intel_de_rmw(display, regs.aud_cntrl_st2, 665 663 IBX_ELD_VALID(port), 0); 666 664 667 665 /* ··· 670 668 */ 671 669 672 670 /* Enable timestamps */ 673 - intel_de_rmw(i915, regs.aud_config, 671 + intel_de_rmw(display, regs.aud_config, 674 672 AUD_CONFIG_N_VALUE_INDEX | 675 673 AUD_CONFIG_N_PROG_ENABLE | 676 674 AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK, ··· 678 676 AUD_CONFIG_N_VALUE_INDEX : 679 677 audio_config_hdmi_pixel_clock(crtc_state))); 680 678 681 - mutex_unlock(&i915->display.audio.mutex); 679 + mutex_unlock(&display->audio.mutex); 682 680 } 683 681 684 682 void intel_audio_sdp_split_update(const struct intel_crtc_state *crtc_state) ··· 695 693 struct intel_crtc_state *crtc_state, 696 694 struct drm_connector_state *conn_state) 697 695 { 698 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 696 + struct intel_display *display = to_intel_display(encoder); 699 697 struct drm_connector *connector = conn_state->connector; 700 698 const struct drm_display_mode *adjusted_mode = 701 699 &crtc_state->hw.adjusted_mode; 702 700 703 701 mutex_lock(&connector->eld_mutex); 704 702 if (!connector->eld[0]) { 705 - drm_dbg_kms(&i915->drm, 703 + drm_dbg_kms(display->drm, 706 704 "Bogus ELD on [CONNECTOR:%d:%s]\n", 707 705 connector->base.id, connector->name); 708 706 mutex_unlock(&connector->eld_mutex); ··· 731 729 const struct intel_crtc_state *crtc_state, 732 730 const struct drm_connector_state *conn_state) 733 731 { 732 + struct intel_display *display = to_intel_display(encoder); 734 733 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 735 - struct i915_audio_component *acomp = i915->display.audio.component; 734 + struct i915_audio_component *acomp = display->audio.component; 736 735 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 737 736 struct intel_connector *connector = to_intel_connector(conn_state->connector); 738 737 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; ··· 743 740 if (!crtc_state->has_audio) 744 741 return; 745 742 746 - drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s][ENCODER:%d:%s] Enable audio codec on [CRTC:%d:%s], %u bytes ELD\n", 743 + drm_dbg_kms(display->drm, 744 + "[CONNECTOR:%d:%s][ENCODER:%d:%s] Enable audio codec on [CRTC:%d:%s], %u bytes ELD\n", 747 745 connector->base.base.id, connector->base.name, 748 746 encoder->base.base.id, encoder->base.name, 749 747 crtc->base.base.id, crtc->base.name, 750 748 drm_eld_size(crtc_state->eld)); 751 749 752 - if (i915->display.funcs.audio) 753 - i915->display.funcs.audio->audio_codec_enable(encoder, 750 + if (display->funcs.audio) 751 + display->funcs.audio->audio_codec_enable(encoder, 754 752 crtc_state, 755 753 conn_state); 756 754 757 - mutex_lock(&i915->display.audio.mutex); 755 + mutex_lock(&display->audio.mutex); 758 756 759 - audio_state = &i915->display.audio.state[cpu_transcoder]; 757 + audio_state = &display->audio.state[cpu_transcoder]; 760 758 761 759 audio_state->encoder = encoder; 762 760 BUILD_BUG_ON(sizeof(audio_state->eld) != sizeof(crtc_state->eld)); 763 761 memcpy(audio_state->eld, crtc_state->eld, sizeof(audio_state->eld)); 764 762 765 - mutex_unlock(&i915->display.audio.mutex); 763 + mutex_unlock(&display->audio.mutex); 766 764 767 765 if (acomp && acomp->base.audio_ops && 768 766 acomp->base.audio_ops->pin_eld_notify) { ··· 792 788 const struct intel_crtc_state *old_crtc_state, 793 789 const struct drm_connector_state *old_conn_state) 794 790 { 791 + struct intel_display *display = to_intel_display(encoder); 795 792 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 796 - struct i915_audio_component *acomp = i915->display.audio.component; 793 + struct i915_audio_component *acomp = display->audio.component; 797 794 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); 798 795 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 799 796 enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; ··· 804 799 if (!old_crtc_state->has_audio) 805 800 return; 806 801 807 - drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s][ENCODER:%d:%s] Disable audio codec on [CRTC:%d:%s]\n", 802 + drm_dbg_kms(display->drm, 803 + "[CONNECTOR:%d:%s][ENCODER:%d:%s] Disable audio codec on [CRTC:%d:%s]\n", 808 804 connector->base.base.id, connector->base.name, 809 805 encoder->base.base.id, encoder->base.name, 810 806 crtc->base.base.id, crtc->base.name); 811 807 812 - if (i915->display.funcs.audio) 813 - i915->display.funcs.audio->audio_codec_disable(encoder, 808 + if (display->funcs.audio) 809 + display->funcs.audio->audio_codec_disable(encoder, 814 810 old_crtc_state, 815 811 old_conn_state); 816 812 817 - mutex_lock(&i915->display.audio.mutex); 813 + mutex_lock(&display->audio.mutex); 818 814 819 - audio_state = &i915->display.audio.state[cpu_transcoder]; 815 + audio_state = &display->audio.state[cpu_transcoder]; 820 816 821 817 audio_state->encoder = NULL; 822 818 memset(audio_state->eld, 0, sizeof(audio_state->eld)); 823 819 824 - mutex_unlock(&i915->display.audio.mutex); 820 + mutex_unlock(&display->audio.mutex); 825 821 826 822 if (acomp && acomp->base.audio_ops && 827 823 acomp->base.audio_ops->pin_eld_notify) { ··· 839 833 static void intel_acomp_get_config(struct intel_encoder *encoder, 840 834 struct intel_crtc_state *crtc_state) 841 835 { 842 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 836 + struct intel_display *display = to_intel_display(encoder); 843 837 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 844 838 struct intel_audio_state *audio_state; 845 839 846 - mutex_lock(&i915->display.audio.mutex); 840 + mutex_lock(&display->audio.mutex); 847 841 848 - audio_state = &i915->display.audio.state[cpu_transcoder]; 842 + audio_state = &display->audio.state[cpu_transcoder]; 849 843 850 844 if (audio_state->encoder) 851 845 memcpy(crtc_state->eld, audio_state->eld, sizeof(audio_state->eld)); 852 846 853 - mutex_unlock(&i915->display.audio.mutex); 847 + mutex_unlock(&display->audio.mutex); 854 848 } 855 849 856 850 void intel_audio_codec_get_config(struct intel_encoder *encoder, 857 851 struct intel_crtc_state *crtc_state) 858 852 { 859 - struct drm_i915_private *i915 = to_i915(encoder->base.dev); 853 + struct intel_display *display = to_intel_display(encoder); 860 854 861 855 if (!crtc_state->has_audio) 862 856 return; 863 857 864 - if (i915->display.funcs.audio) 865 - i915->display.funcs.audio->audio_codec_get_config(encoder, crtc_state); 858 + if (display->funcs.audio) 859 + display->funcs.audio->audio_codec_get_config(encoder, crtc_state); 866 860 } 867 861 868 862 static const struct intel_audio_funcs g4x_audio_funcs = { ··· 885 879 886 880 /** 887 881 * intel_audio_hooks_init - Set up chip specific audio hooks 888 - * @i915: device private 882 + * @display: display device 889 883 */ 890 - void intel_audio_hooks_init(struct drm_i915_private *i915) 884 + void intel_audio_hooks_init(struct intel_display *display) 891 885 { 892 - if (IS_G4X(i915)) 893 - i915->display.funcs.audio = &g4x_audio_funcs; 894 - else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915) || 886 + struct drm_i915_private *i915 = to_i915(display->drm); 887 + 888 + if (display->platform.g4x) 889 + display->funcs.audio = &g4x_audio_funcs; 890 + else if (display->platform.valleyview || display->platform.cherryview || 895 891 HAS_PCH_CPT(i915) || HAS_PCH_IBX(i915)) 896 - i915->display.funcs.audio = &ibx_audio_funcs; 897 - else if (IS_HASWELL(i915) || DISPLAY_VER(i915) >= 8) 898 - i915->display.funcs.audio = &hsw_audio_funcs; 892 + display->funcs.audio = &ibx_audio_funcs; 893 + else if (display->platform.haswell || DISPLAY_VER(display) >= 8) 894 + display->funcs.audio = &hsw_audio_funcs; 899 895 } 900 896 901 897 struct aud_ts_cdclk_m_n { ··· 905 897 u16 n; 906 898 }; 907 899 908 - void intel_audio_cdclk_change_pre(struct drm_i915_private *i915) 900 + void intel_audio_cdclk_change_pre(struct intel_display *display) 909 901 { 910 - if (DISPLAY_VER(i915) >= 13) 911 - intel_de_rmw(i915, AUD_TS_CDCLK_M, AUD_TS_CDCLK_M_EN, 0); 902 + if (DISPLAY_VER(display) >= 13) 903 + intel_de_rmw(display, AUD_TS_CDCLK_M, AUD_TS_CDCLK_M_EN, 0); 912 904 } 913 905 914 906 static void get_aud_ts_cdclk_m_n(int refclk, int cdclk, struct aud_ts_cdclk_m_n *aud_ts) ··· 917 909 aud_ts->n = cdclk * aud_ts->m / 24000; 918 910 } 919 911 920 - void intel_audio_cdclk_change_post(struct drm_i915_private *i915) 912 + void intel_audio_cdclk_change_post(struct intel_display *display) 921 913 { 922 914 struct aud_ts_cdclk_m_n aud_ts; 923 915 924 - if (DISPLAY_VER(i915) >= 13) { 925 - get_aud_ts_cdclk_m_n(i915->display.cdclk.hw.ref, i915->display.cdclk.hw.cdclk, &aud_ts); 916 + if (DISPLAY_VER(display) >= 13) { 917 + get_aud_ts_cdclk_m_n(display->cdclk.hw.ref, 918 + display->cdclk.hw.cdclk, &aud_ts); 926 919 927 - intel_de_write(i915, AUD_TS_CDCLK_N, aud_ts.n); 928 - intel_de_write(i915, AUD_TS_CDCLK_M, aud_ts.m | AUD_TS_CDCLK_M_EN); 929 - drm_dbg_kms(&i915->drm, "aud_ts_cdclk set to M=%u, N=%u\n", aud_ts.m, aud_ts.n); 920 + intel_de_write(display, AUD_TS_CDCLK_N, aud_ts.n); 921 + intel_de_write(display, AUD_TS_CDCLK_M, aud_ts.m | AUD_TS_CDCLK_M_EN); 922 + drm_dbg_kms(display->drm, "aud_ts_cdclk set to M=%u, N=%u\n", 923 + aud_ts.m, aud_ts.n); 930 924 } 931 925 } 932 926 ··· 953 943 return drm_atomic_commit(&state->base); 954 944 } 955 945 956 - static void glk_force_audio_cdclk(struct drm_i915_private *i915, 946 + static void glk_force_audio_cdclk(struct intel_display *display, 957 947 bool enable) 958 948 { 949 + struct drm_i915_private *i915 = to_i915(display->drm); 959 950 struct drm_modeset_acquire_ctx ctx; 960 951 struct drm_atomic_state *state; 961 952 struct intel_crtc *crtc; ··· 967 956 return; 968 957 969 958 drm_modeset_acquire_init(&ctx, 0); 970 - state = drm_atomic_state_alloc(&i915->drm); 971 - if (drm_WARN_ON(&i915->drm, !state)) 959 + state = drm_atomic_state_alloc(display->drm); 960 + if (drm_WARN_ON(display->drm, !state)) 972 961 return; 973 962 974 963 state->acquire_ctx = &ctx; ··· 983 972 goto retry; 984 973 } 985 974 986 - drm_WARN_ON(&i915->drm, ret); 975 + drm_WARN_ON(display->drm, ret); 987 976 988 977 drm_atomic_state_put(state); 989 978 ··· 994 983 int intel_audio_min_cdclk(const struct intel_crtc_state *crtc_state) 995 984 { 996 985 struct intel_display *display = to_intel_display(crtc_state); 997 - struct drm_i915_private *dev_priv = to_i915(display->drm); 998 986 int min_cdclk = 0; 999 987 1000 988 if (!crtc_state->has_audio) ··· 1010 1000 if (DISPLAY_VER(display) == 10) { 1011 1001 /* Display WA #1145: glk */ 1012 1002 min_cdclk = max(min_cdclk, 316800); 1013 - } else if (DISPLAY_VER(display) == 9 || IS_BROADWELL(dev_priv)) { 1003 + } else if (DISPLAY_VER(display) == 9 || display->platform.broadwell) { 1014 1004 /* Display WA #1144: skl,bxt */ 1015 1005 min_cdclk = max(min_cdclk, 432000); 1016 1006 } ··· 1030 1020 * 270 | 320 or higher 1031 1021 * 162 | 200 or higher" 1032 1022 */ 1033 - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && 1023 + if ((display->platform.valleyview || display->platform.cherryview) && 1034 1024 intel_crtc_has_dp_encoder(crtc_state)) 1035 1025 min_cdclk = max(min_cdclk, crtc_state->port_clock); 1036 1026 ··· 1048 1038 1049 1039 wakeref = intel_display_power_get(i915, POWER_DOMAIN_AUDIO_PLAYBACK); 1050 1040 1051 - if (i915->display.audio.power_refcount++ == 0) { 1052 - if (DISPLAY_VER(i915) >= 9) { 1053 - intel_de_write(i915, AUD_FREQ_CNTRL, 1054 - i915->display.audio.freq_cntrl); 1055 - drm_dbg_kms(&i915->drm, 1041 + if (display->audio.power_refcount++ == 0) { 1042 + if (DISPLAY_VER(display) >= 9) { 1043 + intel_de_write(display, AUD_FREQ_CNTRL, 1044 + display->audio.freq_cntrl); 1045 + drm_dbg_kms(display->drm, 1056 1046 "restored AUD_FREQ_CNTRL to 0x%x\n", 1057 - i915->display.audio.freq_cntrl); 1047 + display->audio.freq_cntrl); 1058 1048 } 1059 1049 1060 1050 /* Force CDCLK to 2*BCLK as long as we need audio powered. */ 1061 - if (IS_GEMINILAKE(i915)) 1062 - glk_force_audio_cdclk(i915, true); 1051 + if (display->platform.geminilake) 1052 + glk_force_audio_cdclk(display, true); 1063 1053 1064 - if (DISPLAY_VER(i915) >= 10) 1065 - intel_de_rmw(i915, AUD_PIN_BUF_CTL, 1054 + if (DISPLAY_VER(display) >= 10) 1055 + intel_de_rmw(display, AUD_PIN_BUF_CTL, 1066 1056 0, AUD_PIN_BUF_ENABLE); 1067 1057 } 1068 1058 ··· 1077 1067 intel_wakeref_t wakeref = (intel_wakeref_t)cookie; 1078 1068 1079 1069 /* Stop forcing CDCLK to 2*BCLK if no need for audio to be powered. */ 1080 - if (--i915->display.audio.power_refcount == 0) 1081 - if (IS_GEMINILAKE(i915)) 1082 - glk_force_audio_cdclk(i915, false); 1070 + if (--display->audio.power_refcount == 0) 1071 + if (display->platform.geminilake) 1072 + glk_force_audio_cdclk(display, false); 1083 1073 1084 1074 intel_display_power_put(i915, POWER_DOMAIN_AUDIO_PLAYBACK, wakeref); 1085 1075 } ··· 1088 1078 bool enable) 1089 1079 { 1090 1080 struct intel_display *display = to_intel_display(kdev); 1091 - struct drm_i915_private *i915 = to_i915(display->drm); 1092 1081 unsigned long cookie; 1093 1082 1094 - if (DISPLAY_VER(i915) < 9) 1083 + if (DISPLAY_VER(display) < 9) 1095 1084 return; 1096 1085 1097 1086 cookie = i915_audio_component_get_power(kdev); ··· 1099 1090 * Enable/disable generating the codec wake signal, overriding the 1100 1091 * internal logic to generate the codec wake to controller. 1101 1092 */ 1102 - intel_de_rmw(i915, HSW_AUD_CHICKENBIT, 1093 + intel_de_rmw(display, HSW_AUD_CHICKENBIT, 1103 1094 SKL_AUD_CODEC_WAKE_SIGNAL, 0); 1104 1095 usleep_range(1000, 1500); 1105 1096 1106 1097 if (enable) { 1107 - intel_de_rmw(i915, HSW_AUD_CHICKENBIT, 1098 + intel_de_rmw(display, HSW_AUD_CHICKENBIT, 1108 1099 0, SKL_AUD_CODEC_WAKE_SIGNAL); 1109 1100 usleep_range(1000, 1500); 1110 1101 } ··· 1116 1107 static int i915_audio_component_get_cdclk_freq(struct device *kdev) 1117 1108 { 1118 1109 struct intel_display *display = to_intel_display(kdev); 1119 - struct drm_i915_private *i915 = to_i915(display->drm); 1120 1110 1121 - if (drm_WARN_ON_ONCE(&i915->drm, !HAS_DDI(i915))) 1111 + if (drm_WARN_ON_ONCE(display->drm, !HAS_DDI(display))) 1122 1112 return -ENODEV; 1123 1113 1124 - return i915->display.cdclk.hw.cdclk; 1114 + return display->cdclk.hw.cdclk; 1125 1115 } 1126 1116 1127 1117 /* ··· 1132 1124 * will get the right intel_encoder with port matched 1133 1125 * Non-MST & (cpu_transcoder < 0): get the right intel_encoder with port matched 1134 1126 */ 1135 - static struct intel_audio_state *find_audio_state(struct drm_i915_private *i915, 1127 + static struct intel_audio_state *find_audio_state(struct intel_display *display, 1136 1128 int port, int cpu_transcoder) 1137 1129 { 1138 1130 /* MST */ ··· 1140 1132 struct intel_audio_state *audio_state; 1141 1133 struct intel_encoder *encoder; 1142 1134 1143 - if (drm_WARN_ON(&i915->drm, 1144 - cpu_transcoder >= ARRAY_SIZE(i915->display.audio.state))) 1135 + if (drm_WARN_ON(display->drm, 1136 + cpu_transcoder >= ARRAY_SIZE(display->audio.state))) 1145 1137 return NULL; 1146 1138 1147 - audio_state = &i915->display.audio.state[cpu_transcoder]; 1139 + audio_state = &display->audio.state[cpu_transcoder]; 1148 1140 encoder = audio_state->encoder; 1149 1141 1150 1142 if (encoder && encoder->port == port && ··· 1156 1148 if (cpu_transcoder > 0) 1157 1149 return NULL; 1158 1150 1159 - for_each_cpu_transcoder(i915, cpu_transcoder) { 1151 + for_each_cpu_transcoder(display, cpu_transcoder) { 1160 1152 struct intel_audio_state *audio_state; 1161 1153 struct intel_encoder *encoder; 1162 1154 1163 - audio_state = &i915->display.audio.state[cpu_transcoder]; 1155 + audio_state = &display->audio.state[cpu_transcoder]; 1164 1156 encoder = audio_state->encoder; 1165 1157 1166 1158 if (encoder && encoder->port == port && ··· 1175 1167 int cpu_transcoder, int rate) 1176 1168 { 1177 1169 struct intel_display *display = to_intel_display(kdev); 1178 - struct drm_i915_private *i915 = to_i915(display->drm); 1179 - struct i915_audio_component *acomp = i915->display.audio.component; 1170 + struct i915_audio_component *acomp = display->audio.component; 1180 1171 const struct intel_audio_state *audio_state; 1181 1172 struct intel_encoder *encoder; 1182 1173 struct intel_crtc *crtc; 1183 1174 unsigned long cookie; 1184 1175 int err = 0; 1185 1176 1186 - if (!HAS_DDI(i915)) 1177 + if (!HAS_DDI(display)) 1187 1178 return 0; 1188 1179 1189 1180 cookie = i915_audio_component_get_power(kdev); 1190 - mutex_lock(&i915->display.audio.mutex); 1181 + mutex_lock(&display->audio.mutex); 1191 1182 1192 - audio_state = find_audio_state(i915, port, cpu_transcoder); 1183 + audio_state = find_audio_state(display, port, cpu_transcoder); 1193 1184 if (!audio_state) { 1194 - drm_dbg_kms(&i915->drm, "Not valid for port %c\n", port_name(port)); 1185 + drm_dbg_kms(display->drm, "Not valid for port %c\n", 1186 + port_name(port)); 1195 1187 err = -ENODEV; 1196 1188 goto unlock; 1197 1189 } ··· 1208 1200 hsw_audio_config_update(encoder, crtc->config); 1209 1201 1210 1202 unlock: 1211 - mutex_unlock(&i915->display.audio.mutex); 1203 + mutex_unlock(&display->audio.mutex); 1212 1204 i915_audio_component_put_power(kdev, cookie); 1213 1205 return err; 1214 1206 } ··· 1218 1210 unsigned char *buf, int max_bytes) 1219 1211 { 1220 1212 struct intel_display *display = to_intel_display(kdev); 1221 - struct drm_i915_private *i915 = to_i915(display->drm); 1222 1213 const struct intel_audio_state *audio_state; 1223 1214 int ret = 0; 1224 1215 1225 - mutex_lock(&i915->display.audio.mutex); 1216 + mutex_lock(&display->audio.mutex); 1226 1217 1227 - audio_state = find_audio_state(i915, port, cpu_transcoder); 1218 + audio_state = find_audio_state(display, port, cpu_transcoder); 1228 1219 if (!audio_state) { 1229 - drm_dbg_kms(&i915->drm, "Not valid for port %c\n", port_name(port)); 1230 - mutex_unlock(&i915->display.audio.mutex); 1220 + drm_dbg_kms(display->drm, "Not valid for port %c\n", 1221 + port_name(port)); 1222 + mutex_unlock(&display->audio.mutex); 1231 1223 return -EINVAL; 1232 1224 } 1233 1225 ··· 1239 1231 memcpy(buf, eld, min(max_bytes, ret)); 1240 1232 } 1241 1233 1242 - mutex_unlock(&i915->display.audio.mutex); 1234 + mutex_unlock(&display->audio.mutex); 1243 1235 return ret; 1244 1236 } 1245 1237 ··· 1257 1249 struct device *hda_kdev, void *data) 1258 1250 { 1259 1251 struct intel_display *display = to_intel_display(drv_kdev); 1260 - struct drm_i915_private *i915 = to_i915(display->drm); 1261 1252 struct i915_audio_component *acomp = data; 1262 1253 int i; 1263 1254 1264 - if (drm_WARN_ON(&i915->drm, acomp->base.ops || acomp->base.dev)) 1255 + if (drm_WARN_ON(display->drm, acomp->base.ops || acomp->base.dev)) 1265 1256 return -EEXIST; 1266 1257 1267 - if (drm_WARN_ON(&i915->drm, 1258 + if (drm_WARN_ON(display->drm, 1268 1259 !device_link_add(hda_kdev, drv_kdev, 1269 1260 DL_FLAG_STATELESS))) 1270 1261 return -ENOMEM; 1271 1262 1272 - drm_modeset_lock_all(&i915->drm); 1263 + drm_modeset_lock_all(display->drm); 1273 1264 acomp->base.ops = &i915_audio_component_ops; 1274 1265 acomp->base.dev = drv_kdev; 1275 1266 BUILD_BUG_ON(MAX_PORTS != I915_MAX_PORTS); 1276 1267 for (i = 0; i < ARRAY_SIZE(acomp->aud_sample_rate); i++) 1277 1268 acomp->aud_sample_rate[i] = 0; 1278 - i915->display.audio.component = acomp; 1279 - drm_modeset_unlock_all(&i915->drm); 1269 + display->audio.component = acomp; 1270 + drm_modeset_unlock_all(display->drm); 1280 1271 1281 1272 return 0; 1282 1273 } ··· 1284 1277 struct device *hda_kdev, void *data) 1285 1278 { 1286 1279 struct intel_display *display = to_intel_display(drv_kdev); 1287 - struct drm_i915_private *i915 = to_i915(display->drm); 1288 1280 struct i915_audio_component *acomp = data; 1289 1281 1290 - drm_modeset_lock_all(&i915->drm); 1282 + drm_modeset_lock_all(display->drm); 1291 1283 acomp->base.ops = NULL; 1292 1284 acomp->base.dev = NULL; 1293 - i915->display.audio.component = NULL; 1294 - drm_modeset_unlock_all(&i915->drm); 1285 + display->audio.component = NULL; 1286 + drm_modeset_unlock_all(display->drm); 1295 1287 1296 1288 device_link_remove(hda_kdev, drv_kdev); 1297 1289 1298 - if (i915->display.audio.power_refcount) 1299 - drm_err(&i915->drm, "audio power refcount %d after unbind\n", 1300 - i915->display.audio.power_refcount); 1290 + if (display->audio.power_refcount) 1291 + drm_err(display->drm, 1292 + "audio power refcount %d after unbind\n", 1293 + display->audio.power_refcount); 1301 1294 } 1302 1295 1303 1296 static const struct component_ops i915_audio_component_bind_ops = { ··· 1316 1309 1317 1310 /** 1318 1311 * i915_audio_component_init - initialize and register the audio component 1319 - * @i915: i915 device instance 1312 + * @display: display device 1320 1313 * 1321 1314 * This will register with the component framework a child component which 1322 1315 * will bind dynamically to the snd_hda_intel driver's corresponding master ··· 1330 1323 * We ignore any error during registration and continue with reduced 1331 1324 * functionality (i.e. without HDMI audio). 1332 1325 */ 1333 - static void i915_audio_component_init(struct drm_i915_private *i915) 1326 + static void i915_audio_component_init(struct intel_display *display) 1334 1327 { 1335 1328 u32 aud_freq, aud_freq_init; 1336 1329 1337 - if (DISPLAY_VER(i915) >= 9) { 1338 - aud_freq_init = intel_de_read(i915, AUD_FREQ_CNTRL); 1330 + if (DISPLAY_VER(display) >= 9) { 1331 + aud_freq_init = intel_de_read(display, AUD_FREQ_CNTRL); 1339 1332 1340 - if (DISPLAY_VER(i915) >= 12) 1333 + if (DISPLAY_VER(display) >= 12) 1341 1334 aud_freq = AUD_FREQ_GEN12; 1342 1335 else 1343 1336 aud_freq = aud_freq_init; 1344 1337 1345 1338 /* use BIOS provided value for TGL and RKL unless it is a known bad value */ 1346 - if ((IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) && 1339 + if ((display->platform.tigerlake || display->platform.rocketlake) && 1347 1340 aud_freq_init != AUD_FREQ_TGL_BROKEN) 1348 1341 aud_freq = aud_freq_init; 1349 1342 1350 - drm_dbg_kms(&i915->drm, "use AUD_FREQ_CNTRL of 0x%x (init value 0x%x)\n", 1343 + drm_dbg_kms(display->drm, 1344 + "use AUD_FREQ_CNTRL of 0x%x (init value 0x%x)\n", 1351 1345 aud_freq, aud_freq_init); 1352 1346 1353 - i915->display.audio.freq_cntrl = aud_freq; 1347 + display->audio.freq_cntrl = aud_freq; 1354 1348 } 1355 1349 1356 1350 /* init with current cdclk */ 1357 - intel_audio_cdclk_change_post(i915); 1351 + intel_audio_cdclk_change_post(display); 1358 1352 } 1359 1353 1360 - static void i915_audio_component_register(struct drm_i915_private *i915) 1354 + static void i915_audio_component_register(struct intel_display *display) 1361 1355 { 1362 1356 int ret; 1363 1357 1364 - ret = component_add_typed(i915->drm.dev, 1358 + ret = component_add_typed(display->drm->dev, 1365 1359 &i915_audio_component_bind_ops, 1366 1360 I915_COMPONENT_AUDIO); 1367 1361 if (ret < 0) { 1368 - drm_err(&i915->drm, 1362 + drm_err(display->drm, 1369 1363 "failed to add audio component (%d)\n", ret); 1370 1364 /* continue with reduced functionality */ 1371 1365 return; 1372 1366 } 1373 1367 1374 - i915->display.audio.component_registered = true; 1368 + display->audio.component_registered = true; 1375 1369 } 1376 1370 1377 1371 /** 1378 1372 * i915_audio_component_cleanup - deregister the audio component 1379 - * @i915: i915 device instance 1373 + * @display: display device 1380 1374 * 1381 1375 * Deregisters the audio component, breaking any existing binding to the 1382 1376 * corresponding snd_hda_intel driver's master component. 1383 1377 */ 1384 - static void i915_audio_component_cleanup(struct drm_i915_private *i915) 1378 + static void i915_audio_component_cleanup(struct intel_display *display) 1385 1379 { 1386 - if (!i915->display.audio.component_registered) 1380 + if (!display->audio.component_registered) 1387 1381 return; 1388 1382 1389 - component_del(i915->drm.dev, &i915_audio_component_bind_ops); 1390 - i915->display.audio.component_registered = false; 1383 + component_del(display->drm->dev, &i915_audio_component_bind_ops); 1384 + display->audio.component_registered = false; 1391 1385 } 1392 1386 1393 1387 /** 1394 1388 * intel_audio_init() - Initialize the audio driver either using 1395 1389 * component framework or using lpe audio bridge 1396 - * @i915: the i915 drm device private data 1390 + * @display: display device 1397 1391 * 1398 1392 */ 1399 - void intel_audio_init(struct drm_i915_private *i915) 1393 + void intel_audio_init(struct intel_display *display) 1400 1394 { 1395 + struct drm_i915_private *i915 = to_i915(display->drm); 1396 + 1401 1397 if (intel_lpe_audio_init(i915) < 0) 1402 - i915_audio_component_init(i915); 1398 + i915_audio_component_init(display); 1403 1399 } 1404 1400 1405 - void intel_audio_register(struct drm_i915_private *i915) 1401 + void intel_audio_register(struct intel_display *display) 1406 1402 { 1407 - if (!i915->display.audio.lpe.platdev) 1408 - i915_audio_component_register(i915); 1403 + if (!display->audio.lpe.platdev) 1404 + i915_audio_component_register(display); 1409 1405 } 1410 1406 1411 1407 /** 1412 1408 * intel_audio_deinit() - deinitialize the audio driver 1413 - * @i915: the i915 drm device private data 1414 - * 1409 + * @display: display device 1415 1410 */ 1416 - void intel_audio_deinit(struct drm_i915_private *i915) 1411 + void intel_audio_deinit(struct intel_display *display) 1417 1412 { 1418 - if (i915->display.audio.lpe.platdev != NULL) 1413 + struct drm_i915_private *i915 = to_i915(display->drm); 1414 + 1415 + if (display->audio.lpe.platdev) 1419 1416 intel_lpe_audio_teardown(i915); 1420 1417 else 1421 - i915_audio_component_cleanup(i915); 1418 + i915_audio_component_cleanup(display); 1422 1419 }
+7 -7
drivers/gpu/drm/i915/display/intel_audio.h
··· 9 9 #include <linux/types.h> 10 10 11 11 struct drm_connector_state; 12 - struct drm_i915_private; 13 12 struct intel_crtc_state; 13 + struct intel_display; 14 14 struct intel_encoder; 15 15 16 - void intel_audio_hooks_init(struct drm_i915_private *dev_priv); 16 + void intel_audio_hooks_init(struct intel_display *display); 17 17 bool intel_audio_compute_config(struct intel_encoder *encoder, 18 18 struct intel_crtc_state *crtc_state, 19 19 struct drm_connector_state *conn_state); ··· 25 25 const struct drm_connector_state *old_conn_state); 26 26 void intel_audio_codec_get_config(struct intel_encoder *encoder, 27 27 struct intel_crtc_state *crtc_state); 28 - void intel_audio_cdclk_change_pre(struct drm_i915_private *dev_priv); 29 - void intel_audio_cdclk_change_post(struct drm_i915_private *dev_priv); 28 + void intel_audio_cdclk_change_pre(struct intel_display *display); 29 + void intel_audio_cdclk_change_post(struct intel_display *display); 30 30 int intel_audio_min_cdclk(const struct intel_crtc_state *crtc_state); 31 - void intel_audio_init(struct drm_i915_private *dev_priv); 32 - void intel_audio_register(struct drm_i915_private *i915); 33 - void intel_audio_deinit(struct drm_i915_private *dev_priv); 31 + void intel_audio_init(struct intel_display *display); 32 + void intel_audio_register(struct intel_display *display); 33 + void intel_audio_deinit(struct intel_display *display); 34 34 void intel_audio_sdp_split_update(const struct intel_crtc_state *crtc_state); 35 35 36 36 #endif /* __INTEL_AUDIO_H__ */
+2 -3
drivers/gpu/drm/i915/display/intel_cdclk.c
··· 2521 2521 const struct intel_cdclk_config *cdclk_config, 2522 2522 enum pipe pipe, const char *context) 2523 2523 { 2524 - struct drm_i915_private *dev_priv = to_i915(display->drm); 2525 2524 struct intel_encoder *encoder; 2526 2525 2527 2526 if (!intel_cdclk_changed(&display->cdclk.hw, cdclk_config)) ··· 2537 2538 intel_psr_pause(intel_dp); 2538 2539 } 2539 2540 2540 - intel_audio_cdclk_change_pre(dev_priv); 2541 + intel_audio_cdclk_change_pre(display); 2541 2542 2542 2543 /* 2543 2544 * Lock aux/gmbus while we change cdclk in case those ··· 2567 2568 intel_psr_resume(intel_dp); 2568 2569 } 2569 2570 2570 - intel_audio_cdclk_change_post(dev_priv); 2571 + intel_audio_cdclk_change_post(display); 2571 2572 2572 2573 if (drm_WARN(display->drm, 2573 2574 intel_cdclk_changed(&display->cdclk.hw, cdclk_config),
+4 -6
drivers/gpu/drm/i915/display/intel_display_driver.c
··· 197 197 intel_dkl_phy_init(i915); 198 198 intel_color_init_hooks(display); 199 199 intel_init_cdclk_hooks(display); 200 - intel_audio_hooks_init(i915); 200 + intel_audio_hooks_init(display); 201 201 intel_dpll_init_clock_hook(i915); 202 202 intel_init_display_hooks(i915); 203 203 intel_fdi_init_hook(i915); ··· 546 546 intel_opregion_register(display); 547 547 intel_acpi_video_register(display); 548 548 549 - intel_audio_init(i915); 549 + intel_audio_init(display); 550 550 551 551 intel_display_driver_enable_user_access(display); 552 552 553 - intel_audio_register(i915); 553 + intel_audio_register(display); 554 554 555 555 intel_display_debugfs_register(i915); 556 556 ··· 638 638 639 639 void intel_display_driver_unregister(struct intel_display *display) 640 640 { 641 - struct drm_i915_private *i915 = to_i915(display->drm); 642 - 643 641 if (!HAS_DISPLAY(display)) 644 642 return; 645 643 ··· 652 654 653 655 intel_display_driver_disable_user_access(display); 654 656 655 - intel_audio_deinit(i915); 657 + intel_audio_deinit(display); 656 658 657 659 drm_atomic_helper_shutdown(display->drm); 658 660
+1 -1
drivers/gpu/drm/xe/display/xe_display.c
··· 216 216 intel_hpd_poll_fini(xe); 217 217 218 218 intel_hdcp_component_fini(display); 219 - intel_audio_deinit(xe); 219 + intel_audio_deinit(display); 220 220 } 221 221 222 222 void xe_display_register(struct xe_device *xe)