sh: Migrate necessary libgcc bits in to arch/sh/lib for SUPERH32.

+1 -18

arch/sh/Makefile

··· 34 34 $(call cc-option,-m4a-nofpu,) 35 35 cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,) 36 36 37 - ifeq ($(cflags-y),) 38 - # 39 - # In the case where we are stuck with a compiler that has been uselessly 40 - # restricted to a particular ISA, a favourite default of newer GCCs when 41 - # extensive multilib targets are not provided, ensure we get the best fit 42 - # regarding FP generation. This is necessary to avoid references to FP 43 - # variants in libgcc where integer variants exist, which otherwise result 44 - # in link errors. This is intentionally stupid (albeit many orders of 45 - # magnitude less than GCC's default behaviour), as anything with a large 46 - # number of multilib targets better have been built correctly for 47 - # the target in mind. 48 - # 49 - cflags-y += $(shell $(CC) $(KBUILD_CFLAGS) -print-multi-lib | \ 50 - grep nofpu | sed q | sed -e 's/^/-/;s/;.*$$//') 51 - endif 52 - 53 37 cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb 54 38 cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml 55 39 ··· 160 176 LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) 161 177 162 178 libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) 163 - libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) 164 - libs-y += $(LIBGCC) 179 + libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) $(LIBGCC) 165 180 166 181 PHONY += maketools FORCE 167 182

+5 -31

arch/sh/kernel/sh_ksyms_32.c

··· 52 52 53 53 #define DECLARE_EXPORT(name) \ 54 54 extern void name(void);EXPORT_SYMBOL(name) 55 - #define MAYBE_DECLARE_EXPORT(name) \ 56 - extern void name(void) __weak;EXPORT_SYMBOL(name) 57 55 58 - /* These symbols are generated by the compiler itself */ 59 - DECLARE_EXPORT(__udivsi3); 60 - DECLARE_EXPORT(__sdivsi3); 56 + DECLARE_EXPORT(__lshrsi3); 61 57 DECLARE_EXPORT(__ashrsi3); 62 58 DECLARE_EXPORT(__ashlsi3); 63 - DECLARE_EXPORT(__ashrdi3); 64 - DECLARE_EXPORT(__ashldi3); 65 59 DECLARE_EXPORT(__ashiftrt_r4_6); 66 60 DECLARE_EXPORT(__ashiftrt_r4_7); 67 61 DECLARE_EXPORT(__ashiftrt_r4_8); ··· 73 79 DECLARE_EXPORT(__ashiftrt_r4_24); 74 80 DECLARE_EXPORT(__ashiftrt_r4_27); 75 81 DECLARE_EXPORT(__ashiftrt_r4_30); 76 - DECLARE_EXPORT(__lshrsi3); 77 - DECLARE_EXPORT(__lshrdi3); 82 + DECLARE_EXPORT(__movstr); 78 83 DECLARE_EXPORT(__movstrSI8); 79 84 DECLARE_EXPORT(__movstrSI12); 80 85 DECLARE_EXPORT(__movstrSI16); ··· 88 95 DECLARE_EXPORT(__movstrSI52); 89 96 DECLARE_EXPORT(__movstrSI56); 90 97 DECLARE_EXPORT(__movstrSI60); 91 - #if __GNUC__ == 4 92 - DECLARE_EXPORT(__movmem); 93 - #else 94 - DECLARE_EXPORT(__movstr); 95 - #endif 96 - 97 - #if __GNUC__ == 4 98 - DECLARE_EXPORT(__movmem_i4_even); 99 - DECLARE_EXPORT(__movmem_i4_odd); 100 - DECLARE_EXPORT(__movmemSI12_i4); 101 - 102 - #if (__GNUC_MINOR__ >= 2 || defined(__GNUC_STM_RELEASE__)) 103 - /* 104 - * GCC >= 4.2 emits these for division, as do GCC 4.1.x versions of the ST 105 - * compiler which include backported patches. 106 - */ 107 - DECLARE_EXPORT(__udiv_qrnnd_16); 108 - MAYBE_DECLARE_EXPORT(__sdivsi3_i4i); 109 - MAYBE_DECLARE_EXPORT(__udivsi3_i4i); 110 - #endif 111 - #else /* GCC 3.x */ 112 98 DECLARE_EXPORT(__movstr_i4_even); 113 99 DECLARE_EXPORT(__movstr_i4_odd); 114 100 DECLARE_EXPORT(__movstrSI12_i4); 115 - #endif /* __GNUC__ == 4 */ 101 + DECLARE_EXPORT(__udiv_qrnnd_16); 102 + DECLARE_EXPORT(__sdivsi3_i4i); 103 + DECLARE_EXPORT(__udivsi3_i4i); 116 104 117 105 #if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \ 118 106 defined(CONFIG_SH7705_CACHE_32KB))

+13 -1

arch/sh/lib/Makefile

··· 5 5 lib-y = delay.o memset.o memmove.o memchr.o \ 6 6 checksum.o strlen.o div64.o div64-generic.o 7 7 8 + # Extracted from libgcc 9 + lib-y += movmem.o ashldi3.o ashrdi3.o lshrdi3.o \ 10 + ashlsi3.o ashrsi3.o ashiftrt.o lshrsi3.o \ 11 + udiv_qrnnd.o 12 + 13 + udivsi3-y := udivsi3-Os.o 14 + 15 + ifneq ($(CONFIG_CC_OPTIMIZE_FOR_SIZE),y) 16 + udivsi3-$(CONFIG_CPU_SH3) := udivsi3.o 17 + udivsi3-$(CONFIG_CPU_SH4) := udivsi3.o 18 + endif 19 + 8 20 obj-y += io.o 9 21 10 22 memcpy-y := memcpy.o ··· 24 12 25 13 lib-$(CONFIG_MMU) += copy_page.o clear_page.o 26 14 lib-$(CONFIG_FUNCTION_TRACER) += mcount.o 27 - lib-y += $(memcpy-y) 15 + lib-y += $(memcpy-y) $(udivsi3-y) 28 16 29 17 EXTRA_CFLAGS += -Werror

+149

arch/sh/lib/ashiftrt.S

··· 1 + /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2 + 2004, 2005, 2006 3 + Free Software Foundation, Inc. 4 + 5 + This file is free software; you can redistribute it and/or modify it 6 + under the terms of the GNU General Public License as published by the 7 + Free Software Foundation; either version 2, or (at your option) any 8 + later version. 9 + 10 + In addition to the permissions in the GNU General Public License, the 11 + Free Software Foundation gives you unlimited permission to link the 12 + compiled version of this file into combinations with other programs, 13 + and to distribute those combinations without any restriction coming 14 + from the use of this file. (The General Public License restrictions 15 + do apply in other respects; for example, they cover modification of 16 + the file, and distribution when not linked into a combine 17 + executable.) 18 + 19 + This file is distributed in the hope that it will be useful, but 20 + WITHOUT ANY WARRANTY; without even the implied warranty of 21 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 + General Public License for more details. 23 + 24 + You should have received a copy of the GNU General Public License 25 + along with this program; see the file COPYING. If not, write to 26 + the Free Software Foundation, 51 Franklin Street, Fifth Floor, 27 + Boston, MA 02110-1301, USA. */ 28 + 29 + !! libgcc routines for the Renesas / SuperH SH CPUs. 30 + !! Contributed by Steve Chamberlain. 31 + !! sac@cygnus.com 32 + 33 + !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines 34 + !! recoded in assembly by Toshiyasu Morita 35 + !! tm@netcom.com 36 + 37 + /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and 38 + ELF local label prefixes by J"orn Rennecke 39 + amylaar@cygnus.com */ 40 + 41 + .global __ashiftrt_r4_0 42 + .global __ashiftrt_r4_1 43 + .global __ashiftrt_r4_2 44 + .global __ashiftrt_r4_3 45 + .global __ashiftrt_r4_4 46 + .global __ashiftrt_r4_5 47 + .global __ashiftrt_r4_6 48 + .global __ashiftrt_r4_7 49 + .global __ashiftrt_r4_8 50 + .global __ashiftrt_r4_9 51 + .global __ashiftrt_r4_10 52 + .global __ashiftrt_r4_11 53 + .global __ashiftrt_r4_12 54 + .global __ashiftrt_r4_13 55 + .global __ashiftrt_r4_14 56 + .global __ashiftrt_r4_15 57 + .global __ashiftrt_r4_16 58 + .global __ashiftrt_r4_17 59 + .global __ashiftrt_r4_18 60 + .global __ashiftrt_r4_19 61 + .global __ashiftrt_r4_20 62 + .global __ashiftrt_r4_21 63 + .global __ashiftrt_r4_22 64 + .global __ashiftrt_r4_23 65 + .global __ashiftrt_r4_24 66 + .global __ashiftrt_r4_25 67 + .global __ashiftrt_r4_26 68 + .global __ashiftrt_r4_27 69 + .global __ashiftrt_r4_28 70 + .global __ashiftrt_r4_29 71 + .global __ashiftrt_r4_30 72 + .global __ashiftrt_r4_31 73 + .global __ashiftrt_r4_32 74 + 75 + .align 1 76 + __ashiftrt_r4_32: 77 + __ashiftrt_r4_31: 78 + rotcl r4 79 + rts 80 + subc r4,r4 81 + __ashiftrt_r4_30: 82 + shar r4 83 + __ashiftrt_r4_29: 84 + shar r4 85 + __ashiftrt_r4_28: 86 + shar r4 87 + __ashiftrt_r4_27: 88 + shar r4 89 + __ashiftrt_r4_26: 90 + shar r4 91 + __ashiftrt_r4_25: 92 + shar r4 93 + __ashiftrt_r4_24: 94 + shlr16 r4 95 + shlr8 r4 96 + rts 97 + exts.b r4,r4 98 + __ashiftrt_r4_23: 99 + shar r4 100 + __ashiftrt_r4_22: 101 + shar r4 102 + __ashiftrt_r4_21: 103 + shar r4 104 + __ashiftrt_r4_20: 105 + shar r4 106 + __ashiftrt_r4_19: 107 + shar r4 108 + __ashiftrt_r4_18: 109 + shar r4 110 + __ashiftrt_r4_17: 111 + shar r4 112 + __ashiftrt_r4_16: 113 + shlr16 r4 114 + rts 115 + exts.w r4,r4 116 + __ashiftrt_r4_15: 117 + shar r4 118 + __ashiftrt_r4_14: 119 + shar r4 120 + __ashiftrt_r4_13: 121 + shar r4 122 + __ashiftrt_r4_12: 123 + shar r4 124 + __ashiftrt_r4_11: 125 + shar r4 126 + __ashiftrt_r4_10: 127 + shar r4 128 + __ashiftrt_r4_9: 129 + shar r4 130 + __ashiftrt_r4_8: 131 + shar r4 132 + __ashiftrt_r4_7: 133 + shar r4 134 + __ashiftrt_r4_6: 135 + shar r4 136 + __ashiftrt_r4_5: 137 + shar r4 138 + __ashiftrt_r4_4: 139 + shar r4 140 + __ashiftrt_r4_3: 141 + shar r4 142 + __ashiftrt_r4_2: 143 + shar r4 144 + __ashiftrt_r4_1: 145 + rts 146 + shar r4 147 + __ashiftrt_r4_0: 148 + rts 149 + nop

+29

arch/sh/lib/ashldi3.c

··· 1 + #include <linux/module.h> 2 + 3 + #include "libgcc.h" 4 + 5 + long long __ashldi3(long long u, word_type b) 6 + { 7 + DWunion uu, w; 8 + word_type bm; 9 + 10 + if (b == 0) 11 + return u; 12 + 13 + uu.ll = u; 14 + bm = 32 - b; 15 + 16 + if (bm <= 0) { 17 + w.s.low = 0; 18 + w.s.high = (unsigned int) uu.s.low << -bm; 19 + } else { 20 + const unsigned int carries = (unsigned int) uu.s.low >> bm; 21 + 22 + w.s.low = (unsigned int) uu.s.low << b; 23 + w.s.high = ((unsigned int) uu.s.high << b) | carries; 24 + } 25 + 26 + return w.ll; 27 + } 28 + 29 + EXPORT_SYMBOL(__ashldi3);

+193

arch/sh/lib/ashlsi3.S

··· 1 + /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2 + 2004, 2005, 2006 3 + Free Software Foundation, Inc. 4 + 5 + This file is free software; you can redistribute it and/or modify it 6 + under the terms of the GNU General Public License as published by the 7 + Free Software Foundation; either version 2, or (at your option) any 8 + later version. 9 + 10 + In addition to the permissions in the GNU General Public License, the 11 + Free Software Foundation gives you unlimited permission to link the 12 + compiled version of this file into combinations with other programs, 13 + and to distribute those combinations without any restriction coming 14 + from the use of this file. (The General Public License restrictions 15 + do apply in other respects; for example, they cover modification of 16 + the file, and distribution when not linked into a combine 17 + executable.) 18 + 19 + This file is distributed in the hope that it will be useful, but 20 + WITHOUT ANY WARRANTY; without even the implied warranty of 21 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 + General Public License for more details. 23 + 24 + You should have received a copy of the GNU General Public License 25 + along with this program; see the file COPYING. If not, write to 26 + the Free Software Foundation, 51 Franklin Street, Fifth Floor, 27 + Boston, MA 02110-1301, USA. */ 28 + 29 + !! libgcc routines for the Renesas / SuperH SH CPUs. 30 + !! Contributed by Steve Chamberlain. 31 + !! sac@cygnus.com 32 + 33 + !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines 34 + !! recoded in assembly by Toshiyasu Morita 35 + !! tm@netcom.com 36 + 37 + /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and 38 + ELF local label prefixes by J"orn Rennecke 39 + amylaar@cygnus.com */ 40 + 41 + ! 42 + ! __ashlsi3 43 + ! 44 + ! Entry: 45 + ! 46 + ! r4: Value to shift 47 + ! r5: Shifts 48 + ! 49 + ! Exit: 50 + ! 51 + ! r0: Result 52 + ! 53 + ! Destroys: 54 + ! 55 + ! (none) 56 + ! 57 + .global __ashlsi3 58 + 59 + .align 2 60 + __ashlsi3: 61 + mov #31,r0 62 + and r0,r5 63 + mova ashlsi3_table,r0 64 + mov.b @(r0,r5),r5 65 + #ifdef __sh1__ 66 + add r5,r0 67 + jmp @r0 68 + #else 69 + braf r5 70 + #endif 71 + mov r4,r0 72 + 73 + .align 2 74 + ashlsi3_table: 75 + .byte ashlsi3_0-ashlsi3_table 76 + .byte ashlsi3_1-ashlsi3_table 77 + .byte ashlsi3_2-ashlsi3_table 78 + .byte ashlsi3_3-ashlsi3_table 79 + .byte ashlsi3_4-ashlsi3_table 80 + .byte ashlsi3_5-ashlsi3_table 81 + .byte ashlsi3_6-ashlsi3_table 82 + .byte ashlsi3_7-ashlsi3_table 83 + .byte ashlsi3_8-ashlsi3_table 84 + .byte ashlsi3_9-ashlsi3_table 85 + .byte ashlsi3_10-ashlsi3_table 86 + .byte ashlsi3_11-ashlsi3_table 87 + .byte ashlsi3_12-ashlsi3_table 88 + .byte ashlsi3_13-ashlsi3_table 89 + .byte ashlsi3_14-ashlsi3_table 90 + .byte ashlsi3_15-ashlsi3_table 91 + .byte ashlsi3_16-ashlsi3_table 92 + .byte ashlsi3_17-ashlsi3_table 93 + .byte ashlsi3_18-ashlsi3_table 94 + .byte ashlsi3_19-ashlsi3_table 95 + .byte ashlsi3_20-ashlsi3_table 96 + .byte ashlsi3_21-ashlsi3_table 97 + .byte ashlsi3_22-ashlsi3_table 98 + .byte ashlsi3_23-ashlsi3_table 99 + .byte ashlsi3_24-ashlsi3_table 100 + .byte ashlsi3_25-ashlsi3_table 101 + .byte ashlsi3_26-ashlsi3_table 102 + .byte ashlsi3_27-ashlsi3_table 103 + .byte ashlsi3_28-ashlsi3_table 104 + .byte ashlsi3_29-ashlsi3_table 105 + .byte ashlsi3_30-ashlsi3_table 106 + .byte ashlsi3_31-ashlsi3_table 107 + 108 + ashlsi3_6: 109 + shll2 r0 110 + ashlsi3_4: 111 + shll2 r0 112 + ashlsi3_2: 113 + rts 114 + shll2 r0 115 + 116 + ashlsi3_7: 117 + shll2 r0 118 + ashlsi3_5: 119 + shll2 r0 120 + ashlsi3_3: 121 + shll2 r0 122 + ashlsi3_1: 123 + rts 124 + shll r0 125 + 126 + ashlsi3_14: 127 + shll2 r0 128 + ashlsi3_12: 129 + shll2 r0 130 + ashlsi3_10: 131 + shll2 r0 132 + ashlsi3_8: 133 + rts 134 + shll8 r0 135 + 136 + ashlsi3_15: 137 + shll2 r0 138 + ashlsi3_13: 139 + shll2 r0 140 + ashlsi3_11: 141 + shll2 r0 142 + ashlsi3_9: 143 + shll8 r0 144 + rts 145 + shll r0 146 + 147 + ashlsi3_22: 148 + shll2 r0 149 + ashlsi3_20: 150 + shll2 r0 151 + ashlsi3_18: 152 + shll2 r0 153 + ashlsi3_16: 154 + rts 155 + shll16 r0 156 + 157 + ashlsi3_23: 158 + shll2 r0 159 + ashlsi3_21: 160 + shll2 r0 161 + ashlsi3_19: 162 + shll2 r0 163 + ashlsi3_17: 164 + shll16 r0 165 + rts 166 + shll r0 167 + 168 + ashlsi3_30: 169 + shll2 r0 170 + ashlsi3_28: 171 + shll2 r0 172 + ashlsi3_26: 173 + shll2 r0 174 + ashlsi3_24: 175 + shll16 r0 176 + rts 177 + shll8 r0 178 + 179 + ashlsi3_31: 180 + shll2 r0 181 + ashlsi3_29: 182 + shll2 r0 183 + ashlsi3_27: 184 + shll2 r0 185 + ashlsi3_25: 186 + shll16 r0 187 + shll8 r0 188 + rts 189 + shll r0 190 + 191 + ashlsi3_0: 192 + rts 193 + nop

+31

arch/sh/lib/ashrdi3.c

··· 1 + #include <linux/module.h> 2 + 3 + #include "libgcc.h" 4 + 5 + long long __ashrdi3(long long u, word_type b) 6 + { 7 + DWunion uu, w; 8 + word_type bm; 9 + 10 + if (b == 0) 11 + return u; 12 + 13 + uu.ll = u; 14 + bm = 32 - b; 15 + 16 + if (bm <= 0) { 17 + /* w.s.high = 1..1 or 0..0 */ 18 + w.s.high = 19 + uu.s.high >> 31; 20 + w.s.low = uu.s.high >> -bm; 21 + } else { 22 + const unsigned int carries = (unsigned int) uu.s.high << bm; 23 + 24 + w.s.high = uu.s.high >> b; 25 + w.s.low = ((unsigned int) uu.s.low >> b) | carries; 26 + } 27 + 28 + return w.ll; 29 + } 30 + 31 + EXPORT_SYMBOL(__ashrdi3);

+185

arch/sh/lib/ashrsi3.S

··· 1 + /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2 + 2004, 2005, 2006 3 + Free Software Foundation, Inc. 4 + 5 + This file is free software; you can redistribute it and/or modify it 6 + under the terms of the GNU General Public License as published by the 7 + Free Software Foundation; either version 2, or (at your option) any 8 + later version. 9 + 10 + In addition to the permissions in the GNU General Public License, the 11 + Free Software Foundation gives you unlimited permission to link the 12 + compiled version of this file into combinations with other programs, 13 + and to distribute those combinations without any restriction coming 14 + from the use of this file. (The General Public License restrictions 15 + do apply in other respects; for example, they cover modification of 16 + the file, and distribution when not linked into a combine 17 + executable.) 18 + 19 + This file is distributed in the hope that it will be useful, but 20 + WITHOUT ANY WARRANTY; without even the implied warranty of 21 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 + General Public License for more details. 23 + 24 + You should have received a copy of the GNU General Public License 25 + along with this program; see the file COPYING. If not, write to 26 + the Free Software Foundation, 51 Franklin Street, Fifth Floor, 27 + Boston, MA 02110-1301, USA. */ 28 + 29 + !! libgcc routines for the Renesas / SuperH SH CPUs. 30 + !! Contributed by Steve Chamberlain. 31 + !! sac@cygnus.com 32 + 33 + !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines 34 + !! recoded in assembly by Toshiyasu Morita 35 + !! tm@netcom.com 36 + 37 + /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and 38 + ELF local label prefixes by J"orn Rennecke 39 + amylaar@cygnus.com */ 40 + 41 + ! 42 + ! __ashrsi3 43 + ! 44 + ! Entry: 45 + ! 46 + ! r4: Value to shift 47 + ! r5: Shifts 48 + ! 49 + ! Exit: 50 + ! 51 + ! r0: Result 52 + ! 53 + ! Destroys: 54 + ! 55 + ! (none) 56 + ! 57 + 58 + .global __ashrsi3 59 + 60 + .align 2 61 + __ashrsi3: 62 + mov #31,r0 63 + and r0,r5 64 + mova ashrsi3_table,r0 65 + mov.b @(r0,r5),r5 66 + #ifdef __sh1__ 67 + add r5,r0 68 + jmp @r0 69 + #else 70 + braf r5 71 + #endif 72 + mov r4,r0 73 + 74 + .align 2 75 + ashrsi3_table: 76 + .byte ashrsi3_0-ashrsi3_table 77 + .byte ashrsi3_1-ashrsi3_table 78 + .byte ashrsi3_2-ashrsi3_table 79 + .byte ashrsi3_3-ashrsi3_table 80 + .byte ashrsi3_4-ashrsi3_table 81 + .byte ashrsi3_5-ashrsi3_table 82 + .byte ashrsi3_6-ashrsi3_table 83 + .byte ashrsi3_7-ashrsi3_table 84 + .byte ashrsi3_8-ashrsi3_table 85 + .byte ashrsi3_9-ashrsi3_table 86 + .byte ashrsi3_10-ashrsi3_table 87 + .byte ashrsi3_11-ashrsi3_table 88 + .byte ashrsi3_12-ashrsi3_table 89 + .byte ashrsi3_13-ashrsi3_table 90 + .byte ashrsi3_14-ashrsi3_table 91 + .byte ashrsi3_15-ashrsi3_table 92 + .byte ashrsi3_16-ashrsi3_table 93 + .byte ashrsi3_17-ashrsi3_table 94 + .byte ashrsi3_18-ashrsi3_table 95 + .byte ashrsi3_19-ashrsi3_table 96 + .byte ashrsi3_20-ashrsi3_table 97 + .byte ashrsi3_21-ashrsi3_table 98 + .byte ashrsi3_22-ashrsi3_table 99 + .byte ashrsi3_23-ashrsi3_table 100 + .byte ashrsi3_24-ashrsi3_table 101 + .byte ashrsi3_25-ashrsi3_table 102 + .byte ashrsi3_26-ashrsi3_table 103 + .byte ashrsi3_27-ashrsi3_table 104 + .byte ashrsi3_28-ashrsi3_table 105 + .byte ashrsi3_29-ashrsi3_table 106 + .byte ashrsi3_30-ashrsi3_table 107 + .byte ashrsi3_31-ashrsi3_table 108 + 109 + ashrsi3_31: 110 + rotcl r0 111 + rts 112 + subc r0,r0 113 + 114 + ashrsi3_30: 115 + shar r0 116 + ashrsi3_29: 117 + shar r0 118 + ashrsi3_28: 119 + shar r0 120 + ashrsi3_27: 121 + shar r0 122 + ashrsi3_26: 123 + shar r0 124 + ashrsi3_25: 125 + shar r0 126 + ashrsi3_24: 127 + shlr16 r0 128 + shlr8 r0 129 + rts 130 + exts.b r0,r0 131 + 132 + ashrsi3_23: 133 + shar r0 134 + ashrsi3_22: 135 + shar r0 136 + ashrsi3_21: 137 + shar r0 138 + ashrsi3_20: 139 + shar r0 140 + ashrsi3_19: 141 + shar r0 142 + ashrsi3_18: 143 + shar r0 144 + ashrsi3_17: 145 + shar r0 146 + ashrsi3_16: 147 + shlr16 r0 148 + rts 149 + exts.w r0,r0 150 + 151 + ashrsi3_15: 152 + shar r0 153 + ashrsi3_14: 154 + shar r0 155 + ashrsi3_13: 156 + shar r0 157 + ashrsi3_12: 158 + shar r0 159 + ashrsi3_11: 160 + shar r0 161 + ashrsi3_10: 162 + shar r0 163 + ashrsi3_9: 164 + shar r0 165 + ashrsi3_8: 166 + shar r0 167 + ashrsi3_7: 168 + shar r0 169 + ashrsi3_6: 170 + shar r0 171 + ashrsi3_5: 172 + shar r0 173 + ashrsi3_4: 174 + shar r0 175 + ashrsi3_3: 176 + shar r0 177 + ashrsi3_2: 178 + shar r0 179 + ashrsi3_1: 180 + rts 181 + shar r0 182 + 183 + ashrsi3_0: 184 + rts 185 + nop

+26

arch/sh/lib/libgcc.h

··· 1 + #ifndef __ASM_LIBGCC_H 2 + #define __ASM_LIBGCC_H 3 + 4 + #include <asm/byteorder.h> 5 + 6 + typedef int word_type __attribute__ ((mode (__word__))); 7 + 8 + #ifdef __BIG_ENDIAN 9 + struct DWstruct { 10 + int high, low; 11 + }; 12 + #elif defined(__LITTLE_ENDIAN) 13 + struct DWstruct { 14 + int low, high; 15 + }; 16 + #else 17 + #error I feel sick. 18 + #endif 19 + 20 + typedef union 21 + { 22 + struct DWstruct s; 23 + long long ll; 24 + } DWunion; 25 + 26 + #endif /* __ASM_LIBGCC_H */

+29

arch/sh/lib/lshrdi3.c

··· 1 + #include <linux/module.h> 2 + 3 + #include "libgcc.h" 4 + 5 + long long __lshrdi3(long long u, word_type b) 6 + { 7 + DWunion uu, w; 8 + word_type bm; 9 + 10 + if (b == 0) 11 + return u; 12 + 13 + uu.ll = u; 14 + bm = 32 - b; 15 + 16 + if (bm <= 0) { 17 + w.s.high = 0; 18 + w.s.low = (unsigned int) uu.s.high >> -bm; 19 + } else { 20 + const unsigned int carries = (unsigned int) uu.s.high << bm; 21 + 22 + w.s.high = (unsigned int) uu.s.high >> b; 23 + w.s.low = ((unsigned int) uu.s.low >> b) | carries; 24 + } 25 + 26 + return w.ll; 27 + } 28 + 29 + EXPORT_SYMBOL(__lshrdi3);

+193

arch/sh/lib/lshrsi3.S

··· 1 + /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2 + 2004, 2005, 2006 3 + Free Software Foundation, Inc. 4 + 5 + This file is free software; you can redistribute it and/or modify it 6 + under the terms of the GNU General Public License as published by the 7 + Free Software Foundation; either version 2, or (at your option) any 8 + later version. 9 + 10 + In addition to the permissions in the GNU General Public License, the 11 + Free Software Foundation gives you unlimited permission to link the 12 + compiled version of this file into combinations with other programs, 13 + and to distribute those combinations without any restriction coming 14 + from the use of this file. (The General Public License restrictions 15 + do apply in other respects; for example, they cover modification of 16 + the file, and distribution when not linked into a combine 17 + executable.) 18 + 19 + This file is distributed in the hope that it will be useful, but 20 + WITHOUT ANY WARRANTY; without even the implied warranty of 21 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 + General Public License for more details. 23 + 24 + You should have received a copy of the GNU General Public License 25 + along with this program; see the file COPYING. If not, write to 26 + the Free Software Foundation, 51 Franklin Street, Fifth Floor, 27 + Boston, MA 02110-1301, USA. */ 28 + 29 + !! libgcc routines for the Renesas / SuperH SH CPUs. 30 + !! Contributed by Steve Chamberlain. 31 + !! sac@cygnus.com 32 + 33 + !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines 34 + !! recoded in assembly by Toshiyasu Morita 35 + !! tm@netcom.com 36 + 37 + /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and 38 + ELF local label prefixes by J"orn Rennecke 39 + amylaar@cygnus.com */ 40 + 41 + ! 42 + ! __lshrsi3 43 + ! 44 + ! Entry: 45 + ! 46 + ! r4: Value to shift 47 + ! r5: Shifts 48 + ! 49 + ! Exit: 50 + ! 51 + ! r0: Result 52 + ! 53 + ! Destroys: 54 + ! 55 + ! (none) 56 + ! 57 + .global __lshrsi3 58 + 59 + .align 2 60 + __lshrsi3: 61 + mov #31,r0 62 + and r0,r5 63 + mova lshrsi3_table,r0 64 + mov.b @(r0,r5),r5 65 + #ifdef __sh1__ 66 + add r5,r0 67 + jmp @r0 68 + #else 69 + braf r5 70 + #endif 71 + mov r4,r0 72 + 73 + .align 2 74 + lshrsi3_table: 75 + .byte lshrsi3_0-lshrsi3_table 76 + .byte lshrsi3_1-lshrsi3_table 77 + .byte lshrsi3_2-lshrsi3_table 78 + .byte lshrsi3_3-lshrsi3_table 79 + .byte lshrsi3_4-lshrsi3_table 80 + .byte lshrsi3_5-lshrsi3_table 81 + .byte lshrsi3_6-lshrsi3_table 82 + .byte lshrsi3_7-lshrsi3_table 83 + .byte lshrsi3_8-lshrsi3_table 84 + .byte lshrsi3_9-lshrsi3_table 85 + .byte lshrsi3_10-lshrsi3_table 86 + .byte lshrsi3_11-lshrsi3_table 87 + .byte lshrsi3_12-lshrsi3_table 88 + .byte lshrsi3_13-lshrsi3_table 89 + .byte lshrsi3_14-lshrsi3_table 90 + .byte lshrsi3_15-lshrsi3_table 91 + .byte lshrsi3_16-lshrsi3_table 92 + .byte lshrsi3_17-lshrsi3_table 93 + .byte lshrsi3_18-lshrsi3_table 94 + .byte lshrsi3_19-lshrsi3_table 95 + .byte lshrsi3_20-lshrsi3_table 96 + .byte lshrsi3_21-lshrsi3_table 97 + .byte lshrsi3_22-lshrsi3_table 98 + .byte lshrsi3_23-lshrsi3_table 99 + .byte lshrsi3_24-lshrsi3_table 100 + .byte lshrsi3_25-lshrsi3_table 101 + .byte lshrsi3_26-lshrsi3_table 102 + .byte lshrsi3_27-lshrsi3_table 103 + .byte lshrsi3_28-lshrsi3_table 104 + .byte lshrsi3_29-lshrsi3_table 105 + .byte lshrsi3_30-lshrsi3_table 106 + .byte lshrsi3_31-lshrsi3_table 107 + 108 + lshrsi3_6: 109 + shlr2 r0 110 + lshrsi3_4: 111 + shlr2 r0 112 + lshrsi3_2: 113 + rts 114 + shlr2 r0 115 + 116 + lshrsi3_7: 117 + shlr2 r0 118 + lshrsi3_5: 119 + shlr2 r0 120 + lshrsi3_3: 121 + shlr2 r0 122 + lshrsi3_1: 123 + rts 124 + shlr r0 125 + 126 + lshrsi3_14: 127 + shlr2 r0 128 + lshrsi3_12: 129 + shlr2 r0 130 + lshrsi3_10: 131 + shlr2 r0 132 + lshrsi3_8: 133 + rts 134 + shlr8 r0 135 + 136 + lshrsi3_15: 137 + shlr2 r0 138 + lshrsi3_13: 139 + shlr2 r0 140 + lshrsi3_11: 141 + shlr2 r0 142 + lshrsi3_9: 143 + shlr8 r0 144 + rts 145 + shlr r0 146 + 147 + lshrsi3_22: 148 + shlr2 r0 149 + lshrsi3_20: 150 + shlr2 r0 151 + lshrsi3_18: 152 + shlr2 r0 153 + lshrsi3_16: 154 + rts 155 + shlr16 r0 156 + 157 + lshrsi3_23: 158 + shlr2 r0 159 + lshrsi3_21: 160 + shlr2 r0 161 + lshrsi3_19: 162 + shlr2 r0 163 + lshrsi3_17: 164 + shlr16 r0 165 + rts 166 + shlr r0 167 + 168 + lshrsi3_30: 169 + shlr2 r0 170 + lshrsi3_28: 171 + shlr2 r0 172 + lshrsi3_26: 173 + shlr2 r0 174 + lshrsi3_24: 175 + shlr16 r0 176 + rts 177 + shlr8 r0 178 + 179 + lshrsi3_31: 180 + shlr2 r0 181 + lshrsi3_29: 182 + shlr2 r0 183 + lshrsi3_27: 184 + shlr2 r0 185 + lshrsi3_25: 186 + shlr16 r0 187 + shlr8 r0 188 + rts 189 + shlr r0 190 + 191 + lshrsi3_0: 192 + rts 193 + nop

+238

arch/sh/lib/movmem.S

··· 1 + /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2 + 2004, 2005, 2006 3 + Free Software Foundation, Inc. 4 + 5 + This file is free software; you can redistribute it and/or modify it 6 + under the terms of the GNU General Public License as published by the 7 + Free Software Foundation; either version 2, or (at your option) any 8 + later version. 9 + 10 + In addition to the permissions in the GNU General Public License, the 11 + Free Software Foundation gives you unlimited permission to link the 12 + compiled version of this file into combinations with other programs, 13 + and to distribute those combinations without any restriction coming 14 + from the use of this file. (The General Public License restrictions 15 + do apply in other respects; for example, they cover modification of 16 + the file, and distribution when not linked into a combine 17 + executable.) 18 + 19 + This file is distributed in the hope that it will be useful, but 20 + WITHOUT ANY WARRANTY; without even the implied warranty of 21 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 + General Public License for more details. 23 + 24 + You should have received a copy of the GNU General Public License 25 + along with this program; see the file COPYING. If not, write to 26 + the Free Software Foundation, 51 Franklin Street, Fifth Floor, 27 + Boston, MA 02110-1301, USA. */ 28 + 29 + !! libgcc routines for the Renesas / SuperH SH CPUs. 30 + !! Contributed by Steve Chamberlain. 31 + !! sac@cygnus.com 32 + 33 + !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines 34 + !! recoded in assembly by Toshiyasu Morita 35 + !! tm@netcom.com 36 + 37 + /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and 38 + ELF local label prefixes by J"orn Rennecke 39 + amylaar@cygnus.com */ 40 + 41 + .text 42 + .balign 4 43 + .global __movmem 44 + .global __movstr 45 + .set __movstr, __movmem 46 + /* This would be a lot simpler if r6 contained the byte count 47 + minus 64, and we wouldn't be called here for a byte count of 64. */ 48 + __movmem: 49 + sts.l pr,@-r15 50 + shll2 r6 51 + bsr __movmemSI52+2 52 + mov.l @(48,r5),r0 53 + .balign 4 54 + movmem_loop: /* Reached with rts */ 55 + mov.l @(60,r5),r0 56 + add #-64,r6 57 + mov.l r0,@(60,r4) 58 + tst r6,r6 59 + mov.l @(56,r5),r0 60 + bt movmem_done 61 + mov.l r0,@(56,r4) 62 + cmp/pl r6 63 + mov.l @(52,r5),r0 64 + add #64,r5 65 + mov.l r0,@(52,r4) 66 + add #64,r4 67 + bt __movmemSI52 68 + ! done all the large groups, do the remainder 69 + ! jump to movmem+ 70 + mova __movmemSI4+4,r0 71 + add r6,r0 72 + jmp @r0 73 + movmem_done: ! share slot insn, works out aligned. 74 + lds.l @r15+,pr 75 + mov.l r0,@(56,r4) 76 + mov.l @(52,r5),r0 77 + rts 78 + mov.l r0,@(52,r4) 79 + .balign 4 80 + 81 + .global __movmemSI64 82 + .global __movstrSI64 83 + .set __movstrSI64, __movmemSI64 84 + __movmemSI64: 85 + mov.l @(60,r5),r0 86 + mov.l r0,@(60,r4) 87 + .global __movmemSI60 88 + .global __movstrSI60 89 + .set __movstrSI60, __movmemSI60 90 + __movmemSI60: 91 + mov.l @(56,r5),r0 92 + mov.l r0,@(56,r4) 93 + .global __movmemSI56 94 + .global __movstrSI56 95 + .set __movstrSI56, __movmemSI56 96 + __movmemSI56: 97 + mov.l @(52,r5),r0 98 + mov.l r0,@(52,r4) 99 + .global __movmemSI52 100 + .global __movstrSI52 101 + .set __movstrSI52, __movmemSI52 102 + __movmemSI52: 103 + mov.l @(48,r5),r0 104 + mov.l r0,@(48,r4) 105 + .global __movmemSI48 106 + .global __movstrSI48 107 + .set __movstrSI48, __movmemSI48 108 + __movmemSI48: 109 + mov.l @(44,r5),r0 110 + mov.l r0,@(44,r4) 111 + .global __movmemSI44 112 + .global __movstrSI44 113 + .set __movstrSI44, __movmemSI44 114 + __movmemSI44: 115 + mov.l @(40,r5),r0 116 + mov.l r0,@(40,r4) 117 + .global __movmemSI40 118 + .global __movstrSI40 119 + .set __movstrSI40, __movmemSI40 120 + __movmemSI40: 121 + mov.l @(36,r5),r0 122 + mov.l r0,@(36,r4) 123 + .global __movmemSI36 124 + .global __movstrSI36 125 + .set __movstrSI36, __movmemSI36 126 + __movmemSI36: 127 + mov.l @(32,r5),r0 128 + mov.l r0,@(32,r4) 129 + .global __movmemSI32 130 + .global __movstrSI32 131 + .set __movstrSI32, __movmemSI32 132 + __movmemSI32: 133 + mov.l @(28,r5),r0 134 + mov.l r0,@(28,r4) 135 + .global __movmemSI28 136 + .global __movstrSI28 137 + .set __movstrSI28, __movmemSI28 138 + __movmemSI28: 139 + mov.l @(24,r5),r0 140 + mov.l r0,@(24,r4) 141 + .global __movmemSI24 142 + .global __movstrSI24 143 + .set __movstrSI24, __movmemSI24 144 + __movmemSI24: 145 + mov.l @(20,r5),r0 146 + mov.l r0,@(20,r4) 147 + .global __movmemSI20 148 + .global __movstrSI20 149 + .set __movstrSI20, __movmemSI20 150 + __movmemSI20: 151 + mov.l @(16,r5),r0 152 + mov.l r0,@(16,r4) 153 + .global __movmemSI16 154 + .global __movstrSI16 155 + .set __movstrSI16, __movmemSI16 156 + __movmemSI16: 157 + mov.l @(12,r5),r0 158 + mov.l r0,@(12,r4) 159 + .global __movmemSI12 160 + .global __movstrSI12 161 + .set __movstrSI12, __movmemSI12 162 + __movmemSI12: 163 + mov.l @(8,r5),r0 164 + mov.l r0,@(8,r4) 165 + .global __movmemSI8 166 + .global __movstrSI8 167 + .set __movstrSI8, __movmemSI8 168 + __movmemSI8: 169 + mov.l @(4,r5),r0 170 + mov.l r0,@(4,r4) 171 + .global __movmemSI4 172 + .global __movstrSI4 173 + .set __movstrSI4, __movmemSI4 174 + __movmemSI4: 175 + mov.l @(0,r5),r0 176 + rts 177 + mov.l r0,@(0,r4) 178 + 179 + .global __movmem_i4_even 180 + .global __movstr_i4_even 181 + .set __movstr_i4_even, __movmem_i4_even 182 + 183 + .global __movmem_i4_odd 184 + .global __movstr_i4_odd 185 + .set __movstr_i4_odd, __movmem_i4_odd 186 + 187 + .global __movmemSI12_i4 188 + .global __movstrSI12_i4 189 + .set __movstrSI12_i4, __movmemSI12_i4 190 + 191 + .p2align 5 192 + L_movmem_2mod4_end: 193 + mov.l r0,@(16,r4) 194 + rts 195 + mov.l r1,@(20,r4) 196 + 197 + .p2align 2 198 + 199 + __movmem_i4_even: 200 + mov.l @r5+,r0 201 + bra L_movmem_start_even 202 + mov.l @r5+,r1 203 + 204 + __movmem_i4_odd: 205 + mov.l @r5+,r1 206 + add #-4,r4 207 + mov.l @r5+,r2 208 + mov.l @r5+,r3 209 + mov.l r1,@(4,r4) 210 + mov.l r2,@(8,r4) 211 + 212 + L_movmem_loop: 213 + mov.l r3,@(12,r4) 214 + dt r6 215 + mov.l @r5+,r0 216 + bt/s L_movmem_2mod4_end 217 + mov.l @r5+,r1 218 + add #16,r4 219 + L_movmem_start_even: 220 + mov.l @r5+,r2 221 + mov.l @r5+,r3 222 + mov.l r0,@r4 223 + dt r6 224 + mov.l r1,@(4,r4) 225 + bf/s L_movmem_loop 226 + mov.l r2,@(8,r4) 227 + rts 228 + mov.l r3,@(12,r4) 229 + 230 + .p2align 4 231 + __movmemSI12_i4: 232 + mov.l @r5,r0 233 + mov.l @(4,r5),r1 234 + mov.l @(8,r5),r2 235 + mov.l r0,@r4 236 + mov.l r1,@(4,r4) 237 + rts 238 + mov.l r2,@(8,r4)

+81

arch/sh/lib/udiv_qrnnd.S

··· 1 + /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2 + 2004, 2005, 2006 3 + Free Software Foundation, Inc. 4 + 5 + This file is free software; you can redistribute it and/or modify it 6 + under the terms of the GNU General Public License as published by the 7 + Free Software Foundation; either version 2, or (at your option) any 8 + later version. 9 + 10 + In addition to the permissions in the GNU General Public License, the 11 + Free Software Foundation gives you unlimited permission to link the 12 + compiled version of this file into combinations with other programs, 13 + and to distribute those combinations without any restriction coming 14 + from the use of this file. (The General Public License restrictions 15 + do apply in other respects; for example, they cover modification of 16 + the file, and distribution when not linked into a combine 17 + executable.) 18 + 19 + This file is distributed in the hope that it will be useful, but 20 + WITHOUT ANY WARRANTY; without even the implied warranty of 21 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 + General Public License for more details. 23 + 24 + You should have received a copy of the GNU General Public License 25 + along with this program; see the file COPYING. If not, write to 26 + the Free Software Foundation, 51 Franklin Street, Fifth Floor, 27 + Boston, MA 02110-1301, USA. */ 28 + 29 + !! libgcc routines for the Renesas / SuperH SH CPUs. 30 + !! Contributed by Steve Chamberlain. 31 + !! sac@cygnus.com 32 + 33 + !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines 34 + !! recoded in assembly by Toshiyasu Morita 35 + !! tm@netcom.com 36 + 37 + /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and 38 + ELF local label prefixes by J"orn Rennecke 39 + amylaar@cygnus.com */ 40 + 41 + /* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */ 42 + /* n1 < d, but n1 might be larger than d1. */ 43 + .global __udiv_qrnnd_16 44 + .balign 8 45 + __udiv_qrnnd_16: 46 + div0u 47 + cmp/hi r6,r0 48 + bt .Lots 49 + .rept 16 50 + div1 r6,r0 51 + .endr 52 + extu.w r0,r1 53 + bt 0f 54 + add r6,r0 55 + 0: rotcl r1 56 + mulu.w r1,r5 57 + xtrct r4,r0 58 + swap.w r0,r0 59 + sts macl,r2 60 + cmp/hs r2,r0 61 + sub r2,r0 62 + bt 0f 63 + addc r5,r0 64 + add #-1,r1 65 + bt 0f 66 + 1: add #-1,r1 67 + rts 68 + add r5,r0 69 + .balign 8 70 + .Lots: 71 + sub r5,r0 72 + swap.w r4,r1 73 + xtrct r0,r1 74 + clrt 75 + mov r1,r0 76 + addc r5,r0 77 + mov #-1,r1 78 + bf/s 1b 79 + shlr16 r1 80 + 0: rts 81 + nop

+147

arch/sh/lib/udivsi3-Os.S

··· 1 + /* Copyright (C) 2006 Free Software Foundation, Inc. 2 + 3 + This file is free software; you can redistribute it and/or modify it 4 + under the terms of the GNU General Public License as published by the 5 + Free Software Foundation; either version 2, or (at your option) any 6 + later version. 7 + 8 + In addition to the permissions in the GNU General Public License, the 9 + Free Software Foundation gives you unlimited permission to link the 10 + compiled version of this file into combinations with other programs, 11 + and to distribute those combinations without any restriction coming 12 + from the use of this file. (The General Public License restrictions 13 + do apply in other respects; for example, they cover modification of 14 + the file, and distribution when not linked into a combine 15 + executable.) 16 + 17 + This file is distributed in the hope that it will be useful, but 18 + WITHOUT ANY WARRANTY; without even the implied warranty of 19 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20 + General Public License for more details. 21 + 22 + You should have received a copy of the GNU General Public License 23 + along with this program; see the file COPYING. If not, write to 24 + the Free Software Foundation, 51 Franklin Street, Fifth Floor, 25 + Boston, MA 02110-1301, USA. */ 26 + 27 + /* Moderately Space-optimized libgcc routines for the Renesas SH / 28 + STMicroelectronics ST40 CPUs. 29 + Contributed by J"orn Rennecke joern.rennecke@st.com. */ 30 + 31 + /* Size: 186 bytes jointly for udivsi3_i4i and sdivsi3_i4i 32 + sh4-200 run times: 33 + udiv small divisor: 55 cycles 34 + udiv large divisor: 52 cycles 35 + sdiv small divisor, positive result: 59 cycles 36 + sdiv large divisor, positive result: 56 cycles 37 + sdiv small divisor, negative result: 65 cycles (*) 38 + sdiv large divisor, negative result: 62 cycles (*) 39 + (*): r2 is restored in the rts delay slot and has a lingering latency 40 + of two more cycles. */ 41 + .balign 4 42 + .global __udivsi3_i4i 43 + .global __udivsi3 44 + .set __udivsi3, __udivsi3_i4i 45 + .type __udivsi3_i4i, @function 46 + .type __sdivsi3_i4i, @function 47 + __udivsi3_i4i: 48 + sts pr,r1 49 + mov.l r4,@-r15 50 + extu.w r5,r0 51 + cmp/eq r5,r0 52 + swap.w r4,r0 53 + shlr16 r4 54 + bf/s large_divisor 55 + div0u 56 + mov.l r5,@-r15 57 + shll16 r5 58 + sdiv_small_divisor: 59 + div1 r5,r4 60 + bsr div6 61 + div1 r5,r4 62 + div1 r5,r4 63 + bsr div6 64 + div1 r5,r4 65 + xtrct r4,r0 66 + xtrct r0,r4 67 + bsr div7 68 + swap.w r4,r4 69 + div1 r5,r4 70 + bsr div7 71 + div1 r5,r4 72 + xtrct r4,r0 73 + mov.l @r15+,r5 74 + swap.w r0,r0 75 + mov.l @r15+,r4 76 + jmp @r1 77 + rotcl r0 78 + div7: 79 + div1 r5,r4 80 + div6: 81 + div1 r5,r4; div1 r5,r4; div1 r5,r4 82 + div1 r5,r4; div1 r5,r4; rts; div1 r5,r4 83 + 84 + divx3: 85 + rotcl r0 86 + div1 r5,r4 87 + rotcl r0 88 + div1 r5,r4 89 + rotcl r0 90 + rts 91 + div1 r5,r4 92 + 93 + large_divisor: 94 + mov.l r5,@-r15 95 + sdiv_large_divisor: 96 + xor r4,r0 97 + .rept 4 98 + rotcl r0 99 + bsr divx3 100 + div1 r5,r4 101 + .endr 102 + mov.l @r15+,r5 103 + mov.l @r15+,r4 104 + jmp @r1 105 + rotcl r0 106 + 107 + .global __sdivsi3_i4i 108 + .global __sdivsi3 109 + .set __sdivsi3, __sdivsi3_i4i 110 + __sdivsi3_i4i: 111 + mov.l r4,@-r15 112 + cmp/pz r5 113 + mov.l r5,@-r15 114 + bt/s pos_divisor 115 + cmp/pz r4 116 + neg r5,r5 117 + extu.w r5,r0 118 + bt/s neg_result 119 + cmp/eq r5,r0 120 + neg r4,r4 121 + pos_result: 122 + swap.w r4,r0 123 + bra sdiv_check_divisor 124 + sts pr,r1 125 + pos_divisor: 126 + extu.w r5,r0 127 + bt/s pos_result 128 + cmp/eq r5,r0 129 + neg r4,r4 130 + neg_result: 131 + mova negate_result,r0 132 + ; 133 + mov r0,r1 134 + swap.w r4,r0 135 + lds r2,macl 136 + sts pr,r2 137 + sdiv_check_divisor: 138 + shlr16 r4 139 + bf/s sdiv_large_divisor 140 + div0u 141 + bra sdiv_small_divisor 142 + shll16 r5 143 + .balign 4 144 + negate_result: 145 + neg r0,r0 146 + jmp @r2 147 + sts macl,r2

+664

arch/sh/lib/udivsi3.S

··· 1 + /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2 + 2004, 2005, 2006 3 + Free Software Foundation, Inc. 4 + 5 + This file is free software; you can redistribute it and/or modify it 6 + under the terms of the GNU General Public License as published by the 7 + Free Software Foundation; either version 2, or (at your option) any 8 + later version. 9 + 10 + In addition to the permissions in the GNU General Public License, the 11 + Free Software Foundation gives you unlimited permission to link the 12 + compiled version of this file into combinations with other programs, 13 + and to distribute those combinations without any restriction coming 14 + from the use of this file. (The General Public License restrictions 15 + do apply in other respects; for example, they cover modification of 16 + the file, and distribution when not linked into a combine 17 + executable.) 18 + 19 + This file is distributed in the hope that it will be useful, but 20 + WITHOUT ANY WARRANTY; without even the implied warranty of 21 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 + General Public License for more details. 23 + 24 + You should have received a copy of the GNU General Public License 25 + along with this program; see the file COPYING. If not, write to 26 + the Free Software Foundation, 51 Franklin Street, Fifth Floor, 27 + Boston, MA 02110-1301, USA. */ 28 + 29 + !! libgcc routines for the Renesas / SuperH SH CPUs. 30 + !! Contributed by Steve Chamberlain. 31 + !! sac@cygnus.com 32 + 33 + !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines 34 + !! recoded in assembly by Toshiyasu Morita 35 + !! tm@netcom.com 36 + 37 + /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and 38 + ELF local label prefixes by J"orn Rennecke 39 + amylaar@cygnus.com */ 40 + 41 + /* This code used shld, thus is not suitable for SH1 / SH2. */ 42 + 43 + /* Signed / unsigned division without use of FPU, optimized for SH4. 44 + Uses a lookup table for divisors in the range -128 .. +128, and 45 + div1 with case distinction for larger divisors in three more ranges. 46 + The code is lumped together with the table to allow the use of mova. */ 47 + #ifdef CONFIG_CPU_LITTLE_ENDIAN 48 + #define L_LSB 0 49 + #define L_LSWMSB 1 50 + #define L_MSWLSB 2 51 + #else 52 + #define L_LSB 3 53 + #define L_LSWMSB 2 54 + #define L_MSWLSB 1 55 + #endif 56 + 57 + .balign 4 58 + .global __udivsi3_i4i 59 + .global __udivsi3 60 + .set __udivsi3, __udivsi3_i4i 61 + .type __udivsi3_i4i, @function 62 + __udivsi3_i4i: 63 + mov.w c128_w, r1 64 + div0u 65 + mov r4,r0 66 + shlr8 r0 67 + cmp/hi r1,r5 68 + extu.w r5,r1 69 + bf udiv_le128 70 + cmp/eq r5,r1 71 + bf udiv_ge64k 72 + shlr r0 73 + mov r5,r1 74 + shll16 r5 75 + mov.l r4,@-r15 76 + div1 r5,r0 77 + mov.l r1,@-r15 78 + div1 r5,r0 79 + div1 r5,r0 80 + bra udiv_25 81 + div1 r5,r0 82 + 83 + div_le128: 84 + mova div_table_ix,r0 85 + bra div_le128_2 86 + mov.b @(r0,r5),r1 87 + udiv_le128: 88 + mov.l r4,@-r15 89 + mova div_table_ix,r0 90 + mov.b @(r0,r5),r1 91 + mov.l r5,@-r15 92 + div_le128_2: 93 + mova div_table_inv,r0 94 + mov.l @(r0,r1),r1 95 + mov r5,r0 96 + tst #0xfe,r0 97 + mova div_table_clz,r0 98 + dmulu.l r1,r4 99 + mov.b @(r0,r5),r1 100 + bt/s div_by_1 101 + mov r4,r0 102 + mov.l @r15+,r5 103 + sts mach,r0 104 + /* clrt */ 105 + addc r4,r0 106 + mov.l @r15+,r4 107 + rotcr r0 108 + rts 109 + shld r1,r0 110 + 111 + div_by_1_neg: 112 + neg r4,r0 113 + div_by_1: 114 + mov.l @r15+,r5 115 + rts 116 + mov.l @r15+,r4 117 + 118 + div_ge64k: 119 + bt/s div_r8 120 + div0u 121 + shll8 r5 122 + bra div_ge64k_2 123 + div1 r5,r0 124 + udiv_ge64k: 125 + cmp/hi r0,r5 126 + mov r5,r1 127 + bt udiv_r8 128 + shll8 r5 129 + mov.l r4,@-r15 130 + div1 r5,r0 131 + mov.l r1,@-r15 132 + div_ge64k_2: 133 + div1 r5,r0 134 + mov.l zero_l,r1 135 + .rept 4 136 + div1 r5,r0 137 + .endr 138 + mov.l r1,@-r15 139 + div1 r5,r0 140 + mov.w m256_w,r1 141 + div1 r5,r0 142 + mov.b r0,@(L_LSWMSB,r15) 143 + xor r4,r0 144 + and r1,r0 145 + bra div_ge64k_end 146 + xor r4,r0 147 + 148 + div_r8: 149 + shll16 r4 150 + bra div_r8_2 151 + shll8 r4 152 + udiv_r8: 153 + mov.l r4,@-r15 154 + shll16 r4 155 + clrt 156 + shll8 r4 157 + mov.l r5,@-r15 158 + div_r8_2: 159 + rotcl r4 160 + mov r0,r1 161 + div1 r5,r1 162 + mov r4,r0 163 + rotcl r0 164 + mov r5,r4 165 + div1 r5,r1 166 + .rept 5 167 + rotcl r0; div1 r5,r1 168 + .endr 169 + rotcl r0 170 + mov.l @r15+,r5 171 + div1 r4,r1 172 + mov.l @r15+,r4 173 + rts 174 + rotcl r0 175 + 176 + .global __sdivsi3_i4i 177 + .global __sdivsi3 178 + .set __sdivsi3, __sdivsi3_i4i 179 + .type __sdivsi3_i4i, @function 180 + /* This is link-compatible with a __sdivsi3 call, 181 + but we effectively clobber only r1. */ 182 + __sdivsi3_i4i: 183 + mov.l r4,@-r15 184 + cmp/pz r5 185 + mov.w c128_w, r1 186 + bt/s pos_divisor 187 + cmp/pz r4 188 + mov.l r5,@-r15 189 + neg r5,r5 190 + bt/s neg_result 191 + cmp/hi r1,r5 192 + neg r4,r4 193 + pos_result: 194 + extu.w r5,r0 195 + bf div_le128 196 + cmp/eq r5,r0 197 + mov r4,r0 198 + shlr8 r0 199 + bf/s div_ge64k 200 + cmp/hi r0,r5 201 + div0u 202 + shll16 r5 203 + div1 r5,r0 204 + div1 r5,r0 205 + div1 r5,r0 206 + udiv_25: 207 + mov.l zero_l,r1 208 + div1 r5,r0 209 + div1 r5,r0 210 + mov.l r1,@-r15 211 + .rept 3 212 + div1 r5,r0 213 + .endr 214 + mov.b r0,@(L_MSWLSB,r15) 215 + xtrct r4,r0 216 + swap.w r0,r0 217 + .rept 8 218 + div1 r5,r0 219 + .endr 220 + mov.b r0,@(L_LSWMSB,r15) 221 + div_ge64k_end: 222 + .rept 8 223 + div1 r5,r0 224 + .endr 225 + mov.l @r15+,r4 ! zero-extension and swap using LS unit. 226 + extu.b r0,r0 227 + mov.l @r15+,r5 228 + or r4,r0 229 + mov.l @r15+,r4 230 + rts 231 + rotcl r0 232 + 233 + div_le128_neg: 234 + tst #0xfe,r0 235 + mova div_table_ix,r0 236 + mov.b @(r0,r5),r1 237 + mova div_table_inv,r0 238 + bt/s div_by_1_neg 239 + mov.l @(r0,r1),r1 240 + mova div_table_clz,r0 241 + dmulu.l r1,r4 242 + mov.b @(r0,r5),r1 243 + mov.l @r15+,r5 244 + sts mach,r0 245 + /* clrt */ 246 + addc r4,r0 247 + mov.l @r15+,r4 248 + rotcr r0 249 + shld r1,r0 250 + rts 251 + neg r0,r0 252 + 253 + pos_divisor: 254 + mov.l r5,@-r15 255 + bt/s pos_result 256 + cmp/hi r1,r5 257 + neg r4,r4 258 + neg_result: 259 + extu.w r5,r0 260 + bf div_le128_neg 261 + cmp/eq r5,r0 262 + mov r4,r0 263 + shlr8 r0 264 + bf/s div_ge64k_neg 265 + cmp/hi r0,r5 266 + div0u 267 + mov.l zero_l,r1 268 + shll16 r5 269 + div1 r5,r0 270 + mov.l r1,@-r15 271 + .rept 7 272 + div1 r5,r0 273 + .endr 274 + mov.b r0,@(L_MSWLSB,r15) 275 + xtrct r4,r0 276 + swap.w r0,r0 277 + .rept 8 278 + div1 r5,r0 279 + .endr 280 + mov.b r0,@(L_LSWMSB,r15) 281 + div_ge64k_neg_end: 282 + .rept 8 283 + div1 r5,r0 284 + .endr 285 + mov.l @r15+,r4 ! zero-extension and swap using LS unit. 286 + extu.b r0,r1 287 + mov.l @r15+,r5 288 + or r4,r1 289 + div_r8_neg_end: 290 + mov.l @r15+,r4 291 + rotcl r1 292 + rts 293 + neg r1,r0 294 + 295 + div_ge64k_neg: 296 + bt/s div_r8_neg 297 + div0u 298 + shll8 r5 299 + mov.l zero_l,r1 300 + .rept 6 301 + div1 r5,r0 302 + .endr 303 + mov.l r1,@-r15 304 + div1 r5,r0 305 + mov.w m256_w,r1 306 + div1 r5,r0 307 + mov.b r0,@(L_LSWMSB,r15) 308 + xor r4,r0 309 + and r1,r0 310 + bra div_ge64k_neg_end 311 + xor r4,r0 312 + 313 + c128_w: 314 + .word 128 315 + 316 + div_r8_neg: 317 + clrt 318 + shll16 r4 319 + mov r4,r1 320 + shll8 r1 321 + mov r5,r4 322 + .rept 7 323 + rotcl r1; div1 r5,r0 324 + .endr 325 + mov.l @r15+,r5 326 + rotcl r1 327 + bra div_r8_neg_end 328 + div1 r4,r0 329 + 330 + m256_w: 331 + .word 0xff00 332 + /* This table has been generated by divtab-sh4.c. */ 333 + .balign 4 334 + div_table_clz: 335 + .byte 0 336 + .byte 1 337 + .byte 0 338 + .byte -1 339 + .byte -1 340 + .byte -2 341 + .byte -2 342 + .byte -2 343 + .byte -2 344 + .byte -3 345 + .byte -3 346 + .byte -3 347 + .byte -3 348 + .byte -3 349 + .byte -3 350 + .byte -3 351 + .byte -3 352 + .byte -4 353 + .byte -4 354 + .byte -4 355 + .byte -4 356 + .byte -4 357 + .byte -4 358 + .byte -4 359 + .byte -4 360 + .byte -4 361 + .byte -4 362 + .byte -4 363 + .byte -4 364 + .byte -4 365 + .byte -4 366 + .byte -4 367 + .byte -4 368 + .byte -5 369 + .byte -5 370 + .byte -5 371 + .byte -5 372 + .byte -5 373 + .byte -5 374 + .byte -5 375 + .byte -5 376 + .byte -5 377 + .byte -5 378 + .byte -5 379 + .byte -5 380 + .byte -5 381 + .byte -5 382 + .byte -5 383 + .byte -5 384 + .byte -5 385 + .byte -5 386 + .byte -5 387 + .byte -5 388 + .byte -5 389 + .byte -5 390 + .byte -5 391 + .byte -5 392 + .byte -5 393 + .byte -5 394 + .byte -5 395 + .byte -5 396 + .byte -5 397 + .byte -5 398 + .byte -5 399 + .byte -5 400 + .byte -6 401 + .byte -6 402 + .byte -6 403 + .byte -6 404 + .byte -6 405 + .byte -6 406 + .byte -6 407 + .byte -6 408 + .byte -6 409 + .byte -6 410 + .byte -6 411 + .byte -6 412 + .byte -6 413 + .byte -6 414 + .byte -6 415 + .byte -6 416 + .byte -6 417 + .byte -6 418 + .byte -6 419 + .byte -6 420 + .byte -6 421 + .byte -6 422 + .byte -6 423 + .byte -6 424 + .byte -6 425 + .byte -6 426 + .byte -6 427 + .byte -6 428 + .byte -6 429 + .byte -6 430 + .byte -6 431 + .byte -6 432 + .byte -6 433 + .byte -6 434 + .byte -6 435 + .byte -6 436 + .byte -6 437 + .byte -6 438 + .byte -6 439 + .byte -6 440 + .byte -6 441 + .byte -6 442 + .byte -6 443 + .byte -6 444 + .byte -6 445 + .byte -6 446 + .byte -6 447 + .byte -6 448 + .byte -6 449 + .byte -6 450 + .byte -6 451 + .byte -6 452 + .byte -6 453 + .byte -6 454 + .byte -6 455 + .byte -6 456 + .byte -6 457 + .byte -6 458 + .byte -6 459 + .byte -6 460 + .byte -6 461 + .byte -6 462 + .byte -6 463 + /* Lookup table translating positive divisor to index into table of 464 + normalized inverse. N.B. the '0' entry is also the last entry of the 465 + previous table, and causes an unaligned access for division by zero. */ 466 + div_table_ix: 467 + .byte -6 468 + .byte -128 469 + .byte -128 470 + .byte 0 471 + .byte -128 472 + .byte -64 473 + .byte 0 474 + .byte 64 475 + .byte -128 476 + .byte -96 477 + .byte -64 478 + .byte -32 479 + .byte 0 480 + .byte 32 481 + .byte 64 482 + .byte 96 483 + .byte -128 484 + .byte -112 485 + .byte -96 486 + .byte -80 487 + .byte -64 488 + .byte -48 489 + .byte -32 490 + .byte -16 491 + .byte 0 492 + .byte 16 493 + .byte 32 494 + .byte 48 495 + .byte 64 496 + .byte 80 497 + .byte 96 498 + .byte 112 499 + .byte -128 500 + .byte -120 501 + .byte -112 502 + .byte -104 503 + .byte -96 504 + .byte -88 505 + .byte -80 506 + .byte -72 507 + .byte -64 508 + .byte -56 509 + .byte -48 510 + .byte -40 511 + .byte -32 512 + .byte -24 513 + .byte -16 514 + .byte -8 515 + .byte 0 516 + .byte 8 517 + .byte 16 518 + .byte 24 519 + .byte 32 520 + .byte 40 521 + .byte 48 522 + .byte 56 523 + .byte 64 524 + .byte 72 525 + .byte 80 526 + .byte 88 527 + .byte 96 528 + .byte 104 529 + .byte 112 530 + .byte 120 531 + .byte -128 532 + .byte -124 533 + .byte -120 534 + .byte -116 535 + .byte -112 536 + .byte -108 537 + .byte -104 538 + .byte -100 539 + .byte -96 540 + .byte -92 541 + .byte -88 542 + .byte -84 543 + .byte -80 544 + .byte -76 545 + .byte -72 546 + .byte -68 547 + .byte -64 548 + .byte -60 549 + .byte -56 550 + .byte -52 551 + .byte -48 552 + .byte -44 553 + .byte -40 554 + .byte -36 555 + .byte -32 556 + .byte -28 557 + .byte -24 558 + .byte -20 559 + .byte -16 560 + .byte -12 561 + .byte -8 562 + .byte -4 563 + .byte 0 564 + .byte 4 565 + .byte 8 566 + .byte 12 567 + .byte 16 568 + .byte 20 569 + .byte 24 570 + .byte 28 571 + .byte 32 572 + .byte 36 573 + .byte 40 574 + .byte 44 575 + .byte 48 576 + .byte 52 577 + .byte 56 578 + .byte 60 579 + .byte 64 580 + .byte 68 581 + .byte 72 582 + .byte 76 583 + .byte 80 584 + .byte 84 585 + .byte 88 586 + .byte 92 587 + .byte 96 588 + .byte 100 589 + .byte 104 590 + .byte 108 591 + .byte 112 592 + .byte 116 593 + .byte 120 594 + .byte 124 595 + .byte -128 596 + /* 1/64 .. 1/127, normalized. There is an implicit leading 1 in bit 32. */ 597 + .balign 4 598 + zero_l: 599 + .long 0x0 600 + .long 0xF81F81F9 601 + .long 0xF07C1F08 602 + .long 0xE9131AC0 603 + .long 0xE1E1E1E2 604 + .long 0xDAE6076C 605 + .long 0xD41D41D5 606 + .long 0xCD856891 607 + .long 0xC71C71C8 608 + .long 0xC0E07039 609 + .long 0xBACF914D 610 + .long 0xB4E81B4F 611 + .long 0xAF286BCB 612 + .long 0xA98EF607 613 + .long 0xA41A41A5 614 + .long 0x9EC8E952 615 + .long 0x9999999A 616 + .long 0x948B0FCE 617 + .long 0x8F9C18FA 618 + .long 0x8ACB90F7 619 + .long 0x86186187 620 + .long 0x81818182 621 + .long 0x7D05F418 622 + .long 0x78A4C818 623 + .long 0x745D1746 624 + .long 0x702E05C1 625 + .long 0x6C16C16D 626 + .long 0x68168169 627 + .long 0x642C8591 628 + .long 0x60581606 629 + .long 0x5C9882BA 630 + .long 0x58ED2309 631 + div_table_inv: 632 + .long 0x55555556 633 + .long 0x51D07EAF 634 + .long 0x4E5E0A73 635 + .long 0x4AFD6A06 636 + .long 0x47AE147B 637 + .long 0x446F8657 638 + .long 0x41414142 639 + .long 0x3E22CBCF 640 + .long 0x3B13B13C 641 + .long 0x38138139 642 + .long 0x3521CFB3 643 + .long 0x323E34A3 644 + .long 0x2F684BDB 645 + .long 0x2C9FB4D9 646 + .long 0x29E4129F 647 + .long 0x27350B89 648 + .long 0x24924925 649 + .long 0x21FB7813 650 + .long 0x1F7047DD 651 + .long 0x1CF06ADB 652 + .long 0x1A7B9612 653 + .long 0x18118119 654 + .long 0x15B1E5F8 655 + .long 0x135C8114 656 + .long 0x11111112 657 + .long 0xECF56BF 658 + .long 0xC9714FC 659 + .long 0xA6810A7 660 + .long 0x8421085 661 + .long 0x624DD30 662 + .long 0x4104105 663 + .long 0x2040811 664 + /* maximum error: 0.987342 scaled: 0.921875*/