Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'drm/next/du' of git://linuxtv.org/pinchartl/media into drm-next

rcar-du -next branch.

* 'drm/next/du' of git://linuxtv.org/pinchartl/media:
drm: rcar-du: Fix LVDS start sequence on Gen3
drm: rcar-du: Fix H/V sync signal polarity configuration
drm: rcar-du: Fix display timing controller parameter
drm: rcar-du: Fix dot clock routing configuration
drm: rcar-du: Add R8A7796 support
drm: rcar-du: Add R8A7792 support
drm: rcar-du: Simplify and fix probe error handling
drm: rcar-du: Fix crash in encoder failure error path
drm: rcar-du: Remove memory allocation error message
drm: rcar-du: Remove test for impossible error condition
drm: rcar-du: Bring HDMI encoder comments in line with the driver
drm: rcar-du: Constify node argument to rcar_du_lvds_connector_init()
video: of: Constify node argument to display timing functions

+117 -71
+8 -4
Documentation/devicetree/bindings/display/renesas,du.txt
··· 6 6 - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU 7 7 - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU 8 8 - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU 9 + - "renesas,du-r8a7792" for R8A7792 (R-Car V2H) compatible DU 9 10 - "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU 10 11 - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU 11 12 - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU 13 + - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU 12 14 13 15 - reg: A list of base address and length of each memory resource, one for 14 16 each entry in the reg-names property. ··· 27 25 - clock-names: Name of the clocks. This property is model-dependent. 28 26 - R8A7779 uses a single functional clock. The clock doesn't need to be 29 27 named. 30 - - R8A779[01345] use one functional clock per channel and one clock per LVDS 31 - encoder (if available). The functional clocks must be named "du.x" with 32 - "x" being the channel numerical index. The LVDS clocks must be named 33 - "lvds.x" with "x" being the LVDS encoder numerical index. 28 + - R8A779[0123456] use one functional clock per channel and one clock per 29 + LVDS encoder (if available). The functional clocks must be named "du.x" 30 + with "x" being the channel numerical index. The LVDS clocks must be 31 + named "lvds.x" with "x" being the LVDS encoder numerical index. 34 32 - In addition to the functional and encoder clocks, all DU versions also 35 33 support externally supplied pixel clocks. Those clocks are optional. 36 34 When supplied they must be named "dclkin.x" with "x" being the input ··· 49 47 R8A7779 (H1) DPAD 0 DPAD 1 - - 50 48 R8A7790 (H2) DPAD LVDS 0 LVDS 1 - 51 49 R8A7791 (M2-W) DPAD LVDS 0 - - 50 + R8A7792 (V2H) DPAD 0 DPAD 1 - - 52 51 R8A7793 (M2-N) DPAD LVDS 0 - - 53 52 R8A7794 (E2) DPAD 0 DPAD 1 - - 54 53 R8A7795 (H3) DPAD HDMI 0 HDMI 1 LVDS 54 + R8A7796 (M3-W) DPAD HDMI LVDS - 55 55 56 56 57 57 Example: R8A7790 (R-Car H2) DU
+3 -3
drivers/gpu/drm/rcar-du/rcar_du_crtc.c
··· 149 149 rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? OTAR2 : OTAR, 0); 150 150 151 151 /* Signal polarities */ 152 - value = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : DSMR_VSL) 153 - | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? 0 : DSMR_HSL) 152 + value = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DSMR_VSL : 0) 153 + | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? DSMR_HSL : 0) 154 154 | DSMR_DIPM_DISP | DSMR_CSPM; 155 155 rcar_du_crtc_write(rcrtc, DSMR, value); 156 156 ··· 172 172 mode->crtc_vsync_start - 1); 173 173 rcar_du_crtc_write(rcrtc, VCR, mode->crtc_vtotal - 1); 174 174 175 - rcar_du_crtc_write(rcrtc, DESR, mode->htotal - mode->hsync_start); 175 + rcar_du_crtc_write(rcrtc, DESR, mode->htotal - mode->hsync_start - 1); 176 176 rcar_du_crtc_write(rcrtc, DEWR, mode->hdisplay); 177 177 } 178 178
+57 -26
drivers/gpu/drm/rcar-du/rcar_du_drv.c
··· 110 110 .num_lvds = 1, 111 111 }; 112 112 113 + static const struct rcar_du_device_info rcar_du_r8a7792_info = { 114 + .gen = 2, 115 + .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK 116 + | RCAR_DU_FEATURE_EXT_CTRL_REGS, 117 + .num_crtcs = 2, 118 + .routes = { 119 + /* R8A7792 has two RGB outputs. */ 120 + [RCAR_DU_OUTPUT_DPAD0] = { 121 + .possible_crtcs = BIT(0), 122 + .encoder_type = DRM_MODE_ENCODER_NONE, 123 + .port = 0, 124 + }, 125 + [RCAR_DU_OUTPUT_DPAD1] = { 126 + .possible_crtcs = BIT(1), 127 + .encoder_type = DRM_MODE_ENCODER_NONE, 128 + .port = 1, 129 + }, 130 + }, 131 + .num_lvds = 0, 132 + }; 133 + 113 134 static const struct rcar_du_device_info rcar_du_r8a7794_info = { 114 135 .gen = 2, 115 136 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK ··· 178 157 .num_lvds = 1, 179 158 }; 180 159 160 + static const struct rcar_du_device_info rcar_du_r8a7796_info = { 161 + .gen = 3, 162 + .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK 163 + | RCAR_DU_FEATURE_EXT_CTRL_REGS 164 + | RCAR_DU_FEATURE_VSP1_SOURCE, 165 + .num_crtcs = 3, 166 + .routes = { 167 + /* R8A7796 has one RGB output, one LVDS output and one 168 + * (currently unsupported) HDMI output. 169 + */ 170 + [RCAR_DU_OUTPUT_DPAD0] = { 171 + .possible_crtcs = BIT(2), 172 + .encoder_type = DRM_MODE_ENCODER_NONE, 173 + .port = 0, 174 + }, 175 + [RCAR_DU_OUTPUT_LVDS0] = { 176 + .possible_crtcs = BIT(0), 177 + .encoder_type = DRM_MODE_ENCODER_LVDS, 178 + .port = 2, 179 + }, 180 + }, 181 + .num_lvds = 1, 182 + }; 183 + 181 184 static const struct of_device_id rcar_du_of_table[] = { 182 185 { .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info }, 183 186 { .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info }, 184 187 { .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info }, 188 + { .compatible = "renesas,du-r8a7792", .data = &rcar_du_r8a7792_info }, 185 189 { .compatible = "renesas,du-r8a7793", .data = &rcar_du_r8a7791_info }, 186 190 { .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info }, 187 191 { .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info }, 192 + { .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info }, 188 193 { } 189 194 }; 190 195 ··· 330 283 331 284 drm_kms_helper_poll_fini(ddev); 332 285 drm_mode_config_cleanup(ddev); 333 - drm_vblank_cleanup(ddev); 334 286 335 287 drm_dev_unref(ddev); 336 288 ··· 338 292 339 293 static int rcar_du_probe(struct platform_device *pdev) 340 294 { 341 - struct device_node *np = pdev->dev.of_node; 342 295 struct rcar_du_device *rcdu; 343 296 struct drm_device *ddev; 344 297 struct resource *mem; 345 298 int ret; 346 299 347 - if (np == NULL) { 348 - dev_err(&pdev->dev, "no device tree node\n"); 349 - return -ENODEV; 350 - } 351 - 352 - /* Allocate and initialize the DRM and R-Car device structures. */ 300 + /* Allocate and initialize the R-Car device structure. */ 353 301 rcdu = devm_kzalloc(&pdev->dev, sizeof(*rcdu), GFP_KERNEL); 354 302 if (rcdu == NULL) 355 303 return -ENOMEM; ··· 353 313 rcdu->dev = &pdev->dev; 354 314 rcdu->info = of_match_device(rcar_du_of_table, rcdu->dev)->data; 355 315 316 + platform_set_drvdata(pdev, rcdu); 317 + 318 + /* I/O resources */ 319 + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 320 + rcdu->mmio = devm_ioremap_resource(&pdev->dev, mem); 321 + if (IS_ERR(rcdu->mmio)) 322 + return PTR_ERR(rcdu->mmio); 323 + 324 + /* DRM/KMS objects */ 356 325 ddev = drm_dev_alloc(&rcar_du_driver, &pdev->dev); 357 326 if (IS_ERR(ddev)) 358 327 return PTR_ERR(ddev); ··· 369 320 rcdu->ddev = ddev; 370 321 ddev->dev_private = rcdu; 371 322 372 - platform_set_drvdata(pdev, rcdu); 373 - 374 - /* I/O resources */ 375 - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 376 - rcdu->mmio = devm_ioremap_resource(&pdev->dev, mem); 377 - if (IS_ERR(rcdu->mmio)) { 378 - ret = PTR_ERR(rcdu->mmio); 379 - goto error; 380 - } 381 - 382 - /* Initialize vertical blanking interrupts handling. Start with vblank 383 - * disabled for all CRTCs. 384 - */ 385 - ret = drm_vblank_init(ddev, (1 << rcdu->info->num_crtcs) - 1); 386 - if (ret < 0) 387 - goto error; 388 - 389 - /* DRM/KMS objects */ 390 323 ret = rcar_du_modeset_init(rcdu); 391 324 if (ret < 0) { 392 325 if (ret != -EPROBE_DEFER)
+13 -9
drivers/gpu/drm/rcar-du/rcar_du_group.c
··· 105 105 if (rcar_du_has(rgrp->dev, RCAR_DU_FEATURE_EXT_CTRL_REGS)) { 106 106 rcar_du_group_setup_defr8(rgrp); 107 107 108 - /* Configure input dot clock routing. We currently hardcode the 109 - * configuration to routing DOTCLKINn to DUn. 108 + /* 109 + * Configure input dot clock routing. We currently hardcode the 110 + * configuration to routing DOTCLKINn to DUn. Register fields 111 + * depend on the DU generation, but the resulting value is 0 in 112 + * all cases. 113 + * 114 + * On Gen2 a single register in the first group controls dot 115 + * clock selection for all channels, while on Gen3 dot clocks 116 + * are setup through per-group registers, only available when 117 + * the group has two channels. 110 118 */ 111 - rcar_du_group_write(rgrp, DIDSR, DIDSR_CODE | 112 - DIDSR_LCDS_DCLKIN(2) | 113 - DIDSR_LCDS_DCLKIN(1) | 114 - DIDSR_LCDS_DCLKIN(0) | 115 - DIDSR_PDCS_CLK(2, 0) | 116 - DIDSR_PDCS_CLK(1, 0) | 117 - DIDSR_PDCS_CLK(0, 0)); 119 + if ((rcdu->info->gen < 3 && rgrp->index == 0) || 120 + (rcdu->info->gen == 3 && rgrp->num_crtcs > 1)) 121 + rcar_du_group_write(rgrp, DIDSR, DIDSR_CODE); 118 122 } 119 123 120 124 if (rcdu->info->gen >= 3)
+2 -2
drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c
··· 108 108 if (hdmienc == NULL) 109 109 return -ENOMEM; 110 110 111 - /* Locate drm bridge from the hdmi encoder DT node */ 111 + /* Locate the DRM bridge from the HDMI encoder DT node. */ 112 112 bridge = of_drm_find_bridge(np); 113 113 if (!bridge) 114 114 return -EPROBE_DEFER; ··· 123 123 renc->hdmi = hdmienc; 124 124 hdmienc->renc = renc; 125 125 126 - /* Link drm_bridge to encoder */ 126 + /* Link the bridge to the encoder. */ 127 127 bridge->encoder = encoder; 128 128 encoder->bridge = bridge; 129 129
+12 -5
drivers/gpu/drm/rcar-du/rcar_du_kms.c
··· 454 454 } 455 455 456 456 ret = rcar_du_encoder_init(rcdu, enc_type, output, encoder, connector); 457 - of_node_put(encoder); 458 - of_node_put(connector); 459 - 460 457 if (ret && ret != -EPROBE_DEFER) 461 458 dev_warn(rcdu->dev, 462 - "failed to initialize encoder %s (%d), skipping\n", 463 - encoder->full_name, ret); 459 + "failed to initialize encoder %s on output %u (%d), skipping\n", 460 + of_node_full_name(encoder), output, ret); 461 + 462 + of_node_put(encoder); 463 + of_node_put(connector); 464 464 465 465 return ret; 466 466 } ··· 565 565 rcdu->num_crtcs = rcdu->info->num_crtcs; 566 566 567 567 ret = rcar_du_properties_init(rcdu); 568 + if (ret < 0) 569 + return ret; 570 + 571 + /* Initialize vertical blanking interrupts handling. Start with vblank 572 + * disabled for all CRTCs. 573 + */ 574 + ret = drm_vblank_init(dev, (1 << rcdu->info->num_crtcs) - 1); 568 575 if (ret < 0) 569 576 return ret; 570 577
+1 -1
drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
··· 79 79 80 80 int rcar_du_lvds_connector_init(struct rcar_du_device *rcdu, 81 81 struct rcar_du_encoder *renc, 82 - /* TODO const */ struct device_node *np) 82 + const struct device_node *np) 83 83 { 84 84 struct drm_encoder *encoder = rcar_encoder_to_drm_encoder(renc); 85 85 struct rcar_du_lvds_connector *lvdscon;
+1 -1
drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h
··· 19 19 20 20 int rcar_du_lvds_connector_init(struct rcar_du_device *rcdu, 21 21 struct rcar_du_encoder *renc, 22 - struct device_node *np); 22 + const struct device_node *np); 23 23 24 24 #endif /* __RCAR_DU_LVDSCON_H__ */
+9 -10
drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
··· 104 104 105 105 rcar_lvds_write(lvds, LVDPLLCR, pllcr); 106 106 107 - /* Turn the PLL on, set it to LVDS normal mode, wait for the startup 107 + /* Turn all the channels on. */ 108 + rcar_lvds_write(lvds, LVDCR1, 109 + LVDCR1_CHSTBY_GEN3(3) | LVDCR1_CHSTBY_GEN3(2) | 110 + LVDCR1_CHSTBY_GEN3(1) | LVDCR1_CHSTBY_GEN3(0) | 111 + LVDCR1_CLKSTBY_GEN3); 112 + 113 + /* 114 + * Turn the PLL on, set it to LVDS normal mode, wait for the startup 108 115 * delay and turn the output on. 109 116 */ 110 117 lvdcr0 = LVDCR0_PLLON; ··· 124 117 125 118 lvdcr0 |= LVDCR0_LVRES; 126 119 rcar_lvds_write(lvds, LVDCR0, lvdcr0); 127 - 128 - /* Turn all the channels on. */ 129 - rcar_lvds_write(lvds, LVDCR1, 130 - LVDCR1_CHSTBY_GEN3(3) | LVDCR1_CHSTBY_GEN3(2) | 131 - LVDCR1_CHSTBY_GEN3(1) | LVDCR1_CHSTBY_GEN3(0) | 132 - LVDCR1_CLKSTBY_GEN3); 133 120 } 134 121 135 122 static int rcar_du_lvdsenc_start(struct rcar_du_lvdsenc *lvds, ··· 242 241 243 242 for (i = 0; i < rcdu->info->num_lvds; ++i) { 244 243 lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL); 245 - if (lvds == NULL) { 246 - dev_err(&pdev->dev, "failed to allocate private data\n"); 244 + if (lvds == NULL) 247 245 return -ENOMEM; 248 - } 249 246 250 247 lvds->dev = rcdu; 251 248 lvds->index = i;
+3 -3
drivers/video/of_display_timing.c
··· 119 119 * @name: name of the timing node 120 120 * @dt: display_timing struct to fill 121 121 **/ 122 - int of_get_display_timing(struct device_node *np, const char *name, 122 + int of_get_display_timing(const struct device_node *np, const char *name, 123 123 struct display_timing *dt) 124 124 { 125 125 struct device_node *timing_np; ··· 142 142 * of_get_display_timings - parse all display_timing entries from a device_node 143 143 * @np: device_node with the subnodes 144 144 **/ 145 - struct display_timings *of_get_display_timings(struct device_node *np) 145 + struct display_timings *of_get_display_timings(const struct device_node *np) 146 146 { 147 147 struct device_node *timings_np; 148 148 struct device_node *entry; ··· 258 258 * of_display_timings_exist - check if a display-timings node is provided 259 259 * @np: device_node with the timing 260 260 **/ 261 - int of_display_timings_exist(struct device_node *np) 261 + int of_display_timings_exist(const struct device_node *np) 262 262 { 263 263 struct device_node *timings_np; 264 264
+8 -7
include/video/of_display_timing.h
··· 16 16 #define OF_USE_NATIVE_MODE -1 17 17 18 18 #ifdef CONFIG_OF 19 - int of_get_display_timing(struct device_node *np, const char *name, 19 + int of_get_display_timing(const struct device_node *np, const char *name, 20 20 struct display_timing *dt); 21 - struct display_timings *of_get_display_timings(struct device_node *np); 22 - int of_display_timings_exist(struct device_node *np); 21 + struct display_timings *of_get_display_timings(const struct device_node *np); 22 + int of_display_timings_exist(const struct device_node *np); 23 23 #else 24 - static inline int of_get_display_timing(struct device_node *np, const char *name, 25 - struct display_timing *dt) 24 + static inline int of_get_display_timing(const struct device_node *np, 25 + const char *name, struct display_timing *dt) 26 26 { 27 27 return -ENOSYS; 28 28 } 29 - static inline struct display_timings *of_get_display_timings(struct device_node *np) 29 + static inline struct display_timings * 30 + of_get_display_timings(const struct device_node *np) 30 31 { 31 32 return NULL; 32 33 } 33 - static inline int of_display_timings_exist(struct device_node *np) 34 + static inline int of_display_timings_exist(const struct device_node *np) 34 35 { 35 36 return -ENOSYS; 36 37 }