Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Cross-merge networking fixes after downstream PR (net-6.18-rc4).

No conflicts, adjacent changes:

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
ded9813d17d3 ("net: stmmac: Consider Tx VLAN offload tag length for maxSDU")
26ab9830beab ("net: stmmac: replace has_xxxx with core_type")

Signed-off-by: Jakub Kicinski <kuba@kernel.org>

+2639 -1420
+4
CREDITS
··· 2036 2036 S: 602 00 Brno 2037 2037 S: Czech Republic 2038 2038 2039 + N: Karsten Keil 2040 + E: isdn@linux-pingi.de 2041 + D: ISDN subsystem maintainer 2042 + 2039 2043 N: Jakob Kemi 2040 2044 E: jakob.kemi@telia.com 2041 2045 D: V4L W9966 Webcam driver
+2 -2
Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml
··· 180 180 then: 181 181 properties: 182 182 reg: 183 - minItems: 2 183 + maxItems: 2 184 184 reg-names: 185 - minItems: 2 185 + maxItems: 2 186 186 else: 187 187 properties: 188 188 reg:
+3 -1
Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml
··· 142 142 required: 143 143 - orientation-switch 144 144 then: 145 - $ref: /schemas/usb/usb-switch.yaml# 145 + allOf: 146 + - $ref: /schemas/usb/usb-switch.yaml# 147 + - $ref: /schemas/usb/usb-switch-ports.yaml# 146 148 147 149 unevaluatedProperties: false 148 150
+3 -1
Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
··· 125 125 contains: 126 126 const: google,gs101-usb31drd-phy 127 127 then: 128 - $ref: /schemas/usb/usb-switch.yaml# 128 + allOf: 129 + - $ref: /schemas/usb/usb-switch.yaml# 130 + - $ref: /schemas/usb/usb-switch-ports.yaml# 129 131 130 132 properties: 131 133 clocks:
+1
Documentation/devicetree/bindings/serial/renesas,scif.yaml
··· 197 197 - renesas,rcar-gen2-scif 198 198 - renesas,rcar-gen3-scif 199 199 - renesas,rcar-gen4-scif 200 + - renesas,rcar-gen5-scif 200 201 then: 201 202 properties: 202 203 interrupts:
+8 -3
Documentation/devicetree/bindings/spi/spi-cadence.yaml
··· 14 14 15 15 properties: 16 16 compatible: 17 - enum: 18 - - cdns,spi-r1p6 19 - - xlnx,zynq-spi-r1p6 17 + oneOf: 18 + - enum: 19 + - xlnx,zynq-spi-r1p6 20 + - items: 21 + - enum: 22 + - xlnx,zynqmp-spi-r1p6 23 + - xlnx,versal-net-spi-r1p6 24 + - const: cdns,spi-r1p6 20 25 21 26 reg: 22 27 maxItems: 1
+1
Documentation/devicetree/bindings/spi/spi-rockchip.yaml
··· 34 34 - rockchip,rk3328-spi 35 35 - rockchip,rk3368-spi 36 36 - rockchip,rk3399-spi 37 + - rockchip,rk3506-spi 37 38 - rockchip,rk3528-spi 38 39 - rockchip,rk3562-spi 39 40 - rockchip,rk3568-spi
+1
Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml
··· 76 76 77 77 allOf: 78 78 - $ref: usb-switch.yaml# 79 + - $ref: usb-switch-ports.yaml# 79 80 80 81 additionalProperties: false 81 82
+9 -1
Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
··· 89 89 - reg 90 90 - "#address-cells" 91 91 - "#size-cells" 92 - - dma-ranges 93 92 - ranges 94 93 - clocks 95 94 - clock-names 96 95 - interrupts 97 96 - power-domains 97 + 98 + allOf: 99 + - if: 100 + properties: 101 + compatible: 102 + const: fsl,imx8mp-dwc3 103 + then: 104 + required: 105 + - dma-ranges 98 106 99 107 additionalProperties: false 100 108
+1
Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml
··· 52 52 53 53 allOf: 54 54 - $ref: usb-switch.yaml# 55 + - $ref: usb-switch-ports.yaml# 55 56 - if: 56 57 required: 57 58 - mode-switch
+1
Documentation/devicetree/bindings/usb/nxp,ptn36502.yaml
··· 46 46 47 47 allOf: 48 48 - $ref: usb-switch.yaml# 49 + - $ref: usb-switch-ports.yaml# 49 50 50 51 additionalProperties: false 51 52
+1
Documentation/devicetree/bindings/usb/onnn,nb7vpq904m.yaml
··· 91 91 92 92 allOf: 93 93 - $ref: usb-switch.yaml# 94 + - $ref: usb-switch-ports.yaml# 94 95 95 96 additionalProperties: false 96 97
+1
Documentation/devicetree/bindings/usb/parade,ps8830.yaml
··· 81 81 82 82 allOf: 83 83 - $ref: usb-switch.yaml# 84 + - $ref: usb-switch-ports.yaml# 84 85 85 86 additionalProperties: false 86 87
+3
Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml
··· 68 68 - qcom,sm8550-dwc3 69 69 - qcom,sm8650-dwc3 70 70 - qcom,x1e80100-dwc3 71 + - qcom,x1e80100-dwc3-mp 71 72 - const: qcom,snps-dwc3 72 73 73 74 reg: ··· 461 460 then: 462 461 properties: 463 462 interrupts: 463 + minItems: 4 464 464 maxItems: 5 465 465 interrupt-names: 466 + minItems: 4 466 467 items: 467 468 - const: dwc_usb3 468 469 - const: pwr_event
+1
Documentation/devicetree/bindings/usb/qcom,wcd939x-usbss.yaml
··· 60 60 61 61 allOf: 62 62 - $ref: usb-switch.yaml# 63 + - $ref: usb-switch-ports.yaml# 63 64 64 65 additionalProperties: false 65 66
+1
Documentation/devicetree/bindings/usb/ti,tusb1046.yaml
··· 11 11 12 12 allOf: 13 13 - $ref: usb-switch.yaml# 14 + - $ref: usb-switch-ports.yaml# 14 15 15 16 properties: 16 17 compatible:
+68
Documentation/devicetree/bindings/usb/usb-switch-ports.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/usb/usb-switch-ports.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: USB Orientation and Mode Switches Ports Graph Properties 8 + 9 + maintainers: 10 + - Greg Kroah-Hartman <gregkh@linuxfoundation.org> 11 + 12 + description: 13 + Ports Graph properties for devices handling USB mode and orientation switching. 14 + 15 + properties: 16 + port: 17 + $ref: /schemas/graph.yaml#/$defs/port-base 18 + description: 19 + A port node to link the device to a TypeC controller for the purpose of 20 + handling altmode muxing and orientation switching. 21 + 22 + properties: 23 + endpoint: 24 + $ref: /schemas/graph.yaml#/$defs/endpoint-base 25 + unevaluatedProperties: false 26 + properties: 27 + data-lanes: 28 + $ref: /schemas/types.yaml#/definitions/uint32-array 29 + minItems: 1 30 + maxItems: 8 31 + uniqueItems: true 32 + items: 33 + maximum: 8 34 + 35 + ports: 36 + $ref: /schemas/graph.yaml#/properties/ports 37 + properties: 38 + port@0: 39 + $ref: /schemas/graph.yaml#/properties/port 40 + description: 41 + Super Speed (SS) Output endpoint to the Type-C connector 42 + 43 + port@1: 44 + $ref: /schemas/graph.yaml#/$defs/port-base 45 + description: 46 + Super Speed (SS) Input endpoint from the Super-Speed PHY 47 + unevaluatedProperties: false 48 + 49 + properties: 50 + endpoint: 51 + $ref: /schemas/graph.yaml#/$defs/endpoint-base 52 + unevaluatedProperties: false 53 + properties: 54 + data-lanes: 55 + $ref: /schemas/types.yaml#/definitions/uint32-array 56 + minItems: 1 57 + maxItems: 8 58 + uniqueItems: true 59 + items: 60 + maximum: 8 61 + 62 + oneOf: 63 + - required: 64 + - port 65 + - required: 66 + - ports 67 + 68 + additionalProperties: true
-52
Documentation/devicetree/bindings/usb/usb-switch.yaml
··· 25 25 description: Possible handler of SuperSpeed signals retiming 26 26 type: boolean 27 27 28 - port: 29 - $ref: /schemas/graph.yaml#/$defs/port-base 30 - description: 31 - A port node to link the device to a TypeC controller for the purpose of 32 - handling altmode muxing and orientation switching. 33 - 34 - properties: 35 - endpoint: 36 - $ref: /schemas/graph.yaml#/$defs/endpoint-base 37 - unevaluatedProperties: false 38 - properties: 39 - data-lanes: 40 - $ref: /schemas/types.yaml#/definitions/uint32-array 41 - minItems: 1 42 - maxItems: 8 43 - uniqueItems: true 44 - items: 45 - maximum: 8 46 - 47 - ports: 48 - $ref: /schemas/graph.yaml#/properties/ports 49 - properties: 50 - port@0: 51 - $ref: /schemas/graph.yaml#/properties/port 52 - description: 53 - Super Speed (SS) Output endpoint to the Type-C connector 54 - 55 - port@1: 56 - $ref: /schemas/graph.yaml#/$defs/port-base 57 - description: 58 - Super Speed (SS) Input endpoint from the Super-Speed PHY 59 - unevaluatedProperties: false 60 - 61 - properties: 62 - endpoint: 63 - $ref: /schemas/graph.yaml#/$defs/endpoint-base 64 - unevaluatedProperties: false 65 - properties: 66 - data-lanes: 67 - $ref: /schemas/types.yaml#/definitions/uint32-array 68 - minItems: 1 69 - maxItems: 8 70 - uniqueItems: true 71 - items: 72 - maximum: 8 73 - 74 - oneOf: 75 - - required: 76 - - port 77 - - required: 78 - - ports 79 - 80 28 additionalProperties: true
+2
Documentation/netlink/specs/dpll.yaml
··· 605 605 reply: &pin-attrs 606 606 attributes: 607 607 - id 608 + - module-name 609 + - clock-id 608 610 - board-label 609 611 - panel-label 610 612 - package-label
-3
Documentation/networking/netconsole.rst
··· 19 19 20 20 Sysdata append support by Breno Leitao <leitao@debian.org>, Jan 15 2025 21 21 22 - Please send bug reports to Matt Mackall <mpm@selenic.com> 23 - Satyam Sharma <satyam.sharma@gmail.com>, and Cong Wang <xiyou.wangcong@gmail.com> 24 - 25 22 Introduction: 26 23 ============= 27 24
+17 -6
MAINTAINERS
··· 1997 1997 1998 1998 ARM AND ARM64 SoC SUB-ARCHITECTURES (COMMON PARTS) 1999 1999 M: Arnd Bergmann <arnd@arndb.de> 2000 + M: Krzysztof Kozlowski <krzk@kernel.org> 2001 + M: Alexandre Belloni <alexandre.belloni@bootlin.com> 2002 + M: Linus Walleij <linus.walleij@linaro.org> 2003 + R: Drew Fustini <fustini@kernel.org> 2000 2004 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 2001 2005 L: soc@lists.linux.dev 2002 2006 S: Maintained ··· 13116 13112 F: include/uapi/linux/io_uring/ 13117 13113 F: io_uring/ 13118 13114 13115 + IO_URING ZCRX 13116 + M: Pavel Begunkov <asml.silence@gmail.com> 13117 + L: io-uring@vger.kernel.org 13118 + L: netdev@vger.kernel.org 13119 + T: git https://github.com/isilence/linux.git zcrx/for-next 13120 + T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux.git 13121 + S: Maintained 13122 + F: io_uring/zcrx.* 13123 + 13119 13124 IPMI SUBSYSTEM 13120 13125 M: Corey Minyard <corey@minyard.net> 13121 13126 L: openipmi-developer@lists.sourceforge.net (moderated for non-subscribers) ··· 13260 13247 F: drivers/infiniband/ulp/isert 13261 13248 13262 13249 ISDN/CMTP OVER BLUETOOTH 13263 - M: Karsten Keil <isdn@linux-pingi.de> 13264 - L: isdn4linux@listserv.isdn4linux.de (subscribers-only) 13265 13250 L: netdev@vger.kernel.org 13266 - S: Odd Fixes 13251 + S: Orphan 13267 13252 W: http://www.isdn4linux.de 13268 13253 F: Documentation/isdn/ 13269 13254 F: drivers/isdn/capi/ ··· 13270 13259 F: net/bluetooth/cmtp/ 13271 13260 13272 13261 ISDN/mISDN SUBSYSTEM 13273 - M: Karsten Keil <isdn@linux-pingi.de> 13274 - L: isdn4linux@listserv.isdn4linux.de (subscribers-only) 13275 13262 L: netdev@vger.kernel.org 13276 - S: Maintained 13263 + S: Orphan 13277 13264 W: http://www.isdn4linux.de 13278 13265 F: drivers/isdn/Kconfig 13279 13266 F: drivers/isdn/Makefile ··· 14404 14395 14405 14396 LINUX-NEXT TREE 14406 14397 M: Stephen Rothwell <sfr@canb.auug.org.au> 14398 + M: Mark Brown <broonie@kernel.org> 14407 14399 L: linux-next@vger.kernel.org 14408 14400 S: Supported 14409 14401 B: mailto:linux-next@vger.kernel.org and the appropriate development tree ··· 21336 21326 QUALCOMM WCN36XX WIRELESS DRIVER 21337 21327 M: Loic Poulain <loic.poulain@oss.qualcomm.com> 21338 21328 L: wcn36xx@lists.infradead.org 21329 + L: linux-wireless@vger.kernel.org 21339 21330 S: Supported 21340 21331 W: https://wireless.wiki.kernel.org/en/users/Drivers/wcn36xx 21341 21332 F: drivers/net/wireless/ath/wcn36xx/
+1 -1
Makefile
··· 2 2 VERSION = 6 3 3 PATCHLEVEL = 18 4 4 SUBLEVEL = 0 5 - EXTRAVERSION = -rc2 5 + EXTRAVERSION = -rc3 6 6 NAME = Baby Opossum Posse 7 7 8 8 # *DOCUMENTATION*
+8
arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi
··· 77 77 /delete-property/ pinctrl-0; 78 78 }; 79 79 80 + &pm { 81 + clocks = <&firmware_clocks 5>, 82 + <&clocks BCM2835_CLOCK_PERI_IMAGE>, 83 + <&clocks BCM2835_CLOCK_H264>, 84 + <&clocks BCM2835_CLOCK_ISP>; 85 + clock-names = "v3d", "peri_image", "h264", "isp"; 86 + }; 87 + 80 88 &rmem { 81 89 /* 82 90 * RPi4's co-processor will copy the board's bootloader configuration
+9
arch/arm/boot/dts/broadcom/bcm2835-rpi-common.dtsi
··· 13 13 clock-names = "pixel", "hdmi"; 14 14 }; 15 15 16 + &pm { 17 + clocks = <&firmware_clocks 5>, 18 + <&clocks BCM2835_CLOCK_PERI_IMAGE>, 19 + <&clocks BCM2835_CLOCK_H264>, 20 + <&clocks BCM2835_CLOCK_ISP>; 21 + clock-names = "v3d", "peri_image", "h264", "isp"; 22 + }; 23 + 16 24 &v3d { 25 + clocks = <&firmware_clocks 5>; 17 26 power-domains = <&power RPI_POWER_DOMAIN_V3D>; 18 27 }; 19 28
+2
arch/arm64/boot/dts/broadcom/bcm2712.dtsi
··· 326 326 <0x7fffe000 0x2000>; 327 327 interrupt-controller; 328 328 #address-cells = <0>; 329 + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 330 + IRQ_TYPE_LEVEL_HIGH)>; 329 331 #interrupt-cells = <3>; 330 332 }; 331 333
+2 -1
arch/arm64/include/asm/pgtable.h
··· 293 293 static inline pte_t pte_mkwrite_novma(pte_t pte) 294 294 { 295 295 pte = set_pte_bit(pte, __pgprot(PTE_WRITE)); 296 - pte = clear_pte_bit(pte, __pgprot(PTE_RDONLY)); 296 + if (pte_sw_dirty(pte)) 297 + pte = clear_pte_bit(pte, __pgprot(PTE_RDONLY)); 297 298 return pte; 298 299 } 299 300
+8 -3
arch/arm64/mm/copypage.c
··· 35 35 from != folio_page(src, 0)) 36 36 return; 37 37 38 - WARN_ON_ONCE(!folio_try_hugetlb_mte_tagging(dst)); 38 + folio_try_hugetlb_mte_tagging(dst); 39 39 40 40 /* 41 41 * Populate tags for all subpages. ··· 51 51 } 52 52 folio_set_hugetlb_mte_tagged(dst); 53 53 } else if (page_mte_tagged(from)) { 54 - /* It's a new page, shouldn't have been tagged yet */ 55 - WARN_ON_ONCE(!try_page_mte_tagging(to)); 54 + /* 55 + * Most of the time it's a new page that shouldn't have been 56 + * tagged yet. However, folio migration can end up reusing the 57 + * same page without untagging it. Ignore the warning if the 58 + * page is already tagged. 59 + */ 60 + try_page_mte_tagging(to); 56 61 57 62 mte_copy_page_tags(kto, kfrom); 58 63 set_page_mte_tagged(to);
+2 -2
arch/mips/mti-malta/malta-setup.c
··· 47 47 .name = "keyboard", 48 48 .start = 0x60, 49 49 .end = 0x6f, 50 - .flags = IORESOURCE_IO | IORESOURCE_BUSY 50 + .flags = IORESOURCE_IO 51 51 }, 52 52 { 53 53 .name = "dma page reg", ··· 213 213 214 214 /* Request I/O space for devices used on the Malta board. */ 215 215 for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++) 216 - request_resource(&ioport_resource, standard_io_resources+i); 216 + insert_resource(&ioport_resource, standard_io_resources + i); 217 217 218 218 /* 219 219 * Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge.
+1 -2
arch/mips/pci/pci-malta.c
··· 230 230 } 231 231 232 232 /* PIIX4 ACPI starts at 0x1000 */ 233 - if (controller->io_resource->start < 0x00001000UL) 234 - controller->io_resource->start = 0x00001000UL; 233 + PCIBIOS_MIN_IO = 0x1000; 235 234 236 235 iomem_resource.end &= 0xfffffffffULL; /* 64 GB */ 237 236 ioport_resource.end = controller->io_resource->end;
+1 -7
arch/riscv/include/asm/asm.h
··· 84 84 .endm 85 85 86 86 #ifdef CONFIG_SMP 87 - #ifdef CONFIG_32BIT 88 - #define PER_CPU_OFFSET_SHIFT 2 89 - #else 90 - #define PER_CPU_OFFSET_SHIFT 3 91 - #endif 92 - 93 87 .macro asm_per_cpu dst sym tmp 94 88 lw \tmp, TASK_TI_CPU_NUM(tp) 95 - slli \tmp, \tmp, PER_CPU_OFFSET_SHIFT 89 + slli \tmp, \tmp, RISCV_LGPTR 96 90 la \dst, __per_cpu_offset 97 91 add \dst, \dst, \tmp 98 92 REG_L \tmp, 0(\dst)
+2
arch/riscv/include/asm/cpufeature.h
··· 31 31 32 32 DECLARE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo); 33 33 34 + extern const struct seq_operations cpuinfo_op; 35 + 34 36 /* Per-cpu ISA extensions. */ 35 37 extern struct riscv_isainfo hart_isa[NR_CPUS]; 36 38
+7
arch/riscv/include/asm/hwprobe.h
··· 42 42 return pair->value == other_pair->value; 43 43 } 44 44 45 + #ifdef CONFIG_MMU 46 + void riscv_hwprobe_register_async_probe(void); 47 + void riscv_hwprobe_complete_async_probe(void); 48 + #else 49 + static inline void riscv_hwprobe_register_async_probe(void) {} 50 + static inline void riscv_hwprobe_complete_async_probe(void) {} 51 + #endif 45 52 #endif
+2
arch/riscv/include/asm/pgtable-64.h
··· 69 69 70 70 #define PTRS_PER_PMD (PAGE_SIZE / sizeof(pmd_t)) 71 71 72 + #define MAX_POSSIBLE_PHYSMEM_BITS 56 73 + 72 74 /* 73 75 * rv64 PTE format: 74 76 * | 63 | 62 61 | 60 54 | 53 10 | 9 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
+2
arch/riscv/include/asm/pgtable.h
··· 654 654 return __pgprot(prot); 655 655 } 656 656 657 + #define pgprot_dmacoherent pgprot_writecombine 658 + 657 659 /* 658 660 * Both Svade and Svadu control the hardware behavior when the PTE A/D bits need to be set. By 659 661 * default the M-mode firmware enables the hardware updating scheme when only Svadu is present in
+6
arch/riscv/include/asm/vdso/arch_data.h
··· 12 12 13 13 /* Boolean indicating all CPUs have the same static hwprobe values. */ 14 14 __u8 homogeneous_cpus; 15 + 16 + /* 17 + * A gate to check and see if the hwprobe data is actually ready, as 18 + * probing is deferred to avoid boot slowdowns. 19 + */ 20 + __u8 ready; 15 21 }; 16 22 17 23 #endif /* __RISCV_ASM_VDSO_ARCH_DATA_H */
+1 -3
arch/riscv/kernel/cpu.c
··· 62 62 return -ENODEV; 63 63 } 64 64 65 - if (!of_device_is_available(node)) { 66 - pr_info("CPU with hartid=%lu is not available\n", *hart); 65 + if (!of_device_is_available(node)) 67 66 return -ENODEV; 68 - } 69 67 70 68 if (of_property_read_string(node, "riscv,isa-base", &isa)) 71 69 goto old_interface;
+2 -2
arch/riscv/kernel/cpufeature.c
··· 932 932 { 933 933 int cpu; 934 934 u32 prev_vlenb = 0; 935 - u32 vlenb; 935 + u32 vlenb = 0; 936 936 937 - /* Ignore thead,vlenb property if xtheavector is not enabled in the kernel */ 937 + /* Ignore thead,vlenb property if xtheadvector is not enabled in the kernel */ 938 938 if (!IS_ENABLED(CONFIG_RISCV_ISA_XTHEADVECTOR)) 939 939 return 0; 940 940
+12 -12
arch/riscv/kernel/smp.c
··· 40 40 IPI_MAX 41 41 }; 42 42 43 + static const char * const ipi_names[] = { 44 + [IPI_RESCHEDULE] = "Rescheduling interrupts", 45 + [IPI_CALL_FUNC] = "Function call interrupts", 46 + [IPI_CPU_STOP] = "CPU stop interrupts", 47 + [IPI_CPU_CRASH_STOP] = "CPU stop (for crash dump) interrupts", 48 + [IPI_IRQ_WORK] = "IRQ work interrupts", 49 + [IPI_TIMER] = "Timer broadcast interrupts", 50 + [IPI_CPU_BACKTRACE] = "CPU backtrace interrupts", 51 + [IPI_KGDB_ROUNDUP] = "KGDB roundup interrupts", 52 + }; 53 + 43 54 unsigned long __cpuid_to_hartid_map[NR_CPUS] __ro_after_init = { 44 55 [0 ... NR_CPUS-1] = INVALID_HARTID 45 56 }; ··· 210 199 /* Request IPIs */ 211 200 for (i = 0; i < nr_ipi; i++) { 212 201 err = request_percpu_irq(ipi_virq_base + i, handle_IPI, 213 - "IPI", &ipi_dummy_dev); 202 + ipi_names[i], &ipi_dummy_dev); 214 203 WARN_ON(err); 215 204 216 205 ipi_desc[i] = irq_to_desc(ipi_virq_base + i); ··· 220 209 /* Enabled IPIs for boot CPU immediately */ 221 210 riscv_ipi_enable(); 222 211 } 223 - 224 - static const char * const ipi_names[] = { 225 - [IPI_RESCHEDULE] = "Rescheduling interrupts", 226 - [IPI_CALL_FUNC] = "Function call interrupts", 227 - [IPI_CPU_STOP] = "CPU stop interrupts", 228 - [IPI_CPU_CRASH_STOP] = "CPU stop (for crash dump) interrupts", 229 - [IPI_IRQ_WORK] = "IRQ work interrupts", 230 - [IPI_TIMER] = "Timer broadcast interrupts", 231 - [IPI_CPU_BACKTRACE] = "CPU backtrace interrupts", 232 - [IPI_KGDB_ROUNDUP] = "KGDB roundup interrupts", 233 - }; 234 212 235 213 void show_ipi_stats(struct seq_file *p, int prec) 236 214 {
+66 -14
arch/riscv/kernel/sys_hwprobe.c
··· 5 5 * more details. 6 6 */ 7 7 #include <linux/syscalls.h> 8 + #include <linux/completion.h> 9 + #include <linux/atomic.h> 10 + #include <linux/once.h> 8 11 #include <asm/cacheflush.h> 9 12 #include <asm/cpufeature.h> 10 13 #include <asm/hwprobe.h> ··· 30 27 u64 id = -1ULL; 31 28 bool first = true; 32 29 int cpu; 30 + 31 + if (pair->key != RISCV_HWPROBE_KEY_MVENDORID && 32 + pair->key != RISCV_HWPROBE_KEY_MIMPID && 33 + pair->key != RISCV_HWPROBE_KEY_MARCHID) 34 + goto out; 33 35 34 36 for_each_cpu(cpu, cpus) { 35 37 u64 cpu_id; ··· 66 58 } 67 59 } 68 60 61 + out: 69 62 pair->value = id; 70 63 } 71 64 ··· 463 454 return 0; 464 455 } 465 456 466 - static int do_riscv_hwprobe(struct riscv_hwprobe __user *pairs, 467 - size_t pair_count, size_t cpusetsize, 468 - unsigned long __user *cpus_user, 469 - unsigned int flags) 470 - { 471 - if (flags & RISCV_HWPROBE_WHICH_CPUS) 472 - return hwprobe_get_cpus(pairs, pair_count, cpusetsize, 473 - cpus_user, flags); 474 - 475 - return hwprobe_get_values(pairs, pair_count, cpusetsize, 476 - cpus_user, flags); 477 - } 478 - 479 457 #ifdef CONFIG_MMU 480 458 481 - static int __init init_hwprobe_vdso_data(void) 459 + static DECLARE_COMPLETION(boot_probes_done); 460 + static atomic_t pending_boot_probes = ATOMIC_INIT(1); 461 + 462 + void riscv_hwprobe_register_async_probe(void) 463 + { 464 + atomic_inc(&pending_boot_probes); 465 + } 466 + 467 + void riscv_hwprobe_complete_async_probe(void) 468 + { 469 + if (atomic_dec_and_test(&pending_boot_probes)) 470 + complete(&boot_probes_done); 471 + } 472 + 473 + static int complete_hwprobe_vdso_data(void) 482 474 { 483 475 struct vdso_arch_data *avd = vdso_k_arch_data; 484 476 u64 id_bitsmash = 0; 485 477 struct riscv_hwprobe pair; 486 478 int key; 479 + 480 + if (unlikely(!atomic_dec_and_test(&pending_boot_probes))) 481 + wait_for_completion(&boot_probes_done); 487 482 488 483 /* 489 484 * Initialize vDSO data with the answers for the "all CPUs" case, to ··· 516 503 * vDSO should defer to the kernel for exotic cpu masks. 517 504 */ 518 505 avd->homogeneous_cpus = id_bitsmash != 0 && id_bitsmash != -1; 506 + 507 + /* 508 + * Make sure all the VDSO values are visible before we look at them. 509 + * This pairs with the implicit "no speculativly visible accesses" 510 + * barrier in the VDSO hwprobe code. 511 + */ 512 + smp_wmb(); 513 + avd->ready = true; 514 + return 0; 515 + } 516 + 517 + static int __init init_hwprobe_vdso_data(void) 518 + { 519 + struct vdso_arch_data *avd = vdso_k_arch_data; 520 + 521 + /* 522 + * Prevent the vDSO cached values from being used, as they're not ready 523 + * yet. 524 + */ 525 + avd->ready = false; 519 526 return 0; 520 527 } 521 528 522 529 arch_initcall_sync(init_hwprobe_vdso_data); 523 530 531 + #else 532 + 533 + static int complete_hwprobe_vdso_data(void) { return 0; } 534 + 524 535 #endif /* CONFIG_MMU */ 536 + 537 + static int do_riscv_hwprobe(struct riscv_hwprobe __user *pairs, 538 + size_t pair_count, size_t cpusetsize, 539 + unsigned long __user *cpus_user, 540 + unsigned int flags) 541 + { 542 + DO_ONCE_SLEEPABLE(complete_hwprobe_vdso_data); 543 + 544 + if (flags & RISCV_HWPROBE_WHICH_CPUS) 545 + return hwprobe_get_cpus(pairs, pair_count, cpusetsize, 546 + cpus_user, flags); 547 + 548 + return hwprobe_get_values(pairs, pair_count, cpusetsize, 549 + cpus_user, flags); 550 + } 525 551 526 552 SYSCALL_DEFINE5(riscv_hwprobe, struct riscv_hwprobe __user *, pairs, 527 553 size_t, pair_count, size_t, cpusetsize, unsigned long __user *,
+7 -2
arch/riscv/kernel/unaligned_access_speed.c
··· 379 379 static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) 380 380 { 381 381 schedule_on_each_cpu(check_vector_unaligned_access); 382 + riscv_hwprobe_complete_async_probe(); 382 383 383 384 return 0; 384 385 } ··· 474 473 per_cpu(vector_misaligned_access, cpu) = unaligned_vector_speed_param; 475 474 } else if (!check_vector_unaligned_access_emulated_all_cpus() && 476 475 IS_ENABLED(CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS)) { 477 - kthread_run(vec_check_unaligned_access_speed_all_cpus, 478 - NULL, "vec_check_unaligned_access_speed_all_cpus"); 476 + riscv_hwprobe_register_async_probe(); 477 + if (IS_ERR(kthread_run(vec_check_unaligned_access_speed_all_cpus, 478 + NULL, "vec_check_unaligned_access_speed_all_cpus"))) { 479 + pr_warn("Failed to create vec_unalign_check kthread\n"); 480 + riscv_hwprobe_complete_async_probe(); 481 + } 479 482 } 480 483 481 484 /*
+1 -1
arch/riscv/kernel/vdso/hwprobe.c
··· 27 27 * homogeneous, then this function can handle requests for arbitrary 28 28 * masks. 29 29 */ 30 - if ((flags != 0) || (!all_cpus && !avd->homogeneous_cpus)) 30 + if (flags != 0 || (!all_cpus && !avd->homogeneous_cpus) || unlikely(!avd->ready)) 31 31 return riscv_hwprobe(pairs, pair_count, cpusetsize, cpus, flags); 32 32 33 33 /* This is something we can handle, fill out the pairs. */
+3 -8
arch/x86/kernel/cpu/bugs.c
··· 1463 1463 break; 1464 1464 default: 1465 1465 if (retbleed_mitigation != RETBLEED_MITIGATION_STUFF) { 1466 - pr_err(RETBLEED_INTEL_MSG); 1466 + if (retbleed_mitigation != RETBLEED_MITIGATION_NONE) 1467 + pr_err(RETBLEED_INTEL_MSG); 1468 + 1467 1469 retbleed_mitigation = RETBLEED_MITIGATION_NONE; 1468 1470 } 1469 1471 } ··· 1826 1824 } 1827 1825 } 1828 1826 #endif 1829 - 1830 - static inline bool match_option(const char *arg, int arglen, const char *opt) 1831 - { 1832 - int len = strlen(opt); 1833 - 1834 - return len == arglen && !strncmp(arg, opt, len); 1835 - } 1836 1827 1837 1828 /* The kernel command line selection for spectre v2 */ 1838 1829 enum spectre_v2_mitigation_cmd {
+1 -1
arch/x86/kernel/cpu/microcode/amd.c
··· 194 194 } 195 195 196 196 switch (cur_rev >> 8) { 197 - case 0x80012: return cur_rev <= 0x800126f; break; 197 + case 0x80012: return cur_rev <= 0x8001277; break; 198 198 case 0x80082: return cur_rev <= 0x800820f; break; 199 199 case 0x83010: return cur_rev <= 0x830107c; break; 200 200 case 0x86001: return cur_rev <= 0x860010e; break;
+10 -1
arch/x86/kernel/cpu/resctrl/monitor.c
··· 458 458 r->mon.mbm_cfg_mask = ecx & MAX_EVT_CONFIG_BITS; 459 459 } 460 460 461 - if (rdt_cpu_has(X86_FEATURE_ABMC)) { 461 + /* 462 + * resctrl assumes a system that supports assignable counters can 463 + * switch to "default" mode. Ensure that there is a "default" mode 464 + * to switch to. This enforces a dependency between the independent 465 + * X86_FEATURE_ABMC and X86_FEATURE_CQM_MBM_TOTAL/X86_FEATURE_CQM_MBM_LOCAL 466 + * hardware features. 467 + */ 468 + if (rdt_cpu_has(X86_FEATURE_ABMC) && 469 + (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL) || 470 + rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL))) { 462 471 r->mon.mbm_cntr_assignable = true; 463 472 cpuid_count(0x80000020, 5, &eax, &ebx, &ecx, &edx); 464 473 r->mon.num_mbm_cntrs = (ebx & GENMASK(15, 0)) + 1;
+10
block/blk-settings.c
··· 184 184 if (!bi->interval_exp) 185 185 bi->interval_exp = ilog2(lim->logical_block_size); 186 186 187 + /* 188 + * The PI generation / validation helpers do not expect intervals to 189 + * straddle multiple bio_vecs. Enforce alignment so that those are 190 + * never generated, and that each buffer is aligned as expected. 191 + */ 192 + if (bi->csum_type) { 193 + lim->dma_alignment = max(lim->dma_alignment, 194 + (1U << bi->interval_exp) - 1); 195 + } 196 + 187 197 return 0; 188 198 } 189 199
+61 -61
drivers/acpi/riscv/rimt.c
··· 61 61 return 0; 62 62 } 63 63 64 - /** 65 - * rimt_get_fwnode() - Retrieve fwnode associated with an RIMT node 66 - * 67 - * @node: RIMT table node to be looked-up 68 - * 69 - * Returns: fwnode_handle pointer on success, NULL on failure 70 - */ 71 - static struct fwnode_handle *rimt_get_fwnode(struct acpi_rimt_node *node) 72 - { 73 - struct fwnode_handle *fwnode = NULL; 74 - struct rimt_fwnode *curr; 75 - 76 - spin_lock(&rimt_fwnode_lock); 77 - list_for_each_entry(curr, &rimt_fwnode_list, list) { 78 - if (curr->rimt_node == node) { 79 - fwnode = curr->fwnode; 80 - break; 81 - } 82 - } 83 - spin_unlock(&rimt_fwnode_lock); 84 - 85 - return fwnode; 86 - } 87 - 88 64 static acpi_status rimt_match_node_callback(struct acpi_rimt_node *node, 89 65 void *context) 90 66 { ··· 178 202 return NULL; 179 203 } 180 204 205 + /* 206 + * RISC-V supports IOMMU as a PCI device or a platform device. 207 + * When it is a platform device, there should be a namespace device as 208 + * well along with RIMT. To create the link between RIMT information and 209 + * the platform device, the IOMMU driver should register itself with the 210 + * RIMT module. This is true for PCI based IOMMU as well. 211 + */ 212 + int rimt_iommu_register(struct device *dev) 213 + { 214 + struct fwnode_handle *rimt_fwnode; 215 + struct acpi_rimt_node *node; 216 + 217 + node = rimt_scan_node(ACPI_RIMT_NODE_TYPE_IOMMU, dev); 218 + if (!node) { 219 + pr_err("Could not find IOMMU node in RIMT\n"); 220 + return -ENODEV; 221 + } 222 + 223 + if (dev_is_pci(dev)) { 224 + rimt_fwnode = acpi_alloc_fwnode_static(); 225 + if (!rimt_fwnode) 226 + return -ENOMEM; 227 + 228 + rimt_fwnode->dev = dev; 229 + if (!dev->fwnode) 230 + dev->fwnode = rimt_fwnode; 231 + 232 + rimt_set_fwnode(node, rimt_fwnode); 233 + } else { 234 + rimt_set_fwnode(node, dev->fwnode); 235 + } 236 + 237 + return 0; 238 + } 239 + 240 + #ifdef CONFIG_IOMMU_API 241 + 242 + /** 243 + * rimt_get_fwnode() - Retrieve fwnode associated with an RIMT node 244 + * 245 + * @node: RIMT table node to be looked-up 246 + * 247 + * Returns: fwnode_handle pointer on success, NULL on failure 248 + */ 249 + static struct fwnode_handle *rimt_get_fwnode(struct acpi_rimt_node *node) 250 + { 251 + struct fwnode_handle *fwnode = NULL; 252 + struct rimt_fwnode *curr; 253 + 254 + spin_lock(&rimt_fwnode_lock); 255 + list_for_each_entry(curr, &rimt_fwnode_list, list) { 256 + if (curr->rimt_node == node) { 257 + fwnode = curr->fwnode; 258 + break; 259 + } 260 + } 261 + spin_unlock(&rimt_fwnode_lock); 262 + 263 + return fwnode; 264 + } 265 + 181 266 static bool rimt_pcie_rc_supports_ats(struct acpi_rimt_node *node) 182 267 { 183 268 struct acpi_rimt_pcie_rc *pci_rc; ··· 326 289 327 290 return NULL; 328 291 } 329 - 330 - /* 331 - * RISC-V supports IOMMU as a PCI device or a platform device. 332 - * When it is a platform device, there should be a namespace device as 333 - * well along with RIMT. To create the link between RIMT information and 334 - * the platform device, the IOMMU driver should register itself with the 335 - * RIMT module. This is true for PCI based IOMMU as well. 336 - */ 337 - int rimt_iommu_register(struct device *dev) 338 - { 339 - struct fwnode_handle *rimt_fwnode; 340 - struct acpi_rimt_node *node; 341 - 342 - node = rimt_scan_node(ACPI_RIMT_NODE_TYPE_IOMMU, dev); 343 - if (!node) { 344 - pr_err("Could not find IOMMU node in RIMT\n"); 345 - return -ENODEV; 346 - } 347 - 348 - if (dev_is_pci(dev)) { 349 - rimt_fwnode = acpi_alloc_fwnode_static(); 350 - if (!rimt_fwnode) 351 - return -ENOMEM; 352 - 353 - rimt_fwnode->dev = dev; 354 - if (!dev->fwnode) 355 - dev->fwnode = rimt_fwnode; 356 - 357 - rimt_set_fwnode(node, rimt_fwnode); 358 - } else { 359 - rimt_set_fwnode(node, dev->fwnode); 360 - } 361 - 362 - return 0; 363 - } 364 - 365 - #ifdef CONFIG_IOMMU_API 366 292 367 293 static struct acpi_rimt_node *rimt_node_map_id(struct acpi_rimt_node *node, 368 294 u32 id_in, u32 *id_out,
+15 -23
drivers/android/binder.c
··· 851 851 } else { 852 852 if (!internal) 853 853 node->local_weak_refs++; 854 - if (!node->has_weak_ref && list_empty(&node->work.entry)) { 855 - if (target_list == NULL) { 856 - pr_err("invalid inc weak node for %d\n", 857 - node->debug_id); 858 - return -EINVAL; 859 - } 860 - /* 861 - * See comment above 862 - */ 854 + if (!node->has_weak_ref && target_list && list_empty(&node->work.entry)) 863 855 binder_enqueue_work_ilocked(&node->work, target_list); 864 - } 865 856 } 866 857 return 0; 867 858 } ··· 2409 2418 2410 2419 /** 2411 2420 * struct binder_ptr_fixup - data to be fixed-up in target buffer 2412 - * @offset offset in target buffer to fixup 2413 - * @skip_size bytes to skip in copy (fixup will be written later) 2414 - * @fixup_data data to write at fixup offset 2415 - * @node list node 2421 + * @offset: offset in target buffer to fixup 2422 + * @skip_size: bytes to skip in copy (fixup will be written later) 2423 + * @fixup_data: data to write at fixup offset 2424 + * @node: list node 2416 2425 * 2417 2426 * This is used for the pointer fixup list (pf) which is created and consumed 2418 2427 * during binder_transaction() and is only accessed locally. No ··· 2429 2438 2430 2439 /** 2431 2440 * struct binder_sg_copy - scatter-gather data to be copied 2432 - * @offset offset in target buffer 2433 - * @sender_uaddr user address in source buffer 2434 - * @length bytes to copy 2435 - * @node list node 2441 + * @offset: offset in target buffer 2442 + * @sender_uaddr: user address in source buffer 2443 + * @length: bytes to copy 2444 + * @node: list node 2436 2445 * 2437 2446 * This is used for the sg copy list (sgc) which is created and consumed 2438 2447 * during binder_transaction() and is only accessed locally. No ··· 4054 4063 4055 4064 /** 4056 4065 * binder_free_buf() - free the specified buffer 4057 - * @proc: binder proc that owns buffer 4058 - * @buffer: buffer to be freed 4059 - * @is_failure: failed to send transaction 4066 + * @proc: binder proc that owns buffer 4067 + * @thread: binder thread performing the buffer release 4068 + * @buffer: buffer to be freed 4069 + * @is_failure: failed to send transaction 4060 4070 * 4061 - * If buffer for an async transaction, enqueue the next async 4071 + * If the buffer is for an async transaction, enqueue the next async 4062 4072 * transaction from the node. 4063 4073 * 4064 - * Cleanup buffer and free it. 4074 + * Cleanup the buffer and free it. 4065 4075 */ 4066 4076 static void 4067 4077 binder_free_buf(struct binder_proc *proc,
+14 -4
drivers/android/binder/freeze.rs
··· 106 106 return Ok(true); 107 107 } 108 108 if freeze.is_clearing { 109 - _removed_listener = freeze_entry.remove_node(); 109 + kernel::warn_on!(freeze.num_cleared_duplicates != 0); 110 + if freeze.num_pending_duplicates > 0 { 111 + // The primary freeze listener was deleted, so convert a pending duplicate back 112 + // into the primary one. 113 + freeze.num_pending_duplicates -= 1; 114 + freeze.is_pending = true; 115 + freeze.is_clearing = true; 116 + } else { 117 + _removed_listener = freeze_entry.remove_node(); 118 + } 110 119 drop(node_refs); 111 120 writer.write_code(BR_CLEAR_FREEZE_NOTIFICATION_DONE)?; 112 121 writer.write_payload(&self.cookie.0)?; 113 122 Ok(true) 114 123 } else { 115 - let is_frozen = freeze.node.owner.inner.lock().is_frozen; 124 + let is_frozen = freeze.node.owner.inner.lock().is_frozen.is_fully_frozen(); 116 125 if freeze.last_is_frozen == Some(is_frozen) { 117 126 return Ok(true); 118 127 } ··· 254 245 ); 255 246 return Err(EINVAL); 256 247 } 257 - if freeze.is_clearing { 258 - // Immediately send another FreezeMessage for BR_CLEAR_FREEZE_NOTIFICATION_DONE. 248 + let is_frozen = freeze.node.owner.inner.lock().is_frozen.is_fully_frozen(); 249 + if freeze.is_clearing || freeze.last_is_frozen != Some(is_frozen) { 250 + // Immediately send another FreezeMessage. 259 251 clear_msg = Some(FreezeMessage::init(alloc, cookie)); 260 252 } 261 253 freeze.is_pending = false;
+1 -1
drivers/android/binder/node.rs
··· 687 687 ); 688 688 } 689 689 if inner.freeze_list.is_empty() { 690 - _unused_capacity = mem::replace(&mut inner.freeze_list, KVVec::new()); 690 + _unused_capacity = mem::take(&mut inner.freeze_list); 691 691 } 692 692 } 693 693
+37 -13
drivers/android/binder/process.rs
··· 72 72 const PROC_DEFER_FLUSH: u8 = 1; 73 73 const PROC_DEFER_RELEASE: u8 = 2; 74 74 75 + #[derive(Copy, Clone)] 76 + pub(crate) enum IsFrozen { 77 + Yes, 78 + No, 79 + InProgress, 80 + } 81 + 82 + impl IsFrozen { 83 + /// Whether incoming transactions should be rejected due to freeze. 84 + pub(crate) fn is_frozen(self) -> bool { 85 + match self { 86 + IsFrozen::Yes => true, 87 + IsFrozen::No => false, 88 + IsFrozen::InProgress => true, 89 + } 90 + } 91 + 92 + /// Whether freeze notifications consider this process frozen. 93 + pub(crate) fn is_fully_frozen(self) -> bool { 94 + match self { 95 + IsFrozen::Yes => true, 96 + IsFrozen::No => false, 97 + IsFrozen::InProgress => false, 98 + } 99 + } 100 + } 101 + 75 102 /// The fields of `Process` protected by the spinlock. 76 103 pub(crate) struct ProcessInner { 77 104 is_manager: bool, ··· 125 98 /// are woken up. 126 99 outstanding_txns: u32, 127 100 /// Process is frozen and unable to service binder transactions. 128 - pub(crate) is_frozen: bool, 101 + pub(crate) is_frozen: IsFrozen, 129 102 /// Process received sync transactions since last frozen. 130 103 pub(crate) sync_recv: bool, 131 104 /// Process received async transactions since last frozen. ··· 151 124 started_thread_count: 0, 152 125 defer_work: 0, 153 126 outstanding_txns: 0, 154 - is_frozen: false, 127 + is_frozen: IsFrozen::No, 155 128 sync_recv: false, 156 129 async_recv: false, 157 130 binderfs_file: None, ··· 1287 1260 let is_manager = { 1288 1261 let mut inner = self.inner.lock(); 1289 1262 inner.is_dead = true; 1290 - inner.is_frozen = false; 1263 + inner.is_frozen = IsFrozen::No; 1291 1264 inner.sync_recv = false; 1292 1265 inner.async_recv = false; 1293 1266 inner.is_manager ··· 1373 1346 .alloc 1374 1347 .take_for_each(|offset, size, debug_id, odata| { 1375 1348 let ptr = offset + address; 1376 - pr_warn!( 1377 - "{}: removing orphan mapping {offset}:{size}\n", 1378 - self.pid_in_current_ns() 1379 - ); 1380 1349 let mut alloc = 1381 1350 Allocation::new(self.clone(), debug_id, offset, size, ptr, false); 1382 1351 if let Some(data) = odata { ··· 1394 1371 return; 1395 1372 } 1396 1373 inner.outstanding_txns -= 1; 1397 - inner.is_frozen && inner.outstanding_txns == 0 1374 + inner.is_frozen.is_frozen() && inner.outstanding_txns == 0 1398 1375 }; 1399 1376 1400 1377 if wake { ··· 1408 1385 let mut inner = self.inner.lock(); 1409 1386 inner.sync_recv = false; 1410 1387 inner.async_recv = false; 1411 - inner.is_frozen = false; 1388 + inner.is_frozen = IsFrozen::No; 1412 1389 drop(inner); 1413 1390 msgs.send_messages(); 1414 1391 return Ok(()); ··· 1417 1394 let mut inner = self.inner.lock(); 1418 1395 inner.sync_recv = false; 1419 1396 inner.async_recv = false; 1420 - inner.is_frozen = true; 1397 + inner.is_frozen = IsFrozen::InProgress; 1421 1398 1422 1399 if info.timeout_ms > 0 { 1423 1400 let mut jiffies = kernel::time::msecs_to_jiffies(info.timeout_ms); ··· 1431 1408 .wait_interruptible_timeout(&mut inner, jiffies) 1432 1409 { 1433 1410 CondVarTimeoutResult::Signal { .. } => { 1434 - inner.is_frozen = false; 1411 + inner.is_frozen = IsFrozen::No; 1435 1412 return Err(ERESTARTSYS); 1436 1413 } 1437 1414 CondVarTimeoutResult::Woken { jiffies: remaining } => { ··· 1445 1422 } 1446 1423 1447 1424 if inner.txns_pending_locked() { 1448 - inner.is_frozen = false; 1425 + inner.is_frozen = IsFrozen::No; 1449 1426 Err(EAGAIN) 1450 1427 } else { 1451 1428 drop(inner); 1452 1429 match self.prepare_freeze_messages() { 1453 1430 Ok(batch) => { 1431 + self.inner.lock().is_frozen = IsFrozen::Yes; 1454 1432 batch.send_messages(); 1455 1433 Ok(()) 1456 1434 } 1457 1435 Err(kernel::alloc::AllocError) => { 1458 - self.inner.lock().is_frozen = false; 1436 + self.inner.lock().is_frozen = IsFrozen::No; 1459 1437 Err(ENOMEM) 1460 1438 } 1461 1439 }
+3 -3
drivers/android/binder/transaction.rs
··· 249 249 250 250 if oneway { 251 251 if let Some(target_node) = self.target_node.clone() { 252 - if process_inner.is_frozen { 252 + if process_inner.is_frozen.is_frozen() { 253 253 process_inner.async_recv = true; 254 254 if self.flags & TF_UPDATE_TXN != 0 { 255 255 if let Some(t_outdated) = ··· 270 270 } 271 271 } 272 272 273 - if process_inner.is_frozen { 273 + if process_inner.is_frozen.is_frozen() { 274 274 return Err(BinderError::new_frozen_oneway()); 275 275 } else { 276 276 return Ok(()); ··· 280 280 } 281 281 } 282 282 283 - if process_inner.is_frozen { 283 + if process_inner.is_frozen.is_frozen() { 284 284 process_inner.sync_recv = true; 285 285 return Err(BinderError::new_frozen()); 286 286 }
+1 -1
drivers/base/arch_topology.c
··· 292 292 * frequency (by keeping the initial capacity_freq_ref value). 293 293 */ 294 294 cpu_clk = of_clk_get(cpu_node, 0); 295 - if (!PTR_ERR_OR_ZERO(cpu_clk)) { 295 + if (!IS_ERR_OR_NULL(cpu_clk)) { 296 296 per_cpu(capacity_freq_ref, cpu) = 297 297 clk_get_rate(cpu_clk) / HZ_PER_KHZ; 298 298 clk_put(cpu_clk);
+1 -1
drivers/base/core.c
··· 1784 1784 return 0; 1785 1785 1786 1786 if (fw_devlink_sync_state == FW_DEVLINK_SYNC_STATE_STRICT) { 1787 - dev_warn(sup, "sync_state() pending due to %s\n", 1787 + dev_info(sup, "sync_state() pending due to %s\n", 1788 1788 dev_name(link->consumer)); 1789 1789 return 0; 1790 1790 }
+83 -53
drivers/base/devcoredump.c
··· 23 23 void *data; 24 24 size_t datalen; 25 25 /* 26 - * Here, mutex is required to serialize the calls to del_wk work between 27 - * user/kernel space which happens when devcd is added with device_add() 28 - * and that sends uevent to user space. User space reads the uevents, 29 - * and calls to devcd_data_write() which try to modify the work which is 30 - * not even initialized/queued from devcoredump. 26 + * There are 2 races for which mutex is required. 31 27 * 28 + * The first race is between device creation and userspace writing to 29 + * schedule immediately destruction. 32 30 * 31 + * This race is handled by arming the timer before device creation, but 32 + * when device creation fails the timer still exists. 33 33 * 34 - * cpu0(X) cpu1(Y) 34 + * To solve this, hold the mutex during device_add(), and set 35 + * init_completed on success before releasing the mutex. 35 36 * 36 - * dev_coredump() uevent sent to user space 37 - * device_add() ======================> user space process Y reads the 38 - * uevents writes to devcd fd 39 - * which results into writes to 37 + * That way the timer will never fire until device_add() is called, 38 + * it will do nothing if init_completed is not set. The timer is also 39 + * cancelled in that case. 40 40 * 41 - * devcd_data_write() 42 - * mod_delayed_work() 43 - * try_to_grab_pending() 44 - * timer_delete() 45 - * debug_assert_init() 46 - * INIT_DELAYED_WORK() 47 - * schedule_delayed_work() 48 - * 49 - * 50 - * Also, mutex alone would not be enough to avoid scheduling of 51 - * del_wk work after it get flush from a call to devcd_free() 52 - * mentioned as below. 53 - * 54 - * disabled_store() 55 - * devcd_free() 56 - * mutex_lock() devcd_data_write() 57 - * flush_delayed_work() 58 - * mutex_unlock() 59 - * mutex_lock() 60 - * mod_delayed_work() 61 - * mutex_unlock() 62 - * So, delete_work flag is required. 41 + * The second race involves multiple parallel invocations of devcd_free(), 42 + * add a deleted flag so only 1 can call the destructor. 63 43 */ 64 44 struct mutex mutex; 65 - bool delete_work; 45 + bool init_completed, deleted; 66 46 struct module *owner; 67 47 ssize_t (*read)(char *buffer, loff_t offset, size_t count, 68 48 void *data, size_t datalen); 69 49 void (*free)(void *data); 50 + /* 51 + * If nothing interferes and device_add() was returns success, 52 + * del_wk will destroy the device after the timer fires. 53 + * 54 + * Multiple userspace processes can interfere in the working of the timer: 55 + * - Writing to the coredump will reschedule the timer to run immediately, 56 + * if still armed. 57 + * 58 + * This is handled by using "if (cancel_delayed_work()) { 59 + * schedule_delayed_work() }", to prevent re-arming after having 60 + * been previously fired. 61 + * - Writing to /sys/class/devcoredump/disabled will destroy the 62 + * coredump synchronously. 63 + * This is handled by using disable_delayed_work_sync(), and then 64 + * checking if deleted flag is set with &devcd->mutex held. 65 + */ 70 66 struct delayed_work del_wk; 71 67 struct device *failing_dev; 72 68 }; ··· 91 95 kfree(devcd); 92 96 } 93 97 98 + static void __devcd_del(struct devcd_entry *devcd) 99 + { 100 + devcd->deleted = true; 101 + device_del(&devcd->devcd_dev); 102 + put_device(&devcd->devcd_dev); 103 + } 104 + 94 105 static void devcd_del(struct work_struct *wk) 95 106 { 96 107 struct devcd_entry *devcd; 108 + bool init_completed; 97 109 98 110 devcd = container_of(wk, struct devcd_entry, del_wk.work); 99 111 100 - device_del(&devcd->devcd_dev); 101 - put_device(&devcd->devcd_dev); 112 + /* devcd->mutex serializes against dev_coredumpm_timeout */ 113 + mutex_lock(&devcd->mutex); 114 + init_completed = devcd->init_completed; 115 + mutex_unlock(&devcd->mutex); 116 + 117 + if (init_completed) 118 + __devcd_del(devcd); 102 119 } 103 120 104 121 static ssize_t devcd_data_read(struct file *filp, struct kobject *kobj, ··· 131 122 struct device *dev = kobj_to_dev(kobj); 132 123 struct devcd_entry *devcd = dev_to_devcd(dev); 133 124 134 - mutex_lock(&devcd->mutex); 135 - if (!devcd->delete_work) { 136 - devcd->delete_work = true; 137 - mod_delayed_work(system_wq, &devcd->del_wk, 0); 138 - } 139 - mutex_unlock(&devcd->mutex); 125 + /* 126 + * Although it's tempting to use mod_delayed work here, 127 + * that will cause a reschedule if the timer already fired. 128 + */ 129 + if (cancel_delayed_work(&devcd->del_wk)) 130 + schedule_delayed_work(&devcd->del_wk, 0); 140 131 141 132 return count; 142 133 } ··· 160 151 { 161 152 struct devcd_entry *devcd = dev_to_devcd(dev); 162 153 154 + /* 155 + * To prevent a race with devcd_data_write(), disable work and 156 + * complete manually instead. 157 + * 158 + * We cannot rely on the return value of 159 + * disable_delayed_work_sync() here, because it might be in the 160 + * middle of a cancel_delayed_work + schedule_delayed_work pair. 161 + * 162 + * devcd->mutex here guards against multiple parallel invocations 163 + * of devcd_free(). 164 + */ 165 + disable_delayed_work_sync(&devcd->del_wk); 163 166 mutex_lock(&devcd->mutex); 164 - if (!devcd->delete_work) 165 - devcd->delete_work = true; 166 - 167 - flush_delayed_work(&devcd->del_wk); 167 + if (!devcd->deleted) 168 + __devcd_del(devcd); 168 169 mutex_unlock(&devcd->mutex); 169 170 return 0; 170 171 } ··· 198 179 * put_device() <- last reference 199 180 * error = fn(dev, data) devcd_dev_release() 200 181 * devcd_free(dev, data) kfree(devcd) 201 - * mutex_lock(&devcd->mutex); 202 182 * 203 183 * 204 184 * In the above diagram, it looks like disabled_store() would be racing with parallelly 205 - * running devcd_del() and result in memory abort while acquiring devcd->mutex which 206 - * is called after kfree of devcd memory after dropping its last reference with 185 + * running devcd_del() and result in memory abort after dropping its last reference with 207 186 * put_device(). However, this will not happens as fn(dev, data) runs 208 187 * with its own reference to device via klist_node so it is not its last reference. 209 188 * so, above situation would not occur. ··· 391 374 devcd->read = read; 392 375 devcd->free = free; 393 376 devcd->failing_dev = get_device(dev); 394 - devcd->delete_work = false; 377 + devcd->deleted = false; 395 378 396 379 mutex_init(&devcd->mutex); 397 380 device_initialize(&devcd->devcd_dev); ··· 400 383 atomic_inc_return(&devcd_count)); 401 384 devcd->devcd_dev.class = &devcd_class; 402 385 403 - mutex_lock(&devcd->mutex); 404 386 dev_set_uevent_suppress(&devcd->devcd_dev, true); 387 + 388 + /* devcd->mutex prevents devcd_del() completing until init finishes */ 389 + mutex_lock(&devcd->mutex); 390 + devcd->init_completed = false; 391 + INIT_DELAYED_WORK(&devcd->del_wk, devcd_del); 392 + schedule_delayed_work(&devcd->del_wk, timeout); 393 + 405 394 if (device_add(&devcd->devcd_dev)) 406 395 goto put_device; 407 396 ··· 424 401 425 402 dev_set_uevent_suppress(&devcd->devcd_dev, false); 426 403 kobject_uevent(&devcd->devcd_dev.kobj, KOBJ_ADD); 427 - INIT_DELAYED_WORK(&devcd->del_wk, devcd_del); 428 - schedule_delayed_work(&devcd->del_wk, timeout); 404 + 405 + /* 406 + * Safe to run devcd_del() now that we are done with devcd_dev. 407 + * Alternatively we could have taken a ref on devcd_dev before 408 + * dropping the lock. 409 + */ 410 + devcd->init_completed = true; 429 411 mutex_unlock(&devcd->mutex); 430 412 return; 431 413 put_device: 432 - put_device(&devcd->devcd_dev); 433 414 mutex_unlock(&devcd->mutex); 415 + cancel_delayed_work_sync(&devcd->del_wk); 416 + put_device(&devcd->devcd_dev); 417 + 434 418 put_module: 435 419 module_put(owner); 436 420 free:
+6
drivers/bcma/main.c
··· 294 294 int err; 295 295 296 296 list_for_each_entry(core, &bus->cores, list) { 297 + struct device_node *np; 298 + 297 299 /* We support that core ourselves */ 298 300 switch (core->id.id) { 299 301 case BCMA_CORE_4706_CHIPCOMMON: ··· 311 309 312 310 /* Early cores were already registered */ 313 311 if (bcma_is_core_needed_early(core->id.id)) 312 + continue; 313 + 314 + np = core->dev.of_node; 315 + if (np && !of_device_is_available(np)) 314 316 continue; 315 317 316 318 /* Only first GMAC core on BCM4706 is connected and working */
+15
drivers/block/nbd.c
··· 52 52 static DEFINE_IDR(nbd_index_idr); 53 53 static DEFINE_MUTEX(nbd_index_mutex); 54 54 static struct workqueue_struct *nbd_del_wq; 55 + static struct cred *nbd_cred; 55 56 static int nbd_total_devices = 0; 56 57 57 58 struct nbd_sock { ··· 555 554 int result; 556 555 struct msghdr msg = {} ; 557 556 unsigned int noreclaim_flag; 557 + const struct cred *old_cred; 558 558 559 559 if (unlikely(!sock)) { 560 560 dev_err_ratelimited(disk_to_dev(nbd->disk), ··· 563 561 (send ? "send" : "recv")); 564 562 return -EINVAL; 565 563 } 564 + 565 + old_cred = override_creds(nbd_cred); 566 566 567 567 msg.msg_iter = *iter; 568 568 ··· 589 585 } while (msg_data_left(&msg)); 590 586 591 587 memalloc_noreclaim_restore(noreclaim_flag); 588 + 589 + revert_creds(old_cred); 592 590 593 591 return result; 594 592 } ··· 2683 2677 return -ENOMEM; 2684 2678 } 2685 2679 2680 + nbd_cred = prepare_kernel_cred(&init_task); 2681 + if (!nbd_cred) { 2682 + destroy_workqueue(nbd_del_wq); 2683 + unregister_blkdev(NBD_MAJOR, "nbd"); 2684 + return -ENOMEM; 2685 + } 2686 + 2686 2687 if (genl_register_family(&nbd_genl_family)) { 2688 + put_cred(nbd_cred); 2687 2689 destroy_workqueue(nbd_del_wq); 2688 2690 unregister_blkdev(NBD_MAJOR, "nbd"); 2689 2691 return -EINVAL; ··· 2746 2732 /* Also wait for nbd_dev_remove_work() completes */ 2747 2733 destroy_workqueue(nbd_del_wq); 2748 2734 2735 + put_cred(nbd_cred); 2749 2736 idr_destroy(&nbd_index_idr); 2750 2737 unregister_blkdev(NBD_MAJOR, "nbd"); 2751 2738 }
+3 -1
drivers/bluetooth/bpa10x.c
··· 41 41 struct usb_anchor rx_anchor; 42 42 43 43 struct sk_buff *rx_skb[2]; 44 + struct hci_uart hu; 44 45 }; 45 46 46 47 static void bpa10x_tx_complete(struct urb *urb) ··· 97 96 if (urb->status == 0) { 98 97 bool idx = usb_pipebulk(urb->pipe); 99 98 100 - data->rx_skb[idx] = h4_recv_buf(hdev, data->rx_skb[idx], 99 + data->rx_skb[idx] = h4_recv_buf(&data->hu, data->rx_skb[idx], 101 100 urb->transfer_buffer, 102 101 urb->actual_length, 103 102 bpa10x_recv_pkts, ··· 389 388 hci_set_drvdata(hdev, data); 390 389 391 390 data->hdev = hdev; 391 + data->hu.hdev = hdev; 392 392 393 393 SET_HCIDEV_DEV(hdev, &intf->dev); 394 394
+6 -5
drivers/bluetooth/btintel_pcie.c
··· 1467 1467 if (intr_hw & BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP1) 1468 1468 btintel_pcie_msix_gp1_handler(data); 1469 1469 1470 - /* This interrupt is triggered by the firmware after updating 1471 - * boot_stage register and image_response register 1472 - */ 1473 - if (intr_hw & BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP0) 1474 - btintel_pcie_msix_gp0_handler(data); 1475 1470 1476 1471 /* For TX */ 1477 1472 if (intr_fh & BTINTEL_PCIE_MSIX_FH_INT_CAUSES_0) { ··· 1481 1486 if (!btintel_pcie_is_txackq_empty(data)) 1482 1487 btintel_pcie_msix_tx_handle(data); 1483 1488 } 1489 + 1490 + /* This interrupt is triggered by the firmware after updating 1491 + * boot_stage register and image_response register 1492 + */ 1493 + if (intr_hw & BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP0) 1494 + btintel_pcie_msix_gp0_handler(data); 1484 1495 1485 1496 /* 1486 1497 * Before sending the interrupt the HW disables it to prevent a nested
+12
drivers/bluetooth/btmtksdio.c
··· 1270 1270 1271 1271 sdio_claim_host(bdev->func); 1272 1272 1273 + /* set drv_pmctrl if BT is closed before doing reset */ 1274 + if (!test_bit(BTMTKSDIO_FUNC_ENABLED, &bdev->tx_state)) { 1275 + sdio_enable_func(bdev->func); 1276 + btmtksdio_drv_pmctrl(bdev); 1277 + } 1278 + 1273 1279 sdio_writel(bdev->func, C_INT_EN_CLR, MTK_REG_CHLPCR, NULL); 1274 1280 skb_queue_purge(&bdev->txq); 1275 1281 cancel_work_sync(&bdev->txrx_work); ··· 1289 1283 if (err < 0) { 1290 1284 bt_dev_err(hdev, "Failed to reset (%d)", err); 1291 1285 goto err; 1286 + } 1287 + 1288 + /* set fw_pmctrl back if BT is closed after doing reset */ 1289 + if (!test_bit(BTMTKSDIO_FUNC_ENABLED, &bdev->tx_state)) { 1290 + btmtksdio_fw_pmctrl(bdev); 1291 + sdio_disable_func(bdev->func); 1292 1292 } 1293 1293 1294 1294 clear_bit(BTMTKSDIO_PATCH_ENABLED, &bdev->tx_state);
+3 -1
drivers/bluetooth/btmtkuart.c
··· 79 79 u16 stp_dlen; 80 80 81 81 const struct btmtkuart_data *data; 82 + struct hci_uart hu; 82 83 }; 83 84 84 85 #define btmtkuart_is_standalone(bdev) \ ··· 369 368 sz_left -= adv; 370 369 p_left += adv; 371 370 372 - bdev->rx_skb = h4_recv_buf(bdev->hdev, bdev->rx_skb, p_h4, 371 + bdev->rx_skb = h4_recv_buf(&bdev->hu, bdev->rx_skb, p_h4, 373 372 sz_h4, mtk_recv_pkts, 374 373 ARRAY_SIZE(mtk_recv_pkts)); 375 374 if (IS_ERR(bdev->rx_skb)) { ··· 859 858 } 860 859 861 860 bdev->hdev = hdev; 861 + bdev->hu.hdev = hdev; 862 862 863 863 hdev->bus = HCI_UART; 864 864 hci_set_drvdata(hdev, bdev);
+3 -1
drivers/bluetooth/btnxpuart.c
··· 212 212 struct ps_data psdata; 213 213 struct btnxpuart_data *nxp_data; 214 214 struct reset_control *pdn; 215 + struct hci_uart hu; 215 216 }; 216 217 217 218 #define NXP_V1_FW_REQ_PKT 0xa5 ··· 1757 1756 1758 1757 ps_start_timer(nxpdev); 1759 1758 1760 - nxpdev->rx_skb = h4_recv_buf(nxpdev->hdev, nxpdev->rx_skb, data, count, 1759 + nxpdev->rx_skb = h4_recv_buf(&nxpdev->hu, nxpdev->rx_skb, data, count, 1761 1760 nxp_recv_pkts, ARRAY_SIZE(nxp_recv_pkts)); 1762 1761 if (IS_ERR(nxpdev->rx_skb)) { 1763 1762 int err = PTR_ERR(nxpdev->rx_skb); ··· 1876 1875 reset_control_deassert(nxpdev->pdn); 1877 1876 1878 1877 nxpdev->hdev = hdev; 1878 + nxpdev->hu.hdev = hdev; 1879 1879 1880 1880 hdev->bus = HCI_UART; 1881 1881 hci_set_drvdata(hdev, nxpdev);
+1 -1
drivers/bluetooth/hci_ag6xx.c
··· 105 105 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 106 106 return -EUNATCH; 107 107 108 - ag6xx->rx_skb = h4_recv_buf(hu->hdev, ag6xx->rx_skb, data, count, 108 + ag6xx->rx_skb = h4_recv_buf(hu, ag6xx->rx_skb, data, count, 109 109 ag6xx_recv_pkts, 110 110 ARRAY_SIZE(ag6xx_recv_pkts)); 111 111 if (IS_ERR(ag6xx->rx_skb)) {
+1 -1
drivers/bluetooth/hci_aml.c
··· 650 650 struct aml_data *aml_data = hu->priv; 651 651 int err; 652 652 653 - aml_data->rx_skb = h4_recv_buf(hu->hdev, aml_data->rx_skb, data, count, 653 + aml_data->rx_skb = h4_recv_buf(hu, aml_data->rx_skb, data, count, 654 654 aml_recv_pkts, 655 655 ARRAY_SIZE(aml_recv_pkts)); 656 656 if (IS_ERR(aml_data->rx_skb)) {
+1 -1
drivers/bluetooth/hci_ath.c
··· 191 191 { 192 192 struct ath_struct *ath = hu->priv; 193 193 194 - ath->rx_skb = h4_recv_buf(hu->hdev, ath->rx_skb, data, count, 194 + ath->rx_skb = h4_recv_buf(hu, ath->rx_skb, data, count, 195 195 ath_recv_pkts, ARRAY_SIZE(ath_recv_pkts)); 196 196 if (IS_ERR(ath->rx_skb)) { 197 197 int err = PTR_ERR(ath->rx_skb);
+1 -1
drivers/bluetooth/hci_bcm.c
··· 698 698 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 699 699 return -EUNATCH; 700 700 701 - bcm->rx_skb = h4_recv_buf(hu->hdev, bcm->rx_skb, data, count, 701 + bcm->rx_skb = h4_recv_buf(hu, bcm->rx_skb, data, count, 702 702 bcm_recv_pkts, ARRAY_SIZE(bcm_recv_pkts)); 703 703 if (IS_ERR(bcm->rx_skb)) { 704 704 int err = PTR_ERR(bcm->rx_skb);
+3 -3
drivers/bluetooth/hci_h4.c
··· 112 112 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 113 113 return -EUNATCH; 114 114 115 - h4->rx_skb = h4_recv_buf(hu->hdev, h4->rx_skb, data, count, 115 + h4->rx_skb = h4_recv_buf(hu, h4->rx_skb, data, count, 116 116 h4_recv_pkts, ARRAY_SIZE(h4_recv_pkts)); 117 117 if (IS_ERR(h4->rx_skb)) { 118 118 int err = PTR_ERR(h4->rx_skb); ··· 151 151 return hci_uart_unregister_proto(&h4p); 152 152 } 153 153 154 - struct sk_buff *h4_recv_buf(struct hci_dev *hdev, struct sk_buff *skb, 154 + struct sk_buff *h4_recv_buf(struct hci_uart *hu, struct sk_buff *skb, 155 155 const unsigned char *buffer, int count, 156 156 const struct h4_recv_pkt *pkts, int pkts_count) 157 157 { 158 - struct hci_uart *hu = hci_get_drvdata(hdev); 159 158 u8 alignment = hu->alignment ? hu->alignment : 1; 159 + struct hci_dev *hdev = hu->hdev; 160 160 161 161 /* Check for error from previous call */ 162 162 if (IS_ERR(skb))
+1 -1
drivers/bluetooth/hci_intel.c
··· 972 972 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 973 973 return -EUNATCH; 974 974 975 - intel->rx_skb = h4_recv_buf(hu->hdev, intel->rx_skb, data, count, 975 + intel->rx_skb = h4_recv_buf(hu, intel->rx_skb, data, count, 976 976 intel_recv_pkts, 977 977 ARRAY_SIZE(intel_recv_pkts)); 978 978 if (IS_ERR(intel->rx_skb)) {
+1 -1
drivers/bluetooth/hci_ll.c
··· 429 429 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 430 430 return -EUNATCH; 431 431 432 - ll->rx_skb = h4_recv_buf(hu->hdev, ll->rx_skb, data, count, 432 + ll->rx_skb = h4_recv_buf(hu, ll->rx_skb, data, count, 433 433 ll_recv_pkts, ARRAY_SIZE(ll_recv_pkts)); 434 434 if (IS_ERR(ll->rx_skb)) { 435 435 int err = PTR_ERR(ll->rx_skb);
+3 -3
drivers/bluetooth/hci_mrvl.c
··· 264 264 !test_bit(STATE_FW_LOADED, &mrvl->flags)) 265 265 return count; 266 266 267 - mrvl->rx_skb = h4_recv_buf(hu->hdev, mrvl->rx_skb, data, count, 268 - mrvl_recv_pkts, 269 - ARRAY_SIZE(mrvl_recv_pkts)); 267 + mrvl->rx_skb = h4_recv_buf(hu, mrvl->rx_skb, data, count, 268 + mrvl_recv_pkts, 269 + ARRAY_SIZE(mrvl_recv_pkts)); 270 270 if (IS_ERR(mrvl->rx_skb)) { 271 271 int err = PTR_ERR(mrvl->rx_skb); 272 272 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
+2 -2
drivers/bluetooth/hci_nokia.c
··· 624 624 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 625 625 return -EUNATCH; 626 626 627 - btdev->rx_skb = h4_recv_buf(hu->hdev, btdev->rx_skb, data, count, 628 - nokia_recv_pkts, ARRAY_SIZE(nokia_recv_pkts)); 627 + btdev->rx_skb = h4_recv_buf(hu, btdev->rx_skb, data, count, 628 + nokia_recv_pkts, ARRAY_SIZE(nokia_recv_pkts)); 629 629 if (IS_ERR(btdev->rx_skb)) { 630 630 err = PTR_ERR(btdev->rx_skb); 631 631 dev_err(dev, "Frame reassembly failed (%d)", err);
+1 -1
drivers/bluetooth/hci_qca.c
··· 1277 1277 if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) 1278 1278 return -EUNATCH; 1279 1279 1280 - qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count, 1280 + qca->rx_skb = h4_recv_buf(hu, qca->rx_skb, data, count, 1281 1281 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); 1282 1282 if (IS_ERR(qca->rx_skb)) { 1283 1283 int err = PTR_ERR(qca->rx_skb);
+1 -1
drivers/bluetooth/hci_uart.h
··· 162 162 int h4_init(void); 163 163 int h4_deinit(void); 164 164 165 - struct sk_buff *h4_recv_buf(struct hci_dev *hdev, struct sk_buff *skb, 165 + struct sk_buff *h4_recv_buf(struct hci_uart *hu, struct sk_buff *skb, 166 166 const unsigned char *buffer, int count, 167 167 const struct h4_recv_pkt *pkts, int pkts_count); 168 168 #endif
+1 -1
drivers/comedi/comedi_buf.c
··· 317 317 unsigned int count = 0; 318 318 const unsigned int num_sample_bytes = comedi_bytes_per_sample(s); 319 319 320 - if (!s->munge || (async->cmd.flags & CMDF_RAWDATA)) { 320 + if (!s->munge || (async->cmd.flags & CMDF_RAWDATA) || async->cmd.chanlist_len == 0) { 321 321 async->munge_count += num_bytes; 322 322 return num_bytes; 323 323 }
+20 -16
drivers/dpll/dpll_netlink.c
··· 1559 1559 return -EMSGSIZE; 1560 1560 } 1561 1561 pin = dpll_pin_find_from_nlattr(info); 1562 - if (!IS_ERR(pin)) { 1563 - if (!dpll_pin_available(pin)) { 1564 - nlmsg_free(msg); 1565 - return -ENODEV; 1566 - } 1567 - ret = dpll_msg_add_pin_handle(msg, pin); 1568 - if (ret) { 1569 - nlmsg_free(msg); 1570 - return ret; 1571 - } 1562 + if (IS_ERR(pin)) { 1563 + nlmsg_free(msg); 1564 + return PTR_ERR(pin); 1565 + } 1566 + if (!dpll_pin_available(pin)) { 1567 + nlmsg_free(msg); 1568 + return -ENODEV; 1569 + } 1570 + ret = dpll_msg_add_pin_handle(msg, pin); 1571 + if (ret) { 1572 + nlmsg_free(msg); 1573 + return ret; 1572 1574 } 1573 1575 genlmsg_end(msg, hdr); 1574 1576 ··· 1737 1735 } 1738 1736 1739 1737 dpll = dpll_device_find_from_nlattr(info); 1740 - if (!IS_ERR(dpll)) { 1741 - ret = dpll_msg_add_dev_handle(msg, dpll); 1742 - if (ret) { 1743 - nlmsg_free(msg); 1744 - return ret; 1745 - } 1738 + if (IS_ERR(dpll)) { 1739 + nlmsg_free(msg); 1740 + return PTR_ERR(dpll); 1741 + } 1742 + ret = dpll_msg_add_dev_handle(msg, dpll); 1743 + if (ret) { 1744 + nlmsg_free(msg); 1745 + return ret; 1746 1746 } 1747 1747 genlmsg_end(msg, hdr); 1748 1748
+1 -1
drivers/dpll/zl3073x/dpll.c
··· 1904 1904 } 1905 1905 1906 1906 is_diff = zl3073x_out_is_diff(zldev, out); 1907 - is_enabled = zl3073x_out_is_enabled(zldev, out); 1907 + is_enabled = zl3073x_output_pin_is_enabled(zldev, index); 1908 1908 } 1909 1909 1910 1910 /* Skip N-pin if the corresponding input/output is differential */
+1 -1
drivers/firewire/core-transaction.c
··· 269 269 } 270 270 271 271 static int allocate_tlabel(struct fw_card *card) 272 - __must_hold(&card->transactions_lock) 272 + __must_hold(&card->transactions.lock) 273 273 { 274 274 int tlabel; 275 275
+10
drivers/firewire/init_ohci1394_dma.c
··· 167 167 168 168 /** 169 169 * init_ohci1394_wait_for_busresets - wait until bus resets are completed 170 + * @ohci: Pointer to the OHCI-1394 controller structure 170 171 * 171 172 * OHCI1394 initialization itself and any device going on- or offline 172 173 * and any cable issue cause a IEEE1394 bus reset. The OHCI1394 spec ··· 190 189 191 190 /** 192 191 * init_ohci1394_enable_physical_dma - Enable physical DMA for remote debugging 192 + * @ohci: Pointer to the OHCI-1394 controller structure 193 + * 193 194 * This enables remote DMA access over IEEE1394 from every host for the low 194 195 * 4GB of address space. DMA accesses above 4GB are not available currently. 195 196 */ ··· 204 201 205 202 /** 206 203 * init_ohci1394_reset_and_init_dma - init controller and enable DMA 204 + * @ohci: Pointer to the OHCI-1394 controller structure 205 + * 207 206 * This initializes the given controller and enables physical DMA engine in it. 208 207 */ 209 208 static inline void __init init_ohci1394_reset_and_init_dma(struct ohci *ohci) ··· 235 230 236 231 /** 237 232 * init_ohci1394_controller - Map the registers of the controller and init DMA 233 + * @num: PCI bus number 234 + * @slot: PCI device number 235 + * @func: PCI function number 236 + * 238 237 * This maps the registers of the specified controller and initializes it 239 238 */ 240 239 static inline void __init init_ohci1394_controller(int num, int slot, int func) ··· 293 284 294 285 /** 295 286 * setup_ohci1394_dma - enables early OHCI1394 DMA initialization 287 + * @opt: Kernel command line parameter string 296 288 */ 297 289 static int __init setup_ohci1394_dma(char *opt) 298 290 {
+27 -10
drivers/firmware/arm_ffa/driver.c
··· 649 649 return FFA_MEM_NORMAL | FFA_MEM_WRITE_BACK | FFA_MEM_INNER_SHAREABLE; 650 650 } 651 651 652 + static void ffa_emad_impdef_value_init(u32 version, void *dst, void *src) 653 + { 654 + struct ffa_mem_region_attributes *ep_mem_access; 655 + 656 + if (FFA_EMAD_HAS_IMPDEF_FIELD(version)) 657 + memcpy(dst, src, sizeof(ep_mem_access->impdef_val)); 658 + } 659 + 660 + static void 661 + ffa_mem_region_additional_setup(u32 version, struct ffa_mem_region *mem_region) 662 + { 663 + if (!FFA_MEM_REGION_HAS_EP_MEM_OFFSET(version)) { 664 + mem_region->ep_mem_size = 0; 665 + } else { 666 + mem_region->ep_mem_size = ffa_emad_size_get(version); 667 + mem_region->ep_mem_offset = sizeof(*mem_region); 668 + memset(mem_region->reserved, 0, 12); 669 + } 670 + } 671 + 652 672 static int 653 673 ffa_setup_and_transmit(u32 func_id, void *buffer, u32 max_fragsize, 654 674 struct ffa_mem_ops_args *args) ··· 687 667 mem_region->flags = args->flags; 688 668 mem_region->sender_id = drv_info->vm_id; 689 669 mem_region->attributes = ffa_memory_attributes_get(func_id); 690 - ep_mem_access = buffer + 691 - ffa_mem_desc_offset(buffer, 0, drv_info->version); 692 670 composite_offset = ffa_mem_desc_offset(buffer, args->nattrs, 693 671 drv_info->version); 694 672 695 - for (idx = 0; idx < args->nattrs; idx++, ep_mem_access++) { 673 + for (idx = 0; idx < args->nattrs; idx++) { 674 + ep_mem_access = buffer + 675 + ffa_mem_desc_offset(buffer, idx, drv_info->version); 696 676 ep_mem_access->receiver = args->attrs[idx].receiver; 697 677 ep_mem_access->attrs = args->attrs[idx].attrs; 698 678 ep_mem_access->composite_off = composite_offset; 699 679 ep_mem_access->flag = 0; 700 680 ep_mem_access->reserved = 0; 681 + ffa_emad_impdef_value_init(drv_info->version, 682 + ep_mem_access->impdef_val, 683 + args->attrs[idx].impdef_val); 701 684 } 702 685 mem_region->handle = 0; 703 686 mem_region->ep_count = args->nattrs; 704 - if (drv_info->version <= FFA_VERSION_1_0) { 705 - mem_region->ep_mem_size = 0; 706 - } else { 707 - mem_region->ep_mem_size = sizeof(*ep_mem_access); 708 - mem_region->ep_mem_offset = sizeof(*mem_region); 709 - memset(mem_region->reserved, 0, 12); 710 - } 687 + ffa_mem_region_additional_setup(drv_info->version, mem_region); 711 688 712 689 composite = buffer + composite_offset; 713 690 composite->total_pg_cnt = ffa_get_num_pages_sg(args->sg);
+26 -6
drivers/firmware/arm_scmi/common.h
··· 309 309 SCMI_DEBUG_COUNTERS_LAST 310 310 }; 311 311 312 - static inline void scmi_inc_count(atomic_t *arr, int stat) 312 + /** 313 + * struct scmi_debug_info - Debug common info 314 + * @top_dentry: A reference to the top debugfs dentry 315 + * @name: Name of this SCMI instance 316 + * @type: Type of this SCMI instance 317 + * @is_atomic: Flag to state if the transport of this instance is atomic 318 + * @counters: An array of atomic_c's used for tracking statistics (if enabled) 319 + */ 320 + struct scmi_debug_info { 321 + struct dentry *top_dentry; 322 + const char *name; 323 + const char *type; 324 + bool is_atomic; 325 + atomic_t counters[SCMI_DEBUG_COUNTERS_LAST]; 326 + }; 327 + 328 + static inline void scmi_inc_count(struct scmi_debug_info *dbg, int stat) 313 329 { 314 - if (IS_ENABLED(CONFIG_ARM_SCMI_DEBUG_COUNTERS)) 315 - atomic_inc(&arr[stat]); 330 + if (IS_ENABLED(CONFIG_ARM_SCMI_DEBUG_COUNTERS)) { 331 + if (dbg) 332 + atomic_inc(&dbg->counters[stat]); 333 + } 316 334 } 317 335 318 - static inline void scmi_dec_count(atomic_t *arr, int stat) 336 + static inline void scmi_dec_count(struct scmi_debug_info *dbg, int stat) 319 337 { 320 - if (IS_ENABLED(CONFIG_ARM_SCMI_DEBUG_COUNTERS)) 321 - atomic_dec(&arr[stat]); 338 + if (IS_ENABLED(CONFIG_ARM_SCMI_DEBUG_COUNTERS)) { 339 + if (dbg) 340 + atomic_dec(&dbg->counters[stat]); 341 + } 322 342 } 323 343 324 344 enum scmi_bad_msg {
+21 -38
drivers/firmware/arm_scmi/driver.c
··· 116 116 #define ph_to_pi(h) container_of(h, struct scmi_protocol_instance, ph) 117 117 118 118 /** 119 - * struct scmi_debug_info - Debug common info 120 - * @top_dentry: A reference to the top debugfs dentry 121 - * @name: Name of this SCMI instance 122 - * @type: Type of this SCMI instance 123 - * @is_atomic: Flag to state if the transport of this instance is atomic 124 - * @counters: An array of atomic_c's used for tracking statistics (if enabled) 125 - */ 126 - struct scmi_debug_info { 127 - struct dentry *top_dentry; 128 - const char *name; 129 - const char *type; 130 - bool is_atomic; 131 - atomic_t counters[SCMI_DEBUG_COUNTERS_LAST]; 132 - }; 133 - 134 - /** 135 119 * struct scmi_info - Structure representing a SCMI instance 136 120 * 137 121 * @id: A sequence number starting from zero identifying this instance ··· 594 610 /* Set in-flight */ 595 611 set_bit(xfer->hdr.seq, minfo->xfer_alloc_table); 596 612 hash_add(minfo->pending_xfers, &xfer->node, xfer->hdr.seq); 597 - scmi_inc_count(info->dbg->counters, XFERS_INFLIGHT); 613 + scmi_inc_count(info->dbg, XFERS_INFLIGHT); 598 614 599 615 xfer->pending = true; 600 616 } ··· 803 819 hash_del(&xfer->node); 804 820 xfer->pending = false; 805 821 806 - scmi_dec_count(info->dbg->counters, XFERS_INFLIGHT); 822 + scmi_dec_count(info->dbg, XFERS_INFLIGHT); 807 823 } 824 + xfer->flags = 0; 808 825 hlist_add_head(&xfer->node, &minfo->free_xfers); 809 826 } 810 827 spin_unlock_irqrestore(&minfo->xfer_lock, flags); ··· 824 839 { 825 840 struct scmi_info *info = handle_to_scmi_info(handle); 826 841 827 - xfer->flags &= ~SCMI_XFER_FLAG_IS_RAW; 828 - xfer->flags &= ~SCMI_XFER_FLAG_CHAN_SET; 829 842 return __scmi_xfer_put(&info->tx_minfo, xfer); 830 843 } 831 844 ··· 1017 1034 spin_unlock_irqrestore(&minfo->xfer_lock, flags); 1018 1035 1019 1036 scmi_bad_message_trace(cinfo, msg_hdr, MSG_UNEXPECTED); 1020 - scmi_inc_count(info->dbg->counters, ERR_MSG_UNEXPECTED); 1037 + scmi_inc_count(info->dbg, ERR_MSG_UNEXPECTED); 1021 1038 1022 1039 return xfer; 1023 1040 } ··· 1045 1062 msg_type, xfer_id, msg_hdr, xfer->state); 1046 1063 1047 1064 scmi_bad_message_trace(cinfo, msg_hdr, MSG_INVALID); 1048 - scmi_inc_count(info->dbg->counters, ERR_MSG_INVALID); 1065 + scmi_inc_count(info->dbg, ERR_MSG_INVALID); 1049 1066 1050 1067 /* On error the refcount incremented above has to be dropped */ 1051 1068 __scmi_xfer_put(minfo, xfer); ··· 1090 1107 PTR_ERR(xfer)); 1091 1108 1092 1109 scmi_bad_message_trace(cinfo, msg_hdr, MSG_NOMEM); 1093 - scmi_inc_count(info->dbg->counters, ERR_MSG_NOMEM); 1110 + scmi_inc_count(info->dbg, ERR_MSG_NOMEM); 1094 1111 1095 1112 scmi_clear_channel(info, cinfo); 1096 1113 return; ··· 1106 1123 trace_scmi_msg_dump(info->id, cinfo->id, xfer->hdr.protocol_id, 1107 1124 xfer->hdr.id, "NOTI", xfer->hdr.seq, 1108 1125 xfer->hdr.status, xfer->rx.buf, xfer->rx.len); 1109 - scmi_inc_count(info->dbg->counters, NOTIFICATION_OK); 1126 + scmi_inc_count(info->dbg, NOTIFICATION_OK); 1110 1127 1111 1128 scmi_notify(cinfo->handle, xfer->hdr.protocol_id, 1112 1129 xfer->hdr.id, xfer->rx.buf, xfer->rx.len, ts); ··· 1166 1183 if (xfer->hdr.type == MSG_TYPE_DELAYED_RESP) { 1167 1184 scmi_clear_channel(info, cinfo); 1168 1185 complete(xfer->async_done); 1169 - scmi_inc_count(info->dbg->counters, DELAYED_RESPONSE_OK); 1186 + scmi_inc_count(info->dbg, DELAYED_RESPONSE_OK); 1170 1187 } else { 1171 1188 complete(&xfer->done); 1172 - scmi_inc_count(info->dbg->counters, RESPONSE_OK); 1189 + scmi_inc_count(info->dbg, RESPONSE_OK); 1173 1190 } 1174 1191 1175 1192 if (IS_ENABLED(CONFIG_ARM_SCMI_RAW_MODE_SUPPORT)) { ··· 1279 1296 "timed out in resp(caller: %pS) - polling\n", 1280 1297 (void *)_RET_IP_); 1281 1298 ret = -ETIMEDOUT; 1282 - scmi_inc_count(info->dbg->counters, XFERS_RESPONSE_POLLED_TIMEOUT); 1299 + scmi_inc_count(info->dbg, XFERS_RESPONSE_POLLED_TIMEOUT); 1283 1300 } 1284 1301 } 1285 1302 ··· 1304 1321 "RESP" : "resp", 1305 1322 xfer->hdr.seq, xfer->hdr.status, 1306 1323 xfer->rx.buf, xfer->rx.len); 1307 - scmi_inc_count(info->dbg->counters, RESPONSE_POLLED_OK); 1324 + scmi_inc_count(info->dbg, RESPONSE_POLLED_OK); 1308 1325 1309 1326 if (IS_ENABLED(CONFIG_ARM_SCMI_RAW_MODE_SUPPORT)) { 1310 1327 scmi_raw_message_report(info->raw, xfer, ··· 1319 1336 dev_err(dev, "timed out in resp(caller: %pS)\n", 1320 1337 (void *)_RET_IP_); 1321 1338 ret = -ETIMEDOUT; 1322 - scmi_inc_count(info->dbg->counters, XFERS_RESPONSE_TIMEOUT); 1339 + scmi_inc_count(info->dbg, XFERS_RESPONSE_TIMEOUT); 1323 1340 } 1324 1341 } 1325 1342 ··· 1403 1420 !is_transport_polling_capable(info->desc)) { 1404 1421 dev_warn_once(dev, 1405 1422 "Polling mode is not supported by transport.\n"); 1406 - scmi_inc_count(info->dbg->counters, SENT_FAIL_POLLING_UNSUPPORTED); 1423 + scmi_inc_count(info->dbg, SENT_FAIL_POLLING_UNSUPPORTED); 1407 1424 return -EINVAL; 1408 1425 } 1409 1426 1410 1427 cinfo = idr_find(&info->tx_idr, pi->proto->id); 1411 1428 if (unlikely(!cinfo)) { 1412 - scmi_inc_count(info->dbg->counters, SENT_FAIL_CHANNEL_NOT_FOUND); 1429 + scmi_inc_count(info->dbg, SENT_FAIL_CHANNEL_NOT_FOUND); 1413 1430 return -EINVAL; 1414 1431 } 1415 1432 /* True ONLY if also supported by transport. */ ··· 1444 1461 ret = info->desc->ops->send_message(cinfo, xfer); 1445 1462 if (ret < 0) { 1446 1463 dev_dbg(dev, "Failed to send message %d\n", ret); 1447 - scmi_inc_count(info->dbg->counters, SENT_FAIL); 1464 + scmi_inc_count(info->dbg, SENT_FAIL); 1448 1465 return ret; 1449 1466 } 1450 1467 1451 1468 trace_scmi_msg_dump(info->id, cinfo->id, xfer->hdr.protocol_id, 1452 1469 xfer->hdr.id, "CMND", xfer->hdr.seq, 1453 1470 xfer->hdr.status, xfer->tx.buf, xfer->tx.len); 1454 - scmi_inc_count(info->dbg->counters, SENT_OK); 1471 + scmi_inc_count(info->dbg, SENT_OK); 1455 1472 1456 1473 ret = scmi_wait_for_message_response(cinfo, xfer); 1457 1474 if (!ret && xfer->hdr.status) { 1458 1475 ret = scmi_to_linux_errno(xfer->hdr.status); 1459 - scmi_inc_count(info->dbg->counters, ERR_PROTOCOL); 1476 + scmi_inc_count(info->dbg, ERR_PROTOCOL); 1460 1477 } 1461 1478 1462 1479 if (info->desc->ops->mark_txdone) ··· 3027 3044 u8 channels[SCMI_MAX_CHANNELS] = {}; 3028 3045 DECLARE_BITMAP(protos, SCMI_MAX_CHANNELS) = {}; 3029 3046 3030 - if (!info->dbg) 3031 - return -EINVAL; 3032 - 3033 3047 /* Enumerate all channels to collect their ids */ 3034 3048 idr_for_each_entry(&info->tx_idr, cinfo, id) { 3035 3049 /* ··· 3198 3218 if (!info->dbg) 3199 3219 dev_warn(dev, "Failed to setup SCMI debugfs.\n"); 3200 3220 3201 - if (IS_ENABLED(CONFIG_ARM_SCMI_RAW_MODE_SUPPORT)) { 3221 + if (info->dbg && IS_ENABLED(CONFIG_ARM_SCMI_RAW_MODE_SUPPORT)) { 3202 3222 ret = scmi_debugfs_raw_mode_setup(info); 3203 3223 if (!coex) { 3204 3224 if (ret) ··· 3402 3422 { 3403 3423 if (IS_ENABLED(CONFIG_ARM_SCMI_DEBUG_COUNTERS)) { 3404 3424 struct scmi_info *info = handle_to_scmi_info(handle); 3425 + 3426 + if (!info->dbg) 3427 + return 0; 3405 3428 3406 3429 return atomic_read(&info->dbg->counters[XFERS_INFLIGHT]); 3407 3430 } else {
+1
drivers/gpio/gpio-104-idio-16.c
··· 59 59 .reg_stride = 1, 60 60 .val_bits = 8, 61 61 .io_port = true, 62 + .max_register = 0x5, 62 63 .wr_table = &idio_16_wr_table, 63 64 .rd_table = &idio_16_rd_table, 64 65 .volatile_table = &idio_16_rd_table,
+5
drivers/gpio/gpio-idio-16.c
··· 6 6 7 7 #define DEFAULT_SYMBOL_NAMESPACE "GPIO_IDIO_16" 8 8 9 + #include <linux/bitmap.h> 9 10 #include <linux/bits.h> 10 11 #include <linux/device.h> 11 12 #include <linux/err.h> ··· 108 107 struct idio_16_data *data; 109 108 struct regmap_irq_chip *chip; 110 109 struct regmap_irq_chip_data *chip_data; 110 + DECLARE_BITMAP(fixed_direction_output, IDIO_16_NGPIO); 111 111 112 112 if (!config->parent) 113 113 return -EINVAL; ··· 165 163 gpio_config.reg_stride = IDIO_16_REG_STRIDE; 166 164 gpio_config.irq_domain = regmap_irq_get_domain(chip_data); 167 165 gpio_config.reg_mask_xlate = idio_16_reg_mask_xlate; 166 + 167 + bitmap_from_u64(fixed_direction_output, GENMASK_U64(15, 0)); 168 + gpio_config.fixed_direction_output = fixed_direction_output; 168 169 169 170 return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config)); 170 171 }
+3 -11
drivers/gpio/gpio-ljca.c
··· 286 286 { 287 287 const struct ljca_gpio_packet *packet = evt_data; 288 288 struct ljca_gpio_dev *ljca_gpio = context; 289 - int i, irq; 289 + int i; 290 290 291 291 if (cmd != LJCA_GPIO_INT_EVENT) 292 292 return; 293 293 294 294 for (i = 0; i < packet->num; i++) { 295 - irq = irq_find_mapping(ljca_gpio->gc.irq.domain, 296 - packet->item[i].index); 297 - if (!irq) { 298 - dev_err(ljca_gpio->gc.parent, 299 - "gpio_id %u does not mapped to IRQ yet\n", 300 - packet->item[i].index); 301 - return; 302 - } 303 - 304 - generic_handle_domain_irq(ljca_gpio->gc.irq.domain, irq); 295 + generic_handle_domain_irq(ljca_gpio->gc.irq.domain, 296 + packet->item[i].index); 305 297 set_bit(packet->item[i].index, ljca_gpio->reenable_irqs); 306 298 } 307 299
+1
drivers/gpio/gpio-pci-idio-16.c
··· 41 41 .reg_stride = 1, 42 42 .val_bits = 8, 43 43 .io_port = true, 44 + .max_register = 0x7, 44 45 .wr_table = &idio_16_wr_table, 45 46 .rd_table = &idio_16_rd_table, 46 47 .volatile_table = &idio_16_rd_table,
+24 -2
drivers/gpio/gpio-regmap.c
··· 31 31 unsigned int reg_clr_base; 32 32 unsigned int reg_dir_in_base; 33 33 unsigned int reg_dir_out_base; 34 + unsigned long *fixed_direction_output; 34 35 35 36 #ifdef CONFIG_REGMAP_IRQ 36 37 int regmap_irq_line; ··· 134 133 struct gpio_regmap *gpio = gpiochip_get_data(chip); 135 134 unsigned int base, val, reg, mask; 136 135 int invert, ret; 136 + 137 + if (gpio->fixed_direction_output) { 138 + if (test_bit(offset, gpio->fixed_direction_output)) 139 + return GPIO_LINE_DIRECTION_OUT; 140 + else 141 + return GPIO_LINE_DIRECTION_IN; 142 + } 137 143 138 144 if (gpio->reg_dat_base && !gpio->reg_set_base) 139 145 return GPIO_LINE_DIRECTION_IN; ··· 292 284 goto err_free_gpio; 293 285 } 294 286 287 + if (config->fixed_direction_output) { 288 + gpio->fixed_direction_output = bitmap_alloc(chip->ngpio, 289 + GFP_KERNEL); 290 + if (!gpio->fixed_direction_output) { 291 + ret = -ENOMEM; 292 + goto err_free_gpio; 293 + } 294 + bitmap_copy(gpio->fixed_direction_output, 295 + config->fixed_direction_output, chip->ngpio); 296 + } 297 + 295 298 /* if not set, assume there is only one register */ 296 299 gpio->ngpio_per_reg = config->ngpio_per_reg; 297 300 if (!gpio->ngpio_per_reg) ··· 319 300 320 301 ret = gpiochip_add_data(chip, gpio); 321 302 if (ret < 0) 322 - goto err_free_gpio; 303 + goto err_free_bitmap; 323 304 324 305 #ifdef CONFIG_REGMAP_IRQ 325 306 if (config->regmap_irq_chip) { ··· 328 309 config->regmap_irq_line, config->regmap_irq_flags, 329 310 0, config->regmap_irq_chip, &gpio->irq_chip_data); 330 311 if (ret) 331 - goto err_free_gpio; 312 + goto err_free_bitmap; 332 313 333 314 irq_domain = regmap_irq_get_domain(gpio->irq_chip_data); 334 315 } else ··· 345 326 346 327 err_remove_gpiochip: 347 328 gpiochip_remove(chip); 329 + err_free_bitmap: 330 + bitmap_free(gpio->fixed_direction_output); 348 331 err_free_gpio: 349 332 kfree(gpio); 350 333 return ERR_PTR(ret); ··· 365 344 #endif 366 345 367 346 gpiochip_remove(&gpio->gpio_chip); 347 + bitmap_free(gpio->fixed_direction_output); 368 348 kfree(gpio); 369 349 } 370 350 EXPORT_SYMBOL_GPL(gpio_regmap_unregister);
+17 -14
drivers/gpio/gpiolib-acpi-core.c
··· 291 291 return GPIOD_ASIS; 292 292 } 293 293 294 + static void acpi_gpio_set_debounce_timeout(struct gpio_desc *desc, 295 + unsigned int acpi_debounce) 296 + { 297 + int ret; 298 + 299 + /* ACPI uses hundredths of milliseconds units */ 300 + acpi_debounce *= 10; 301 + ret = gpio_set_debounce_timeout(desc, acpi_debounce); 302 + if (ret) 303 + gpiod_warn(desc, "Failed to set debounce-timeout %u: %d\n", 304 + acpi_debounce, ret); 305 + } 306 + 294 307 static struct gpio_desc *acpi_request_own_gpiod(struct gpio_chip *chip, 295 308 struct acpi_resource_gpio *agpio, 296 309 unsigned int index, ··· 313 300 enum gpiod_flags flags = acpi_gpio_to_gpiod_flags(agpio, polarity); 314 301 unsigned int pin = agpio->pin_table[index]; 315 302 struct gpio_desc *desc; 316 - int ret; 317 303 318 304 desc = gpiochip_request_own_desc(chip, pin, label, polarity, flags); 319 305 if (IS_ERR(desc)) 320 306 return desc; 321 307 322 - /* ACPI uses hundredths of milliseconds units */ 323 - ret = gpio_set_debounce_timeout(desc, agpio->debounce_timeout * 10); 324 - if (ret) 325 - dev_warn(chip->parent, 326 - "Failed to set debounce-timeout for pin 0x%04X, err %d\n", 327 - pin, ret); 308 + acpi_gpio_set_debounce_timeout(desc, agpio->debounce_timeout); 328 309 329 310 return desc; 330 311 } ··· 382 375 desc = acpi_request_own_gpiod(chip, agpio, 0, "ACPI:Event"); 383 376 if (IS_ERR(desc)) { 384 377 dev_err(chip->parent, 385 - "Failed to request GPIO for pin 0x%04X, err %ld\n", 386 - pin, PTR_ERR(desc)); 378 + "Failed to request GPIO for pin 0x%04X, err %pe\n", 379 + pin, desc); 387 380 return AE_OK; 388 381 } 389 382 ··· 951 944 bool can_fallback = acpi_can_fallback_to_crs(adev, con_id); 952 945 struct acpi_gpio_info info = {}; 953 946 struct gpio_desc *desc; 954 - int ret; 955 947 956 948 desc = __acpi_find_gpio(fwnode, con_id, idx, can_fallback, &info); 957 949 if (IS_ERR(desc)) ··· 965 959 acpi_gpio_update_gpiod_flags(dflags, &info); 966 960 acpi_gpio_update_gpiod_lookup_flags(lookupflags, &info); 967 961 968 - /* ACPI uses hundredths of milliseconds units */ 969 - ret = gpio_set_debounce_timeout(desc, info.debounce * 10); 970 - if (ret) 971 - return ERR_PTR(ret); 962 + acpi_gpio_set_debounce_timeout(desc, info.debounce); 972 963 973 964 return desc; 974 965 }
+2 -2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
··· 551 551 struct dc_stream_state *stream, 552 552 struct dc_crtc_timing_adjust *adjust) 553 553 { 554 - struct vupdate_offload_work *offload_work = kzalloc(sizeof(*offload_work), GFP_KERNEL); 554 + struct vupdate_offload_work *offload_work = kzalloc(sizeof(*offload_work), GFP_NOWAIT); 555 555 if (!offload_work) { 556 556 drm_dbg_driver(adev_to_drm(adev), "Failed to allocate vupdate_offload_work\n"); 557 557 return; 558 558 } 559 559 560 - struct dc_crtc_timing_adjust *adjust_copy = kzalloc(sizeof(*adjust_copy), GFP_KERNEL); 560 + struct dc_crtc_timing_adjust *adjust_copy = kzalloc(sizeof(*adjust_copy), GFP_NOWAIT); 561 561 if (!adjust_copy) { 562 562 drm_dbg_driver(adev_to_drm(adev), "Failed to allocate adjust_copy\n"); 563 563 kfree(offload_work);
+3
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
··· 200 200 */ 201 201 struct dc_link *link = dc->links[i]; 202 202 203 + if (link->ep_type != DISPLAY_ENDPOINT_PHY) 204 + continue; 205 + 203 206 link->link_enc->funcs->hw_init(link->link_enc); 204 207 205 208 /* Check for enabled DIG to identify enabled display */
+7 -1
drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
··· 44 44 */ 45 45 #define MAX_PIPES 6 46 46 #define MAX_PHANTOM_PIPES (MAX_PIPES / 2) 47 - #define MAX_LINKS (MAX_PIPES * 2 +2) 47 + 48 + #define MAX_DPIA 6 49 + #define MAX_CONNECTOR 6 50 + #define MAX_VIRTUAL_LINKS 4 51 + 52 + #define MAX_LINKS (MAX_DPIA + MAX_CONNECTOR + MAX_VIRTUAL_LINKS) 53 + 48 54 #define MAX_DIG_LINK_ENCODERS 7 49 55 #define MAX_DWB_PIPES 1 50 56 #define MAX_HPO_DP2_ENCODERS 4
+54 -6
drivers/gpu/drm/drm_panic.c
··· 174 174 *p = color & 0xff; 175 175 } 176 176 177 + /* 178 + * Special case if the pixel crosses page boundaries 179 + */ 180 + static void drm_panic_write_pixel24_xpage(void *vaddr, struct page *next_page, 181 + unsigned int offset, u32 color) 182 + { 183 + u8 *vaddr2; 184 + u8 *p = vaddr + offset; 185 + 186 + vaddr2 = kmap_local_page_try_from_panic(next_page); 187 + 188 + *p++ = color & 0xff; 189 + color >>= 8; 190 + 191 + if (offset == PAGE_SIZE - 1) 192 + p = vaddr2; 193 + 194 + *p++ = color & 0xff; 195 + color >>= 8; 196 + 197 + if (offset == PAGE_SIZE - 2) 198 + p = vaddr2; 199 + 200 + *p = color & 0xff; 201 + kunmap_local(vaddr2); 202 + } 203 + 177 204 static void drm_panic_write_pixel32(void *vaddr, unsigned int offset, u32 color) 178 205 { 179 206 u32 *p = vaddr + offset; ··· 258 231 page = new_page; 259 232 vaddr = kmap_local_page_try_from_panic(pages[page]); 260 233 } 261 - if (vaddr) 234 + if (!vaddr) 235 + continue; 236 + 237 + // Special case for 24bit, as a pixel might cross page boundaries 238 + if (cpp == 3 && offset + 3 > PAGE_SIZE) 239 + drm_panic_write_pixel24_xpage(vaddr, pages[page + 1], 240 + offset, fg32); 241 + else 262 242 drm_panic_write_pixel(vaddr, offset, fg32, cpp); 263 243 } 264 244 } ··· 355 321 page = new_page; 356 322 vaddr = kmap_local_page_try_from_panic(pages[page]); 357 323 } 358 - drm_panic_write_pixel(vaddr, offset, color, cpp); 324 + if (!vaddr) 325 + continue; 326 + 327 + // Special case for 24bit, as a pixel might cross page boundaries 328 + if (cpp == 3 && offset + 3 > PAGE_SIZE) 329 + drm_panic_write_pixel24_xpage(vaddr, pages[page + 1], 330 + offset, color); 331 + else 332 + drm_panic_write_pixel(vaddr, offset, color, cpp); 359 333 } 360 334 } 361 335 if (vaddr) ··· 471 429 static void drm_panic_logo_draw(struct drm_scanout_buffer *sb, struct drm_rect *rect, 472 430 const struct font_desc *font, u32 fg_color) 473 431 { 432 + if (rect->x2 > sb->width || rect->y2 > sb->height) 433 + return; 434 + 474 435 if (logo_mono) 475 436 drm_panic_blit(sb, rect, logo_mono->data, 476 437 DIV_ROUND_UP(drm_rect_width(rect), 8), 1, fg_color); ··· 522 477 struct drm_panic_line *line, int yoffset, u32 fg_color) 523 478 { 524 479 int chars_per_row = sb->width / font->width; 525 - struct drm_rect r_txt = DRM_RECT_INIT(0, yoffset, sb->width, sb->height); 480 + struct drm_rect r_txt = DRM_RECT_INIT(0, yoffset, sb->width, font->height); 526 481 struct drm_panic_line line_wrap; 527 482 528 483 if (line->len > chars_per_row) { ··· 565 520 struct drm_panic_line line; 566 521 int yoffset; 567 522 568 - if (!font) 523 + if (!font || font->width > sb->width) 569 524 return; 570 525 571 526 yoffset = sb->height - font->height - (sb->height % font->height) / 2; ··· 778 733 pr_debug("QR width %d and scale %d\n", qr_width, scale); 779 734 r_qr_canvas = DRM_RECT_INIT(0, 0, qr_canvas_width * scale, qr_canvas_width * scale); 780 735 781 - v_margin = (sb->height - drm_rect_height(&r_qr_canvas) - drm_rect_height(&r_msg)) / 5; 736 + v_margin = sb->height - drm_rect_height(&r_qr_canvas) - drm_rect_height(&r_msg); 737 + if (v_margin < 0) 738 + return -ENOSPC; 739 + v_margin /= 5; 782 740 783 741 drm_rect_translate(&r_qr_canvas, (sb->width - r_qr_canvas.x2) / 2, 2 * v_margin); 784 742 r_qr = DRM_RECT_INIT(r_qr_canvas.x1 + QR_MARGIN * scale, r_qr_canvas.y1 + QR_MARGIN * scale, ··· 794 746 /* Fill with the background color, and draw text on top */ 795 747 drm_panic_fill(sb, &r_screen, bg_color); 796 748 797 - if (!drm_rect_overlap(&r_logo, &r_msg) && !drm_rect_overlap(&r_logo, &r_qr)) 749 + if (!drm_rect_overlap(&r_logo, &r_msg) && !drm_rect_overlap(&r_logo, &r_qr_canvas)) 798 750 drm_panic_logo_draw(sb, &r_logo, font, fg_color); 799 751 800 752 draw_txt_rectangle(sb, font, panic_msg, panic_msg_lines, true, &r_msg, fg_color);
+13 -12
drivers/gpu/drm/i915/display/intel_fb.c
··· 2117 2117 2118 2118 intel_frontbuffer_put(intel_fb->frontbuffer); 2119 2119 2120 + kfree(intel_fb->panic); 2120 2121 kfree(intel_fb); 2121 2122 } 2122 2123 ··· 2216 2215 struct intel_display *display = to_intel_display(obj->dev); 2217 2216 struct drm_framebuffer *fb = &intel_fb->base; 2218 2217 u32 max_stride; 2219 - int ret = -EINVAL; 2218 + int ret; 2220 2219 int i; 2220 + 2221 + intel_fb->panic = intel_panic_alloc(); 2222 + if (!intel_fb->panic) 2223 + return -ENOMEM; 2221 2224 2222 2225 /* 2223 2226 * intel_frontbuffer_get() must be done before 2224 2227 * intel_fb_bo_framebuffer_init() to avoid set_tiling vs. addfb race. 2225 2228 */ 2226 2229 intel_fb->frontbuffer = intel_frontbuffer_get(obj); 2227 - if (!intel_fb->frontbuffer) 2228 - return -ENOMEM; 2230 + if (!intel_fb->frontbuffer) { 2231 + ret = -ENOMEM; 2232 + goto err_free_panic; 2233 + } 2229 2234 2230 2235 ret = intel_fb_bo_framebuffer_init(fb, obj, mode_cmd); 2231 2236 if (ret) ··· 2330 2323 intel_fb_bo_framebuffer_fini(obj); 2331 2324 err_frontbuffer_put: 2332 2325 intel_frontbuffer_put(intel_fb->frontbuffer); 2326 + err_free_panic: 2327 + kfree(intel_fb->panic); 2328 + 2333 2329 return ret; 2334 2330 } 2335 2331 ··· 2359 2349 struct intel_framebuffer *intel_framebuffer_alloc(void) 2360 2350 { 2361 2351 struct intel_framebuffer *intel_fb; 2362 - struct intel_panic *panic; 2363 2352 2364 2353 intel_fb = kzalloc(sizeof(*intel_fb), GFP_KERNEL); 2365 2354 if (!intel_fb) 2366 2355 return NULL; 2367 - 2368 - panic = intel_panic_alloc(); 2369 - if (!panic) { 2370 - kfree(intel_fb); 2371 - return NULL; 2372 - } 2373 - 2374 - intel_fb->panic = panic; 2375 2356 2376 2357 return intel_fb; 2377 2358 }
+7 -3
drivers/gpu/drm/panthor/panthor_mmu.c
··· 1175 1175 break; 1176 1176 1177 1177 case DRM_PANTHOR_VM_BIND_OP_TYPE_UNMAP: 1178 - /* Partial unmaps might trigger a remap with either a prev or a next VA, 1179 - * but not both. 1178 + /* Two VMAs can be needed for an unmap, as an unmap can happen 1179 + * in the middle of a drm_gpuva, requiring a remap with both 1180 + * prev & next VA. Or an unmap can span more than one drm_gpuva 1181 + * where the first and last ones are covered partially, requring 1182 + * a remap for the first with a prev VA and remap for the last 1183 + * with a next VA. 1180 1184 */ 1181 - vma_count = 1; 1185 + vma_count = 2; 1182 1186 break; 1183 1187 1184 1188 default:
+1 -1
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
··· 361 361 362 362 regmap_write(hdmi->regmap, RK3228_GRF_SOC_CON2, 363 363 FIELD_PREP_WM16(RK3228_HDMI_SDAIN_MSK, 1) | 364 - FIELD_PREP_WM16(RK3328_HDMI_SCLIN_MSK, 1)); 364 + FIELD_PREP_WM16(RK3228_HDMI_SCLIN_MSK, 1)); 365 365 } 366 366 367 367 static enum drm_connector_status
+3
drivers/gpu/drm/xe/xe_ggtt.c
··· 292 292 ggtt->pt_ops = &xelp_pt_ops; 293 293 294 294 ggtt->wq = alloc_workqueue("xe-ggtt-wq", 0, WQ_MEM_RECLAIM); 295 + if (!ggtt->wq) 296 + return -ENOMEM; 297 + 295 298 __xe_ggtt_init_early(ggtt, xe_wopcm_size(xe)); 296 299 297 300 err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
+2 -2
drivers/gpu/drm/xe/xe_pt.c
··· 2022 2022 case DRM_GPUVA_OP_MAP: 2023 2023 if ((!op->map.immediate && xe_vm_in_fault_mode(vm) && 2024 2024 !op->map.invalidate_on_bind) || 2025 - op->map.is_cpu_addr_mirror) 2025 + (op->map.vma_flags & XE_VMA_SYSTEM_ALLOCATOR)) 2026 2026 break; 2027 2027 2028 2028 err = bind_op_prepare(vm, tile, pt_update_ops, op->map.vma, ··· 2252 2252 switch (op->base.op) { 2253 2253 case DRM_GPUVA_OP_MAP: 2254 2254 if ((!op->map.immediate && xe_vm_in_fault_mode(vm)) || 2255 - op->map.is_cpu_addr_mirror) 2255 + (op->map.vma_flags & XE_VMA_SYSTEM_ALLOCATOR)) 2256 2256 break; 2257 2257 2258 2258 bind_op_commit(vm, tile, pt_update_ops, op->map.vma, fence,
+5
drivers/gpu/drm/xe/xe_svm.c
··· 302 302 if (!vma) 303 303 return -EINVAL; 304 304 305 + if (!(vma->gpuva.flags & XE_VMA_MADV_AUTORESET)) { 306 + drm_dbg(&vm->xe->drm, "Skipping madvise reset for vma.\n"); 307 + return 0; 308 + } 309 + 305 310 if (xe_vma_has_default_mem_attrs(vma)) 306 311 return 0; 307 312
+37 -59
drivers/gpu/drm/xe/xe_vm.c
··· 616 616 vops->pt_update_ops[i].num_ops += inc_val; 617 617 } 618 618 619 + #define XE_VMA_CREATE_MASK ( \ 620 + XE_VMA_READ_ONLY | \ 621 + XE_VMA_DUMPABLE | \ 622 + XE_VMA_SYSTEM_ALLOCATOR | \ 623 + DRM_GPUVA_SPARSE | \ 624 + XE_VMA_MADV_AUTORESET) 625 + 619 626 static void xe_vm_populate_rebind(struct xe_vma_op *op, struct xe_vma *vma, 620 627 u8 tile_mask) 621 628 { ··· 635 628 op->base.map.gem.offset = vma->gpuva.gem.offset; 636 629 op->map.vma = vma; 637 630 op->map.immediate = true; 638 - op->map.dumpable = vma->gpuva.flags & XE_VMA_DUMPABLE; 639 - op->map.is_null = xe_vma_is_null(vma); 631 + op->map.vma_flags = vma->gpuva.flags & XE_VMA_CREATE_MASK; 640 632 } 641 633 642 634 static int xe_vm_ops_add_rebind(struct xe_vma_ops *vops, struct xe_vma *vma, ··· 938 932 kfree(vma); 939 933 } 940 934 941 - #define VMA_CREATE_FLAG_READ_ONLY BIT(0) 942 - #define VMA_CREATE_FLAG_IS_NULL BIT(1) 943 - #define VMA_CREATE_FLAG_DUMPABLE BIT(2) 944 - #define VMA_CREATE_FLAG_IS_SYSTEM_ALLOCATOR BIT(3) 945 - 946 935 static struct xe_vma *xe_vma_create(struct xe_vm *vm, 947 936 struct xe_bo *bo, 948 937 u64 bo_offset_or_userptr, ··· 948 947 struct xe_vma *vma; 949 948 struct xe_tile *tile; 950 949 u8 id; 951 - bool read_only = (flags & VMA_CREATE_FLAG_READ_ONLY); 952 - bool is_null = (flags & VMA_CREATE_FLAG_IS_NULL); 953 - bool dumpable = (flags & VMA_CREATE_FLAG_DUMPABLE); 954 - bool is_cpu_addr_mirror = 955 - (flags & VMA_CREATE_FLAG_IS_SYSTEM_ALLOCATOR); 950 + bool is_null = (flags & DRM_GPUVA_SPARSE); 951 + bool is_cpu_addr_mirror = (flags & XE_VMA_SYSTEM_ALLOCATOR); 956 952 957 953 xe_assert(vm->xe, start < end); 958 954 xe_assert(vm->xe, end < vm->size); ··· 970 972 if (!vma) 971 973 return ERR_PTR(-ENOMEM); 972 974 973 - if (is_cpu_addr_mirror) 974 - vma->gpuva.flags |= XE_VMA_SYSTEM_ALLOCATOR; 975 - if (is_null) 976 - vma->gpuva.flags |= DRM_GPUVA_SPARSE; 977 975 if (bo) 978 976 vma->gpuva.gem.obj = &bo->ttm.base; 979 977 } ··· 980 986 vma->gpuva.vm = &vm->gpuvm; 981 987 vma->gpuva.va.addr = start; 982 988 vma->gpuva.va.range = end - start + 1; 983 - if (read_only) 984 - vma->gpuva.flags |= XE_VMA_READ_ONLY; 985 - if (dumpable) 986 - vma->gpuva.flags |= XE_VMA_DUMPABLE; 989 + vma->gpuva.flags = flags; 987 990 988 991 for_each_tile(tile, vm->xe, id) 989 992 vma->tile_mask |= 0x1 << id; ··· 2263 2272 if (__op->op == DRM_GPUVA_OP_MAP) { 2264 2273 op->map.immediate = 2265 2274 flags & DRM_XE_VM_BIND_FLAG_IMMEDIATE; 2266 - op->map.read_only = 2267 - flags & DRM_XE_VM_BIND_FLAG_READONLY; 2268 - op->map.is_null = flags & DRM_XE_VM_BIND_FLAG_NULL; 2269 - op->map.is_cpu_addr_mirror = flags & 2270 - DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR; 2271 - op->map.dumpable = flags & DRM_XE_VM_BIND_FLAG_DUMPABLE; 2275 + if (flags & DRM_XE_VM_BIND_FLAG_READONLY) 2276 + op->map.vma_flags |= XE_VMA_READ_ONLY; 2277 + if (flags & DRM_XE_VM_BIND_FLAG_NULL) 2278 + op->map.vma_flags |= DRM_GPUVA_SPARSE; 2279 + if (flags & DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR) 2280 + op->map.vma_flags |= XE_VMA_SYSTEM_ALLOCATOR; 2281 + if (flags & DRM_XE_VM_BIND_FLAG_DUMPABLE) 2282 + op->map.vma_flags |= XE_VMA_DUMPABLE; 2283 + if (flags & DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET) 2284 + op->map.vma_flags |= XE_VMA_MADV_AUTORESET; 2272 2285 op->map.pat_index = pat_index; 2273 2286 op->map.invalidate_on_bind = 2274 2287 __xe_vm_needs_clear_scratch_pages(vm, flags); ··· 2585 2590 .pat_index = op->map.pat_index, 2586 2591 }; 2587 2592 2588 - flags |= op->map.read_only ? 2589 - VMA_CREATE_FLAG_READ_ONLY : 0; 2590 - flags |= op->map.is_null ? 2591 - VMA_CREATE_FLAG_IS_NULL : 0; 2592 - flags |= op->map.dumpable ? 2593 - VMA_CREATE_FLAG_DUMPABLE : 0; 2594 - flags |= op->map.is_cpu_addr_mirror ? 2595 - VMA_CREATE_FLAG_IS_SYSTEM_ALLOCATOR : 0; 2593 + flags |= op->map.vma_flags & XE_VMA_CREATE_MASK; 2596 2594 2597 2595 vma = new_vma(vm, &op->base.map, &default_attr, 2598 2596 flags); ··· 2594 2606 2595 2607 op->map.vma = vma; 2596 2608 if (((op->map.immediate || !xe_vm_in_fault_mode(vm)) && 2597 - !op->map.is_cpu_addr_mirror) || 2609 + !(op->map.vma_flags & XE_VMA_SYSTEM_ALLOCATOR)) || 2598 2610 op->map.invalidate_on_bind) 2599 2611 xe_vma_ops_incr_pt_update_ops(vops, 2600 2612 op->tile_mask, 1); ··· 2625 2637 op->remap.start = xe_vma_start(old); 2626 2638 op->remap.range = xe_vma_size(old); 2627 2639 2628 - flags |= op->base.remap.unmap->va->flags & 2629 - XE_VMA_READ_ONLY ? 2630 - VMA_CREATE_FLAG_READ_ONLY : 0; 2631 - flags |= op->base.remap.unmap->va->flags & 2632 - DRM_GPUVA_SPARSE ? 2633 - VMA_CREATE_FLAG_IS_NULL : 0; 2634 - flags |= op->base.remap.unmap->va->flags & 2635 - XE_VMA_DUMPABLE ? 2636 - VMA_CREATE_FLAG_DUMPABLE : 0; 2637 - flags |= xe_vma_is_cpu_addr_mirror(old) ? 2638 - VMA_CREATE_FLAG_IS_SYSTEM_ALLOCATOR : 0; 2639 - 2640 + flags |= op->base.remap.unmap->va->flags & XE_VMA_CREATE_MASK; 2640 2641 if (op->base.remap.prev) { 2641 2642 vma = new_vma(vm, op->base.remap.prev, 2642 2643 &old->attr, flags); ··· 3256 3279 DRM_XE_VM_BIND_FLAG_NULL | \ 3257 3280 DRM_XE_VM_BIND_FLAG_DUMPABLE | \ 3258 3281 DRM_XE_VM_BIND_FLAG_CHECK_PXP | \ 3259 - DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR) 3282 + DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR | \ 3283 + DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET) 3260 3284 3261 3285 #ifdef TEST_VM_OPS_ERROR 3262 3286 #define SUPPORTED_FLAGS (SUPPORTED_FLAGS_STUB | FORCE_OP_ERROR) ··· 3372 3394 XE_IOCTL_DBG(xe, (prefetch_region != DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC && 3373 3395 !(BIT(prefetch_region) & xe->info.mem_region_mask))) || 3374 3396 XE_IOCTL_DBG(xe, obj && 3375 - op == DRM_XE_VM_BIND_OP_UNMAP)) { 3397 + op == DRM_XE_VM_BIND_OP_UNMAP) || 3398 + XE_IOCTL_DBG(xe, (flags & DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET) && 3399 + (!is_cpu_addr_mirror || op != DRM_XE_VM_BIND_OP_MAP))) { 3376 3400 err = -EINVAL; 3377 3401 goto free_bind_ops; 3378 3402 } ··· 4192 4212 struct xe_vma_ops vops; 4193 4213 struct drm_gpuva_ops *ops = NULL; 4194 4214 struct drm_gpuva_op *__op; 4195 - bool is_cpu_addr_mirror = false; 4215 + unsigned int vma_flags = 0; 4196 4216 bool remap_op = false; 4197 4217 struct xe_vma_mem_attr tmp_attr; 4198 4218 u16 default_pat; ··· 4222 4242 vma = gpuva_to_vma(op->base.unmap.va); 4223 4243 XE_WARN_ON(!xe_vma_has_default_mem_attrs(vma)); 4224 4244 default_pat = vma->attr.default_pat_index; 4245 + vma_flags = vma->gpuva.flags; 4225 4246 } 4226 4247 4227 4248 if (__op->op == DRM_GPUVA_OP_REMAP) { 4228 4249 vma = gpuva_to_vma(op->base.remap.unmap->va); 4229 4250 default_pat = vma->attr.default_pat_index; 4251 + vma_flags = vma->gpuva.flags; 4230 4252 } 4231 4253 4232 4254 if (__op->op == DRM_GPUVA_OP_MAP) { 4233 - op->map.is_cpu_addr_mirror = true; 4255 + op->map.vma_flags |= vma_flags & XE_VMA_CREATE_MASK; 4234 4256 op->map.pat_index = default_pat; 4235 4257 } 4236 4258 } else { ··· 4241 4259 xe_assert(vm->xe, !remap_op); 4242 4260 xe_assert(vm->xe, xe_vma_has_no_bo(vma)); 4243 4261 remap_op = true; 4244 - 4245 - if (xe_vma_is_cpu_addr_mirror(vma)) 4246 - is_cpu_addr_mirror = true; 4247 - else 4248 - is_cpu_addr_mirror = false; 4262 + vma_flags = vma->gpuva.flags; 4249 4263 } 4250 4264 4251 4265 if (__op->op == DRM_GPUVA_OP_MAP) { ··· 4250 4272 /* 4251 4273 * In case of madvise ops DRM_GPUVA_OP_MAP is 4252 4274 * always after DRM_GPUVA_OP_REMAP, so ensure 4253 - * we assign op->map.is_cpu_addr_mirror true 4254 - * if REMAP is for xe_vma_is_cpu_addr_mirror vma 4275 + * to propagate the flags from the vma we're 4276 + * unmapping. 4255 4277 */ 4256 - op->map.is_cpu_addr_mirror = is_cpu_addr_mirror; 4278 + op->map.vma_flags |= vma_flags & XE_VMA_CREATE_MASK; 4257 4279 } 4258 4280 } 4259 4281 print_op(vm->xe, __op);
+2 -8
drivers/gpu/drm/xe/xe_vm_types.h
··· 46 46 #define XE_VMA_PTE_COMPACT (DRM_GPUVA_USERBITS << 7) 47 47 #define XE_VMA_DUMPABLE (DRM_GPUVA_USERBITS << 8) 48 48 #define XE_VMA_SYSTEM_ALLOCATOR (DRM_GPUVA_USERBITS << 9) 49 + #define XE_VMA_MADV_AUTORESET (DRM_GPUVA_USERBITS << 10) 49 50 50 51 /** 51 52 * struct xe_vma_mem_attr - memory attributes associated with vma ··· 346 345 struct xe_vma_op_map { 347 346 /** @vma: VMA to map */ 348 347 struct xe_vma *vma; 348 + unsigned int vma_flags; 349 349 /** @immediate: Immediate bind */ 350 350 bool immediate; 351 351 /** @read_only: Read only */ 352 - bool read_only; 353 - /** @is_null: is NULL binding */ 354 - bool is_null; 355 - /** @is_cpu_addr_mirror: is CPU address mirror binding */ 356 - bool is_cpu_addr_mirror; 357 - /** @dumpable: whether BO is dumped on GPU hang */ 358 - bool dumpable; 359 - /** @invalidate: invalidate the VMA before bind */ 360 352 bool invalidate_on_bind; 361 353 /** @pat_index: The pat index to use for this operation. */ 362 354 u16 pat_index;
+3
drivers/hwmon/cgbc-hwmon.c
··· 107 107 nb_sensors = data[0]; 108 108 109 109 hwmon->sensors = devm_kzalloc(dev, sizeof(*hwmon->sensors) * nb_sensors, GFP_KERNEL); 110 + if (!hwmon->sensors) 111 + return -ENOMEM; 112 + 110 113 sensor = hwmon->sensors; 111 114 112 115 for (i = 0; i < nb_sensors; i++) {
+5 -5
drivers/hwmon/gpd-fan.c
··· 615 615 const struct device *hwdev; 616 616 617 617 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 618 - if (IS_ERR(res)) 619 - return dev_err_probe(dev, PTR_ERR(res), 618 + if (!res) 619 + return dev_err_probe(dev, -EINVAL, 620 620 "Failed to get platform resource\n"); 621 621 622 622 region = devm_request_region(dev, res->start, 623 623 resource_size(res), DRIVER_NAME); 624 - if (IS_ERR(region)) 625 - return dev_err_probe(dev, PTR_ERR(region), 624 + if (!region) 625 + return dev_err_probe(dev, -EBUSY, 626 626 "Failed to request region\n"); 627 627 628 628 hwdev = devm_hwmon_device_register_with_info(dev, ··· 631 631 &gpd_fan_chip_info, 632 632 NULL); 633 633 if (IS_ERR(hwdev)) 634 - return dev_err_probe(dev, PTR_ERR(region), 634 + return dev_err_probe(dev, PTR_ERR(hwdev), 635 635 "Failed to register hwmon device\n"); 636 636 637 637 return 0;
+1 -2
drivers/hwmon/pmbus/isl68137.c
··· 336 336 struct isl68137_data *data) 337 337 { 338 338 const struct device_node *np = dev->of_node; 339 - struct device_node *child; 340 339 int err; 341 340 342 - for_each_child_of_node(np, child) { 341 + for_each_child_of_node_scoped(np, child) { 343 342 if (strcmp(child->name, "channel")) 344 343 continue; 345 344
+6 -6
drivers/hwmon/pmbus/max34440.c
··· 336 336 .format[PSC_CURRENT_IN] = direct, 337 337 .format[PSC_CURRENT_OUT] = direct, 338 338 .format[PSC_TEMPERATURE] = direct, 339 - .m[PSC_VOLTAGE_IN] = 1, 339 + .m[PSC_VOLTAGE_IN] = 125, 340 340 .b[PSC_VOLTAGE_IN] = 0, 341 341 .R[PSC_VOLTAGE_IN] = 0, 342 - .m[PSC_VOLTAGE_OUT] = 1, 342 + .m[PSC_VOLTAGE_OUT] = 125, 343 343 .b[PSC_VOLTAGE_OUT] = 0, 344 344 .R[PSC_VOLTAGE_OUT] = 0, 345 - .m[PSC_CURRENT_IN] = 1, 345 + .m[PSC_CURRENT_IN] = 250, 346 346 .b[PSC_CURRENT_IN] = 0, 347 - .R[PSC_CURRENT_IN] = 2, 348 - .m[PSC_CURRENT_OUT] = 1, 347 + .R[PSC_CURRENT_IN] = -1, 348 + .m[PSC_CURRENT_OUT] = 250, 349 349 .b[PSC_CURRENT_OUT] = 0, 350 - .R[PSC_CURRENT_OUT] = 2, 350 + .R[PSC_CURRENT_OUT] = -1, 351 351 .m[PSC_TEMPERATURE] = 1, 352 352 .b[PSC_TEMPERATURE] = 0, 353 353 .R[PSC_TEMPERATURE] = 2,
+17 -10
drivers/hwmon/sht3x.c
··· 291 291 return data; 292 292 } 293 293 294 - static int temp1_input_read(struct device *dev) 294 + static int temp1_input_read(struct device *dev, long *temp) 295 295 { 296 296 struct sht3x_data *data = sht3x_update_client(dev); 297 297 298 298 if (IS_ERR(data)) 299 299 return PTR_ERR(data); 300 300 301 - return data->temperature; 301 + *temp = data->temperature; 302 + return 0; 302 303 } 303 304 304 - static int humidity1_input_read(struct device *dev) 305 + static int humidity1_input_read(struct device *dev, long *humidity) 305 306 { 306 307 struct sht3x_data *data = sht3x_update_client(dev); 307 308 308 309 if (IS_ERR(data)) 309 310 return PTR_ERR(data); 310 311 311 - return data->humidity; 312 + *humidity = data->humidity; 313 + return 0; 312 314 } 313 315 314 316 /* ··· 708 706 u32 attr, int channel, long *val) 709 707 { 710 708 enum sht3x_limits index; 709 + int ret; 711 710 712 711 switch (type) { 713 712 case hwmon_chip: ··· 723 720 case hwmon_temp: 724 721 switch (attr) { 725 722 case hwmon_temp_input: 726 - *val = temp1_input_read(dev); 727 - break; 723 + return temp1_input_read(dev, val); 728 724 case hwmon_temp_alarm: 729 - *val = temp1_alarm_read(dev); 725 + ret = temp1_alarm_read(dev); 726 + if (ret < 0) 727 + return ret; 728 + *val = ret; 730 729 break; 731 730 case hwmon_temp_max: 732 731 index = limit_max; ··· 753 748 case hwmon_humidity: 754 749 switch (attr) { 755 750 case hwmon_humidity_input: 756 - *val = humidity1_input_read(dev); 757 - break; 751 + return humidity1_input_read(dev, val); 758 752 case hwmon_humidity_alarm: 759 - *val = humidity1_alarm_read(dev); 753 + ret = humidity1_alarm_read(dev); 754 + if (ret < 0) 755 + return ret; 756 + *val = ret; 760 757 break; 761 758 case hwmon_humidity_max: 762 759 index = limit_max;
+2
drivers/misc/amd-sbi/Kconfig
··· 2 2 config AMD_SBRMI_I2C 3 3 tristate "AMD side band RMI support" 4 4 depends on I2C 5 + depends on ARM || ARM64 || COMPILE_TEST 5 6 select REGMAP_I2C 6 7 help 7 8 Side band RMI over I2C support for AMD out of band management. 9 + This driver is intended to run on the BMC, not the managed node. 8 10 9 11 This driver can also be built as a module. If so, the module will 10 12 be called sbrmi-i2c.
+2
drivers/misc/fastrpc.c
··· 381 381 } 382 382 spin_unlock(&fl->lock); 383 383 384 + dma_buf_put(buf); 385 + 384 386 return ret; 385 387 } 386 388
+2
drivers/misc/mei/hw-me-regs.h
··· 120 120 #define MEI_DEV_ID_PTL_H 0xE370 /* Panther Lake H */ 121 121 #define MEI_DEV_ID_PTL_P 0xE470 /* Panther Lake P */ 122 122 123 + #define MEI_DEV_ID_WCL_P 0x4D70 /* Wildcat Lake P */ 124 + 123 125 /* 124 126 * MEI HW Section 125 127 */
+1 -2
drivers/misc/mei/mei_lb.c
··· 134 134 return true; 135 135 } 136 136 137 - static int mei_lb_push_payload(struct device *dev, 138 - enum intel_lb_type type, u32 flags, 137 + static int mei_lb_push_payload(struct device *dev, u32 type, u32 flags, 139 138 const void *payload, size_t payload_size) 140 139 { 141 140 struct mei_cl_device *cldev;
+2
drivers/misc/mei/pci-me.c
··· 127 127 {MEI_PCI_DEVICE(MEI_DEV_ID_PTL_H, MEI_ME_PCH15_CFG)}, 128 128 {MEI_PCI_DEVICE(MEI_DEV_ID_PTL_P, MEI_ME_PCH15_CFG)}, 129 129 130 + {MEI_PCI_DEVICE(MEI_DEV_ID_WCL_P, MEI_ME_PCH15_CFG)}, 131 + 130 132 /* required last entry */ 131 133 {0, } 132 134 };
+7 -7
drivers/misc/mei/pci-txe.c
··· 109 109 goto end; 110 110 } 111 111 112 + err = mei_register(dev, &pdev->dev); 113 + if (err) 114 + goto release_irq; 115 + 112 116 if (mei_start(dev)) { 113 117 dev_err(&pdev->dev, "init hw failure.\n"); 114 118 err = -ENODEV; 115 - goto release_irq; 119 + goto deregister; 116 120 } 117 121 118 122 pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_TXI_RPM_TIMEOUT); 119 123 pm_runtime_use_autosuspend(&pdev->dev); 120 - 121 - err = mei_register(dev, &pdev->dev); 122 - if (err) 123 - goto stop; 124 124 125 125 pci_set_drvdata(pdev, dev); 126 126 ··· 144 144 145 145 return 0; 146 146 147 - stop: 148 - mei_stop(dev); 147 + deregister: 148 + mei_deregister(dev); 149 149 release_irq: 150 150 mei_cancel_work(dev); 151 151 mei_disable_interrupts(dev);
+5 -8
drivers/most/most_usb.c
··· 929 929 { 930 930 struct most_dev *mdev = to_mdev_from_dev(dev); 931 931 932 + kfree(mdev->busy_urbs); 933 + kfree(mdev->cap); 934 + kfree(mdev->conf); 935 + kfree(mdev->ep_address); 932 936 kfree(mdev); 933 937 } 934 938 /** ··· 1097 1093 err_free_conf: 1098 1094 kfree(mdev->conf); 1099 1095 err_free_mdev: 1100 - put_device(&mdev->dev); 1096 + kfree(mdev); 1101 1097 return ret; 1102 1098 } 1103 1099 ··· 1125 1121 if (mdev->dci) 1126 1122 device_unregister(&mdev->dci->dev); 1127 1123 most_deregister_interface(&mdev->iface); 1128 - 1129 - kfree(mdev->busy_urbs); 1130 - kfree(mdev->cap); 1131 - kfree(mdev->conf); 1132 - kfree(mdev->ep_address); 1133 - put_device(&mdev->dci->dev); 1134 - put_device(&mdev->dev); 1135 1124 } 1136 1125 1137 1126 static int hdm_suspend(struct usb_interface *interface, pm_message_t message)
+6 -1
drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c
··· 290 290 return -EINVAL; 291 291 } 292 292 293 + if (unlikely(!try_module_get(THIS_MODULE))) { 294 + NL_SET_ERR_MSG_MOD(extack, "Failed to acquire module reference"); 295 + return -ENODEV; 296 + } 297 + 293 298 sa_entry = kzalloc(sizeof(*sa_entry), GFP_KERNEL); 294 299 if (!sa_entry) { 295 300 res = -ENOMEM; 301 + module_put(THIS_MODULE); 296 302 goto out; 297 303 } 298 304 ··· 307 301 sa_entry->esn = 1; 308 302 ch_ipsec_setkey(x, sa_entry); 309 303 x->xso.offload_handle = (unsigned long)sa_entry; 310 - try_module_get(THIS_MODULE); 311 304 out: 312 305 return res; 313 306 }
+1
drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h
··· 17 17 #define HBG_PCU_CACHE_LINE_SIZE 32 18 18 #define HBG_TX_TIMEOUT_BUF_LEN 1024 19 19 #define HBG_RX_DESCR 0x01 20 + #define HBG_NO_PHY 0xFF 20 21 21 22 #define HBG_PACKET_HEAD_SIZE ((HBG_RX_SKIP1 + HBG_RX_SKIP2 + \ 22 23 HBG_RX_DESCR) * HBG_PCU_CACHE_LINE_SIZE)
+6 -4
drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c
··· 136 136 { 137 137 struct net_device *netdev = pci_get_drvdata(pdev); 138 138 139 - netif_device_detach(netdev); 140 - 141 - if (state == pci_channel_io_perm_failure) 139 + if (state == pci_channel_io_perm_failure) { 140 + netif_device_detach(netdev); 142 141 return PCI_ERS_RESULT_DISCONNECT; 142 + } 143 143 144 - pci_disable_device(pdev); 145 144 return PCI_ERS_RESULT_NEED_RESET; 146 145 } 147 146 ··· 148 149 { 149 150 struct net_device *netdev = pci_get_drvdata(pdev); 150 151 struct hbg_priv *priv = netdev_priv(netdev); 152 + 153 + netif_device_detach(netdev); 154 + pci_disable_device(pdev); 151 155 152 156 if (pci_enable_device(pdev)) { 153 157 dev_err(&pdev->dev,
+3
drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c
··· 244 244 245 245 hbg_hw_mac_enable(priv, HBG_STATUS_ENABLE); 246 246 247 + if (priv->mac.phy_addr == HBG_NO_PHY) 248 + return; 249 + 247 250 /* wait MAC link up */ 248 251 ret = readl_poll_timeout(priv->io_base + HBG_REG_AN_NEG_STATE_ADDR, 249 252 link_status,
+1
drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c
··· 32 32 const struct hbg_irq_info *irq_info) 33 33 { 34 34 priv->stats.rx_fifo_less_empty_thrsld_cnt++; 35 + hbg_hw_irq_enable(priv, irq_info->mask, true); 35 36 } 36 37 37 38 #define HBG_IRQ_I(name, handle) \
-1
drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c
··· 20 20 #define HBG_MDIO_OP_INTERVAL_US (5 * 1000) 21 21 22 22 #define HBG_NP_LINK_FAIL_RETRY_TIMES 5 23 - #define HBG_NO_PHY 0xFF 24 23 25 24 static void hbg_mdio_set_command(struct hbg_mac *mac, u32 cmd) 26 25 {
+1 -2
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
··· 9429 9429 /* this command reads phy id and register at the same time */ 9430 9430 fallthrough; 9431 9431 case SIOCGMIIREG: 9432 - data->val_out = hclge_read_phy_reg(hdev, data->reg_num); 9433 - return 0; 9432 + return hclge_read_phy_reg(hdev, data->reg_num, &data->val_out); 9434 9433 9435 9434 case SIOCSMIIREG: 9436 9435 return hclge_write_phy_reg(hdev, data->reg_num, data->val_in);
+6 -3
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
··· 274 274 phy_stop(phydev); 275 275 } 276 276 277 - u16 hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr) 277 + int hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr, u16 *val) 278 278 { 279 279 struct hclge_phy_reg_cmd *req; 280 280 struct hclge_desc desc; ··· 286 286 req->reg_addr = cpu_to_le16(reg_addr); 287 287 288 288 ret = hclge_cmd_send(&hdev->hw, &desc, 1); 289 - if (ret) 289 + if (ret) { 290 290 dev_err(&hdev->pdev->dev, 291 291 "failed to read phy reg, ret = %d.\n", ret); 292 + return ret; 293 + } 292 294 293 - return le16_to_cpu(req->reg_val); 295 + *val = le16_to_cpu(req->reg_val); 296 + return 0; 294 297 } 295 298 296 299 int hclge_write_phy_reg(struct hclge_dev *hdev, u16 reg_addr, u16 val)
+1 -1
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h
··· 13 13 void hclge_mac_disconnect_phy(struct hnae3_handle *handle); 14 14 void hclge_mac_start_phy(struct hclge_dev *hdev); 15 15 void hclge_mac_stop_phy(struct hclge_dev *hdev); 16 - u16 hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr); 16 + int hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr, u16 *val); 17 17 int hclge_write_phy_reg(struct hclge_dev *hdev, u16 reg_addr, u16 val); 18 18 19 19 #endif
+33 -2
drivers/net/ethernet/intel/ice/ice_common.c
··· 4386 4386 unsigned int lane; 4387 4387 int err; 4388 4388 4389 + /* E82X does not have sequential IDs, lane number is PF ID. 4390 + * For E825 device, the exception is the variant with external 4391 + * PHY (0x579F), in which there is also 1:1 pf_id -> lane_number 4392 + * mapping. 4393 + */ 4394 + if (hw->mac_type == ICE_MAC_GENERIC || 4395 + hw->device_id == ICE_DEV_ID_E825C_SGMII) 4396 + return hw->pf_id; 4397 + 4389 4398 options = kcalloc(ICE_AQC_PORT_OPT_MAX, sizeof(*options), GFP_KERNEL); 4390 4399 if (!options) 4391 4400 return -ENOMEM; ··· 6510 6501 } 6511 6502 6512 6503 /** 6504 + * ice_get_dest_cgu - get destination CGU dev for given HW 6505 + * @hw: pointer to the HW struct 6506 + * 6507 + * Get CGU client id for CGU register read/write operations. 6508 + * 6509 + * Return: CGU device id to use in SBQ transactions. 6510 + */ 6511 + static enum ice_sbq_dev_id ice_get_dest_cgu(struct ice_hw *hw) 6512 + { 6513 + /* On dual complex E825 only complex 0 has functional CGU powering all 6514 + * the PHYs. 6515 + * SBQ destination device cgu points to CGU on a current complex and to 6516 + * access primary CGU from the secondary complex, the driver should use 6517 + * cgu_peer as a destination device. 6518 + */ 6519 + if (hw->mac_type == ICE_MAC_GENERIC_3K_E825 && ice_is_dual(hw) && 6520 + !ice_is_primary(hw)) 6521 + return ice_sbq_dev_cgu_peer; 6522 + return ice_sbq_dev_cgu; 6523 + } 6524 + 6525 + /** 6513 6526 * ice_read_cgu_reg - Read a CGU register 6514 6527 * @hw: Pointer to the HW struct 6515 6528 * @addr: Register address to read ··· 6545 6514 int ice_read_cgu_reg(struct ice_hw *hw, u32 addr, u32 *val) 6546 6515 { 6547 6516 struct ice_sbq_msg_input cgu_msg = { 6517 + .dest_dev = ice_get_dest_cgu(hw), 6548 6518 .opcode = ice_sbq_msg_rd, 6549 - .dest_dev = ice_sbq_dev_cgu, 6550 6519 .msg_addr_low = addr 6551 6520 }; 6552 6521 int err; ··· 6577 6546 int ice_write_cgu_reg(struct ice_hw *hw, u32 addr, u32 val) 6578 6547 { 6579 6548 struct ice_sbq_msg_input cgu_msg = { 6549 + .dest_dev = ice_get_dest_cgu(hw), 6580 6550 .opcode = ice_sbq_msg_wr, 6581 - .dest_dev = ice_sbq_dev_cgu, 6582 6551 .msg_addr_low = addr, 6583 6552 .data = val 6584 6553 };
+1 -1
drivers/net/ethernet/intel/ice/ice_flex_pipe.c
··· 1475 1475 per_pf = ICE_PROF_MASK_COUNT / hw->dev_caps.num_funcs; 1476 1476 1477 1477 hw->blk[blk].masks.count = per_pf; 1478 - hw->blk[blk].masks.first = hw->pf_id * per_pf; 1478 + hw->blk[blk].masks.first = hw->logical_pf_id * per_pf; 1479 1479 1480 1480 memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks)); 1481 1481
+1
drivers/net/ethernet/intel/ice/ice_sbq_cmd.h
··· 50 50 ice_sbq_dev_phy_0 = 0x02, 51 51 ice_sbq_dev_cgu = 0x06, 52 52 ice_sbq_dev_phy_0_peer = 0x0D, 53 + ice_sbq_dev_cgu_peer = 0x0F, 53 54 }; 54 55 55 56 enum ice_sbq_msg_opcode {
+1 -1
drivers/net/ethernet/intel/igb/igb_ethtool.c
··· 2281 2281 case ETH_SS_PRIV_FLAGS: 2282 2282 return IGB_PRIV_FLAGS_STR_LEN; 2283 2283 default: 2284 - return -ENOTSUPP; 2284 + return -EOPNOTSUPP; 2285 2285 } 2286 2286 } 2287 2287
+4 -1
drivers/net/ethernet/intel/igc/igc_ethtool.c
··· 810 810 case ETH_SS_PRIV_FLAGS: 811 811 return IGC_PRIV_FLAGS_STR_LEN; 812 812 default: 813 - return -ENOTSUPP; 813 + return -EOPNOTSUPP; 814 814 } 815 815 } 816 816 ··· 2093 2093 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2094 2094 netdev_info(adapter->netdev, "Offline testing starting"); 2095 2095 set_bit(__IGC_TESTING, &adapter->state); 2096 + 2097 + /* power up PHY for link test */ 2098 + igc_power_up_phy_copper(&adapter->hw); 2096 2099 2097 2100 /* Link test performed before hardware reset so autoneg doesn't 2098 2101 * interfere with test result
+1 -1
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
··· 11507 11507 shutdown_aci: 11508 11508 mutex_destroy(&adapter->hw.aci.lock); 11509 11509 ixgbe_release_hw_control(adapter); 11510 - devlink_free(adapter->devlink); 11511 11510 clean_up_probe: 11512 11511 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state); 11513 11512 free_netdev(netdev); 11513 + devlink_free(adapter->devlink); 11514 11514 pci_release_mem_regions(pdev); 11515 11515 if (disable_dev) 11516 11516 pci_disable_device(pdev);
+1 -1
drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
··· 641 641 * disabled 642 642 */ 643 643 if (rq->type != PTP_CLK_REQ_PPS || !adapter->ptp_setup_sdp) 644 - return -ENOTSUPP; 644 + return -EOPNOTSUPP; 645 645 646 646 if (on) 647 647 adapter->flags2 |= IXGBE_FLAG2_PTP_PPS_ENABLED;
+35 -6
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c
··· 320 320 err_free: 321 321 kfree(buf); 322 322 err_out: 323 - priv_rx->rq_stats->tls_resync_req_skip++; 324 323 return err; 325 324 } 326 325 ··· 338 339 339 340 if (unlikely(test_bit(MLX5E_PRIV_RX_FLAG_DELETING, priv_rx->flags))) { 340 341 mlx5e_ktls_priv_rx_put(priv_rx); 342 + priv_rx->rq_stats->tls_resync_req_skip++; 343 + tls_offload_rx_resync_async_request_cancel(&resync->core); 341 344 return; 342 345 } 343 346 344 347 c = resync->priv->channels.c[priv_rx->rxq]; 345 348 sq = &c->async_icosq; 346 349 347 - if (resync_post_get_progress_params(sq, priv_rx)) 350 + if (resync_post_get_progress_params(sq, priv_rx)) { 351 + priv_rx->rq_stats->tls_resync_req_skip++; 352 + tls_offload_rx_resync_async_request_cancel(&resync->core); 348 353 mlx5e_ktls_priv_rx_put(priv_rx); 354 + } 349 355 } 350 356 351 357 static void resync_init(struct mlx5e_ktls_rx_resync_ctx *resync, ··· 429 425 { 430 426 struct mlx5e_ktls_rx_resync_buf *buf = wi->tls_get_params.buf; 431 427 struct mlx5e_ktls_offload_context_rx *priv_rx; 428 + struct tls_offload_resync_async *async_resync; 429 + struct tls_offload_context_rx *rx_ctx; 432 430 u8 tracker_state, auth_state, *ctx; 433 431 struct device *dev; 434 432 u32 hw_seq; 435 433 436 434 priv_rx = buf->priv_rx; 437 435 dev = mlx5_core_dma_dev(sq->channel->mdev); 438 - if (unlikely(test_bit(MLX5E_PRIV_RX_FLAG_DELETING, priv_rx->flags))) 436 + rx_ctx = tls_offload_ctx_rx(tls_get_ctx(priv_rx->sk)); 437 + async_resync = rx_ctx->resync_async; 438 + if (unlikely(test_bit(MLX5E_PRIV_RX_FLAG_DELETING, priv_rx->flags))) { 439 + priv_rx->rq_stats->tls_resync_req_skip++; 440 + tls_offload_rx_resync_async_request_cancel(async_resync); 439 441 goto out; 442 + } 440 443 441 444 dma_sync_single_for_cpu(dev, buf->dma_addr, PROGRESS_PARAMS_PADDED_SIZE, 442 445 DMA_FROM_DEVICE); ··· 454 443 if (tracker_state != MLX5E_TLS_PROGRESS_PARAMS_RECORD_TRACKER_STATE_TRACKING || 455 444 auth_state != MLX5E_TLS_PROGRESS_PARAMS_AUTH_STATE_NO_OFFLOAD) { 456 445 priv_rx->rq_stats->tls_resync_req_skip++; 446 + tls_offload_rx_resync_async_request_cancel(async_resync); 457 447 goto out; 458 448 } 459 449 460 450 hw_seq = MLX5_GET(tls_progress_params, ctx, hw_resync_tcp_sn); 461 - tls_offload_rx_resync_async_request_end(priv_rx->sk, cpu_to_be32(hw_seq)); 451 + tls_offload_rx_resync_async_request_end(async_resync, 452 + cpu_to_be32(hw_seq)); 462 453 priv_rx->rq_stats->tls_resync_req_end++; 463 454 out: 464 455 mlx5e_ktls_priv_rx_put(priv_rx); ··· 485 472 486 473 resync = &priv_rx->resync; 487 474 mlx5e_ktls_priv_rx_get(priv_rx); 488 - if (unlikely(!queue_work(resync->priv->tls->rx_wq, &resync->work))) 475 + if (unlikely(!queue_work(resync->priv->tls->rx_wq, &resync->work))) { 489 476 mlx5e_ktls_priv_rx_put(priv_rx); 477 + return false; 478 + } 490 479 491 480 return true; 492 481 } ··· 497 482 static void resync_update_sn(struct mlx5e_rq *rq, struct sk_buff *skb) 498 483 { 499 484 struct ethhdr *eth = (struct ethhdr *)(skb->data); 485 + struct tls_offload_resync_async *resync_async; 500 486 struct net_device *netdev = rq->netdev; 501 487 struct net *net = dev_net(netdev); 502 488 struct sock *sk = NULL; ··· 543 527 544 528 seq = th->seq; 545 529 datalen = skb->len - depth; 546 - tls_offload_rx_resync_async_request_start(sk, seq, datalen); 530 + resync_async = tls_offload_ctx_rx(tls_get_ctx(sk))->resync_async; 531 + tls_offload_rx_resync_async_request_start(resync_async, seq, datalen); 547 532 rq->stats->tls_resync_req_start++; 548 533 549 534 unref: ··· 571 554 c = priv->channels.c[priv_rx->rxq]; 572 555 573 556 resync_handle_seq_match(priv_rx, c); 557 + } 558 + 559 + void 560 + mlx5e_ktls_rx_resync_async_request_cancel(struct mlx5e_icosq_wqe_info *wi) 561 + { 562 + struct mlx5e_ktls_offload_context_rx *priv_rx; 563 + struct mlx5e_ktls_rx_resync_buf *buf; 564 + 565 + buf = wi->tls_get_params.buf; 566 + priv_rx = buf->priv_rx; 567 + priv_rx->rq_stats->tls_resync_req_skip++; 568 + tls_offload_rx_resync_async_request_cancel(&priv_rx->resync.core); 574 569 } 575 570 576 571 /* End of resync section */
+4
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h
··· 29 29 void mlx5e_ktls_tx_handle_resync_dump_comp(struct mlx5e_txqsq *sq, 30 30 struct mlx5e_tx_wqe_info *wi, 31 31 u32 *dma_fifo_cc); 32 + 33 + void 34 + mlx5e_ktls_rx_resync_async_request_cancel(struct mlx5e_icosq_wqe_info *wi); 35 + 32 36 static inline bool 33 37 mlx5e_ktls_tx_try_handle_resync_dump_comp(struct mlx5e_txqsq *sq, 34 38 struct mlx5e_tx_wqe_info *wi,
+4
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
··· 1036 1036 netdev_WARN_ONCE(cq->netdev, 1037 1037 "Bad OP in ICOSQ CQE: 0x%x\n", 1038 1038 get_cqe_opcode(cqe)); 1039 + #ifdef CONFIG_MLX5_EN_TLS 1040 + if (wi->wqe_type == MLX5E_ICOSQ_WQE_GET_PSV_TLS) 1041 + mlx5e_ktls_rx_resync_async_request_cancel(wi); 1042 + #endif 1039 1043 mlx5e_dump_error_cqe(&sq->cq, sq->sqn, 1040 1044 (struct mlx5_err_cqe *)cqe); 1041 1045 mlx5_wq_cyc_wqe_dump(&sq->wq, ci, wi->num_wqebbs);
-1
drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c
··· 66 66 esw->fdb_table.legacy.addr_grp = NULL; 67 67 esw->fdb_table.legacy.allmulti_grp = NULL; 68 68 esw->fdb_table.legacy.promisc_grp = NULL; 69 - atomic64_set(&esw->user_count, 0); 70 69 } 71 70 72 71 static int esw_create_legacy_fdb_table(struct mlx5_eswitch *esw)
-1
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
··· 1978 1978 /* Holds true only as long as DMFS is the default */ 1979 1979 mlx5_flow_namespace_set_mode(esw->fdb_table.offloads.ns, 1980 1980 MLX5_FLOW_STEERING_MODE_DMFS); 1981 - atomic64_set(&esw->user_count, 0); 1982 1981 } 1983 1982 1984 1983 static int esw_get_nr_ft_offloads_steering_src_ports(struct mlx5_eswitch *esw)
+4 -2
drivers/net/ethernet/netronome/nfp/nfp_net_common.c
··· 2557 2557 err = nfp_net_tlv_caps_parse(&nn->pdev->dev, nn->dp.ctrl_bar, 2558 2558 &nn->tlv_caps); 2559 2559 if (err) 2560 - goto err_free_nn; 2560 + goto err_free_xsk_pools; 2561 2561 2562 2562 err = nfp_ccm_mbox_alloc(nn); 2563 2563 if (err) 2564 - goto err_free_nn; 2564 + goto err_free_xsk_pools; 2565 2565 2566 2566 return nn; 2567 2567 2568 + err_free_xsk_pools: 2569 + kfree(nn->dp.xsk_pools); 2568 2570 err_free_nn: 2569 2571 if (nn->dp.netdev) 2570 2572 free_netdev(nn->dp.netdev);
+4
drivers/net/ethernet/sfc/mae.c
··· 1090 1090 kfree(mport); 1091 1091 } 1092 1092 1093 + /* 1094 + * Takes ownership of @desc, even if it returns an error 1095 + */ 1093 1096 static int efx_mae_process_mport(struct efx_nic *efx, 1094 1097 struct mae_mport_desc *desc) 1095 1098 { ··· 1103 1100 if (!IS_ERR_OR_NULL(mport)) { 1104 1101 netif_err(efx, drv, efx->net_dev, 1105 1102 "mport with id %u does exist!!!\n", desc->mport_id); 1103 + kfree(desc); 1106 1104 return -EEXIST; 1107 1105 } 1108 1106
+14 -18
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
··· 4127 4127 static bool stmmac_vlan_insert(struct stmmac_priv *priv, struct sk_buff *skb, 4128 4128 struct stmmac_tx_queue *tx_q) 4129 4129 { 4130 - u16 tag = 0x0, inner_tag = 0x0; 4131 - u32 inner_type = 0x0; 4132 4130 struct dma_desc *p; 4131 + u16 tag = 0x0; 4133 4132 4134 - if (!priv->dma_cap.vlins) 4133 + if (!priv->dma_cap.vlins || !skb_vlan_tag_present(skb)) 4135 4134 return false; 4136 - if (!skb_vlan_tag_present(skb)) 4137 - return false; 4138 - if (skb->vlan_proto == htons(ETH_P_8021AD)) { 4139 - inner_tag = skb_vlan_tag_get(skb); 4140 - inner_type = STMMAC_VLAN_INSERT; 4141 - } 4142 4135 4143 4136 tag = skb_vlan_tag_get(skb); 4144 4137 ··· 4140 4147 else 4141 4148 p = &tx_q->dma_tx[tx_q->cur_tx]; 4142 4149 4143 - if (stmmac_set_desc_vlan_tag(priv, p, tag, inner_tag, inner_type)) 4150 + if (stmmac_set_desc_vlan_tag(priv, p, tag, 0x0, 0x0)) 4144 4151 return false; 4145 4152 4146 4153 stmmac_set_tx_owner(priv, p); ··· 4538 4545 bool has_vlan, set_ic; 4539 4546 int entry, first_tx; 4540 4547 dma_addr_t des; 4548 + u32 sdu_len; 4541 4549 4542 4550 tx_q = &priv->dma_conf.tx_queue[queue]; 4543 4551 txq_stats = &priv->xstats.txq_stats[queue]; ··· 4557 4563 } 4558 4564 4559 4565 if (priv->est && priv->est->enable && 4560 - priv->est->max_sdu[queue] && 4561 - skb->len > priv->est->max_sdu[queue]){ 4562 - priv->xstats.max_sdu_txq_drop[queue]++; 4563 - goto max_sdu_err; 4566 + priv->est->max_sdu[queue]) { 4567 + sdu_len = skb->len; 4568 + /* Add VLAN tag length if VLAN tag insertion offload is requested */ 4569 + if (priv->dma_cap.vlins && skb_vlan_tag_present(skb)) 4570 + sdu_len += VLAN_HLEN; 4571 + if (sdu_len > priv->est->max_sdu[queue]) { 4572 + priv->xstats.max_sdu_txq_drop[queue]++; 4573 + goto max_sdu_err; 4574 + } 4564 4575 } 4565 4576 4566 4577 if (unlikely(stmmac_tx_avail(priv, queue) < nfrags + 1)) { ··· 7699 7700 ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 7700 7701 ndev->features |= NETIF_F_HW_VLAN_STAG_FILTER; 7701 7702 } 7702 - if (priv->dma_cap.vlins) { 7703 + if (priv->dma_cap.vlins) 7703 7704 ndev->features |= NETIF_F_HW_VLAN_CTAG_TX; 7704 - if (priv->dma_cap.dvlan) 7705 - ndev->features |= NETIF_F_HW_VLAN_STAG_TX; 7706 - } 7707 7705 #endif 7708 7706 priv->msg_enable = netif_msg_init(debug, default_msg_level); 7709 7707
+2 -2
drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c
··· 981 981 if (qopt->cmd == TAPRIO_CMD_DESTROY) 982 982 goto disable; 983 983 984 - if (qopt->num_entries >= dep) 984 + if (qopt->num_entries > dep) 985 985 return -EINVAL; 986 986 if (!qopt->cycle_time) 987 987 return -ERANGE; ··· 1012 1012 s64 delta_ns = qopt->entries[i].interval; 1013 1013 u32 gates = qopt->entries[i].gate_mask; 1014 1014 1015 - if (delta_ns > GENMASK(wid, 0)) 1015 + if (delta_ns > GENMASK(wid - 1, 0)) 1016 1016 return -ERANGE; 1017 1017 if (gates > GENMASK(31 - wid, 0)) 1018 1018 return -ERANGE;
+1 -1
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c
··· 212 212 213 213 value = readl(ioaddr + VLAN_INCL); 214 214 value |= VLAN_VLTI; 215 - value |= VLAN_CSVL; /* Only use SVLAN */ 215 + value &= ~VLAN_CSVL; /* Only use CVLAN */ 216 216 value &= ~VLAN_VLC; 217 217 value |= (type << VLAN_VLC_SHIFT) & VLAN_VLC; 218 218 writel(value, ioaddr + VLAN_INCL);
+5 -3
drivers/net/mctp/mctp-usb.c
··· 96 96 skb->data, skb->len, 97 97 mctp_usb_out_complete, skb); 98 98 99 + /* Stops TX queue first to prevent race condition with URB complete */ 100 + netif_stop_queue(dev); 99 101 rc = usb_submit_urb(urb, GFP_ATOMIC); 100 - if (rc) 102 + if (rc) { 103 + netif_wake_queue(dev); 101 104 goto err_drop; 102 - else 103 - netif_stop_queue(dev); 105 + } 104 106 105 107 return NETDEV_TX_OK; 106 108
+13 -8
drivers/net/netconsole.c
··· 886 886 887 887 static void update_userdata(struct netconsole_target *nt) 888 888 { 889 - int complete_idx = 0, child_count = 0; 890 889 struct list_head *entry; 890 + int child_count = 0; 891 + unsigned long flags; 892 + 893 + spin_lock_irqsave(&target_list_lock, flags); 891 894 892 895 /* Clear the current string in case the last userdatum was deleted */ 893 896 nt->userdata_length = 0; ··· 900 897 struct userdatum *udm_item; 901 898 struct config_item *item; 902 899 903 - if (WARN_ON_ONCE(child_count >= MAX_EXTRADATA_ITEMS)) 904 - break; 900 + if (child_count >= MAX_EXTRADATA_ITEMS) { 901 + spin_unlock_irqrestore(&target_list_lock, flags); 902 + WARN_ON_ONCE(1); 903 + return; 904 + } 905 905 child_count++; 906 906 907 907 item = container_of(entry, struct config_item, ci_entry); ··· 918 912 * one entry length (1/MAX_EXTRADATA_ITEMS long), entry count is 919 913 * checked to not exceed MAX items with child_count above 920 914 */ 921 - complete_idx += scnprintf(&nt->extradata_complete[complete_idx], 922 - MAX_EXTRADATA_ENTRY_LEN, " %s=%s\n", 923 - item->ci_name, udm_item->value); 915 + nt->userdata_length += scnprintf(&nt->extradata_complete[nt->userdata_length], 916 + MAX_EXTRADATA_ENTRY_LEN, " %s=%s\n", 917 + item->ci_name, udm_item->value); 924 918 } 925 - nt->userdata_length = strnlen(nt->extradata_complete, 926 - sizeof(nt->extradata_complete)); 919 + spin_unlock_irqrestore(&target_list_lock, flags); 927 920 } 928 921 929 922 static ssize_t userdatum_value_store(struct config_item *item, const char *buf,
+6
drivers/net/phy/dp83867.c
··· 738 738 return ret; 739 739 } 740 740 741 + /* Although the DP83867 reports EEE capability through the 742 + * MDIO_PCS_EEE_ABLE and MDIO_AN_EEE_ADV registers, the feature 743 + * is not actually implemented in hardware. 744 + */ 745 + phy_disable_eee(phydev); 746 + 741 747 if (phy_interface_is_rgmii(phydev) || 742 748 phydev->interface == PHY_INTERFACE_MODE_SGMII) { 743 749 val = phy_read(phydev, MII_DP83867_PHYCTRL);
+2 -2
drivers/net/phy/dp83869.c
··· 84 84 #define DP83869_CLK_DELAY_DEF 7 85 85 86 86 /* STRAP_STS1 bits */ 87 - #define DP83869_STRAP_OP_MODE_MASK GENMASK(2, 0) 87 + #define DP83869_STRAP_OP_MODE_MASK GENMASK(11, 9) 88 88 #define DP83869_STRAP_STS1_RESERVED BIT(11) 89 89 #define DP83869_STRAP_MIRROR_ENABLED BIT(12) 90 90 ··· 528 528 if (val < 0) 529 529 return val; 530 530 531 - dp83869->mode = val & DP83869_STRAP_OP_MODE_MASK; 531 + dp83869->mode = FIELD_GET(DP83869_STRAP_OP_MODE_MASK, val); 532 532 533 533 return 0; 534 534 }
+9 -3
drivers/net/usb/asix_devices.c
··· 230 230 int i; 231 231 unsigned long gpio_bits = dev->driver_info->data; 232 232 233 - usbnet_get_endpoints(dev,intf); 233 + ret = usbnet_get_endpoints(dev, intf); 234 + if (ret) 235 + goto out; 234 236 235 237 /* Toggle the GPIOs in a manufacturer/model specific way */ 236 238 for (i = 2; i >= 0; i--) { ··· 850 848 851 849 dev->driver_priv = priv; 852 850 853 - usbnet_get_endpoints(dev, intf); 851 + ret = usbnet_get_endpoints(dev, intf); 852 + if (ret) 853 + return ret; 854 854 855 855 /* Maybe the boot loader passed the MAC address via device tree */ 856 856 if (!eth_platform_get_mac_address(&dev->udev->dev, buf)) { ··· 1285 1281 int ret; 1286 1282 u8 buf[ETH_ALEN] = {0}; 1287 1283 1288 - usbnet_get_endpoints(dev,intf); 1284 + ret = usbnet_get_endpoints(dev, intf); 1285 + if (ret) 1286 + return ret; 1289 1287 1290 1288 /* Get the MAC address */ 1291 1289 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);
+2
drivers/net/usb/usbnet.c
··· 1658 1658 net = dev->net; 1659 1659 unregister_netdev (net); 1660 1660 1661 + cancel_work_sync(&dev->kevent); 1662 + 1661 1663 while ((urb = usb_get_from_anchor(&dev->deferred))) { 1662 1664 dev_kfree_skb(urb->context); 1663 1665 kfree(urb->sg);
+8 -3
drivers/net/virtio_net.c
··· 1379 1379 ret = XDP_PASS; 1380 1380 rcu_read_lock(); 1381 1381 prog = rcu_dereference(rq->xdp_prog); 1382 - /* TODO: support multi buffer. */ 1383 - if (prog && num_buf == 1) 1384 - ret = virtnet_xdp_handler(prog, xdp, dev, xdp_xmit, stats); 1382 + if (prog) { 1383 + /* TODO: support multi buffer. */ 1384 + if (num_buf == 1) 1385 + ret = virtnet_xdp_handler(prog, xdp, dev, xdp_xmit, 1386 + stats); 1387 + else 1388 + ret = XDP_ABORTED; 1389 + } 1385 1390 rcu_read_unlock(); 1386 1391 1387 1392 switch (ret) {
+1
drivers/net/wireless/ath/ath10k/wmi.c
··· 1937 1937 if (cmd_id == WMI_CMD_UNSUPPORTED) { 1938 1938 ath10k_warn(ar, "wmi command %d is not supported by firmware\n", 1939 1939 cmd_id); 1940 + dev_kfree_skb_any(skb); 1940 1941 return ret; 1941 1942 } 1942 1943
+48 -6
drivers/net/wireless/ath/ath11k/core.c
··· 912 912 static const struct dmi_system_id ath11k_pm_quirk_table[] = { 913 913 { 914 914 .driver_data = (void *)ATH11K_PM_WOW, 915 - .matches = { 915 + .matches = { /* X13 G4 AMD #1 */ 916 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 917 + DMI_MATCH(DMI_PRODUCT_NAME, "21J3"), 918 + }, 919 + }, 920 + { 921 + .driver_data = (void *)ATH11K_PM_WOW, 922 + .matches = { /* X13 G4 AMD #2 */ 916 923 DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 917 924 DMI_MATCH(DMI_PRODUCT_NAME, "21J4"), 918 925 }, 919 926 }, 920 927 { 921 928 .driver_data = (void *)ATH11K_PM_WOW, 922 - .matches = { 929 + .matches = { /* T14 G4 AMD #1 */ 930 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 931 + DMI_MATCH(DMI_PRODUCT_NAME, "21K3"), 932 + }, 933 + }, 934 + { 935 + .driver_data = (void *)ATH11K_PM_WOW, 936 + .matches = { /* T14 G4 AMD #2 */ 923 937 DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 924 938 DMI_MATCH(DMI_PRODUCT_NAME, "21K4"), 925 939 }, 926 940 }, 927 941 { 928 942 .driver_data = (void *)ATH11K_PM_WOW, 929 - .matches = { 943 + .matches = { /* P14s G4 AMD #1 */ 944 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 945 + DMI_MATCH(DMI_PRODUCT_NAME, "21K5"), 946 + }, 947 + }, 948 + { 949 + .driver_data = (void *)ATH11K_PM_WOW, 950 + .matches = { /* P14s G4 AMD #2 */ 930 951 DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 931 952 DMI_MATCH(DMI_PRODUCT_NAME, "21K6"), 932 953 }, 933 954 }, 934 955 { 935 956 .driver_data = (void *)ATH11K_PM_WOW, 936 - .matches = { 957 + .matches = { /* T16 G2 AMD #1 */ 958 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 959 + DMI_MATCH(DMI_PRODUCT_NAME, "21K7"), 960 + }, 961 + }, 962 + { 963 + .driver_data = (void *)ATH11K_PM_WOW, 964 + .matches = { /* T16 G2 AMD #2 */ 937 965 DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 938 966 DMI_MATCH(DMI_PRODUCT_NAME, "21K8"), 939 967 }, 940 968 }, 941 969 { 942 970 .driver_data = (void *)ATH11K_PM_WOW, 943 - .matches = { 971 + .matches = { /* P16s G2 AMD #1 */ 972 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 973 + DMI_MATCH(DMI_PRODUCT_NAME, "21K9"), 974 + }, 975 + }, 976 + { 977 + .driver_data = (void *)ATH11K_PM_WOW, 978 + .matches = { /* P16s G2 AMD #2 */ 944 979 DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 945 980 DMI_MATCH(DMI_PRODUCT_NAME, "21KA"), 946 981 }, 947 982 }, 948 983 { 949 984 .driver_data = (void *)ATH11K_PM_WOW, 950 - .matches = { 985 + .matches = { /* T14s G4 AMD #1 */ 986 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 987 + DMI_MATCH(DMI_PRODUCT_NAME, "21F8"), 988 + }, 989 + }, 990 + { 991 + .driver_data = (void *)ATH11K_PM_WOW, 992 + .matches = { /* T14s G4 AMD #2 */ 951 993 DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 952 994 DMI_MATCH(DMI_PRODUCT_NAME, "21F9"), 953 995 },
+5 -5
drivers/net/wireless/ath/ath11k/mac.c
··· 1 1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 2 /* 3 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 - * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 4 + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 5 5 */ 6 6 7 7 #include <net/mac80211.h> ··· 4417 4417 } 4418 4418 4419 4419 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) 4420 - flags |= WMI_KEY_PAIRWISE; 4420 + flags = WMI_KEY_PAIRWISE; 4421 4421 else 4422 - flags |= WMI_KEY_GROUP; 4422 + flags = WMI_KEY_GROUP; 4423 4423 4424 4424 ath11k_dbg(ar->ab, ATH11K_DBG_MAC, 4425 4425 "%s for peer %pM on vdev %d flags 0x%X, type = %d, num_sta %d\n", ··· 4456 4456 4457 4457 is_ap_with_no_sta = (vif->type == NL80211_IFTYPE_AP && 4458 4458 !arvif->num_stations); 4459 - if ((flags & WMI_KEY_PAIRWISE) || cmd == SET_KEY || is_ap_with_no_sta) { 4459 + if (flags == WMI_KEY_PAIRWISE || cmd == SET_KEY || is_ap_with_no_sta) { 4460 4460 ret = ath11k_install_key(arvif, key, cmd, peer_addr, flags); 4461 4461 if (ret) { 4462 4462 ath11k_warn(ab, "ath11k_install_key failed (%d)\n", ret); ··· 4470 4470 goto exit; 4471 4471 } 4472 4472 4473 - if ((flags & WMI_KEY_GROUP) && cmd == SET_KEY && is_ap_with_no_sta) 4473 + if (flags == WMI_KEY_GROUP && cmd == SET_KEY && is_ap_with_no_sta) 4474 4474 arvif->reinstall_group_keys = true; 4475 4475 } 4476 4476
+18 -16
drivers/net/wireless/ath/ath12k/mac.c
··· 8290 8290 wake_up(&ar->txmgmt_empty_waitq); 8291 8291 } 8292 8292 8293 - int ath12k_mac_tx_mgmt_pending_free(int buf_id, void *skb, void *ctx) 8293 + static void ath12k_mac_tx_mgmt_free(struct ath12k *ar, int buf_id) 8294 8294 { 8295 - struct sk_buff *msdu = skb; 8295 + struct sk_buff *msdu; 8296 8296 struct ieee80211_tx_info *info; 8297 - struct ath12k *ar = ctx; 8298 - struct ath12k_base *ab = ar->ab; 8299 8297 8300 8298 spin_lock_bh(&ar->txmgmt_idr_lock); 8301 - idr_remove(&ar->txmgmt_idr, buf_id); 8299 + msdu = idr_remove(&ar->txmgmt_idr, buf_id); 8302 8300 spin_unlock_bh(&ar->txmgmt_idr_lock); 8303 - dma_unmap_single(ab->dev, ATH12K_SKB_CB(msdu)->paddr, msdu->len, 8301 + 8302 + if (!msdu) 8303 + return; 8304 + 8305 + dma_unmap_single(ar->ab->dev, ATH12K_SKB_CB(msdu)->paddr, msdu->len, 8304 8306 DMA_TO_DEVICE); 8305 8307 8306 8308 info = IEEE80211_SKB_CB(msdu); 8307 8309 memset(&info->status, 0, sizeof(info->status)); 8308 8310 8309 - ath12k_mgmt_over_wmi_tx_drop(ar, skb); 8311 + ath12k_mgmt_over_wmi_tx_drop(ar, msdu); 8312 + } 8313 + 8314 + int ath12k_mac_tx_mgmt_pending_free(int buf_id, void *skb, void *ctx) 8315 + { 8316 + struct ath12k *ar = ctx; 8317 + 8318 + ath12k_mac_tx_mgmt_free(ar, buf_id); 8310 8319 8311 8320 return 0; 8312 8321 } ··· 8324 8315 { 8325 8316 struct ieee80211_vif *vif = ctx; 8326 8317 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 8327 - struct sk_buff *msdu = skb; 8328 8318 struct ath12k *ar = skb_cb->ar; 8329 - struct ath12k_base *ab = ar->ab; 8330 8319 8331 - if (skb_cb->vif == vif) { 8332 - spin_lock_bh(&ar->txmgmt_idr_lock); 8333 - idr_remove(&ar->txmgmt_idr, buf_id); 8334 - spin_unlock_bh(&ar->txmgmt_idr_lock); 8335 - dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, 8336 - DMA_TO_DEVICE); 8337 - } 8320 + if (skb_cb->vif == vif) 8321 + ath12k_mac_tx_mgmt_free(ar, buf_id); 8338 8322 8339 8323 return 0; 8340 8324 }
+1 -2
drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c
··· 5627 5627 *cookie, le16_to_cpu(action_frame->len), 5628 5628 le32_to_cpu(af_params->channel)); 5629 5629 5630 - ack = brcmf_p2p_send_action_frame(cfg, cfg_to_ndev(cfg), 5631 - af_params); 5630 + ack = brcmf_p2p_send_action_frame(vif->ifp, af_params); 5632 5631 5633 5632 cfg80211_mgmt_tx_status(wdev, *cookie, buf, len, ack, 5634 5633 GFP_KERNEL);
+10 -18
drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c
··· 1529 1529 /** 1530 1530 * brcmf_p2p_tx_action_frame() - send action frame over fil. 1531 1531 * 1532 + * @ifp: interface to transmit on. 1532 1533 * @p2p: p2p info struct for vif. 1533 1534 * @af_params: action frame data/info. 1534 1535 * ··· 1539 1538 * The WLC_E_ACTION_FRAME_COMPLETE event will be received when the action 1540 1539 * frame is transmitted. 1541 1540 */ 1542 - static s32 brcmf_p2p_tx_action_frame(struct brcmf_p2p_info *p2p, 1541 + static s32 brcmf_p2p_tx_action_frame(struct brcmf_if *ifp, 1542 + struct brcmf_p2p_info *p2p, 1543 1543 struct brcmf_fil_af_params_le *af_params) 1544 1544 { 1545 1545 struct brcmf_pub *drvr = p2p->cfg->pub; 1546 - struct brcmf_cfg80211_vif *vif; 1547 - struct brcmf_p2p_action_frame *p2p_af; 1548 1546 s32 err = 0; 1549 1547 1550 1548 brcmf_dbg(TRACE, "Enter\n"); ··· 1552 1552 clear_bit(BRCMF_P2P_STATUS_ACTION_TX_COMPLETED, &p2p->status); 1553 1553 clear_bit(BRCMF_P2P_STATUS_ACTION_TX_NOACK, &p2p->status); 1554 1554 1555 - /* check if it is a p2p_presence response */ 1556 - p2p_af = (struct brcmf_p2p_action_frame *)af_params->action_frame.data; 1557 - if (p2p_af->subtype == P2P_AF_PRESENCE_RSP) 1558 - vif = p2p->bss_idx[P2PAPI_BSSCFG_CONNECTION].vif; 1559 - else 1560 - vif = p2p->bss_idx[P2PAPI_BSSCFG_DEVICE].vif; 1561 - 1562 - err = brcmf_fil_bsscfg_data_set(vif->ifp, "actframe", af_params, 1555 + err = brcmf_fil_bsscfg_data_set(ifp, "actframe", af_params, 1563 1556 sizeof(*af_params)); 1564 1557 if (err) { 1565 1558 bphy_err(drvr, " sending action frame has failed\n"); ··· 1704 1711 /** 1705 1712 * brcmf_p2p_send_action_frame() - send action frame . 1706 1713 * 1707 - * @cfg: driver private data for cfg80211 interface. 1708 - * @ndev: net device to transmit on. 1714 + * @ifp: interface to transmit on. 1709 1715 * @af_params: configuration data for action frame. 1710 1716 */ 1711 - bool brcmf_p2p_send_action_frame(struct brcmf_cfg80211_info *cfg, 1712 - struct net_device *ndev, 1717 + bool brcmf_p2p_send_action_frame(struct brcmf_if *ifp, 1713 1718 struct brcmf_fil_af_params_le *af_params) 1714 1719 { 1720 + struct brcmf_cfg80211_info *cfg = ifp->drvr->config; 1715 1721 struct brcmf_p2p_info *p2p = &cfg->p2p; 1716 - struct brcmf_if *ifp = netdev_priv(ndev); 1717 1722 struct brcmf_fil_action_frame_le *action_frame; 1718 1723 struct brcmf_config_af_params config_af_params; 1719 1724 struct afx_hdl *afx_hdl = &p2p->afx_hdl; ··· 1848 1857 if (af_params->channel) 1849 1858 msleep(P2P_AF_RETRY_DELAY_TIME); 1850 1859 1851 - ack = !brcmf_p2p_tx_action_frame(p2p, af_params); 1860 + ack = !brcmf_p2p_tx_action_frame(ifp, p2p, af_params); 1852 1861 tx_retry++; 1853 1862 dwell_overflow = brcmf_p2p_check_dwell_overflow(requested_dwell, 1854 1863 dwell_jiffies); ··· 2208 2217 2209 2218 WARN_ON(p2p_ifp->bsscfgidx != bsscfgidx); 2210 2219 2211 - init_completion(&p2p->send_af_done); 2212 2220 INIT_WORK(&p2p->afx_hdl.afx_work, brcmf_p2p_afx_handler); 2213 2221 init_completion(&p2p->afx_hdl.act_frm_scan); 2214 2222 init_completion(&p2p->wait_next_af); ··· 2502 2512 2503 2513 pri_ifp = brcmf_get_ifp(cfg->pub, 0); 2504 2514 p2p->bss_idx[P2PAPI_BSSCFG_PRIMARY].vif = pri_ifp->vif; 2515 + 2516 + init_completion(&p2p->send_af_done); 2505 2517 2506 2518 if (p2pdev_forced) { 2507 2519 err_ptr = brcmf_p2p_create_p2pdev(p2p, NULL, NULL);
+1 -2
drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.h
··· 168 168 int brcmf_p2p_notify_action_tx_complete(struct brcmf_if *ifp, 169 169 const struct brcmf_event_msg *e, 170 170 void *data); 171 - bool brcmf_p2p_send_action_frame(struct brcmf_cfg80211_info *cfg, 172 - struct net_device *ndev, 171 + bool brcmf_p2p_send_action_frame(struct brcmf_if *ifp, 173 172 struct brcmf_fil_af_params_le *af_params); 174 173 bool brcmf_p2p_scan_finding_common_channel(struct brcmf_cfg80211_info *cfg, 175 174 struct brcmf_bss_info_le *bi);
+3 -2
drivers/net/wireless/intel/iwlwifi/mld/link.c
··· 501 501 struct iwl_mld_vif *mld_vif = iwl_mld_vif_from_mac80211(bss_conf->vif); 502 502 struct iwl_mld_link *link = iwl_mld_link_from_mac80211(bss_conf); 503 503 bool is_deflink = link == &mld_vif->deflink; 504 + u8 fw_id = link->fw_id; 504 505 505 506 if (WARN_ON(!link || link->active)) 506 507 return; ··· 514 513 515 514 RCU_INIT_POINTER(mld_vif->link[bss_conf->link_id], NULL); 516 515 517 - if (WARN_ON(link->fw_id >= mld->fw->ucode_capa.num_links)) 516 + if (WARN_ON(fw_id >= mld->fw->ucode_capa.num_links)) 518 517 return; 519 518 520 - RCU_INIT_POINTER(mld->fw_id_to_bss_conf[link->fw_id], NULL); 519 + RCU_INIT_POINTER(mld->fw_id_to_bss_conf[fw_id], NULL); 521 520 } 522 521 523 522 void iwl_mld_handle_missed_beacon_notif(struct iwl_mld *mld,
+1
drivers/nvmem/rcar-efuse.c
··· 127 127 { .compatible = "renesas,r8a779h0-otp", .data = &rcar_fuse_v4m }, 128 128 { /* sentinel */ } 129 129 }; 130 + MODULE_DEVICE_TABLE(of, rcar_fuse_match); 130 131 131 132 static struct platform_driver rcar_fuse_driver = { 132 133 .probe = rcar_fuse_probe,
+40 -4
drivers/of/irq.c
··· 671 671 } 672 672 } 673 673 674 + static int of_check_msi_parent(struct device_node *dev_node, struct device_node **msi_node) 675 + { 676 + struct of_phandle_args msi_spec; 677 + int ret; 678 + 679 + /* 680 + * An msi-parent phandle with a missing or == 0 #msi-cells 681 + * property identifies a 1:1 ID translation mapping. 682 + * 683 + * Set the msi controller node if the firmware matches this 684 + * condition. 685 + */ 686 + ret = of_parse_phandle_with_optional_args(dev_node, "msi-parent", "#msi-cells", 687 + 0, &msi_spec); 688 + if (ret) 689 + return ret; 690 + 691 + if ((*msi_node && *msi_node != msi_spec.np) || msi_spec.args_count != 0) 692 + ret = -EINVAL; 693 + 694 + if (!ret) { 695 + /* Return with a node reference held */ 696 + *msi_node = msi_spec.np; 697 + return 0; 698 + } 699 + of_node_put(msi_spec.np); 700 + 701 + return ret; 702 + } 703 + 674 704 /** 675 705 * of_msi_xlate - map a MSI ID and find relevant MSI controller node 676 706 * @dev: device for which the mapping is to be done. ··· 708 678 * @id_in: Device ID. 709 679 * 710 680 * Walk up the device hierarchy looking for devices with a "msi-map" 711 - * property. If found, apply the mapping to @id_in. 681 + * or "msi-parent" property. If found, apply the mapping to @id_in. 712 682 * If @msi_np points to a non-NULL device node pointer, only entries targeting 713 683 * that node will be matched; if it points to a NULL value, it will receive the 714 684 * device node of the first matching target phandle, with a reference held. ··· 722 692 723 693 /* 724 694 * Walk up the device parent links looking for one with a 725 - * "msi-map" property. 695 + * "msi-map" or an "msi-parent" property. 726 696 */ 727 - for (parent_dev = dev; parent_dev; parent_dev = parent_dev->parent) 697 + for (parent_dev = dev; parent_dev; parent_dev = parent_dev->parent) { 728 698 if (!of_map_id(parent_dev->of_node, id_in, "msi-map", 729 699 "msi-map-mask", msi_np, &id_out)) 730 700 break; 701 + if (!of_check_msi_parent(parent_dev->of_node, msi_np)) 702 + break; 703 + } 731 704 return id_out; 732 705 } 706 + EXPORT_SYMBOL_GPL(of_msi_xlate); 733 707 734 708 /** 735 709 * of_msi_map_get_device_domain - Use msi-map to find the relevant MSI domain ··· 775 741 776 742 of_for_each_phandle(&it, err, np, "msi-parent", "#msi-cells", 0) { 777 743 d = irq_find_matching_host(it.node, token); 778 - if (d) 744 + if (d) { 745 + of_node_put(it.node); 779 746 return d; 747 + } 780 748 } 781 749 782 750 return NULL;
+24 -4
drivers/pci/controller/dwc/pcie-designware-host.c
··· 23 23 #include "pcie-designware.h" 24 24 25 25 static struct pci_ops dw_pcie_ops; 26 + static struct pci_ops dw_pcie_ecam_ops; 26 27 static struct pci_ops dw_child_pcie_ops; 27 28 28 29 #define DW_PCIE_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ ··· 472 471 if (IS_ERR(pp->cfg)) 473 472 return PTR_ERR(pp->cfg); 474 473 475 - pci->dbi_base = pp->cfg->win; 476 - pci->dbi_phys_addr = res->start; 477 - 478 474 return 0; 479 475 } 480 476 ··· 527 529 if (ret) 528 530 return ret; 529 531 530 - pp->bridge->ops = (struct pci_ops *)&pci_generic_ecam_ops.pci_ops; 532 + pp->bridge->ops = &dw_pcie_ecam_ops; 531 533 pp->bridge->sysdata = pp->cfg; 532 534 pp->cfg->priv = pp; 533 535 } else { ··· 840 842 } 841 843 EXPORT_SYMBOL_GPL(dw_pcie_own_conf_map_bus); 842 844 845 + static void __iomem *dw_pcie_ecam_conf_map_bus(struct pci_bus *bus, unsigned int devfn, int where) 846 + { 847 + struct pci_config_window *cfg = bus->sysdata; 848 + struct dw_pcie_rp *pp = cfg->priv; 849 + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); 850 + unsigned int busn = bus->number; 851 + 852 + if (busn > 0) 853 + return pci_ecam_map_bus(bus, devfn, where); 854 + 855 + if (PCI_SLOT(devfn) > 0) 856 + return NULL; 857 + 858 + return pci->dbi_base + where; 859 + } 860 + 843 861 static struct pci_ops dw_pcie_ops = { 844 862 .map_bus = dw_pcie_own_conf_map_bus, 863 + .read = pci_generic_config_read, 864 + .write = pci_generic_config_write, 865 + }; 866 + 867 + static struct pci_ops dw_pcie_ecam_ops = { 868 + .map_bus = dw_pcie_ecam_conf_map_bus, 845 869 .read = pci_generic_config_read, 846 870 .write = pci_generic_config_write, 847 871 };
-68
drivers/pci/controller/dwc/pcie-qcom.c
··· 55 55 #define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8 56 56 #define PARF_Q2A_FLUSH 0x1ac 57 57 #define PARF_LTSSM 0x1b0 58 - #define PARF_SLV_DBI_ELBI 0x1b4 59 58 #define PARF_INT_ALL_STATUS 0x224 60 59 #define PARF_INT_ALL_CLEAR 0x228 61 60 #define PARF_INT_ALL_MASK 0x22c ··· 64 65 #define PARF_DBI_BASE_ADDR_V2_HI 0x354 65 66 #define PARF_SLV_ADDR_SPACE_SIZE_V2 0x358 66 67 #define PARF_SLV_ADDR_SPACE_SIZE_V2_HI 0x35c 67 - #define PARF_BLOCK_SLV_AXI_WR_BASE 0x360 68 - #define PARF_BLOCK_SLV_AXI_WR_BASE_HI 0x364 69 - #define PARF_BLOCK_SLV_AXI_WR_LIMIT 0x368 70 - #define PARF_BLOCK_SLV_AXI_WR_LIMIT_HI 0x36c 71 - #define PARF_BLOCK_SLV_AXI_RD_BASE 0x370 72 - #define PARF_BLOCK_SLV_AXI_RD_BASE_HI 0x374 73 - #define PARF_BLOCK_SLV_AXI_RD_LIMIT 0x378 74 - #define PARF_BLOCK_SLV_AXI_RD_LIMIT_HI 0x37c 75 - #define PARF_ECAM_BASE 0x380 76 - #define PARF_ECAM_BASE_HI 0x384 77 68 #define PARF_NO_SNOOP_OVERRIDE 0x3d4 78 69 #define PARF_ATU_BASE_ADDR 0x634 79 70 #define PARF_ATU_BASE_ADDR_HI 0x638 ··· 87 98 88 99 /* PARF_SYS_CTRL register fields */ 89 100 #define MAC_PHY_POWERDOWN_IN_P2_D_MUX_EN BIT(29) 90 - #define PCIE_ECAM_BLOCKER_EN BIT(26) 91 101 #define MST_WAKEUP_EN BIT(13) 92 102 #define SLV_WAKEUP_EN BIT(12) 93 103 #define MSTR_ACLK_CGC_DIS BIT(10) ··· 133 145 134 146 /* PARF_LTSSM register fields */ 135 147 #define LTSSM_EN BIT(8) 136 - 137 - /* PARF_SLV_DBI_ELBI */ 138 - #define SLV_DBI_ELBI_ADDR_BASE GENMASK(11, 0) 139 148 140 149 /* PARF_INT_ALL_{STATUS/CLEAR/MASK} register fields */ 141 150 #define PARF_INT_ALL_LINK_UP BIT(13) ··· 309 324 /* Ensure that PERST has been asserted for at least 100 ms */ 310 325 msleep(PCIE_T_PVPERL_MS); 311 326 qcom_perst_assert(pcie, false); 312 - } 313 - 314 - static void qcom_pci_config_ecam(struct dw_pcie_rp *pp) 315 - { 316 - struct dw_pcie *pci = to_dw_pcie_from_pp(pp); 317 - struct qcom_pcie *pcie = to_qcom_pcie(pci); 318 - u64 addr, addr_end; 319 - u32 val; 320 - 321 - writel_relaxed(lower_32_bits(pci->dbi_phys_addr), pcie->parf + PARF_ECAM_BASE); 322 - writel_relaxed(upper_32_bits(pci->dbi_phys_addr), pcie->parf + PARF_ECAM_BASE_HI); 323 - 324 - /* 325 - * The only device on the root bus is a single Root Port. If we try to 326 - * access any devices other than Device/Function 00.0 on Bus 0, the TLP 327 - * will go outside of the controller to the PCI bus. But with CFG Shift 328 - * Feature (ECAM) enabled in iATU, there is no guarantee that the 329 - * response is going to be all F's. Hence, to make sure that the 330 - * requester gets all F's response for accesses other than the Root 331 - * Port, configure iATU to block the transactions starting from 332 - * function 1 of the root bus to the end of the root bus (i.e., from 333 - * dbi_base + 4KB to dbi_base + 1MB). 334 - */ 335 - addr = pci->dbi_phys_addr + SZ_4K; 336 - writel_relaxed(lower_32_bits(addr), pcie->parf + PARF_BLOCK_SLV_AXI_WR_BASE); 337 - writel_relaxed(upper_32_bits(addr), pcie->parf + PARF_BLOCK_SLV_AXI_WR_BASE_HI); 338 - 339 - writel_relaxed(lower_32_bits(addr), pcie->parf + PARF_BLOCK_SLV_AXI_RD_BASE); 340 - writel_relaxed(upper_32_bits(addr), pcie->parf + PARF_BLOCK_SLV_AXI_RD_BASE_HI); 341 - 342 - addr_end = pci->dbi_phys_addr + SZ_1M - 1; 343 - 344 - writel_relaxed(lower_32_bits(addr_end), pcie->parf + PARF_BLOCK_SLV_AXI_WR_LIMIT); 345 - writel_relaxed(upper_32_bits(addr_end), pcie->parf + PARF_BLOCK_SLV_AXI_WR_LIMIT_HI); 346 - 347 - writel_relaxed(lower_32_bits(addr_end), pcie->parf + PARF_BLOCK_SLV_AXI_RD_LIMIT); 348 - writel_relaxed(upper_32_bits(addr_end), pcie->parf + PARF_BLOCK_SLV_AXI_RD_LIMIT_HI); 349 - 350 - val = readl_relaxed(pcie->parf + PARF_SYS_CTRL); 351 - val |= PCIE_ECAM_BLOCKER_EN; 352 - writel_relaxed(val, pcie->parf + PARF_SYS_CTRL); 353 327 } 354 328 355 329 static int qcom_pcie_start_link(struct dw_pcie *pci) ··· 1264 1320 { 1265 1321 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); 1266 1322 struct qcom_pcie *pcie = to_qcom_pcie(pci); 1267 - u16 offset; 1268 1323 int ret; 1269 1324 1270 1325 qcom_ep_reset_assert(pcie); ··· 1271 1328 ret = pcie->cfg->ops->init(pcie); 1272 1329 if (ret) 1273 1330 return ret; 1274 - 1275 - if (pp->ecam_enabled) { 1276 - /* 1277 - * Override ELBI when ECAM is enabled, as when ECAM is enabled, 1278 - * ELBI moves under the 'config' space. 1279 - */ 1280 - offset = FIELD_GET(SLV_DBI_ELBI_ADDR_BASE, readl(pcie->parf + PARF_SLV_DBI_ELBI)); 1281 - pci->elbi_base = pci->dbi_base + offset; 1282 - 1283 - qcom_pci_config_ecam(pp); 1284 - } 1285 1331 1286 1332 ret = qcom_pcie_phy_power_on(pcie); 1287 1333 if (ret)
+9 -25
drivers/pci/pcie/aspm.c
··· 243 243 /* Clock PM state */ 244 244 u32 clkpm_capable:1; /* Clock PM capable? */ 245 245 u32 clkpm_enabled:1; /* Current Clock PM state */ 246 - u32 clkpm_default:1; /* Default Clock PM state by BIOS or 247 - override */ 246 + u32 clkpm_default:1; /* Default Clock PM state by BIOS */ 248 247 u32 clkpm_disable:1; /* Clock PM disabled */ 249 248 }; 250 249 ··· 375 376 pcie_set_clkpm_nocheck(link, enable); 376 377 } 377 378 378 - static void pcie_clkpm_override_default_link_state(struct pcie_link_state *link, 379 - int enabled) 380 - { 381 - struct pci_dev *pdev = link->downstream; 382 - 383 - /* For devicetree platforms, enable ClockPM by default */ 384 - if (of_have_populated_dt() && !enabled) { 385 - link->clkpm_default = 1; 386 - pci_info(pdev, "ASPM: DT platform, enabling ClockPM\n"); 387 - } 388 - } 389 - 390 379 static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist) 391 380 { 392 381 int capable = 1, enabled = 1; ··· 397 410 } 398 411 link->clkpm_enabled = enabled; 399 412 link->clkpm_default = enabled; 400 - pcie_clkpm_override_default_link_state(link, enabled); 401 413 link->clkpm_capable = capable; 402 414 link->clkpm_disable = blacklist ? 1 : 0; 403 415 } ··· 797 811 struct pci_dev *pdev = link->downstream; 798 812 u32 override; 799 813 800 - /* For devicetree platforms, enable all ASPM states by default */ 814 + /* For devicetree platforms, enable L0s and L1 by default */ 801 815 if (of_have_populated_dt()) { 802 - link->aspm_default = PCIE_LINK_STATE_ASPM_ALL; 816 + if (link->aspm_support & PCIE_LINK_STATE_L0S) 817 + link->aspm_default |= PCIE_LINK_STATE_L0S; 818 + if (link->aspm_support & PCIE_LINK_STATE_L1) 819 + link->aspm_default |= PCIE_LINK_STATE_L1; 803 820 override = link->aspm_default & ~link->aspm_enabled; 804 821 if (override) 805 - pci_info(pdev, "ASPM: DT platform, enabling%s%s%s%s%s%s%s\n", 806 - FLAG(override, L0S_UP, " L0s-up"), 807 - FLAG(override, L0S_DW, " L0s-dw"), 808 - FLAG(override, L1, " L1"), 809 - FLAG(override, L1_1, " ASPM-L1.1"), 810 - FLAG(override, L1_2, " ASPM-L1.2"), 811 - FLAG(override, L1_1_PCIPM, " PCI-PM-L1.1"), 812 - FLAG(override, L1_2_PCIPM, " PCI-PM-L1.2")); 822 + pci_info(pdev, "ASPM: default states%s%s\n", 823 + FLAG(override, L0S, " L0s"), 824 + FLAG(override, L1, " L1")); 813 825 } 814 826 } 815 827
+97 -31
drivers/spi/spi-airoha-snfi.c
··· 192 192 #define SPI_NAND_OP_RESET 0xff 193 193 #define SPI_NAND_OP_DIE_SELECT 0xc2 194 194 195 + /* SNAND FIFO commands */ 196 + #define SNAND_FIFO_TX_BUSWIDTH_SINGLE 0x08 197 + #define SNAND_FIFO_TX_BUSWIDTH_DUAL 0x09 198 + #define SNAND_FIFO_TX_BUSWIDTH_QUAD 0x0a 199 + #define SNAND_FIFO_RX_BUSWIDTH_SINGLE 0x0c 200 + #define SNAND_FIFO_RX_BUSWIDTH_DUAL 0x0e 201 + #define SNAND_FIFO_RX_BUSWIDTH_QUAD 0x0f 202 + 195 203 #define SPI_NAND_CACHE_SIZE (SZ_4K + SZ_256) 196 204 #define SPI_MAX_TRANSFER_SIZE 511 197 205 ··· 395 387 return regmap_write(as_ctrl->regmap_ctrl, REG_SPI_CTRL_DUMMY, 0); 396 388 } 397 389 398 - static int airoha_snand_write_data(struct airoha_snand_ctrl *as_ctrl, u8 cmd, 399 - const u8 *data, int len) 390 + static int airoha_snand_write_data(struct airoha_snand_ctrl *as_ctrl, 391 + const u8 *data, int len, int buswidth) 400 392 { 401 393 int i, data_len; 394 + u8 cmd; 395 + 396 + switch (buswidth) { 397 + case 0: 398 + case 1: 399 + cmd = SNAND_FIFO_TX_BUSWIDTH_SINGLE; 400 + break; 401 + case 2: 402 + cmd = SNAND_FIFO_TX_BUSWIDTH_DUAL; 403 + break; 404 + case 4: 405 + cmd = SNAND_FIFO_TX_BUSWIDTH_QUAD; 406 + break; 407 + default: 408 + return -EINVAL; 409 + } 402 410 403 411 for (i = 0; i < len; i += data_len) { 404 412 int err; ··· 433 409 return 0; 434 410 } 435 411 436 - static int airoha_snand_read_data(struct airoha_snand_ctrl *as_ctrl, u8 *data, 437 - int len) 412 + static int airoha_snand_read_data(struct airoha_snand_ctrl *as_ctrl, 413 + u8 *data, int len, int buswidth) 438 414 { 439 415 int i, data_len; 416 + u8 cmd; 417 + 418 + switch (buswidth) { 419 + case 0: 420 + case 1: 421 + cmd = SNAND_FIFO_RX_BUSWIDTH_SINGLE; 422 + break; 423 + case 2: 424 + cmd = SNAND_FIFO_RX_BUSWIDTH_DUAL; 425 + break; 426 + case 4: 427 + cmd = SNAND_FIFO_RX_BUSWIDTH_QUAD; 428 + break; 429 + default: 430 + return -EINVAL; 431 + } 440 432 441 433 for (i = 0; i < len; i += data_len) { 442 434 int err; 443 435 444 436 data_len = min(len - i, SPI_MAX_TRANSFER_SIZE); 445 - err = airoha_snand_set_fifo_op(as_ctrl, 0xc, data_len); 437 + err = airoha_snand_set_fifo_op(as_ctrl, cmd, data_len); 446 438 if (err) 447 439 return err; 448 440 ··· 658 618 if (desc->info.offset + desc->info.length > U32_MAX) 659 619 return -EINVAL; 660 620 621 + /* continuous reading is not supported */ 622 + if (desc->info.length > SPI_NAND_CACHE_SIZE) 623 + return -E2BIG; 624 + 661 625 if (!airoha_snand_supports_op(desc->mem, &desc->info.op_tmpl)) 662 626 return -EOPNOTSUPP; 663 627 ··· 698 654 699 655 err = airoha_snand_nfi_config(as_ctrl); 700 656 if (err) 701 - return err; 657 + goto error_dma_mode_off; 702 658 703 659 dma_addr = dma_map_single(as_ctrl->dev, txrx_buf, SPI_NAND_CACHE_SIZE, 704 660 DMA_FROM_DEVICE); 705 661 err = dma_mapping_error(as_ctrl->dev, dma_addr); 706 662 if (err) 707 - return err; 663 + goto error_dma_mode_off; 708 664 709 665 /* set dma addr */ 710 666 err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_STRADDR, ··· 733 689 if (err) 734 690 goto error_dma_unmap; 735 691 736 - /* set read addr */ 737 - err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_RD_CTL3, 0x0); 692 + /* set read addr: zero page offset + descriptor read offset */ 693 + err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_RD_CTL3, 694 + desc->info.offset); 738 695 if (err) 739 696 goto error_dma_unmap; 740 697 ··· 805 760 error_dma_unmap: 806 761 dma_unmap_single(as_ctrl->dev, dma_addr, SPI_NAND_CACHE_SIZE, 807 762 DMA_FROM_DEVICE); 763 + error_dma_mode_off: 764 + airoha_snand_set_mode(as_ctrl, SPI_MODE_MANUAL); 808 765 return err; 809 766 } 810 767 ··· 871 824 if (err) 872 825 goto error_dma_unmap; 873 826 874 - err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_PG_CTL2, 0x0); 827 + /* set write addr: zero page offset + descriptor write offset */ 828 + err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_PG_CTL2, 829 + desc->info.offset); 875 830 if (err) 876 831 goto error_dma_unmap; 877 832 ··· 941 892 error_dma_unmap: 942 893 dma_unmap_single(as_ctrl->dev, dma_addr, SPI_NAND_CACHE_SIZE, 943 894 DMA_TO_DEVICE); 895 + airoha_snand_set_mode(as_ctrl, SPI_MODE_MANUAL); 944 896 return err; 945 897 } 946 898 947 899 static int airoha_snand_exec_op(struct spi_mem *mem, 948 900 const struct spi_mem_op *op) 949 901 { 950 - u8 data[8], cmd, opcode = op->cmd.opcode; 951 902 struct airoha_snand_ctrl *as_ctrl; 903 + int op_len, addr_len, dummy_len; 904 + u8 buf[20], *data; 952 905 int i, err; 953 906 954 907 as_ctrl = spi_controller_get_devdata(mem->spi->controller); 908 + 909 + op_len = op->cmd.nbytes; 910 + addr_len = op->addr.nbytes; 911 + dummy_len = op->dummy.nbytes; 912 + 913 + if (op_len + dummy_len + addr_len > sizeof(buf)) 914 + return -EIO; 915 + 916 + data = buf; 917 + for (i = 0; i < op_len; i++) 918 + *data++ = op->cmd.opcode >> (8 * (op_len - i - 1)); 919 + for (i = 0; i < addr_len; i++) 920 + *data++ = op->addr.val >> (8 * (addr_len - i - 1)); 921 + for (i = 0; i < dummy_len; i++) 922 + *data++ = 0xff; 955 923 956 924 /* switch to manual mode */ 957 925 err = airoha_snand_set_mode(as_ctrl, SPI_MODE_MANUAL); ··· 980 914 return err; 981 915 982 916 /* opcode */ 983 - err = airoha_snand_write_data(as_ctrl, 0x8, &opcode, sizeof(opcode)); 917 + data = buf; 918 + err = airoha_snand_write_data(as_ctrl, data, op_len, 919 + op->cmd.buswidth); 984 920 if (err) 985 921 return err; 986 922 987 923 /* addr part */ 988 - cmd = opcode == SPI_NAND_OP_GET_FEATURE ? 0x11 : 0x8; 989 - put_unaligned_be64(op->addr.val, data); 990 - 991 - for (i = ARRAY_SIZE(data) - op->addr.nbytes; 992 - i < ARRAY_SIZE(data); i++) { 993 - err = airoha_snand_write_data(as_ctrl, cmd, &data[i], 994 - sizeof(data[0])); 924 + data += op_len; 925 + if (addr_len) { 926 + err = airoha_snand_write_data(as_ctrl, data, addr_len, 927 + op->addr.buswidth); 995 928 if (err) 996 929 return err; 997 930 } 998 931 999 932 /* dummy */ 1000 - data[0] = 0xff; 1001 - for (i = 0; i < op->dummy.nbytes; i++) { 1002 - err = airoha_snand_write_data(as_ctrl, 0x8, &data[0], 1003 - sizeof(data[0])); 933 + data += addr_len; 934 + if (dummy_len) { 935 + err = airoha_snand_write_data(as_ctrl, data, dummy_len, 936 + op->dummy.buswidth); 1004 937 if (err) 1005 938 return err; 1006 939 } 1007 940 1008 941 /* data */ 1009 - if (op->data.dir == SPI_MEM_DATA_IN) { 1010 - err = airoha_snand_read_data(as_ctrl, op->data.buf.in, 1011 - op->data.nbytes); 1012 - if (err) 1013 - return err; 1014 - } else { 1015 - err = airoha_snand_write_data(as_ctrl, 0x8, op->data.buf.out, 1016 - op->data.nbytes); 942 + if (op->data.nbytes) { 943 + if (op->data.dir == SPI_MEM_DATA_IN) 944 + err = airoha_snand_read_data(as_ctrl, op->data.buf.in, 945 + op->data.nbytes, 946 + op->data.buswidth); 947 + else 948 + err = airoha_snand_write_data(as_ctrl, op->data.buf.out, 949 + op->data.nbytes, 950 + op->data.buswidth); 1017 951 if (err) 1018 952 return err; 1019 953 }
+2 -2
drivers/spi/spi-amlogic-spifc-a4.c
··· 286 286 287 287 for (i = 0; i <= LANE_MAX; i++) { 288 288 if (buswidth == 1 << i) { 289 - conf = i << __bf_shf(mask); 289 + conf = i << __ffs(mask); 290 290 return regmap_update_bits(sfc->regmap_base, SFC_SPI_CFG, 291 291 mask, conf); 292 292 } ··· 566 566 if (!op->data.nbytes) 567 567 goto end_xfer; 568 568 569 - conf = (op->data.nbytes >> RAW_SIZE_BW) << __bf_shf(RAW_EXT_SIZE); 569 + conf = (op->data.nbytes >> RAW_SIZE_BW) << __ffs(RAW_EXT_SIZE); 570 570 ret = regmap_update_bits(sfc->regmap_base, SFC_SPI_CFG, RAW_EXT_SIZE, conf); 571 571 if (ret) 572 572 goto err_out;
+3 -2
drivers/spi/spi-cadence-quadspi.c
··· 1995 1995 if (cqspi->use_direct_mode) { 1996 1996 ret = cqspi_request_mmap_dma(cqspi); 1997 1997 if (ret == -EPROBE_DEFER) 1998 - goto probe_setup_failed; 1998 + goto probe_dma_failed; 1999 1999 } 2000 2000 2001 2001 if (!(ddata && (ddata->quirks & CQSPI_DISABLE_RUNTIME_PM))) { ··· 2019 2019 2020 2020 return 0; 2021 2021 probe_setup_failed: 2022 - cqspi_controller_enable(cqspi, 0); 2023 2022 if (!(ddata && (ddata->quirks & CQSPI_DISABLE_RUNTIME_PM))) 2024 2023 pm_runtime_disable(dev); 2024 + probe_dma_failed: 2025 + cqspi_controller_enable(cqspi, 0); 2025 2026 probe_reset_failed: 2026 2027 if (cqspi->is_jh7110) 2027 2028 cqspi_jh7110_disable_clk(pdev, cqspi);
+3 -1
drivers/spi/spi-dw-mmio.c
··· 358 358 if (IS_ERR(dwsmmio->rstc)) 359 359 return PTR_ERR(dwsmmio->rstc); 360 360 361 - reset_control_deassert(dwsmmio->rstc); 361 + ret = reset_control_deassert(dwsmmio->rstc); 362 + if (ret) 363 + return dev_err_probe(&pdev->dev, ret, "Failed to deassert resets\n"); 362 364 363 365 dws->bus_num = pdev->id; 364 366
+2
drivers/spi/spi-intel-pci.c
··· 75 75 { PCI_VDEVICE(INTEL, 0x38a4), (unsigned long)&bxt_info }, 76 76 { PCI_VDEVICE(INTEL, 0x43a4), (unsigned long)&cnl_info }, 77 77 { PCI_VDEVICE(INTEL, 0x4b24), (unsigned long)&bxt_info }, 78 + { PCI_VDEVICE(INTEL, 0x4d23), (unsigned long)&cnl_info }, 78 79 { PCI_VDEVICE(INTEL, 0x4da4), (unsigned long)&bxt_info }, 79 80 { PCI_VDEVICE(INTEL, 0x51a4), (unsigned long)&cnl_info }, 80 81 { PCI_VDEVICE(INTEL, 0x54a4), (unsigned long)&cnl_info }, 81 82 { PCI_VDEVICE(INTEL, 0x5794), (unsigned long)&cnl_info }, 83 + { PCI_VDEVICE(INTEL, 0x7723), (unsigned long)&cnl_info }, 82 84 { PCI_VDEVICE(INTEL, 0x7a24), (unsigned long)&cnl_info }, 83 85 { PCI_VDEVICE(INTEL, 0x7aa4), (unsigned long)&cnl_info }, 84 86 { PCI_VDEVICE(INTEL, 0x7e23), (unsigned long)&cnl_info },
+6
drivers/spi/spi-intel.c
··· 132 132 #define FLCOMP_C0DEN_16M 0x05 133 133 #define FLCOMP_C0DEN_32M 0x06 134 134 #define FLCOMP_C0DEN_64M 0x07 135 + #define FLCOMP_C0DEN_128M 0x08 135 136 136 137 #define INTEL_SPI_TIMEOUT 5000 /* ms */ 137 138 #define INTEL_SPI_FIFO_SZ 64 ··· 1348 1347 case FLCOMP_C0DEN_64M: 1349 1348 ispi->chip0_size = SZ_64M; 1350 1349 break; 1350 + case FLCOMP_C0DEN_128M: 1351 + ispi->chip0_size = SZ_128M; 1352 + break; 1351 1353 default: 1354 + dev_warn(ispi->dev, "unsupported C0DEN: %#lx\n", 1355 + flcomp & FLCOMP_C0DEN_MASK); 1352 1356 return -EINVAL; 1353 1357 } 1354 1358
+27 -5
drivers/spi/spi-nxp-fspi.c
··· 404 404 #define FSPI_NEED_INIT BIT(0) 405 405 #define FSPI_DTR_MODE BIT(1) 406 406 int flags; 407 + /* save the previous operation clock rate */ 408 + unsigned long pre_op_rate; 409 + /* the max clock rate fspi output to device */ 410 + unsigned long max_rate; 407 411 }; 408 412 409 413 static inline int needs_ip_only(struct nxp_fspi *f) ··· 689 685 * change the mode back to mode 0. 690 686 */ 691 687 reg = fspi_readl(f, f->iobase + FSPI_MCR0); 692 - if (op_is_dtr) 688 + if (op_is_dtr) { 693 689 reg |= FSPI_MCR0_RXCLKSRC(3); 694 - else /*select mode 0 */ 690 + f->max_rate = 166000000; 691 + } else { /*select mode 0 */ 695 692 reg &= ~FSPI_MCR0_RXCLKSRC(3); 693 + f->max_rate = 66000000; 694 + } 696 695 fspi_writel(f, reg, f->iobase + FSPI_MCR0); 697 696 } 698 697 ··· 726 719 0, POLL_TOUT, true); 727 720 if (ret) 728 721 dev_warn(f->dev, "DLL lock failed, please fix it!\n"); 722 + 723 + /* 724 + * For ERR050272, DLL lock status bit is not accurate, 725 + * wait for 4us more as a workaround. 726 + */ 727 + udelay(4); 729 728 } 730 729 731 730 /* ··· 793 780 uint64_t size_kb; 794 781 795 782 /* 796 - * Return, if previously selected target device is same as current 797 - * requested target device. Also the DTR or STR mode do not change. 783 + * Return when following condition all meet, 784 + * 1, if previously selected target device is same as current 785 + * requested target device. 786 + * 2, the DTR or STR mode do not change. 787 + * 3, previous operation max rate equals current one. 788 + * 789 + * For other case, need to re-config. 798 790 */ 799 791 if ((f->selected == spi_get_chipselect(spi, 0)) && 800 - (!!(f->flags & FSPI_DTR_MODE) == op_is_dtr)) 792 + (!!(f->flags & FSPI_DTR_MODE) == op_is_dtr) && 793 + (f->pre_op_rate == op->max_freq)) 801 794 return; 802 795 803 796 /* Reset FLSHxxCR0 registers */ ··· 821 802 dev_dbg(f->dev, "Target device [CS:%x] selected\n", spi_get_chipselect(spi, 0)); 822 803 823 804 nxp_fspi_select_rx_sample_clk_source(f, op_is_dtr); 805 + rate = min(f->max_rate, op->max_freq); 824 806 825 807 if (op_is_dtr) { 826 808 f->flags |= FSPI_DTR_MODE; ··· 851 831 nxp_fspi_dll_calibration(f); 852 832 else 853 833 nxp_fspi_dll_override(f); 834 + 835 + f->pre_op_rate = op->max_freq; 854 836 855 837 f->selected = spi_get_chipselect(spi, 0); 856 838 }
+11 -1
drivers/spi/spi-rockchip-sfc.c
··· 704 704 ret = -ENOMEM; 705 705 goto err_dma; 706 706 } 707 - sfc->dma_buffer = virt_to_phys(sfc->buffer); 707 + sfc->dma_buffer = dma_map_single(dev, sfc->buffer, 708 + sfc->max_iosize, DMA_BIDIRECTIONAL); 709 + if (dma_mapping_error(dev, sfc->dma_buffer)) { 710 + ret = -ENOMEM; 711 + goto err_dma_map; 712 + } 708 713 } 709 714 710 715 ret = devm_spi_register_controller(dev, host); ··· 720 715 721 716 return 0; 722 717 err_register: 718 + dma_unmap_single(dev, sfc->dma_buffer, sfc->max_iosize, 719 + DMA_BIDIRECTIONAL); 720 + err_dma_map: 723 721 free_pages((unsigned long)sfc->buffer, get_order(sfc->max_iosize)); 724 722 err_dma: 725 723 pm_runtime_get_sync(dev); ··· 744 736 struct spi_controller *host = sfc->host; 745 737 746 738 spi_unregister_controller(host); 739 + dma_unmap_single(&pdev->dev, sfc->dma_buffer, sfc->max_iosize, 740 + DMA_BIDIRECTIONAL); 747 741 free_pages((unsigned long)sfc->buffer, get_order(sfc->max_iosize)); 748 742 749 743 clk_disable_unprepare(sfc->clk);
+7 -5
drivers/staging/gpib/agilent_82350b/agilent_82350b.c
··· 182 182 return retval; 183 183 #endif 184 184 185 - retval = agilent_82350b_write(board, buffer, 1, 0, &num_bytes); 186 - *bytes_written += num_bytes; 187 - if (retval < 0) 188 - return retval; 185 + if (fifotransferlength > 0) { 186 + retval = agilent_82350b_write(board, buffer, 1, 0, &num_bytes); 187 + *bytes_written += num_bytes; 188 + if (retval < 0) 189 + return retval; 190 + } 189 191 190 192 write_byte(tms_priv, tms_priv->imr0_bits & ~HR_BOIE, IMR0); 191 193 for (i = 1; i < fifotransferlength;) { ··· 219 217 break; 220 218 } 221 219 write_byte(tms_priv, tms_priv->imr0_bits, IMR0); 222 - if (retval) 220 + if (retval < 0) 223 221 return retval; 224 222 225 223 if (send_eoi) {
+5
drivers/staging/gpib/fmh_gpib/fmh_gpib.c
··· 1517 1517 resource_size(e_priv->gpib_iomem_res)); 1518 1518 } 1519 1519 fmh_gpib_generic_detach(board); 1520 + 1521 + if (board->dev) { 1522 + put_device(board->dev); 1523 + board->dev = NULL; 1524 + } 1520 1525 } 1521 1526 1522 1527 static int fmh_gpib_pci_attach_impl(struct gpib_board *board,
+10 -3
drivers/staging/gpib/ni_usb/ni_usb_gpib.c
··· 327 327 board->status &= ~clear_mask; 328 328 board->status &= ~ni_usb_ibsta_mask; 329 329 board->status |= ni_usb_ibsta & ni_usb_ibsta_mask; 330 - // FIXME should generate events on DTAS and DCAS 330 + if (ni_usb_ibsta & DCAS) 331 + push_gpib_event(board, EVENT_DEV_CLR); 332 + if (ni_usb_ibsta & DTAS) 333 + push_gpib_event(board, EVENT_DEV_TRG); 331 334 332 335 spin_lock_irqsave(&board->spinlock, flags); 333 336 /* remove set status bits from monitored set why ?***/ ··· 697 694 */ 698 695 break; 699 696 case NIUSB_ATN_STATE_ERROR: 700 - retval = -EIO; 701 - dev_err(&usb_dev->dev, "read when ATN set\n"); 697 + if (status.ibsta & DCAS) { 698 + retval = -EINTR; 699 + } else { 700 + retval = -EIO; 701 + dev_dbg(&usb_dev->dev, "read when ATN set stat: 0x%06x\n", status.ibsta); 702 + } 702 703 break; 703 704 case NIUSB_ADDRESSING_ERROR: 704 705 retval = -EIO;
+1
drivers/tee/qcomtee/Kconfig
··· 2 2 # Qualcomm Trusted Execution Environment Configuration 3 3 config QCOMTEE 4 4 tristate "Qualcomm TEE Support" 5 + depends on ARCH_QCOM || COMPILE_TEST 5 6 depends on !CPU_BIG_ENDIAN 6 7 select QCOM_SCM 7 8 select QCOM_TZMEM_MODE_SHMBRIDGE
+1 -1
drivers/tee/qcomtee/call.c
··· 308 308 } 309 309 310 310 /* Release any IO and OO objects not processed. */ 311 - for (; u[i].type && i < num_params; i++) { 311 + for (; i < num_params && u[i].type; i++) { 312 312 if (u[i].type == QCOMTEE_ARG_TYPE_OO || 313 313 u[i].type == QCOMTEE_ARG_TYPE_IO) 314 314 qcomtee_object_put(u[i].o);
+1 -1
drivers/tee/qcomtee/core.c
··· 424 424 if (!(u[i].flags & QCOMTEE_ARG_FLAGS_UADDR)) 425 425 memcpy(msgptr, u[i].b.addr, u[i].b.size); 426 426 else if (copy_from_user(msgptr, u[i].b.uaddr, u[i].b.size)) 427 - return -EINVAL; 427 + return -EFAULT; 428 428 429 429 offset += qcomtee_msg_offset_align(u[i].b.size); 430 430 ib++;
+3 -1
drivers/tty/serial/8250/8250_dw.c
··· 635 635 if (IS_ERR(data->rst)) 636 636 return PTR_ERR(data->rst); 637 637 638 - reset_control_deassert(data->rst); 638 + err = reset_control_deassert(data->rst); 639 + if (err) 640 + return dev_err_probe(dev, err, "failed to deassert resets\n"); 639 641 640 642 err = devm_add_action_or_reset(dev, dw8250_reset_control_assert, data->rst); 641 643 if (err)
+11
drivers/tty/serial/8250/8250_exar.c
··· 40 40 #define PCI_DEVICE_ID_ACCESSIO_COM_4SM 0x10db 41 41 #define PCI_DEVICE_ID_ACCESSIO_COM_8SM 0x10ea 42 42 43 + #define PCI_DEVICE_ID_ADVANTECH_XR17V352 0x0018 44 + 43 45 #define PCI_DEVICE_ID_COMMTECH_4224PCI335 0x0002 44 46 #define PCI_DEVICE_ID_COMMTECH_4222PCI335 0x0004 45 47 #define PCI_DEVICE_ID_COMMTECH_2324PCI335 0x000a ··· 1624 1622 .exit = pci_xr17v35x_exit, 1625 1623 }; 1626 1624 1625 + static const struct exar8250_board pbn_adv_XR17V352 = { 1626 + .num_ports = 2, 1627 + .setup = pci_xr17v35x_setup, 1628 + .exit = pci_xr17v35x_exit, 1629 + }; 1630 + 1627 1631 static const struct exar8250_board pbn_exar_XR17V4358 = { 1628 1632 .num_ports = 12, 1629 1633 .setup = pci_xr17v35x_setup, ··· 1703 1695 /* USRobotics USR298x-OEM PCI Modems */ 1704 1696 USR_DEVICE(XR17C152, 2980, pbn_exar_XR17C15x), 1705 1697 USR_DEVICE(XR17C152, 2981, pbn_exar_XR17C15x), 1698 + 1699 + /* ADVANTECH devices */ 1700 + EXAR_DEVICE(ADVANTECH, XR17V352, pbn_adv_XR17V352), 1706 1701 1707 1702 /* Exar Corp. XR17C15[248] Dual/Quad/Octal UART */ 1708 1703 EXAR_DEVICE(EXAR, XR17C152, pbn_exar_XR17C15x),
+4 -2
drivers/tty/serial/8250/8250_mtk.c
··· 435 435 while 436 436 (serial_in(up, MTK_UART_DEBUG0)); 437 437 438 + clk_disable_unprepare(data->uart_clk); 438 439 clk_disable_unprepare(data->bus_clk); 439 440 440 441 return 0; ··· 446 445 struct mtk8250_data *data = dev_get_drvdata(dev); 447 446 448 447 clk_prepare_enable(data->bus_clk); 448 + clk_prepare_enable(data->uart_clk); 449 449 450 450 return 0; 451 451 } ··· 477 475 int dmacnt; 478 476 #endif 479 477 480 - data->uart_clk = devm_clk_get(&pdev->dev, "baud"); 478 + data->uart_clk = devm_clk_get_enabled(&pdev->dev, "baud"); 481 479 if (IS_ERR(data->uart_clk)) { 482 480 /* 483 481 * For compatibility with older device trees try unnamed 484 482 * clk when no baud clk can be found. 485 483 */ 486 - data->uart_clk = devm_clk_get(&pdev->dev, NULL); 484 + data->uart_clk = devm_clk_get_enabled(&pdev->dev, NULL); 487 485 if (IS_ERR(data->uart_clk)) { 488 486 dev_warn(&pdev->dev, "Can't get uart clock\n"); 489 487 return PTR_ERR(data->uart_clk);
-7
drivers/tty/serial/sc16is7xx.c
··· 588 588 div /= prescaler; 589 589 } 590 590 591 - /* Enable enhanced features */ 592 - sc16is7xx_efr_lock(port); 593 - sc16is7xx_port_update(port, SC16IS7XX_EFR_REG, 594 - SC16IS7XX_EFR_ENABLE_BIT, 595 - SC16IS7XX_EFR_ENABLE_BIT); 596 - sc16is7xx_efr_unlock(port); 597 - 598 591 /* If bit MCR_CLKSEL is set, the divide by 4 prescaler is activated. */ 599 592 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG, 600 593 SC16IS7XX_MCR_CLKSEL_BIT,
+8 -6
drivers/tty/serial/sh-sci.c
··· 1014 1014 struct sci_port *s = to_sci_port(port); 1015 1015 const struct plat_sci_reg *reg; 1016 1016 int copied = 0; 1017 - u16 status; 1017 + u32 status; 1018 1018 1019 - reg = sci_getreg(port, s->params->overrun_reg); 1020 - if (!reg->size) 1021 - return 0; 1019 + if (s->type != SCI_PORT_RSCI) { 1020 + reg = sci_getreg(port, s->params->overrun_reg); 1021 + if (!reg->size) 1022 + return 0; 1023 + } 1022 1024 1023 - status = sci_serial_in(port, s->params->overrun_reg); 1025 + status = s->ops->read_reg(port, s->params->overrun_reg); 1024 1026 if (status & s->params->overrun_mask) { 1025 1027 status &= ~s->params->overrun_mask; 1026 - sci_serial_out(port, s->params->overrun_reg, status); 1028 + s->ops->write_reg(port, s->params->overrun_reg, status); 1027 1029 1028 1030 port->icount.overrun++; 1029 1031
+2
drivers/usb/core/quirks.c
··· 467 467 /* Huawei 4G LTE module */ 468 468 { USB_DEVICE(0x12d1, 0x15bb), .driver_info = 469 469 USB_QUIRK_DISCONNECT_SUSPEND }, 470 + { USB_DEVICE(0x12d1, 0x15c1), .driver_info = 471 + USB_QUIRK_DISCONNECT_SUSPEND }, 470 472 { USB_DEVICE(0x12d1, 0x15c3), .driver_info = 471 473 USB_QUIRK_DISCONNECT_SUSPEND }, 472 474
-3
drivers/usb/dwc3/dwc3-generic-plat.c
··· 85 85 static void dwc3_generic_remove(struct platform_device *pdev) 86 86 { 87 87 struct dwc3 *dwc = platform_get_drvdata(pdev); 88 - struct dwc3_generic *dwc3g = to_dwc3_generic(dwc); 89 88 90 89 dwc3_core_remove(dwc); 91 - 92 - clk_bulk_disable_unprepare(dwc3g->num_clocks, dwc3g->clks); 93 90 } 94 91 95 92 static int dwc3_generic_suspend(struct device *dev)
-2
drivers/usb/gadget/legacy/raw_gadget.c
··· 667 667 return ERR_PTR(-EINVAL); 668 668 if (!usb_raw_io_flags_valid(io->flags)) 669 669 return ERR_PTR(-EINVAL); 670 - if (io->length > PAGE_SIZE) 671 - return ERR_PTR(-EINVAL); 672 670 if (get_from_user) 673 671 data = memdup_user(ptr + sizeof(*io), io->length); 674 672 else {
+12 -3
drivers/usb/host/xhci-dbgcap.c
··· 892 892 dev_info(dbc->dev, "DbC configured\n"); 893 893 portsc = readl(&dbc->regs->portsc); 894 894 writel(portsc, &dbc->regs->portsc); 895 - return EVT_GSER; 895 + ret = EVT_GSER; 896 + break; 896 897 } 897 898 898 899 return EVT_DONE; ··· 955 954 break; 956 955 case TRB_TYPE(TRB_TRANSFER): 957 956 dbc_handle_xfer_event(dbc, evt); 958 - ret = EVT_XFER_DONE; 957 + if (ret != EVT_GSER) 958 + ret = EVT_XFER_DONE; 959 959 break; 960 960 default: 961 961 break; ··· 1392 1390 if (!dbc) 1393 1391 return 0; 1394 1392 1395 - if (dbc->state == DS_CONFIGURED) 1393 + switch (dbc->state) { 1394 + case DS_ENABLED: 1395 + case DS_CONNECTED: 1396 + case DS_CONFIGURED: 1396 1397 dbc->resume_required = 1; 1398 + break; 1399 + default: 1400 + break; 1401 + } 1397 1402 1398 1403 xhci_dbc_stop(dbc); 1399 1404
+2 -1
drivers/usb/host/xhci-pci.c
··· 582 582 if (!usb_hcd_is_primary_hcd(hcd)) 583 583 return 0; 584 584 585 + xhci->allow_single_roothub = 1; 586 + 585 587 if (xhci->quirks & XHCI_PME_STUCK_QUIRK) 586 588 xhci_pme_acpi_rtd3_enable(pdev); 587 589 ··· 639 637 xhci = hcd_to_xhci(hcd); 640 638 xhci->reset = reset; 641 639 642 - xhci->allow_single_roothub = 1; 643 640 if (!xhci_has_one_roothub(xhci)) { 644 641 xhci->shared_hcd = usb_create_shared_hcd(&xhci_pci_hc_driver, &dev->dev, 645 642 pci_name(dev), hcd);
+1
drivers/usb/misc/Kconfig
··· 182 182 config USB_USBIO 183 183 tristate "Intel USBIO Bridge support" 184 184 depends on USB && ACPI 185 + depends on X86 || COMPILE_TEST 185 186 select AUXILIARY_BUS 186 187 help 187 188 This adds support for Intel USBIO drivers.
+10
drivers/usb/serial/option.c
··· 273 273 #define QUECTEL_PRODUCT_EM05CN 0x0312 274 274 #define QUECTEL_PRODUCT_EM05G_GR 0x0313 275 275 #define QUECTEL_PRODUCT_EM05G_RS 0x0314 276 + #define QUECTEL_PRODUCT_RG255C 0x0316 276 277 #define QUECTEL_PRODUCT_EM12 0x0512 277 278 #define QUECTEL_PRODUCT_RM500Q 0x0800 278 279 #define QUECTEL_PRODUCT_RM520N 0x0801 ··· 618 617 #define UNISOC_VENDOR_ID 0x1782 619 618 /* TOZED LT70-C based on UNISOC SL8563 uses UNISOC's vendor ID */ 620 619 #define TOZED_PRODUCT_LT70C 0x4055 620 + #define UNISOC_PRODUCT_UIS7720 0x4064 621 621 /* Luat Air72*U series based on UNISOC UIS8910 uses UNISOC's vendor ID */ 622 622 #define LUAT_PRODUCT_AIR720U 0x4e00 623 623 ··· 1272 1270 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RM500K, 0xff, 0x00, 0x00) }, 1273 1271 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RG650V, 0xff, 0xff, 0x30) }, 1274 1272 { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RG650V, 0xff, 0, 0) }, 1273 + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RG255C, 0xff, 0xff, 0x30) }, 1274 + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RG255C, 0xff, 0, 0) }, 1275 + { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RG255C, 0xff, 0xff, 0x40) }, 1275 1276 1276 1277 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6001) }, 1277 1278 { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_300) }, ··· 1403 1398 .driver_info = RSVD(0) | NCTRL(3) }, 1404 1399 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a2, 0xff), /* Telit FN920C04 (MBIM) */ 1405 1400 .driver_info = NCTRL(4) }, 1401 + { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a3, 0xff), /* Telit FN920C04 (ECM) */ 1402 + .driver_info = NCTRL(4) }, 1406 1403 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a4, 0xff), /* Telit FN20C04 (rmnet) */ 1407 1404 .driver_info = RSVD(0) | NCTRL(3) }, 1408 1405 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a7, 0xff), /* Telit FN920C04 (MBIM) */ 1406 + .driver_info = NCTRL(4) }, 1407 + { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a8, 0xff), /* Telit FN920C04 (ECM) */ 1409 1408 .driver_info = NCTRL(4) }, 1410 1409 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10a9, 0xff), /* Telit FN20C04 (rmnet) */ 1411 1410 .driver_info = RSVD(0) | NCTRL(2) | RSVD(3) | RSVD(4) }, ··· 2475 2466 { USB_DEVICE_AND_INTERFACE_INFO(SIERRA_VENDOR_ID, SIERRA_PRODUCT_EM9291, 0xff, 0xff, 0x30) }, 2476 2467 { USB_DEVICE_AND_INTERFACE_INFO(SIERRA_VENDOR_ID, SIERRA_PRODUCT_EM9291, 0xff, 0xff, 0x40) }, 2477 2468 { USB_DEVICE_AND_INTERFACE_INFO(UNISOC_VENDOR_ID, TOZED_PRODUCT_LT70C, 0xff, 0, 0) }, 2469 + { USB_DEVICE_AND_INTERFACE_INFO(UNISOC_VENDOR_ID, UNISOC_PRODUCT_UIS7720, 0xff, 0, 0) }, 2478 2470 { USB_DEVICE_AND_INTERFACE_INFO(UNISOC_VENDOR_ID, LUAT_PRODUCT_AIR720U, 0xff, 0, 0) }, 2479 2471 { USB_DEVICE_INTERFACE_CLASS(0x1bbb, 0x0530, 0xff), /* TCL IK512 MBIM */ 2480 2472 .driver_info = NCTRL(1) },
+2 -2
drivers/usb/typec/tcpm/tcpm.c
··· 7876 7876 7877 7877 port->partner_desc.identity = &port->partner_ident; 7878 7878 7879 - port->role_sw = usb_role_switch_get(port->dev); 7879 + port->role_sw = fwnode_usb_role_switch_get(tcpc->fwnode); 7880 7880 if (!port->role_sw) 7881 - port->role_sw = fwnode_usb_role_switch_get(tcpc->fwnode); 7881 + port->role_sw = usb_role_switch_get(port->dev); 7882 7882 if (IS_ERR(port->role_sw)) { 7883 7883 err = PTR_ERR(port->role_sw); 7884 7884 goto out_destroy_wq;
+16 -5
fs/nfsd/nfs4proc.c
··· 988 988 static void 989 989 nfsd4_read_release(union nfsd4_op_u *u) 990 990 { 991 - if (u->read.rd_nf) 991 + if (u->read.rd_nf) { 992 + trace_nfsd_read_done(u->read.rd_rqstp, u->read.rd_fhp, 993 + u->read.rd_offset, u->read.rd_length); 992 994 nfsd_file_put(u->read.rd_nf); 993 - trace_nfsd_read_done(u->read.rd_rqstp, u->read.rd_fhp, 994 - u->read.rd_offset, u->read.rd_length); 995 + } 995 996 } 996 997 997 998 static __be32 ··· 2893 2892 2894 2893 rqstp->rq_lease_breaker = (void **)&cstate->clp; 2895 2894 2896 - trace_nfsd_compound(rqstp, args->tag, args->taglen, args->opcnt); 2895 + trace_nfsd_compound(rqstp, args->tag, args->taglen, args->client_opcnt); 2897 2896 while (!status && resp->opcnt < args->opcnt) { 2898 2897 op = &args->ops[resp->opcnt++]; 2898 + 2899 + if (unlikely(resp->opcnt == NFSD_MAX_OPS_PER_COMPOUND)) { 2900 + /* If there are still more operations to process, 2901 + * stop here and report NFS4ERR_RESOURCE. */ 2902 + if (cstate->minorversion == 0 && 2903 + args->client_opcnt > resp->opcnt) { 2904 + op->status = nfserr_resource; 2905 + goto encode_op; 2906 + } 2907 + } 2899 2908 2900 2909 /* 2901 2910 * The XDR decode routines may have pre-set op->status; ··· 2983 2972 status = op->status; 2984 2973 } 2985 2974 2986 - trace_nfsd_compound_status(args->opcnt, resp->opcnt, 2975 + trace_nfsd_compound_status(args->client_opcnt, resp->opcnt, 2987 2976 status, nfsd4_op_name(op->opnum)); 2988 2977 2989 2978 nfsd4_cstate_clear_replay(cstate);
+1
fs/nfsd/nfs4state.c
··· 3902 3902 ca->headerpadsz = 0; 3903 3903 ca->maxreq_sz = min_t(u32, ca->maxreq_sz, maxrpc); 3904 3904 ca->maxresp_sz = min_t(u32, ca->maxresp_sz, maxrpc); 3905 + ca->maxops = min_t(u32, ca->maxops, NFSD_MAX_OPS_PER_COMPOUND); 3905 3906 ca->maxresp_cached = min_t(u32, ca->maxresp_cached, 3906 3907 NFSD_SLOT_CACHE_SIZE + NFSD_MIN_HDR_SEQ_SZ); 3907 3908 ca->maxreqs = min_t(u32, ca->maxreqs, NFSD_MAX_SLOTS_PER_SESSION);
+14 -7
fs/nfsd/nfs4xdr.c
··· 2488 2488 2489 2489 if (xdr_stream_decode_u32(argp->xdr, &argp->minorversion) < 0) 2490 2490 return false; 2491 - if (xdr_stream_decode_u32(argp->xdr, &argp->opcnt) < 0) 2491 + if (xdr_stream_decode_u32(argp->xdr, &argp->client_opcnt) < 0) 2492 2492 return false; 2493 + argp->opcnt = min_t(u32, argp->client_opcnt, 2494 + NFSD_MAX_OPS_PER_COMPOUND); 2493 2495 2494 2496 if (argp->opcnt > ARRAY_SIZE(argp->iops)) { 2495 2497 argp->ops = vcalloc(argp->opcnt, sizeof(*argp->ops)); ··· 2630 2628 __be32 *p; 2631 2629 __be32 pathlen; 2632 2630 int pathlen_offset; 2633 - int strlen, count=0; 2634 2631 char *str, *end, *next; 2635 - 2636 - dprintk("nfsd4_encode_components(%s)\n", components); 2632 + int count = 0; 2637 2633 2638 2634 pathlen_offset = xdr->buf->len; 2639 2635 p = xdr_reserve_space(xdr, 4); ··· 2658 2658 for (; *end && (*end != sep); end++) 2659 2659 /* find sep or end of string */; 2660 2660 2661 - strlen = end - str; 2662 - if (strlen) { 2663 - if (xdr_stream_encode_opaque(xdr, str, strlen) < 0) 2661 + if (end > str) { 2662 + if (xdr_stream_encode_opaque(xdr, str, end - str) < 0) 2664 2663 return nfserr_resource; 2665 2664 count++; 2666 2665 } else ··· 2937 2938 2938 2939 typedef __be32(*nfsd4_enc_attr)(struct xdr_stream *xdr, 2939 2940 const struct nfsd4_fattr_args *args); 2941 + 2942 + static __be32 nfsd4_encode_fattr4__inval(struct xdr_stream *xdr, 2943 + const struct nfsd4_fattr_args *args) 2944 + { 2945 + return nfserr_inval; 2946 + } 2940 2947 2941 2948 static __be32 nfsd4_encode_fattr4__noop(struct xdr_stream *xdr, 2942 2949 const struct nfsd4_fattr_args *args) ··· 3565 3560 3566 3561 [FATTR4_MODE_UMASK] = nfsd4_encode_fattr4__noop, 3567 3562 [FATTR4_XATTR_SUPPORT] = nfsd4_encode_fattr4_xattr_support, 3563 + [FATTR4_TIME_DELEG_ACCESS] = nfsd4_encode_fattr4__inval, 3564 + [FATTR4_TIME_DELEG_MODIFY] = nfsd4_encode_fattr4__inval, 3568 3565 [FATTR4_OPEN_ARGUMENTS] = nfsd4_encode_fattr4_open_arguments, 3569 3566 }; 3570 3567
+3
fs/nfsd/nfsd.h
··· 57 57 __be32 err; /* 0, nfserr, or nfserr_eof */ 58 58 }; 59 59 60 + /* Maximum number of operations per session compound */ 61 + #define NFSD_MAX_OPS_PER_COMPOUND 200 62 + 60 63 struct nfsd_genl_rqstp { 61 64 struct sockaddr rq_daddr; 62 65 struct sockaddr rq_saddr;
+1
fs/nfsd/xdr4.h
··· 903 903 char * tag; 904 904 u32 taglen; 905 905 u32 minorversion; 906 + u32 client_opcnt; 906 907 u32 opcnt; 907 908 bool splice_ok; 908 909 struct nfsd4_op *ops;
+7 -9
fs/resctrl/monitor.c
··· 1782 1782 mba_mbps_default_event = QOS_L3_MBM_TOTAL_EVENT_ID; 1783 1783 1784 1784 if (r->mon.mbm_cntr_assignable) { 1785 - if (!resctrl_is_mon_event_enabled(QOS_L3_MBM_TOTAL_EVENT_ID)) 1786 - resctrl_enable_mon_event(QOS_L3_MBM_TOTAL_EVENT_ID); 1787 - if (!resctrl_is_mon_event_enabled(QOS_L3_MBM_LOCAL_EVENT_ID)) 1788 - resctrl_enable_mon_event(QOS_L3_MBM_LOCAL_EVENT_ID); 1789 - mon_event_all[QOS_L3_MBM_TOTAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask; 1790 - mon_event_all[QOS_L3_MBM_LOCAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask & 1791 - (READS_TO_LOCAL_MEM | 1792 - READS_TO_LOCAL_S_MEM | 1793 - NON_TEMP_WRITE_TO_LOCAL_MEM); 1785 + if (resctrl_is_mon_event_enabled(QOS_L3_MBM_TOTAL_EVENT_ID)) 1786 + mon_event_all[QOS_L3_MBM_TOTAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask; 1787 + if (resctrl_is_mon_event_enabled(QOS_L3_MBM_LOCAL_EVENT_ID)) 1788 + mon_event_all[QOS_L3_MBM_LOCAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask & 1789 + (READS_TO_LOCAL_MEM | 1790 + READS_TO_LOCAL_S_MEM | 1791 + NON_TEMP_WRITE_TO_LOCAL_MEM); 1794 1792 r->mon.mbm_assign_on_mkdir = true; 1795 1793 resctrl_file_fflags_init("num_mbm_cntrs", 1796 1794 RFTYPE_MON_INFO | RFTYPE_RES_CACHE);
+1 -3
fs/smb/client/cifsglob.h
··· 534 534 void (*new_lease_key)(struct cifs_fid *); 535 535 int (*generate_signingkey)(struct cifs_ses *ses, 536 536 struct TCP_Server_Info *server); 537 - int (*calc_signature)(struct smb_rqst *, struct TCP_Server_Info *, 538 - bool allocate_crypto); 539 537 int (*set_integrity)(const unsigned int, struct cifs_tcon *tcon, 540 538 struct cifsFileInfo *src_file); 541 539 int (*enum_snapshots)(const unsigned int xid, struct cifs_tcon *tcon, ··· 730 732 bool nosharesock; 731 733 bool tcp_nodelay; 732 734 bool terminate; 733 - unsigned int credits; /* send no more requests at once */ 735 + int credits; /* send no more requests at once */ 734 736 unsigned int max_credits; /* can override large 32000 default at mnt */ 735 737 unsigned int in_flight; /* number of requests on the wire to server */ 736 738 unsigned int max_in_flight; /* max number of requests that were on wire */
+1
fs/smb/client/cifsproto.h
··· 9 9 #define _CIFSPROTO_H 10 10 #include <linux/nls.h> 11 11 #include <linux/ctype.h> 12 + #include "cifsglob.h" 12 13 #include "trace.h" 13 14 #ifdef CONFIG_CIFS_DFS_UPCALL 14 15 #include "dfs_cache.h"
+8
fs/smb/client/cifssmb.c
··· 1311 1311 .rreq_debug_id = rdata->rreq->debug_id, 1312 1312 .rreq_debug_index = rdata->subreq.debug_index, 1313 1313 }; 1314 + unsigned int rreq_debug_id = rdata->rreq->debug_id; 1315 + unsigned int subreq_debug_index = rdata->subreq.debug_index; 1314 1316 1315 1317 cifs_dbg(FYI, "%s: mid=%llu state=%d result=%d bytes=%zu\n", 1316 1318 __func__, mid->mid, mid->mid_state, rdata->result, ··· 1376 1374 __set_bit(NETFS_SREQ_MADE_PROGRESS, &rdata->subreq.flags); 1377 1375 } 1378 1376 1377 + trace_smb3_rw_credits(rreq_debug_id, subreq_debug_index, rdata->credits.value, 1378 + server->credits, server->in_flight, 1379 + 0, cifs_trace_rw_credits_read_response_clear); 1379 1380 rdata->credits.value = 0; 1380 1381 rdata->subreq.error = rdata->result; 1381 1382 rdata->subreq.transferred += rdata->got_bytes; ··· 1386 1381 netfs_read_subreq_terminated(&rdata->subreq); 1387 1382 release_mid(mid); 1388 1383 add_credits(server, &credits, 0); 1384 + trace_smb3_rw_credits(rreq_debug_id, subreq_debug_index, 0, 1385 + server->credits, server->in_flight, 1386 + credits.value, cifs_trace_rw_credits_read_response_add); 1389 1387 } 1390 1388 1391 1389 /* cifs_async_readv - send an async write, and set up mid to handle result */
+1 -4
fs/smb/client/inode.c
··· 2484 2484 } 2485 2485 #endif /* CONFIG_CIFS_ALLOW_INSECURE_LEGACY */ 2486 2486 do_rename_exit: 2487 - if (rc == 0) { 2487 + if (rc == 0) 2488 2488 d_move(from_dentry, to_dentry); 2489 - /* Force a new lookup */ 2490 - d_drop(from_dentry); 2491 - } 2492 2489 cifs_put_tlink(tlink); 2493 2490 return rc; 2494 2491 }
-4
fs/smb/client/smb2ops.c
··· 5446 5446 .get_lease_key = smb2_get_lease_key, 5447 5447 .set_lease_key = smb2_set_lease_key, 5448 5448 .new_lease_key = smb2_new_lease_key, 5449 - .calc_signature = smb2_calc_signature, 5450 5449 .is_read_op = smb2_is_read_op, 5451 5450 .set_oplock_level = smb2_set_oplock_level, 5452 5451 .create_lease_buf = smb2_create_lease_buf, ··· 5549 5550 .get_lease_key = smb2_get_lease_key, 5550 5551 .set_lease_key = smb2_set_lease_key, 5551 5552 .new_lease_key = smb2_new_lease_key, 5552 - .calc_signature = smb2_calc_signature, 5553 5553 .is_read_op = smb21_is_read_op, 5554 5554 .set_oplock_level = smb21_set_oplock_level, 5555 5555 .create_lease_buf = smb2_create_lease_buf, ··· 5658 5660 .set_lease_key = smb2_set_lease_key, 5659 5661 .new_lease_key = smb2_new_lease_key, 5660 5662 .generate_signingkey = generate_smb30signingkey, 5661 - .calc_signature = smb3_calc_signature, 5662 5663 .set_integrity = smb3_set_integrity, 5663 5664 .is_read_op = smb21_is_read_op, 5664 5665 .set_oplock_level = smb3_set_oplock_level, ··· 5774 5777 .set_lease_key = smb2_set_lease_key, 5775 5778 .new_lease_key = smb2_new_lease_key, 5776 5779 .generate_signingkey = generate_smb311signingkey, 5777 - .calc_signature = smb3_calc_signature, 5778 5780 .set_integrity = smb3_set_integrity, 5779 5781 .is_read_op = smb21_is_read_op, 5780 5782 .set_oplock_level = smb3_set_oplock_level,
-6
fs/smb/client/smb2proto.h
··· 39 39 struct TCP_Server_Info *server, struct smb_rqst *rqst); 40 40 extern struct cifs_tcon *smb2_find_smb_tcon(struct TCP_Server_Info *server, 41 41 __u64 ses_id, __u32 tid); 42 - extern int smb2_calc_signature(struct smb_rqst *rqst, 43 - struct TCP_Server_Info *server, 44 - bool allocate_crypto); 45 - extern int smb3_calc_signature(struct smb_rqst *rqst, 46 - struct TCP_Server_Info *server, 47 - bool allocate_crypto); 48 42 extern void smb2_echo_request(struct work_struct *work); 49 43 extern __le32 smb2_get_lease_state(struct cifsInodeInfo *cinode); 50 44 extern bool smb2_is_valid_oplock_break(char *buffer,
+9 -9
fs/smb/client/smb2transport.c
··· 209 209 return tcon; 210 210 } 211 211 212 - int 212 + static int 213 213 smb2_calc_signature(struct smb_rqst *rqst, struct TCP_Server_Info *server, 214 - bool allocate_crypto) 214 + bool allocate_crypto) 215 215 { 216 216 int rc; 217 217 unsigned char smb2_signature[SMB2_HMACSHA256_SIZE]; ··· 465 465 return generate_smb3signingkey(ses, server, &triplet); 466 466 } 467 467 468 - int 468 + static int 469 469 smb3_calc_signature(struct smb_rqst *rqst, struct TCP_Server_Info *server, 470 - bool allocate_crypto) 470 + bool allocate_crypto) 471 471 { 472 472 int rc; 473 473 unsigned char smb3_signature[SMB2_CMACAES_SIZE]; ··· 476 476 struct shash_desc *shash = NULL; 477 477 struct smb_rqst drqst; 478 478 u8 key[SMB3_SIGN_KEY_SIZE]; 479 + 480 + if (server->vals->protocol_id <= SMB21_PROT_ID) 481 + return smb2_calc_signature(rqst, server, allocate_crypto); 479 482 480 483 rc = smb3_get_sign_key(le64_to_cpu(shdr->SessionId), server, key); 481 484 if (unlikely(rc)) { ··· 550 547 static int 551 548 smb2_sign_rqst(struct smb_rqst *rqst, struct TCP_Server_Info *server) 552 549 { 553 - int rc = 0; 554 550 struct smb2_hdr *shdr; 555 551 struct smb2_sess_setup_req *ssr; 556 552 bool is_binding; ··· 576 574 return 0; 577 575 } 578 576 579 - rc = server->ops->calc_signature(rqst, server, false); 580 - 581 - return rc; 577 + return smb3_calc_signature(rqst, server, false); 582 578 } 583 579 584 580 int ··· 612 612 613 613 memset(shdr->Signature, 0, SMB2_SIGNATURE_SIZE); 614 614 615 - rc = server->ops->calc_signature(rqst, server, true); 615 + rc = smb3_calc_signature(rqst, server, true); 616 616 617 617 if (rc) 618 618 return rc;
+65 -38
fs/smb/client/smbdirect.c
··· 172 172 * in order to notice the broken connection. 173 173 */ 174 174 wake_up_all(&sc->status_wait); 175 + wake_up_all(&sc->send_io.lcredits.wait_queue); 175 176 wake_up_all(&sc->send_io.credits.wait_queue); 176 177 wake_up_all(&sc->send_io.pending.dec_wait_queue); 177 178 wake_up_all(&sc->send_io.pending.zero_wait_queue); ··· 496 495 struct smbdirect_send_io *request = 497 496 container_of(wc->wr_cqe, struct smbdirect_send_io, cqe); 498 497 struct smbdirect_socket *sc = request->socket; 498 + int lcredits = 0; 499 499 500 500 log_rdma_send(INFO, "smbdirect_send_io 0x%p completed wc->status=%s\n", 501 501 request, ib_wc_status_msg(wc->status)); ··· 506 504 request->sge[i].addr, 507 505 request->sge[i].length, 508 506 DMA_TO_DEVICE); 507 + mempool_free(request, sc->send_io.mem.pool); 508 + lcredits += 1; 509 509 510 510 if (wc->status != IB_WC_SUCCESS || wc->opcode != IB_WC_SEND) { 511 511 if (wc->status != IB_WC_WR_FLUSH_ERR) 512 512 log_rdma_send(ERR, "wc->status=%s wc->opcode=%d\n", 513 513 ib_wc_status_msg(wc->status), wc->opcode); 514 - mempool_free(request, sc->send_io.mem.pool); 515 514 smbd_disconnect_rdma_connection(sc); 516 515 return; 517 516 } 517 + 518 + atomic_add(lcredits, &sc->send_io.lcredits.count); 519 + wake_up(&sc->send_io.lcredits.wait_queue); 518 520 519 521 if (atomic_dec_and_test(&sc->send_io.pending.count)) 520 522 wake_up(&sc->send_io.pending.zero_wait_queue); 521 523 522 524 wake_up(&sc->send_io.pending.dec_wait_queue); 523 - 524 - mempool_free(request, sc->send_io.mem.pool); 525 525 } 526 526 527 527 static void dump_smbdirect_negotiate_resp(struct smbdirect_negotiate_resp *resp) ··· 571 567 log_rdma_event(ERR, "error: credits_granted==0\n"); 572 568 return false; 573 569 } 570 + atomic_set(&sc->send_io.lcredits.count, sp->send_credit_target); 574 571 atomic_set(&sc->send_io.credits.count, le16_to_cpu(packet->credits_granted)); 575 572 576 573 if (le32_to_cpu(packet->preferred_send_size) > sp->max_recv_size) { ··· 1119 1114 struct smbdirect_data_transfer *packet; 1120 1115 int new_credits = 0; 1121 1116 1117 + wait_lcredit: 1118 + /* Wait for local send credits */ 1119 + rc = wait_event_interruptible(sc->send_io.lcredits.wait_queue, 1120 + atomic_read(&sc->send_io.lcredits.count) > 0 || 1121 + sc->status != SMBDIRECT_SOCKET_CONNECTED); 1122 + if (rc) 1123 + goto err_wait_lcredit; 1124 + 1125 + if (sc->status != SMBDIRECT_SOCKET_CONNECTED) { 1126 + log_outgoing(ERR, "disconnected not sending on wait_credit\n"); 1127 + rc = -EAGAIN; 1128 + goto err_wait_lcredit; 1129 + } 1130 + if (unlikely(atomic_dec_return(&sc->send_io.lcredits.count) < 0)) { 1131 + atomic_inc(&sc->send_io.lcredits.count); 1132 + goto wait_lcredit; 1133 + } 1134 + 1122 1135 wait_credit: 1123 1136 /* Wait for send credits. A SMBD packet needs one credit */ 1124 1137 rc = wait_event_interruptible(sc->send_io.credits.wait_queue, ··· 1153 1130 if (unlikely(atomic_dec_return(&sc->send_io.credits.count) < 0)) { 1154 1131 atomic_inc(&sc->send_io.credits.count); 1155 1132 goto wait_credit; 1156 - } 1157 - 1158 - wait_send_queue: 1159 - wait_event(sc->send_io.pending.dec_wait_queue, 1160 - atomic_read(&sc->send_io.pending.count) < sp->send_credit_target || 1161 - sc->status != SMBDIRECT_SOCKET_CONNECTED); 1162 - 1163 - if (sc->status != SMBDIRECT_SOCKET_CONNECTED) { 1164 - log_outgoing(ERR, "disconnected not sending on wait_send_queue\n"); 1165 - rc = -EAGAIN; 1166 - goto err_wait_send_queue; 1167 - } 1168 - 1169 - if (unlikely(atomic_inc_return(&sc->send_io.pending.count) > 1170 - sp->send_credit_target)) { 1171 - atomic_dec(&sc->send_io.pending.count); 1172 - goto wait_send_queue; 1173 1133 } 1174 1134 1175 1135 request = mempool_alloc(sc->send_io.mem.pool, GFP_KERNEL); ··· 1235 1229 le32_to_cpu(packet->data_length), 1236 1230 le32_to_cpu(packet->remaining_data_length)); 1237 1231 1232 + /* 1233 + * Now that we got a local and a remote credit 1234 + * we add us as pending 1235 + */ 1236 + atomic_inc(&sc->send_io.pending.count); 1237 + 1238 1238 rc = smbd_post_send(sc, request); 1239 1239 if (!rc) 1240 1240 return 0; 1241 + 1242 + if (atomic_dec_and_test(&sc->send_io.pending.count)) 1243 + wake_up(&sc->send_io.pending.zero_wait_queue); 1244 + 1245 + wake_up(&sc->send_io.pending.dec_wait_queue); 1241 1246 1242 1247 err_dma: 1243 1248 for (i = 0; i < request->num_sge; i++) ··· 1263 1246 atomic_sub(new_credits, &sc->recv_io.credits.count); 1264 1247 1265 1248 err_alloc: 1266 - if (atomic_dec_and_test(&sc->send_io.pending.count)) 1267 - wake_up(&sc->send_io.pending.zero_wait_queue); 1268 - 1269 - err_wait_send_queue: 1270 - /* roll back send credits and pending */ 1271 1249 atomic_inc(&sc->send_io.credits.count); 1250 + wake_up(&sc->send_io.credits.wait_queue); 1272 1251 1273 1252 err_wait_credit: 1253 + atomic_inc(&sc->send_io.lcredits.count); 1254 + wake_up(&sc->send_io.lcredits.wait_queue); 1255 + 1256 + err_wait_lcredit: 1274 1257 return rc; 1275 1258 } 1276 1259 ··· 1784 1767 struct smbdirect_socket *sc; 1785 1768 struct smbdirect_socket_parameters *sp; 1786 1769 struct rdma_conn_param conn_param; 1770 + struct ib_qp_cap qp_cap; 1787 1771 struct ib_qp_init_attr qp_attr; 1788 1772 struct sockaddr_in *addr_in = (struct sockaddr_in *) dstaddr; 1789 1773 struct ib_port_immutable port_immutable; ··· 1856 1838 goto config_failed; 1857 1839 } 1858 1840 1841 + sp->responder_resources = 1842 + min_t(u8, sp->responder_resources, 1843 + sc->ib.dev->attrs.max_qp_rd_atom); 1844 + log_rdma_mr(INFO, "responder_resources=%d\n", 1845 + sp->responder_resources); 1846 + 1847 + /* 1848 + * We use allocate sp->responder_resources * 2 MRs 1849 + * and each MR needs WRs for REG and INV, so 1850 + * we use '* 4'. 1851 + * 1852 + * +1 for ib_drain_qp() 1853 + */ 1854 + memset(&qp_cap, 0, sizeof(qp_cap)); 1855 + qp_cap.max_send_wr = sp->send_credit_target + sp->responder_resources * 4 + 1; 1856 + qp_cap.max_recv_wr = sp->recv_credit_max + 1; 1857 + qp_cap.max_send_sge = SMBDIRECT_SEND_IO_MAX_SGE; 1858 + qp_cap.max_recv_sge = SMBDIRECT_RECV_IO_MAX_SGE; 1859 + 1859 1860 sc->ib.pd = ib_alloc_pd(sc->ib.dev, 0); 1860 1861 if (IS_ERR(sc->ib.pd)) { 1861 1862 rc = PTR_ERR(sc->ib.pd); ··· 1885 1848 1886 1849 sc->ib.send_cq = 1887 1850 ib_alloc_cq_any(sc->ib.dev, sc, 1888 - sp->send_credit_target, IB_POLL_SOFTIRQ); 1851 + qp_cap.max_send_wr, IB_POLL_SOFTIRQ); 1889 1852 if (IS_ERR(sc->ib.send_cq)) { 1890 1853 sc->ib.send_cq = NULL; 1891 1854 goto alloc_cq_failed; ··· 1893 1856 1894 1857 sc->ib.recv_cq = 1895 1858 ib_alloc_cq_any(sc->ib.dev, sc, 1896 - sp->recv_credit_max, IB_POLL_SOFTIRQ); 1859 + qp_cap.max_recv_wr, IB_POLL_SOFTIRQ); 1897 1860 if (IS_ERR(sc->ib.recv_cq)) { 1898 1861 sc->ib.recv_cq = NULL; 1899 1862 goto alloc_cq_failed; ··· 1902 1865 memset(&qp_attr, 0, sizeof(qp_attr)); 1903 1866 qp_attr.event_handler = smbd_qp_async_error_upcall; 1904 1867 qp_attr.qp_context = sc; 1905 - qp_attr.cap.max_send_wr = sp->send_credit_target; 1906 - qp_attr.cap.max_recv_wr = sp->recv_credit_max; 1907 - qp_attr.cap.max_send_sge = SMBDIRECT_SEND_IO_MAX_SGE; 1908 - qp_attr.cap.max_recv_sge = SMBDIRECT_RECV_IO_MAX_SGE; 1909 - qp_attr.cap.max_inline_data = 0; 1868 + qp_attr.cap = qp_cap; 1910 1869 qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 1911 1870 qp_attr.qp_type = IB_QPT_RC; 1912 1871 qp_attr.send_cq = sc->ib.send_cq; ··· 1915 1882 goto create_qp_failed; 1916 1883 } 1917 1884 sc->ib.qp = sc->rdma.cm_id->qp; 1918 - 1919 - sp->responder_resources = 1920 - min_t(u8, sp->responder_resources, 1921 - sc->ib.dev->attrs.max_qp_rd_atom); 1922 - log_rdma_mr(INFO, "responder_resources=%d\n", 1923 - sp->responder_resources); 1924 1885 1925 1886 memset(&conn_param, 0, sizeof(conn_param)); 1926 1887 conn_param.initiator_depth = sp->initiator_depth;
+1
fs/smb/client/trace.c
··· 4 4 * 5 5 * Author(s): Steve French <stfrench@microsoft.com> 6 6 */ 7 + #include "cifsglob.h" 7 8 #define CREATE_TRACE_POINTS 8 9 #include "trace.h"
+12 -1
fs/smb/common/smbdirect/smbdirect_socket.h
··· 142 142 } mem; 143 143 144 144 /* 145 - * The credit state for the send side 145 + * The local credit state for ib_post_send() 146 + */ 147 + struct { 148 + atomic_t count; 149 + wait_queue_head_t wait_queue; 150 + } lcredits; 151 + 152 + /* 153 + * The remote credit state for the send side 146 154 */ 147 155 struct { 148 156 atomic_t count; ··· 344 336 disable_work_sync(&sc->idle.immediate_work); 345 337 INIT_DELAYED_WORK(&sc->idle.timer_work, __smbdirect_socket_disabled_work); 346 338 disable_delayed_work_sync(&sc->idle.timer_work); 339 + 340 + atomic_set(&sc->send_io.lcredits.count, 0); 341 + init_waitqueue_head(&sc->send_io.lcredits.wait_queue); 347 342 348 343 atomic_set(&sc->send_io.credits.count, 0); 349 344 init_waitqueue_head(&sc->send_io.credits.wait_queue);
+7 -1
fs/smb/server/transport_ipc.c
··· 263 263 264 264 static int handle_response(int type, void *payload, size_t sz) 265 265 { 266 - unsigned int handle = *(unsigned int *)payload; 266 + unsigned int handle; 267 267 struct ipc_msg_table_entry *entry; 268 268 int ret = 0; 269 + 270 + /* Prevent 4-byte read beyond declared payload size */ 271 + if (sz < sizeof(unsigned int)) 272 + return -EINVAL; 273 + 274 + handle = *(unsigned int *)payload; 269 275 270 276 ipc_update_last_active(); 271 277 down_read(&ipc_msg_table_lock);
+255 -136
fs/smb/server/transport_rdma.c
··· 219 219 * in order to notice the broken connection. 220 220 */ 221 221 wake_up_all(&sc->status_wait); 222 + wake_up_all(&sc->send_io.lcredits.wait_queue); 222 223 wake_up_all(&sc->send_io.credits.wait_queue); 223 224 wake_up_all(&sc->send_io.pending.zero_wait_queue); 224 225 wake_up_all(&sc->recv_io.reassembly.wait_queue); ··· 418 417 419 418 sc->ib.dev = sc->rdma.cm_id->device; 420 419 421 - INIT_WORK(&sc->recv_io.posted.refill_work, 422 - smb_direct_post_recv_credits); 423 - INIT_WORK(&sc->idle.immediate_work, smb_direct_send_immediate_work); 424 420 INIT_DELAYED_WORK(&sc->idle.timer_work, smb_direct_idle_connection_timer); 425 421 426 422 conn = ksmbd_conn_alloc(); ··· 448 450 struct smbdirect_recv_io *recvmsg; 449 451 450 452 disable_work_sync(&sc->disconnect_work); 451 - if (sc->status < SMBDIRECT_SOCKET_DISCONNECTING) { 453 + if (sc->status < SMBDIRECT_SOCKET_DISCONNECTING) 452 454 smb_direct_disconnect_rdma_work(&sc->disconnect_work); 453 - wait_event_interruptible(sc->status_wait, 454 - sc->status == SMBDIRECT_SOCKET_DISCONNECTED); 455 - } 455 + if (sc->status < SMBDIRECT_SOCKET_DISCONNECTED) 456 + wait_event(sc->status_wait, sc->status == SMBDIRECT_SOCKET_DISCONNECTED); 456 457 457 458 /* 458 459 * Wake up all waiters in all wait queues ··· 466 469 disable_delayed_work_sync(&sc->idle.timer_work); 467 470 disable_work_sync(&sc->idle.immediate_work); 468 471 472 + if (sc->rdma.cm_id) 473 + rdma_lock_handler(sc->rdma.cm_id); 474 + 469 475 if (sc->ib.qp) { 470 476 ib_drain_qp(sc->ib.qp); 471 - ib_mr_pool_destroy(sc->ib.qp, &sc->ib.qp->rdma_mrs); 472 477 sc->ib.qp = NULL; 473 478 rdma_destroy_qp(sc->rdma.cm_id); 474 479 } ··· 497 498 ib_free_cq(sc->ib.recv_cq); 498 499 if (sc->ib.pd) 499 500 ib_dealloc_pd(sc->ib.pd); 500 - if (sc->rdma.cm_id) 501 + if (sc->rdma.cm_id) { 502 + rdma_unlock_handler(sc->rdma.cm_id); 501 503 rdma_destroy_id(sc->rdma.cm_id); 504 + } 502 505 503 506 smb_direct_destroy_pools(sc); 504 507 ksmbd_conn_free(KSMBD_TRANS(t)->conn); ··· 524 523 struct smbdirect_send_io *msg) 525 524 { 526 525 int i; 526 + 527 + /* 528 + * The list needs to be empty! 529 + * The caller should take care of it. 530 + */ 531 + WARN_ON_ONCE(!list_empty(&msg->sibling_list)); 527 532 528 533 if (msg->num_sge > 0) { 529 534 ib_dma_unmap_single(sc->ib.dev, ··· 916 909 917 910 static void send_done(struct ib_cq *cq, struct ib_wc *wc) 918 911 { 919 - struct smbdirect_send_io *sendmsg, *sibling; 912 + struct smbdirect_send_io *sendmsg, *sibling, *next; 920 913 struct smbdirect_socket *sc; 921 - struct list_head *pos, *prev, *end; 914 + int lcredits = 0; 922 915 923 916 sendmsg = container_of(wc->wr_cqe, struct smbdirect_send_io, cqe); 924 917 sc = sendmsg->socket; ··· 927 920 ib_wc_status_msg(wc->status), wc->status, 928 921 wc->opcode); 929 922 923 + /* 924 + * Free possible siblings and then the main send_io 925 + */ 926 + list_for_each_entry_safe(sibling, next, &sendmsg->sibling_list, sibling_list) { 927 + list_del_init(&sibling->sibling_list); 928 + smb_direct_free_sendmsg(sc, sibling); 929 + lcredits += 1; 930 + } 931 + /* Note this frees wc->wr_cqe, but not wc */ 932 + smb_direct_free_sendmsg(sc, sendmsg); 933 + lcredits += 1; 934 + 930 935 if (wc->status != IB_WC_SUCCESS || wc->opcode != IB_WC_SEND) { 931 936 pr_err("Send error. status='%s (%d)', opcode=%d\n", 932 937 ib_wc_status_msg(wc->status), wc->status, 933 938 wc->opcode); 934 939 smb_direct_disconnect_rdma_connection(sc); 940 + return; 935 941 } 942 + 943 + atomic_add(lcredits, &sc->send_io.lcredits.count); 944 + wake_up(&sc->send_io.lcredits.wait_queue); 936 945 937 946 if (atomic_dec_and_test(&sc->send_io.pending.count)) 938 947 wake_up(&sc->send_io.pending.zero_wait_queue); 939 - 940 - /* iterate and free the list of messages in reverse. the list's head 941 - * is invalid. 942 - */ 943 - for (pos = &sendmsg->sibling_list, prev = pos->prev, end = sendmsg->sibling_list.next; 944 - prev != end; pos = prev, prev = prev->prev) { 945 - sibling = container_of(pos, struct smbdirect_send_io, sibling_list); 946 - smb_direct_free_sendmsg(sc, sibling); 947 - } 948 - 949 - sibling = container_of(pos, struct smbdirect_send_io, sibling_list); 950 - smb_direct_free_sendmsg(sc, sibling); 951 948 } 952 949 953 950 static int manage_credits_prior_sending(struct smbdirect_socket *sc) ··· 999 988 ret = ib_post_send(sc->ib.qp, wr, NULL); 1000 989 if (ret) { 1001 990 pr_err("failed to post send: %d\n", ret); 1002 - if (atomic_dec_and_test(&sc->send_io.pending.count)) 1003 - wake_up(&sc->send_io.pending.zero_wait_queue); 1004 991 smb_direct_disconnect_rdma_connection(sc); 1005 992 } 1006 993 return ret; ··· 1041 1032 last->wr.send_flags = IB_SEND_SIGNALED; 1042 1033 last->wr.wr_cqe = &last->cqe; 1043 1034 1035 + /* 1036 + * Remove last from send_ctx->msg_list 1037 + * and splice the rest of send_ctx->msg_list 1038 + * to last->sibling_list. 1039 + * 1040 + * send_ctx->msg_list is a valid empty list 1041 + * at the end. 1042 + */ 1043 + list_del_init(&last->sibling_list); 1044 + list_splice_tail_init(&send_ctx->msg_list, &last->sibling_list); 1045 + send_ctx->wr_cnt = 0; 1046 + 1044 1047 ret = smb_direct_post_send(sc, &first->wr); 1045 - if (!ret) { 1046 - smb_direct_send_ctx_init(send_ctx, 1047 - send_ctx->need_invalidate_rkey, 1048 - send_ctx->remote_key); 1049 - } else { 1050 - atomic_add(send_ctx->wr_cnt, &sc->send_io.credits.count); 1051 - wake_up(&sc->send_io.credits.wait_queue); 1052 - list_for_each_entry_safe(first, last, &send_ctx->msg_list, 1053 - sibling_list) { 1054 - smb_direct_free_sendmsg(sc, first); 1048 + if (ret) { 1049 + struct smbdirect_send_io *sibling, *next; 1050 + 1051 + list_for_each_entry_safe(sibling, next, &last->sibling_list, sibling_list) { 1052 + list_del_init(&sibling->sibling_list); 1053 + smb_direct_free_sendmsg(sc, sibling); 1055 1054 } 1055 + smb_direct_free_sendmsg(sc, last); 1056 1056 } 1057 + 1057 1058 return ret; 1058 1059 } 1059 1060 ··· 1087 1068 else if (ret < 0) 1088 1069 return ret; 1089 1070 } while (true); 1071 + } 1072 + 1073 + static int wait_for_send_lcredit(struct smbdirect_socket *sc, 1074 + struct smbdirect_send_batch *send_ctx) 1075 + { 1076 + if (send_ctx && (atomic_read(&sc->send_io.lcredits.count) <= 1)) { 1077 + int ret; 1078 + 1079 + ret = smb_direct_flush_send_list(sc, send_ctx, false); 1080 + if (ret) 1081 + return ret; 1082 + } 1083 + 1084 + return wait_for_credits(sc, 1085 + &sc->send_io.lcredits.wait_queue, 1086 + &sc->send_io.lcredits.count, 1087 + 1); 1090 1088 } 1091 1089 1092 1090 static int wait_for_send_credits(struct smbdirect_socket *sc, ··· 1293 1257 int data_length; 1294 1258 struct scatterlist sg[SMBDIRECT_SEND_IO_MAX_SGE - 1]; 1295 1259 1260 + ret = wait_for_send_lcredit(sc, send_ctx); 1261 + if (ret) 1262 + goto lcredit_failed; 1263 + 1296 1264 ret = wait_for_send_credits(sc, send_ctx); 1297 1265 if (ret) 1298 - return ret; 1266 + goto credit_failed; 1299 1267 1300 1268 data_length = 0; 1301 1269 for (i = 0; i < niov; i++) ··· 1307 1267 1308 1268 ret = smb_direct_create_header(sc, data_length, remaining_data_length, 1309 1269 &msg); 1310 - if (ret) { 1311 - atomic_inc(&sc->send_io.credits.count); 1312 - return ret; 1313 - } 1270 + if (ret) 1271 + goto header_failed; 1314 1272 1315 1273 for (i = 0; i < niov; i++) { 1316 1274 struct ib_sge *sge; ··· 1346 1308 return 0; 1347 1309 err: 1348 1310 smb_direct_free_sendmsg(sc, msg); 1311 + header_failed: 1349 1312 atomic_inc(&sc->send_io.credits.count); 1313 + credit_failed: 1314 + atomic_inc(&sc->send_io.lcredits.count); 1315 + lcredit_failed: 1350 1316 return ret; 1351 1317 } 1352 1318 ··· 1729 1687 } 1730 1688 case RDMA_CM_EVENT_DEVICE_REMOVAL: 1731 1689 case RDMA_CM_EVENT_DISCONNECTED: { 1732 - ib_drain_qp(sc->ib.qp); 1733 - 1734 1690 sc->status = SMBDIRECT_SOCKET_DISCONNECTED; 1735 1691 smb_direct_disconnect_rdma_work(&sc->disconnect_work); 1692 + if (sc->ib.qp) 1693 + ib_drain_qp(sc->ib.qp); 1736 1694 break; 1737 1695 } 1738 1696 case RDMA_CM_EVENT_CONNECT_ERROR: { ··· 1906 1864 goto out_err; 1907 1865 } 1908 1866 1909 - smb_direct_post_recv_credits(&sc->recv_io.posted.refill_work); 1910 1867 return 0; 1911 1868 out_err: 1912 1869 put_recvmsg(sc, recvmsg); 1913 1870 return ret; 1914 1871 } 1915 1872 1916 - static unsigned int smb_direct_get_max_fr_pages(struct smbdirect_socket *sc) 1917 - { 1918 - return min_t(unsigned int, 1919 - sc->ib.dev->attrs.max_fast_reg_page_list_len, 1920 - 256); 1921 - } 1922 - 1923 - static int smb_direct_init_params(struct smbdirect_socket *sc, 1924 - struct ib_qp_cap *cap) 1873 + static int smb_direct_init_params(struct smbdirect_socket *sc) 1925 1874 { 1926 1875 struct smbdirect_socket_parameters *sp = &sc->parameters; 1927 - struct ib_device *device = sc->ib.dev; 1928 - int max_send_sges, max_rw_wrs, max_send_wrs; 1929 - unsigned int max_sge_per_wr, wrs_per_credit; 1876 + int max_send_sges; 1877 + unsigned int maxpages; 1930 1878 1931 1879 /* need 3 more sge. because a SMB_DIRECT header, SMB2 header, 1932 1880 * SMB2 response could be mapped. ··· 1927 1895 return -EINVAL; 1928 1896 } 1929 1897 1930 - /* Calculate the number of work requests for RDMA R/W. 1931 - * The maximum number of pages which can be registered 1932 - * with one Memory region can be transferred with one 1933 - * R/W credit. And at least 4 work requests for each credit 1934 - * are needed for MR registration, RDMA R/W, local & remote 1935 - * MR invalidation. 1936 - */ 1937 - sc->rw_io.credits.num_pages = smb_direct_get_max_fr_pages(sc); 1938 - sc->rw_io.credits.max = DIV_ROUND_UP(sp->max_read_write_size, 1939 - (sc->rw_io.credits.num_pages - 1) * 1940 - PAGE_SIZE); 1898 + atomic_set(&sc->send_io.lcredits.count, sp->send_credit_target); 1941 1899 1942 - max_sge_per_wr = min_t(unsigned int, device->attrs.max_send_sge, 1943 - device->attrs.max_sge_rd); 1944 - max_sge_per_wr = max_t(unsigned int, max_sge_per_wr, 1945 - max_send_sges); 1946 - wrs_per_credit = max_t(unsigned int, 4, 1947 - DIV_ROUND_UP(sc->rw_io.credits.num_pages, 1948 - max_sge_per_wr) + 1); 1949 - max_rw_wrs = sc->rw_io.credits.max * wrs_per_credit; 1950 - 1951 - max_send_wrs = sp->send_credit_target + max_rw_wrs; 1952 - if (max_send_wrs > device->attrs.max_cqe || 1953 - max_send_wrs > device->attrs.max_qp_wr) { 1954 - pr_err("consider lowering send_credit_target = %d\n", 1955 - sp->send_credit_target); 1956 - pr_err("Possible CQE overrun, device reporting max_cqe %d max_qp_wr %d\n", 1957 - device->attrs.max_cqe, device->attrs.max_qp_wr); 1958 - return -EINVAL; 1959 - } 1960 - 1961 - if (sp->recv_credit_max > device->attrs.max_cqe || 1962 - sp->recv_credit_max > device->attrs.max_qp_wr) { 1963 - pr_err("consider lowering receive_credit_max = %d\n", 1964 - sp->recv_credit_max); 1965 - pr_err("Possible CQE overrun, device reporting max_cpe %d max_qp_wr %d\n", 1966 - device->attrs.max_cqe, device->attrs.max_qp_wr); 1967 - return -EINVAL; 1968 - } 1969 - 1970 - if (device->attrs.max_send_sge < SMBDIRECT_SEND_IO_MAX_SGE) { 1971 - pr_err("warning: device max_send_sge = %d too small\n", 1972 - device->attrs.max_send_sge); 1973 - return -EINVAL; 1974 - } 1975 - if (device->attrs.max_recv_sge < SMBDIRECT_RECV_IO_MAX_SGE) { 1976 - pr_err("warning: device max_recv_sge = %d too small\n", 1977 - device->attrs.max_recv_sge); 1978 - return -EINVAL; 1979 - } 1900 + maxpages = DIV_ROUND_UP(sp->max_read_write_size, PAGE_SIZE); 1901 + sc->rw_io.credits.max = rdma_rw_mr_factor(sc->ib.dev, 1902 + sc->rdma.cm_id->port_num, 1903 + maxpages); 1904 + sc->rw_io.credits.num_pages = DIV_ROUND_UP(maxpages, sc->rw_io.credits.max); 1905 + /* add one extra in order to handle unaligned pages */ 1906 + sc->rw_io.credits.max += 1; 1980 1907 1981 1908 sc->recv_io.credits.target = 1; 1982 1909 1983 1910 atomic_set(&sc->rw_io.credits.count, sc->rw_io.credits.max); 1984 1911 1985 - cap->max_send_wr = max_send_wrs; 1986 - cap->max_recv_wr = sp->recv_credit_max; 1987 - cap->max_send_sge = SMBDIRECT_SEND_IO_MAX_SGE; 1988 - cap->max_recv_sge = SMBDIRECT_RECV_IO_MAX_SGE; 1989 - cap->max_inline_data = 0; 1990 - cap->max_rdma_ctxs = sc->rw_io.credits.max; 1991 1912 return 0; 1992 1913 } 1993 1914 ··· 2014 2029 return -ENOMEM; 2015 2030 } 2016 2031 2017 - static int smb_direct_create_qpair(struct smbdirect_socket *sc, 2018 - struct ib_qp_cap *cap) 2032 + static u32 smb_direct_rdma_rw_send_wrs(struct ib_device *dev, const struct ib_qp_init_attr *attr) 2033 + { 2034 + /* 2035 + * This could be split out of rdma_rw_init_qp() 2036 + * and be a helper function next to rdma_rw_mr_factor() 2037 + * 2038 + * We can't check unlikely(rdma_rw_force_mr) here, 2039 + * but that is most likely 0 anyway. 2040 + */ 2041 + u32 factor; 2042 + 2043 + WARN_ON_ONCE(attr->port_num == 0); 2044 + 2045 + /* 2046 + * Each context needs at least one RDMA READ or WRITE WR. 2047 + * 2048 + * For some hardware we might need more, eventually we should ask the 2049 + * HCA driver for a multiplier here. 2050 + */ 2051 + factor = 1; 2052 + 2053 + /* 2054 + * If the device needs MRs to perform RDMA READ or WRITE operations, 2055 + * we'll need two additional MRs for the registrations and the 2056 + * invalidation. 2057 + */ 2058 + if (rdma_protocol_iwarp(dev, attr->port_num) || dev->attrs.max_sgl_rd) 2059 + factor += 2; /* inv + reg */ 2060 + 2061 + return factor * attr->cap.max_rdma_ctxs; 2062 + } 2063 + 2064 + static int smb_direct_create_qpair(struct smbdirect_socket *sc) 2019 2065 { 2020 2066 struct smbdirect_socket_parameters *sp = &sc->parameters; 2021 2067 int ret; 2068 + struct ib_qp_cap qp_cap; 2022 2069 struct ib_qp_init_attr qp_attr; 2023 - int pages_per_rw; 2070 + u32 max_send_wr; 2071 + u32 rdma_send_wr; 2072 + 2073 + /* 2074 + * Note that {rdma,ib}_create_qp() will call 2075 + * rdma_rw_init_qp() if cap->max_rdma_ctxs is not 0. 2076 + * It will adjust cap->max_send_wr to the required 2077 + * number of additional WRs for the RDMA RW operations. 2078 + * It will cap cap->max_send_wr to the device limit. 2079 + * 2080 + * +1 for ib_drain_qp 2081 + */ 2082 + qp_cap.max_send_wr = sp->send_credit_target + 1; 2083 + qp_cap.max_recv_wr = sp->recv_credit_max + 1; 2084 + qp_cap.max_send_sge = SMBDIRECT_SEND_IO_MAX_SGE; 2085 + qp_cap.max_recv_sge = SMBDIRECT_RECV_IO_MAX_SGE; 2086 + qp_cap.max_inline_data = 0; 2087 + qp_cap.max_rdma_ctxs = sc->rw_io.credits.max; 2088 + 2089 + /* 2090 + * Find out the number of max_send_wr 2091 + * after rdma_rw_init_qp() adjusted it. 2092 + * 2093 + * We only do it on a temporary variable, 2094 + * as rdma_create_qp() will trigger 2095 + * rdma_rw_init_qp() again. 2096 + */ 2097 + memset(&qp_attr, 0, sizeof(qp_attr)); 2098 + qp_attr.cap = qp_cap; 2099 + qp_attr.port_num = sc->rdma.cm_id->port_num; 2100 + rdma_send_wr = smb_direct_rdma_rw_send_wrs(sc->ib.dev, &qp_attr); 2101 + max_send_wr = qp_cap.max_send_wr + rdma_send_wr; 2102 + 2103 + if (qp_cap.max_send_wr > sc->ib.dev->attrs.max_cqe || 2104 + qp_cap.max_send_wr > sc->ib.dev->attrs.max_qp_wr) { 2105 + pr_err("Possible CQE overrun: max_send_wr %d\n", 2106 + qp_cap.max_send_wr); 2107 + pr_err("device %.*s reporting max_cqe %d max_qp_wr %d\n", 2108 + IB_DEVICE_NAME_MAX, 2109 + sc->ib.dev->name, 2110 + sc->ib.dev->attrs.max_cqe, 2111 + sc->ib.dev->attrs.max_qp_wr); 2112 + pr_err("consider lowering send_credit_target = %d\n", 2113 + sp->send_credit_target); 2114 + return -EINVAL; 2115 + } 2116 + 2117 + if (qp_cap.max_rdma_ctxs && 2118 + (max_send_wr >= sc->ib.dev->attrs.max_cqe || 2119 + max_send_wr >= sc->ib.dev->attrs.max_qp_wr)) { 2120 + pr_err("Possible CQE overrun: rdma_send_wr %d + max_send_wr %d = %d\n", 2121 + rdma_send_wr, qp_cap.max_send_wr, max_send_wr); 2122 + pr_err("device %.*s reporting max_cqe %d max_qp_wr %d\n", 2123 + IB_DEVICE_NAME_MAX, 2124 + sc->ib.dev->name, 2125 + sc->ib.dev->attrs.max_cqe, 2126 + sc->ib.dev->attrs.max_qp_wr); 2127 + pr_err("consider lowering send_credit_target = %d, max_rdma_ctxs = %d\n", 2128 + sp->send_credit_target, qp_cap.max_rdma_ctxs); 2129 + return -EINVAL; 2130 + } 2131 + 2132 + if (qp_cap.max_recv_wr > sc->ib.dev->attrs.max_cqe || 2133 + qp_cap.max_recv_wr > sc->ib.dev->attrs.max_qp_wr) { 2134 + pr_err("Possible CQE overrun: max_recv_wr %d\n", 2135 + qp_cap.max_recv_wr); 2136 + pr_err("device %.*s reporting max_cqe %d max_qp_wr %d\n", 2137 + IB_DEVICE_NAME_MAX, 2138 + sc->ib.dev->name, 2139 + sc->ib.dev->attrs.max_cqe, 2140 + sc->ib.dev->attrs.max_qp_wr); 2141 + pr_err("consider lowering receive_credit_max = %d\n", 2142 + sp->recv_credit_max); 2143 + return -EINVAL; 2144 + } 2145 + 2146 + if (qp_cap.max_send_sge > sc->ib.dev->attrs.max_send_sge || 2147 + qp_cap.max_recv_sge > sc->ib.dev->attrs.max_recv_sge) { 2148 + pr_err("device %.*s max_send_sge/max_recv_sge = %d/%d too small\n", 2149 + IB_DEVICE_NAME_MAX, 2150 + sc->ib.dev->name, 2151 + sc->ib.dev->attrs.max_send_sge, 2152 + sc->ib.dev->attrs.max_recv_sge); 2153 + return -EINVAL; 2154 + } 2024 2155 2025 2156 sc->ib.pd = ib_alloc_pd(sc->ib.dev, 0); 2026 2157 if (IS_ERR(sc->ib.pd)) { ··· 2147 2046 } 2148 2047 2149 2048 sc->ib.send_cq = ib_alloc_cq_any(sc->ib.dev, sc, 2150 - sp->send_credit_target + 2151 - cap->max_rdma_ctxs, 2049 + max_send_wr, 2152 2050 IB_POLL_WORKQUEUE); 2153 2051 if (IS_ERR(sc->ib.send_cq)) { 2154 2052 pr_err("Can't create RDMA send CQ\n"); ··· 2157 2057 } 2158 2058 2159 2059 sc->ib.recv_cq = ib_alloc_cq_any(sc->ib.dev, sc, 2160 - sp->recv_credit_max, 2060 + qp_cap.max_recv_wr, 2161 2061 IB_POLL_WORKQUEUE); 2162 2062 if (IS_ERR(sc->ib.recv_cq)) { 2163 2063 pr_err("Can't create RDMA recv CQ\n"); ··· 2166 2066 goto err; 2167 2067 } 2168 2068 2069 + /* 2070 + * We reset completely here! 2071 + * As the above use was just temporary 2072 + * to calc max_send_wr and rdma_send_wr. 2073 + * 2074 + * rdma_create_qp() will trigger rdma_rw_init_qp() 2075 + * again if max_rdma_ctxs is not 0. 2076 + */ 2169 2077 memset(&qp_attr, 0, sizeof(qp_attr)); 2170 2078 qp_attr.event_handler = smb_direct_qpair_handler; 2171 2079 qp_attr.qp_context = sc; 2172 - qp_attr.cap = *cap; 2080 + qp_attr.cap = qp_cap; 2173 2081 qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 2174 2082 qp_attr.qp_type = IB_QPT_RC; 2175 2083 qp_attr.send_cq = sc->ib.send_cq; ··· 2192 2084 2193 2085 sc->ib.qp = sc->rdma.cm_id->qp; 2194 2086 sc->rdma.cm_id->event_handler = smb_direct_cm_handler; 2195 - 2196 - pages_per_rw = DIV_ROUND_UP(sp->max_read_write_size, PAGE_SIZE) + 1; 2197 - if (pages_per_rw > sc->ib.dev->attrs.max_sgl_rd) { 2198 - ret = ib_mr_pool_init(sc->ib.qp, &sc->ib.qp->rdma_mrs, 2199 - sc->rw_io.credits.max, IB_MR_TYPE_MEM_REG, 2200 - sc->rw_io.credits.num_pages, 0); 2201 - if (ret) { 2202 - pr_err("failed to init mr pool count %zu pages %zu\n", 2203 - sc->rw_io.credits.max, sc->rw_io.credits.num_pages); 2204 - goto err; 2205 - } 2206 - } 2207 2087 2208 2088 return 0; 2209 2089 err: ··· 2250 2154 return -ECONNABORTED; 2251 2155 2252 2156 ret = smb_direct_check_recvmsg(recvmsg); 2253 - if (ret == -ECONNABORTED) 2254 - goto out; 2157 + if (ret) 2158 + goto put; 2255 2159 2256 2160 req = (struct smbdirect_negotiate_req *)recvmsg->packet; 2257 2161 sp->max_recv_size = min_t(int, sp->max_recv_size, ··· 2266 2170 sc->recv_io.credits.target = min_t(u16, sc->recv_io.credits.target, sp->recv_credit_max); 2267 2171 sc->recv_io.credits.target = max_t(u16, sc->recv_io.credits.target, 1); 2268 2172 2269 - ret = smb_direct_send_negotiate_response(sc, ret); 2270 - out: 2173 + put: 2271 2174 spin_lock_irqsave(&sc->recv_io.reassembly.lock, flags); 2272 2175 sc->recv_io.reassembly.queue_length--; 2273 2176 list_del(&recvmsg->list); 2274 2177 spin_unlock_irqrestore(&sc->recv_io.reassembly.lock, flags); 2275 2178 put_recvmsg(sc, recvmsg); 2276 2179 2180 + if (ret == -ECONNABORTED) 2181 + return ret; 2182 + 2183 + if (ret) 2184 + goto respond; 2185 + 2186 + /* 2187 + * We negotiated with success, so we need to refill the recv queue. 2188 + * We do that with sc->idle.immediate_work still being disabled 2189 + * via smbdirect_socket_init(), so that queue_work(sc->workqueue, 2190 + * &sc->idle.immediate_work) in smb_direct_post_recv_credits() 2191 + * is a no-op. 2192 + * 2193 + * The message that grants the credits to the client is 2194 + * the negotiate response. 2195 + */ 2196 + INIT_WORK(&sc->recv_io.posted.refill_work, smb_direct_post_recv_credits); 2197 + smb_direct_post_recv_credits(&sc->recv_io.posted.refill_work); 2198 + if (unlikely(sc->first_error)) 2199 + return sc->first_error; 2200 + INIT_WORK(&sc->idle.immediate_work, smb_direct_send_immediate_work); 2201 + 2202 + respond: 2203 + ret = smb_direct_send_negotiate_response(sc, ret); 2204 + 2277 2205 return ret; 2278 2206 } 2279 2207 2280 2208 static int smb_direct_connect(struct smbdirect_socket *sc) 2281 2209 { 2282 - struct ib_qp_cap qp_cap; 2283 2210 int ret; 2284 2211 2285 - ret = smb_direct_init_params(sc, &qp_cap); 2212 + ret = smb_direct_init_params(sc); 2286 2213 if (ret) { 2287 2214 pr_err("Can't configure RDMA parameters\n"); 2288 2215 return ret; ··· 2317 2198 return ret; 2318 2199 } 2319 2200 2320 - ret = smb_direct_create_qpair(sc, &qp_cap); 2201 + ret = smb_direct_create_qpair(sc); 2321 2202 if (ret) { 2322 2203 pr_err("Can't accept RDMA client: %d\n", ret); 2323 2204 return ret;
+21 -5
fs/sysfs/group.c
··· 498 498 } 499 499 EXPORT_SYMBOL_GPL(compat_only_sysfs_link_entry_to_kobj); 500 500 501 - static int sysfs_group_attrs_change_owner(struct kernfs_node *grp_kn, 501 + static int sysfs_group_attrs_change_owner(struct kobject *kobj, 502 + struct kernfs_node *grp_kn, 502 503 const struct attribute_group *grp, 503 504 struct iattr *newattrs) 504 505 { 505 506 struct kernfs_node *kn; 506 - int error; 507 + int error, i; 508 + umode_t mode; 507 509 508 510 if (grp->attrs) { 509 511 struct attribute *const *attr; 510 512 511 - for (attr = grp->attrs; *attr; attr++) { 513 + for (i = 0, attr = grp->attrs; *attr; i++, attr++) { 514 + if (grp->is_visible) { 515 + mode = grp->is_visible(kobj, *attr, i); 516 + if (mode & SYSFS_GROUP_INVISIBLE) 517 + break; 518 + if (!mode) 519 + continue; 520 + } 512 521 kn = kernfs_find_and_get(grp_kn, (*attr)->name); 513 522 if (!kn) 514 523 return -ENOENT; ··· 532 523 if (grp->bin_attrs) { 533 524 const struct bin_attribute *const *bin_attr; 534 525 535 - for (bin_attr = grp->bin_attrs; *bin_attr; bin_attr++) { 526 + for (i = 0, bin_attr = grp->bin_attrs; *bin_attr; i++, bin_attr++) { 527 + if (grp->is_bin_visible) { 528 + mode = grp->is_bin_visible(kobj, *bin_attr, i); 529 + if (mode & SYSFS_GROUP_INVISIBLE) 530 + break; 531 + if (!mode) 532 + continue; 533 + } 536 534 kn = kernfs_find_and_get(grp_kn, (*bin_attr)->attr.name); 537 535 if (!kn) 538 536 return -ENOENT; ··· 589 573 590 574 error = kernfs_setattr(grp_kn, &newattrs); 591 575 if (!error) 592 - error = sysfs_group_attrs_change_owner(grp_kn, grp, &newattrs); 576 + error = sysfs_group_attrs_change_owner(kobj, grp_kn, grp, &newattrs); 593 577 594 578 kernfs_put(grp_kn); 595 579
+10 -1
fs/xfs/Kconfig
··· 119 119 120 120 See the xfs man page in section 5 for additional information. 121 121 122 + This option is mandatory to support zoned block devices. For these 123 + devices, the realtime subvolume must be backed by a zoned block 124 + device and a regular block device used as the main device (for 125 + metadata). If the zoned block device is a host-managed SMR hard-disk 126 + containing conventional zones at the beginning of its address space, 127 + XFS will use the disk conventional zones as the main device and the 128 + remaining sequential write required zones as the backing storage for 129 + the realtime subvolume. 130 + 122 131 If unsure, say N. 123 132 124 133 config XFS_DRAIN_INTENTS ··· 165 156 bool "XFS online metadata check usage data collection" 166 157 default y 167 158 depends on XFS_ONLINE_SCRUB 168 - select DEBUG_FS 159 + depends on DEBUG_FS 169 160 help 170 161 If you say Y here, the kernel will gather usage data about 171 162 the online metadata check subsystem. This includes the number
+31 -3
fs/xfs/scrub/nlinks.c
··· 376 376 return error; 377 377 } 378 378 379 + static uint 380 + xchk_nlinks_ilock_dir( 381 + struct xfs_inode *ip) 382 + { 383 + uint lock_mode = XFS_ILOCK_SHARED; 384 + 385 + /* 386 + * We're going to scan the directory entries, so we must be ready to 387 + * pull the data fork mappings into memory if they aren't already. 388 + */ 389 + if (xfs_need_iread_extents(&ip->i_df)) 390 + lock_mode = XFS_ILOCK_EXCL; 391 + 392 + /* 393 + * We're going to scan the parent pointers, so we must be ready to 394 + * pull the attr fork mappings into memory if they aren't already. 395 + */ 396 + if (xfs_has_parent(ip->i_mount) && xfs_inode_has_attr_fork(ip) && 397 + xfs_need_iread_extents(&ip->i_af)) 398 + lock_mode = XFS_ILOCK_EXCL; 399 + 400 + /* 401 + * Take the IOLOCK so that other threads cannot start a directory 402 + * update while we're scanning. 403 + */ 404 + lock_mode |= XFS_IOLOCK_SHARED; 405 + xfs_ilock(ip, lock_mode); 406 + return lock_mode; 407 + } 408 + 379 409 /* Walk a directory to bump the observed link counts of the children. */ 380 410 STATIC int 381 411 xchk_nlinks_collect_dir( ··· 424 394 return 0; 425 395 426 396 /* Prevent anyone from changing this directory while we walk it. */ 427 - xfs_ilock(dp, XFS_IOLOCK_SHARED); 428 - lock_mode = xfs_ilock_data_map_shared(dp); 397 + lock_mode = xchk_nlinks_ilock_dir(dp); 429 398 430 399 /* 431 400 * The dotdot entry of an unlinked directory still points to the last ··· 481 452 xchk_iscan_abort(&xnc->collect_iscan); 482 453 out_unlock: 483 454 xfs_iunlock(dp, lock_mode); 484 - xfs_iunlock(dp, XFS_IOLOCK_SHARED); 485 455 return error; 486 456 } 487 457
+1 -1
fs/xfs/xfs_buf.c
··· 1751 1751 const char *descr) 1752 1752 { 1753 1753 /* The maximum size of the buftarg is only known once the sb is read. */ 1754 - btp->bt_nr_sectors = (xfs_daddr_t)-1; 1754 + btp->bt_nr_sectors = XFS_BUF_DADDR_MAX; 1755 1755 1756 1756 /* Set up device logical sector size mask */ 1757 1757 btp->bt_logical_sectorsize = logical_sectorsize;
+1
fs/xfs/xfs_buf.h
··· 22 22 */ 23 23 struct xfs_buf; 24 24 25 + #define XFS_BUF_DADDR_MAX ((xfs_daddr_t) S64_MAX) 25 26 #define XFS_BUF_DADDR_NULL ((xfs_daddr_t) (-1LL)) 26 27 27 28 #define XBF_READ (1u << 0) /* buffer intended for reading from device */
-1
fs/xfs/xfs_mount.h
··· 236 236 bool m_update_sb; /* sb needs update in mount */ 237 237 unsigned int m_max_open_zones; 238 238 unsigned int m_zonegc_low_space; 239 - struct xfs_mru_cache *m_zone_cache; /* Inode to open zone cache */ 240 239 241 240 /* max_atomic_write mount option value */ 242 241 unsigned long long m_awu_max_bytes;
+42 -11
fs/xfs/xfs_super.c
··· 102 102 * Table driven mount option parser. 103 103 */ 104 104 enum { 105 - Opt_logbufs, Opt_logbsize, Opt_logdev, Opt_rtdev, 105 + Op_deprecated, Opt_logbufs, Opt_logbsize, Opt_logdev, Opt_rtdev, 106 106 Opt_wsync, Opt_noalign, Opt_swalloc, Opt_sunit, Opt_swidth, Opt_nouuid, 107 107 Opt_grpid, Opt_nogrpid, Opt_bsdgroups, Opt_sysvgroups, 108 108 Opt_allocsize, Opt_norecovery, Opt_inode64, Opt_inode32, ··· 114 114 Opt_lifetime, Opt_nolifetime, Opt_max_atomic_write, 115 115 }; 116 116 117 + #define fsparam_dead(NAME) \ 118 + __fsparam(NULL, (NAME), Op_deprecated, fs_param_deprecated, NULL) 119 + 117 120 static const struct fs_parameter_spec xfs_fs_parameters[] = { 121 + /* 122 + * These mount options were supposed to be deprecated in September 2025 123 + * but the deprecation warning was buggy, so not all users were 124 + * notified. The deprecation is now obnoxiously loud and postponed to 125 + * September 2030. 126 + */ 127 + fsparam_dead("attr2"), 128 + fsparam_dead("noattr2"), 129 + fsparam_dead("ikeep"), 130 + fsparam_dead("noikeep"), 131 + 118 132 fsparam_u32("logbufs", Opt_logbufs), 119 133 fsparam_string("logbsize", Opt_logbsize), 120 134 fsparam_string("logdev", Opt_logdev), ··· 800 786 801 787 truncate_inode_pages_final(&inode->i_data); 802 788 clear_inode(inode); 789 + 790 + if (IS_ENABLED(CONFIG_XFS_RT) && 791 + S_ISREG(inode->i_mode) && inode->i_private) { 792 + xfs_open_zone_put(inode->i_private); 793 + inode->i_private = NULL; 794 + } 803 795 } 804 796 805 797 static void ··· 1393 1373 static inline void 1394 1374 xfs_fs_warn_deprecated( 1395 1375 struct fs_context *fc, 1396 - struct fs_parameter *param, 1397 - uint64_t flag, 1398 - bool value) 1376 + struct fs_parameter *param) 1399 1377 { 1400 - /* Don't print the warning if reconfiguring and current mount point 1401 - * already had the flag set 1378 + /* 1379 + * Always warn about someone passing in a deprecated mount option. 1380 + * Previously we wouldn't print the warning if we were reconfiguring 1381 + * and current mount point already had the flag set, but that was not 1382 + * the right thing to do. 1383 + * 1384 + * Many distributions mount the root filesystem with no options in the 1385 + * initramfs and rely on mount -a to remount the root fs with the 1386 + * options in fstab. However, the old behavior meant that there would 1387 + * never be a warning about deprecated mount options for the root fs in 1388 + * /etc/fstab. On a single-fs system, that means no warning at all. 1389 + * 1390 + * Compounding this problem are distribution scripts that copy 1391 + * /proc/mounts to fstab, which means that we can't remove mount 1392 + * options unless we're 100% sure they have only ever been advertised 1393 + * in /proc/mounts in response to explicitly provided mount options. 1402 1394 */ 1403 - if ((fc->purpose & FS_CONTEXT_FOR_RECONFIGURE) && 1404 - !!(XFS_M(fc->root->d_sb)->m_features & flag) == value) 1405 - return; 1406 1395 xfs_warn(fc->s_fs_info, "%s mount option is deprecated.", param->key); 1407 1396 } 1408 1397 ··· 1437 1408 return opt; 1438 1409 1439 1410 switch (opt) { 1411 + case Op_deprecated: 1412 + xfs_fs_warn_deprecated(fc, param); 1413 + return 0; 1440 1414 case Opt_logbufs: 1441 1415 parsing_mp->m_logbufs = result.uint_32; 1442 1416 return 0; ··· 1560 1528 xfs_mount_set_dax_mode(parsing_mp, result.uint_32); 1561 1529 return 0; 1562 1530 #endif 1563 - /* Following mount options will be removed in September 2025 */ 1564 1531 case Opt_max_open_zones: 1565 1532 parsing_mp->m_max_open_zones = result.uint_32; 1566 1533 return 0; ··· 2252 2221 struct xfs_mount *mp; 2253 2222 int i; 2254 2223 2255 - mp = kzalloc(sizeof(struct xfs_mount), GFP_KERNEL | __GFP_NOFAIL); 2224 + mp = kzalloc(sizeof(struct xfs_mount), GFP_KERNEL); 2256 2225 if (!mp) 2257 2226 return -ENOMEM; 2258 2227
+60 -88
fs/xfs/xfs_zone_alloc.c
··· 26 26 #include "xfs_trace.h" 27 27 #include "xfs_mru_cache.h" 28 28 29 + static void 30 + xfs_open_zone_free_rcu( 31 + struct callback_head *cb) 32 + { 33 + struct xfs_open_zone *oz = container_of(cb, typeof(*oz), oz_rcu); 34 + 35 + xfs_rtgroup_rele(oz->oz_rtg); 36 + kfree(oz); 37 + } 38 + 29 39 void 30 40 xfs_open_zone_put( 31 41 struct xfs_open_zone *oz) 32 42 { 33 - if (atomic_dec_and_test(&oz->oz_ref)) { 34 - xfs_rtgroup_rele(oz->oz_rtg); 35 - kfree(oz); 36 - } 43 + if (atomic_dec_and_test(&oz->oz_ref)) 44 + call_rcu(&oz->oz_rcu, xfs_open_zone_free_rcu); 37 45 } 38 46 39 47 static inline uint32_t ··· 622 614 } 623 615 624 616 /* 625 - * Try to pack inodes that are written back after they were closed tight instead 626 - * of trying to open new zones for them or spread them to the least recently 627 - * used zone. This optimizes the data layout for workloads that untar or copy 628 - * a lot of small files. Right now this does not separate multiple such 617 + * Try to tightly pack small files that are written back after they were closed 618 + * instead of trying to open new zones for them or spread them to the least 619 + * recently used zone. This optimizes the data layout for workloads that untar 620 + * or copy a lot of small files. Right now this does not separate multiple such 629 621 * streams. 630 622 */ 631 623 static inline bool xfs_zoned_pack_tight(struct xfs_inode *ip) 632 624 { 625 + struct xfs_mount *mp = ip->i_mount; 626 + size_t zone_capacity = 627 + XFS_FSB_TO_B(mp, mp->m_groups[XG_TYPE_RTG].blocks); 628 + 629 + /* 630 + * Do not pack write files that are already using a full zone to avoid 631 + * fragmentation. 632 + */ 633 + if (i_size_read(VFS_I(ip)) >= zone_capacity) 634 + return false; 635 + 633 636 return !inode_is_open_for_write(VFS_I(ip)) && 634 637 !(ip->i_diflags & XFS_DIFLAG_APPEND); 635 638 } ··· 765 746 } 766 747 767 748 /* 768 - * Cache the last zone written to for an inode so that it is considered first 769 - * for subsequent writes. 770 - */ 771 - struct xfs_zone_cache_item { 772 - struct xfs_mru_cache_elem mru; 773 - struct xfs_open_zone *oz; 774 - }; 775 - 776 - static inline struct xfs_zone_cache_item * 777 - xfs_zone_cache_item(struct xfs_mru_cache_elem *mru) 778 - { 779 - return container_of(mru, struct xfs_zone_cache_item, mru); 780 - } 781 - 782 - static void 783 - xfs_zone_cache_free_func( 784 - void *data, 785 - struct xfs_mru_cache_elem *mru) 786 - { 787 - struct xfs_zone_cache_item *item = xfs_zone_cache_item(mru); 788 - 789 - xfs_open_zone_put(item->oz); 790 - kfree(item); 791 - } 792 - 793 - /* 794 749 * Check if we have a cached last open zone available for the inode and 795 750 * if yes return a reference to it. 796 751 */ 797 752 static struct xfs_open_zone * 798 - xfs_cached_zone( 799 - struct xfs_mount *mp, 800 - struct xfs_inode *ip) 753 + xfs_get_cached_zone( 754 + struct xfs_inode *ip) 801 755 { 802 - struct xfs_mru_cache_elem *mru; 803 - struct xfs_open_zone *oz; 756 + struct xfs_open_zone *oz; 804 757 805 - mru = xfs_mru_cache_lookup(mp->m_zone_cache, ip->i_ino); 806 - if (!mru) 807 - return NULL; 808 - oz = xfs_zone_cache_item(mru)->oz; 758 + rcu_read_lock(); 759 + oz = VFS_I(ip)->i_private; 809 760 if (oz) { 810 761 /* 811 762 * GC only steals open zones at mount time, so no GC zones 812 763 * should end up in the cache. 813 764 */ 814 765 ASSERT(!oz->oz_is_gc); 815 - ASSERT(atomic_read(&oz->oz_ref) > 0); 816 - atomic_inc(&oz->oz_ref); 766 + if (!atomic_inc_not_zero(&oz->oz_ref)) 767 + oz = NULL; 817 768 } 818 - xfs_mru_cache_done(mp->m_zone_cache); 769 + rcu_read_unlock(); 770 + 819 771 return oz; 820 772 } 821 773 822 774 /* 823 - * Update the last used zone cache for a given inode. 775 + * Stash our zone in the inode so that is is reused for future allocations. 824 776 * 825 - * The caller must have a reference on the open zone. 777 + * The open_zone structure will be pinned until either the inode is freed or 778 + * until the cached open zone is replaced with a different one because the 779 + * current one was full when we tried to use it. This means we keep any 780 + * open zone around forever as long as any inode that used it for the last 781 + * write is cached, which slightly increases the memory use of cached inodes 782 + * that were every written to, but significantly simplifies the cached zone 783 + * lookup. Because the open_zone is clearly marked as full when all data 784 + * in the underlying RTG was written, the caching is always safe. 826 785 */ 827 786 static void 828 - xfs_zone_cache_create_association( 829 - struct xfs_inode *ip, 830 - struct xfs_open_zone *oz) 787 + xfs_set_cached_zone( 788 + struct xfs_inode *ip, 789 + struct xfs_open_zone *oz) 831 790 { 832 - struct xfs_mount *mp = ip->i_mount; 833 - struct xfs_zone_cache_item *item = NULL; 834 - struct xfs_mru_cache_elem *mru; 791 + struct xfs_open_zone *old_oz; 835 792 836 - ASSERT(atomic_read(&oz->oz_ref) > 0); 837 793 atomic_inc(&oz->oz_ref); 838 - 839 - mru = xfs_mru_cache_lookup(mp->m_zone_cache, ip->i_ino); 840 - if (mru) { 841 - /* 842 - * If we have an association already, update it to point to the 843 - * new zone. 844 - */ 845 - item = xfs_zone_cache_item(mru); 846 - xfs_open_zone_put(item->oz); 847 - item->oz = oz; 848 - xfs_mru_cache_done(mp->m_zone_cache); 849 - return; 850 - } 851 - 852 - item = kmalloc(sizeof(*item), GFP_KERNEL); 853 - if (!item) { 854 - xfs_open_zone_put(oz); 855 - return; 856 - } 857 - item->oz = oz; 858 - xfs_mru_cache_insert(mp->m_zone_cache, ip->i_ino, &item->mru); 794 + old_oz = xchg(&VFS_I(ip)->i_private, oz); 795 + if (old_oz) 796 + xfs_open_zone_put(old_oz); 859 797 } 860 798 861 799 static void ··· 856 880 * the inode is still associated with a zone and use that if so. 857 881 */ 858 882 if (!*oz) 859 - *oz = xfs_cached_zone(mp, ip); 883 + *oz = xfs_get_cached_zone(ip); 860 884 861 885 if (!*oz) { 862 886 select_zone: 863 887 *oz = xfs_select_zone(mp, write_hint, pack_tight); 864 888 if (!*oz) 865 889 goto out_error; 866 - 867 - xfs_zone_cache_create_association(ip, *oz); 890 + xfs_set_cached_zone(ip, *oz); 868 891 } 869 892 870 893 alloc_len = xfs_zone_alloc_blocks(*oz, XFS_B_TO_FSB(mp, ioend->io_size), ··· 941 966 xfs_open_zone_put(oz); 942 967 } 943 968 spin_unlock(&zi->zi_open_zones_lock); 969 + 970 + /* 971 + * Wait for all open zones to be freed so that they drop the group 972 + * references: 973 + */ 974 + rcu_barrier(); 944 975 } 945 976 946 977 struct xfs_init_zones { ··· 1260 1279 error = xfs_zone_gc_mount(mp); 1261 1280 if (error) 1262 1281 goto out_free_zone_info; 1263 - 1264 - /* 1265 - * Set up a mru cache to track inode to open zone for data placement 1266 - * purposes. The magic values for group count and life time is the 1267 - * same as the defaults for file streams, which seems sane enough. 1268 - */ 1269 - xfs_mru_cache_create(&mp->m_zone_cache, mp, 1270 - 5000, 10, xfs_zone_cache_free_func); 1271 1282 return 0; 1272 1283 1273 1284 out_free_zone_info: ··· 1273 1300 { 1274 1301 xfs_zone_gc_unmount(mp); 1275 1302 xfs_free_zone_info(mp->m_zone_info); 1276 - xfs_mru_cache_destroy(mp->m_zone_cache); 1277 1303 }
+46 -35
fs/xfs/xfs_zone_gc.c
··· 491 491 struct xfs_rtgroup *victim_rtg = NULL; 492 492 unsigned int bucket; 493 493 494 - if (xfs_is_shutdown(mp)) 495 - return false; 496 - 497 - if (iter->victim_rtg) 498 - return true; 499 - 500 - /* 501 - * Don't start new work if we are asked to stop or park. 502 - */ 503 - if (kthread_should_stop() || kthread_should_park()) 504 - return false; 505 - 506 - if (!xfs_zoned_need_gc(mp)) 507 - return false; 508 - 509 494 spin_lock(&zi->zi_used_buckets_lock); 510 495 for (bucket = 0; bucket < XFS_ZONE_USED_BUCKETS; bucket++) { 511 496 victim_rtg = xfs_zone_gc_pick_victim_from(mp, bucket); ··· 960 975 } while (next); 961 976 } 962 977 978 + static bool 979 + xfs_zone_gc_should_start_new_work( 980 + struct xfs_zone_gc_data *data) 981 + { 982 + if (xfs_is_shutdown(data->mp)) 983 + return false; 984 + if (!xfs_zone_gc_space_available(data)) 985 + return false; 986 + 987 + if (!data->iter.victim_rtg) { 988 + if (kthread_should_stop() || kthread_should_park()) 989 + return false; 990 + if (!xfs_zoned_need_gc(data->mp)) 991 + return false; 992 + if (!xfs_zone_gc_select_victim(data)) 993 + return false; 994 + } 995 + 996 + return true; 997 + } 998 + 963 999 /* 964 1000 * Handle the work to read and write data for GC and to reset the zones, 965 1001 * including handling all completions. ··· 988 982 * Note that the order of the chunks is preserved so that we don't undo the 989 983 * optimal order established by xfs_zone_gc_query(). 990 984 */ 991 - static bool 985 + static void 992 986 xfs_zone_gc_handle_work( 993 987 struct xfs_zone_gc_data *data) 994 988 { ··· 1002 996 zi->zi_reset_list = NULL; 1003 997 spin_unlock(&zi->zi_reset_list_lock); 1004 998 1005 - if (!xfs_zone_gc_select_victim(data) || 1006 - !xfs_zone_gc_space_available(data)) { 1007 - if (list_empty(&data->reading) && 1008 - list_empty(&data->writing) && 1009 - list_empty(&data->resetting) && 1010 - !reset_list) 1011 - return false; 1012 - } 1013 - 1014 - __set_current_state(TASK_RUNNING); 1015 - try_to_freeze(); 1016 - 1017 - if (reset_list) 999 + if (reset_list) { 1000 + set_current_state(TASK_RUNNING); 1018 1001 xfs_zone_gc_reset_zones(data, reset_list); 1002 + } 1019 1003 1020 1004 list_for_each_entry_safe(chunk, next, &data->resetting, entry) { 1021 1005 if (READ_ONCE(chunk->state) != XFS_GC_BIO_DONE) 1022 1006 break; 1007 + set_current_state(TASK_RUNNING); 1023 1008 xfs_zone_gc_finish_reset(chunk); 1024 1009 } 1025 1010 1026 1011 list_for_each_entry_safe(chunk, next, &data->writing, entry) { 1027 1012 if (READ_ONCE(chunk->state) != XFS_GC_BIO_DONE) 1028 1013 break; 1014 + set_current_state(TASK_RUNNING); 1029 1015 xfs_zone_gc_finish_chunk(chunk); 1030 1016 } 1031 1017 ··· 1025 1027 list_for_each_entry_safe(chunk, next, &data->reading, entry) { 1026 1028 if (READ_ONCE(chunk->state) != XFS_GC_BIO_DONE) 1027 1029 break; 1030 + set_current_state(TASK_RUNNING); 1028 1031 xfs_zone_gc_write_chunk(chunk); 1029 1032 } 1030 1033 blk_finish_plug(&plug); 1031 1034 1032 - blk_start_plug(&plug); 1033 - while (xfs_zone_gc_start_chunk(data)) 1034 - ; 1035 - blk_finish_plug(&plug); 1036 - return true; 1035 + if (xfs_zone_gc_should_start_new_work(data)) { 1036 + set_current_state(TASK_RUNNING); 1037 + blk_start_plug(&plug); 1038 + while (xfs_zone_gc_start_chunk(data)) 1039 + ; 1040 + blk_finish_plug(&plug); 1041 + } 1037 1042 } 1038 1043 1039 1044 /* ··· 1060 1059 for (;;) { 1061 1060 set_current_state(TASK_INTERRUPTIBLE | TASK_FREEZABLE); 1062 1061 xfs_set_zonegc_running(mp); 1063 - if (xfs_zone_gc_handle_work(data)) 1062 + 1063 + xfs_zone_gc_handle_work(data); 1064 + 1065 + /* 1066 + * Only sleep if nothing set the state to running. Else check for 1067 + * work again as someone might have queued up more work and woken 1068 + * us in the meantime. 1069 + */ 1070 + if (get_current_state() == TASK_RUNNING) { 1071 + try_to_freeze(); 1064 1072 continue; 1073 + } 1065 1074 1066 1075 if (list_empty(&data->reading) && 1067 1076 list_empty(&data->writing) &&
+2
fs/xfs/xfs_zone_priv.h
··· 44 44 * the life time of an open zone. 45 45 */ 46 46 struct xfs_rtgroup *oz_rtg; 47 + 48 + struct rcu_head oz_rcu; 47 49 }; 48 50 49 51 /*
+19 -2
include/linux/arm_ffa.h
··· 338 338 * an `struct ffa_mem_region_addr_range`. 339 339 */ 340 340 u32 composite_off; 341 + u8 impdef_val[16]; 341 342 u64 reserved; 342 343 }; 343 344 ··· 418 417 #define CONSTITUENTS_OFFSET(x) \ 419 418 (offsetof(struct ffa_composite_mem_region, constituents[x])) 420 419 420 + #define FFA_EMAD_HAS_IMPDEF_FIELD(version) ((version) >= FFA_VERSION_1_2) 421 + #define FFA_MEM_REGION_HAS_EP_MEM_OFFSET(version) ((version) > FFA_VERSION_1_0) 422 + 423 + static inline u32 ffa_emad_size_get(u32 ffa_version) 424 + { 425 + u32 sz; 426 + struct ffa_mem_region_attributes *ep_mem_access; 427 + 428 + if (FFA_EMAD_HAS_IMPDEF_FIELD(ffa_version)) 429 + sz = sizeof(*ep_mem_access); 430 + else 431 + sz = sizeof(*ep_mem_access) - sizeof(ep_mem_access->impdef_val); 432 + 433 + return sz; 434 + } 435 + 421 436 static inline u32 422 437 ffa_mem_desc_offset(struct ffa_mem_region *buf, int count, u32 ffa_version) 423 438 { 424 - u32 offset = count * sizeof(struct ffa_mem_region_attributes); 439 + u32 offset = count * ffa_emad_size_get(ffa_version); 425 440 /* 426 441 * Earlier to v1.1, the endpoint memory descriptor array started at 427 442 * offset 32(i.e. offset of ep_mem_offset in the current structure) 428 443 */ 429 - if (ffa_version <= FFA_VERSION_1_0) 444 + if (!FFA_MEM_REGION_HAS_EP_MEM_OFFSET(ffa_version)) 430 445 offset += offsetof(struct ffa_mem_region, ep_mem_offset); 431 446 else 432 447 offset += sizeof(struct ffa_mem_region);
+5
include/linux/gpio/regmap.h
··· 38 38 * offset to a register/bitmask pair. If not 39 39 * given the default gpio_regmap_simple_xlate() 40 40 * is used. 41 + * @fixed_direction_output: 42 + * (Optional) Bitmap representing the fixed direction of 43 + * the GPIO lines. Useful when there are GPIO lines with a 44 + * fixed direction mixed together in the same register. 41 45 * @drvdata: (Optional) Pointer to driver specific data which is 42 46 * not used by gpio-remap but is provided "as is" to the 43 47 * driver callback(s). ··· 89 85 int reg_stride; 90 86 int ngpio_per_reg; 91 87 struct irq_domain *irq_domain; 88 + unsigned long *fixed_direction_output; 92 89 93 90 #ifdef CONFIG_REGMAP_IRQ 94 91 struct regmap_irq_chip *regmap_irq_chip;
+1
include/net/bluetooth/hci.h
··· 434 434 HCI_USER_CHANNEL, 435 435 HCI_EXT_CONFIGURED, 436 436 HCI_LE_ADV, 437 + HCI_LE_ADV_0, 437 438 HCI_LE_PER_ADV, 438 439 HCI_LE_SCAN, 439 440 HCI_SSP_ENABLED,
+1
include/net/bluetooth/hci_core.h
··· 244 244 bool enabled; 245 245 bool pending; 246 246 bool periodic; 247 + bool periodic_enabled; 247 248 __u8 mesh; 248 249 __u8 instance; 249 250 __u8 handle;
+2 -2
include/net/bluetooth/l2cap.h
··· 38 38 #define L2CAP_DEFAULT_TX_WINDOW 63 39 39 #define L2CAP_DEFAULT_EXT_WINDOW 0x3FFF 40 40 #define L2CAP_DEFAULT_MAX_TX 3 41 - #define L2CAP_DEFAULT_RETRANS_TO 2 /* seconds */ 42 - #define L2CAP_DEFAULT_MONITOR_TO 12 /* seconds */ 41 + #define L2CAP_DEFAULT_RETRANS_TO 2000 /* 2 seconds */ 42 + #define L2CAP_DEFAULT_MONITOR_TO 12000 /* 12 seconds */ 43 43 #define L2CAP_DEFAULT_MAX_PDU_SIZE 1492 /* Sized for AMP packet */ 44 44 #define L2CAP_DEFAULT_ACK_TO 200 45 45 #define L2CAP_DEFAULT_MAX_SDU_SIZE 0xFFFF
+1 -1
include/net/bluetooth/mgmt.h
··· 853 853 __le16 window; 854 854 __le16 period; 855 855 __u8 num_ad_types; 856 - __u8 ad_types[]; 856 + __u8 ad_types[] __counted_by(num_ad_types); 857 857 } __packed; 858 858 #define MGMT_SET_MESH_RECEIVER_SIZE 6 859 859
+1 -1
include/net/tcp.h
··· 373 373 int tcp_ioctl(struct sock *sk, int cmd, int *karg); 374 374 enum skb_drop_reason tcp_rcv_state_process(struct sock *sk, struct sk_buff *skb); 375 375 void tcp_rcv_established(struct sock *sk, struct sk_buff *skb); 376 - void tcp_rcvbuf_grow(struct sock *sk); 376 + void tcp_rcvbuf_grow(struct sock *sk, u32 newval); 377 377 void tcp_rcv_space_adjust(struct sock *sk); 378 378 int tcp_twsk_unique(struct sock *sk, struct sock *sktw, void *twp); 379 379 void tcp_twsk_destructor(struct sock *sk);
+13 -12
include/net/tls.h
··· 454 454 455 455 /* Log all TLS record header TCP sequences in [seq, seq+len] */ 456 456 static inline void 457 - tls_offload_rx_resync_async_request_start(struct sock *sk, __be32 seq, u16 len) 457 + tls_offload_rx_resync_async_request_start(struct tls_offload_resync_async *resync_async, 458 + __be32 seq, u16 len) 458 459 { 459 - struct tls_context *tls_ctx = tls_get_ctx(sk); 460 - struct tls_offload_context_rx *rx_ctx = tls_offload_ctx_rx(tls_ctx); 461 - 462 - atomic64_set(&rx_ctx->resync_async->req, ((u64)ntohl(seq) << 32) | 460 + atomic64_set(&resync_async->req, ((u64)ntohl(seq) << 32) | 463 461 ((u64)len << 16) | RESYNC_REQ | RESYNC_REQ_ASYNC); 464 - rx_ctx->resync_async->loglen = 0; 465 - rx_ctx->resync_async->rcd_delta = 0; 462 + resync_async->loglen = 0; 463 + resync_async->rcd_delta = 0; 466 464 } 467 465 468 466 static inline void 469 - tls_offload_rx_resync_async_request_end(struct sock *sk, __be32 seq) 467 + tls_offload_rx_resync_async_request_end(struct tls_offload_resync_async *resync_async, 468 + __be32 seq) 470 469 { 471 - struct tls_context *tls_ctx = tls_get_ctx(sk); 472 - struct tls_offload_context_rx *rx_ctx = tls_offload_ctx_rx(tls_ctx); 470 + atomic64_set(&resync_async->req, ((u64)ntohl(seq) << 32) | RESYNC_REQ); 471 + } 473 472 474 - atomic64_set(&rx_ctx->resync_async->req, 475 - ((u64)ntohl(seq) << 32) | RESYNC_REQ); 473 + static inline void 474 + tls_offload_rx_resync_async_request_cancel(struct tls_offload_resync_async *resync_async) 475 + { 476 + atomic64_set(&resync_async->req, 0); 476 477 } 477 478 478 479 static inline void
+9
include/trace/events/tcp.h
··· 218 218 __field(__u32, space) 219 219 __field(__u32, ooo_space) 220 220 __field(__u32, rcvbuf) 221 + __field(__u32, rcv_ssthresh) 222 + __field(__u32, window_clamp) 223 + __field(__u32, rcv_wnd) 221 224 __field(__u8, scaling_ratio) 222 225 __field(__u16, sport) 223 226 __field(__u16, dport) ··· 248 245 tp->rcv_nxt; 249 246 250 247 __entry->rcvbuf = sk->sk_rcvbuf; 248 + __entry->rcv_ssthresh = tp->rcv_ssthresh; 249 + __entry->window_clamp = tp->window_clamp; 250 + __entry->rcv_wnd = tp->rcv_wnd; 251 251 __entry->scaling_ratio = tp->scaling_ratio; 252 252 __entry->sport = ntohs(inet->inet_sport); 253 253 __entry->dport = ntohs(inet->inet_dport); ··· 270 264 ), 271 265 272 266 TP_printk("time=%u rtt_us=%u copied=%u inq=%u space=%u ooo=%u scaling_ratio=%u rcvbuf=%u " 267 + "rcv_ssthresh=%u window_clamp=%u rcv_wnd=%u " 273 268 "family=%s sport=%hu dport=%hu saddr=%pI4 daddr=%pI4 " 274 269 "saddrv6=%pI6c daddrv6=%pI6c skaddr=%p sock_cookie=%llx", 275 270 __entry->time, __entry->rtt_us, __entry->copied, 276 271 __entry->inq, __entry->space, __entry->ooo_space, 277 272 __entry->scaling_ratio, __entry->rcvbuf, 273 + __entry->rcv_ssthresh, __entry->window_clamp, 274 + __entry->rcv_wnd, 278 275 show_family_name(__entry->family), 279 276 __entry->sport, __entry->dport, 280 277 __entry->saddr, __entry->daddr,
+15
include/uapi/drm/xe_drm.h
··· 1013 1013 * valid on VMs with DRM_XE_VM_CREATE_FLAG_FAULT_MODE set. The CPU address 1014 1014 * mirror flag are only valid for DRM_XE_VM_BIND_OP_MAP operations, the BO 1015 1015 * handle MBZ, and the BO offset MBZ. 1016 + * - %DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET - Can be used in combination with 1017 + * %DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR to reset madvises when the underlying 1018 + * CPU address space range is unmapped (typically with munmap(2) or brk(2)). 1019 + * The madvise values set with &DRM_IOCTL_XE_MADVISE are reset to the values 1020 + * that were present immediately after the &DRM_IOCTL_XE_VM_BIND. 1021 + * The reset GPU virtual address range is the intersection of the range bound 1022 + * using &DRM_IOCTL_XE_VM_BIND and the virtual CPU address space range 1023 + * unmapped. 1024 + * This functionality is present to mimic the behaviour of CPU address space 1025 + * madvises set using madvise(2), which are typically reset on unmap. 1026 + * Note: free(3) may or may not call munmap(2) and/or brk(2), and may thus 1027 + * not invoke autoreset. Neither will stack variables going out of scope. 1028 + * Therefore it's recommended to always explicitly reset the madvises when 1029 + * freeing the memory backing a region used in a &DRM_IOCTL_XE_MADVISE call. 1016 1030 * 1017 1031 * The @prefetch_mem_region_instance for %DRM_XE_VM_BIND_OP_PREFETCH can also be: 1018 1032 * - %DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC, which ensures prefetching occurs in ··· 1133 1119 #define DRM_XE_VM_BIND_FLAG_DUMPABLE (1 << 3) 1134 1120 #define DRM_XE_VM_BIND_FLAG_CHECK_PXP (1 << 4) 1135 1121 #define DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR (1 << 5) 1122 + #define DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET (1 << 6) 1136 1123 /** @flags: Bind flags */ 1137 1124 __u32 flags; 1138 1125
+4 -4
io_uring/fdinfo.c
··· 59 59 { 60 60 struct io_overflow_cqe *ocqe; 61 61 struct io_rings *r = ctx->rings; 62 - struct rusage sq_usage; 63 62 unsigned int sq_mask = ctx->sq_entries - 1, cq_mask = ctx->cq_entries - 1; 64 63 unsigned int sq_head = READ_ONCE(r->sq.head); 65 64 unsigned int sq_tail = READ_ONCE(r->sq.tail); ··· 151 152 * thread termination. 152 153 */ 153 154 if (tsk) { 155 + u64 usec; 156 + 154 157 get_task_struct(tsk); 155 158 rcu_read_unlock(); 156 - getrusage(tsk, RUSAGE_SELF, &sq_usage); 159 + usec = io_sq_cpu_usec(tsk); 157 160 put_task_struct(tsk); 158 161 sq_pid = sq->task_pid; 159 162 sq_cpu = sq->sq_cpu; 160 - sq_total_time = (sq_usage.ru_stime.tv_sec * 1000000 161 - + sq_usage.ru_stime.tv_usec); 163 + sq_total_time = usec; 162 164 sq_work_time = sq->work_time; 163 165 } else { 164 166 rcu_read_unlock();
+1 -1
io_uring/filetable.c
··· 57 57 58 58 static int io_install_fixed_file(struct io_ring_ctx *ctx, struct file *file, 59 59 u32 slot_index) 60 - __must_hold(&req->ctx->uring_lock) 60 + __must_hold(&ctx->uring_lock) 61 61 { 62 62 struct io_rsrc_node *node; 63 63
+1 -1
io_uring/io_uring.c
··· 879 879 } 880 880 881 881 static __cold void io_cqe_overflow(struct io_ring_ctx *ctx, struct io_cqe *cqe, 882 - struct io_big_cqe *big_cqe) 882 + struct io_big_cqe *big_cqe) 883 883 { 884 884 struct io_overflow_cqe *ocqe; 885 885
+22 -11
io_uring/kbuf.c
··· 155 155 return 1; 156 156 } 157 157 158 + static bool io_should_commit(struct io_kiocb *req, unsigned int issue_flags) 159 + { 160 + /* 161 + * If we came in unlocked, we have no choice but to consume the 162 + * buffer here, otherwise nothing ensures that the buffer won't 163 + * get used by others. This does mean it'll be pinned until the 164 + * IO completes, coming in unlocked means we're being called from 165 + * io-wq context and there may be further retries in async hybrid 166 + * mode. For the locked case, the caller must call commit when 167 + * the transfer completes (or if we get -EAGAIN and must poll of 168 + * retry). 169 + */ 170 + if (issue_flags & IO_URING_F_UNLOCKED) 171 + return true; 172 + 173 + /* uring_cmd commits kbuf upfront, no need to auto-commit */ 174 + if (!io_file_can_poll(req) && req->opcode != IORING_OP_URING_CMD) 175 + return true; 176 + return false; 177 + } 178 + 158 179 static struct io_br_sel io_ring_buffer_select(struct io_kiocb *req, size_t *len, 159 180 struct io_buffer_list *bl, 160 181 unsigned int issue_flags) ··· 202 181 sel.buf_list = bl; 203 182 sel.addr = u64_to_user_ptr(buf->addr); 204 183 205 - if (issue_flags & IO_URING_F_UNLOCKED || !io_file_can_poll(req)) { 206 - /* 207 - * If we came in unlocked, we have no choice but to consume the 208 - * buffer here, otherwise nothing ensures that the buffer won't 209 - * get used by others. This does mean it'll be pinned until the 210 - * IO completes, coming in unlocked means we're being called from 211 - * io-wq context and there may be further retries in async hybrid 212 - * mode. For the locked case, the caller must call commit when 213 - * the transfer completes (or if we get -EAGAIN and must poll of 214 - * retry). 215 - */ 184 + if (io_should_commit(req, issue_flags)) { 216 185 io_kbuf_commit(req, sel.buf_list, *len, 1); 217 186 sel.buf_list = NULL; 218 187 }
+1 -1
io_uring/net.c
··· 383 383 return 0; 384 384 385 385 if (sr->flags & IORING_SEND_VECTORIZED) 386 - return io_net_import_vec(req, kmsg, sr->buf, sr->len, ITER_SOURCE); 386 + return io_net_import_vec(req, kmsg, sr->buf, sr->len, ITER_SOURCE); 387 387 388 388 return import_ubuf(ITER_SOURCE, sr->buf, sr->len, &kmsg->msg.msg_iter); 389 389 }
+45 -20
io_uring/sqpoll.c
··· 11 11 #include <linux/audit.h> 12 12 #include <linux/security.h> 13 13 #include <linux/cpuset.h> 14 + #include <linux/sched/cputime.h> 14 15 #include <linux/io_uring.h> 15 16 16 17 #include <uapi/linux/io_uring.h> ··· 170 169 return READ_ONCE(sqd->state); 171 170 } 172 171 173 - static int __io_sq_thread(struct io_ring_ctx *ctx, bool cap_entries) 172 + struct io_sq_time { 173 + bool started; 174 + u64 usec; 175 + }; 176 + 177 + u64 io_sq_cpu_usec(struct task_struct *tsk) 178 + { 179 + u64 utime, stime; 180 + 181 + task_cputime_adjusted(tsk, &utime, &stime); 182 + do_div(stime, 1000); 183 + return stime; 184 + } 185 + 186 + static void io_sq_update_worktime(struct io_sq_data *sqd, struct io_sq_time *ist) 187 + { 188 + if (!ist->started) 189 + return; 190 + ist->started = false; 191 + sqd->work_time += io_sq_cpu_usec(current) - ist->usec; 192 + } 193 + 194 + static void io_sq_start_worktime(struct io_sq_time *ist) 195 + { 196 + if (ist->started) 197 + return; 198 + ist->started = true; 199 + ist->usec = io_sq_cpu_usec(current); 200 + } 201 + 202 + static int __io_sq_thread(struct io_ring_ctx *ctx, struct io_sq_data *sqd, 203 + bool cap_entries, struct io_sq_time *ist) 174 204 { 175 205 unsigned int to_submit; 176 206 int ret = 0; ··· 213 181 214 182 if (to_submit || !wq_list_empty(&ctx->iopoll_list)) { 215 183 const struct cred *creds = NULL; 184 + 185 + io_sq_start_worktime(ist); 216 186 217 187 if (ctx->sq_creds != current_cred()) 218 188 creds = override_creds(ctx->sq_creds); ··· 289 255 return retry_list || !llist_empty(&tctx->task_list); 290 256 } 291 257 292 - static void io_sq_update_worktime(struct io_sq_data *sqd, struct rusage *start) 293 - { 294 - struct rusage end; 295 - 296 - getrusage(current, RUSAGE_SELF, &end); 297 - end.ru_stime.tv_sec -= start->ru_stime.tv_sec; 298 - end.ru_stime.tv_usec -= start->ru_stime.tv_usec; 299 - 300 - sqd->work_time += end.ru_stime.tv_usec + end.ru_stime.tv_sec * 1000000; 301 - } 302 - 303 258 static int io_sq_thread(void *data) 304 259 { 305 260 struct llist_node *retry_list = NULL; 306 261 struct io_sq_data *sqd = data; 307 262 struct io_ring_ctx *ctx; 308 - struct rusage start; 309 263 unsigned long timeout = 0; 310 264 char buf[TASK_COMM_LEN] = {}; 311 265 DEFINE_WAIT(wait); ··· 331 309 mutex_lock(&sqd->lock); 332 310 while (1) { 333 311 bool cap_entries, sqt_spin = false; 312 + struct io_sq_time ist = { }; 334 313 335 314 if (io_sqd_events_pending(sqd) || signal_pending(current)) { 336 315 if (io_sqd_handle_event(sqd)) ··· 340 317 } 341 318 342 319 cap_entries = !list_is_singular(&sqd->ctx_list); 343 - getrusage(current, RUSAGE_SELF, &start); 344 320 list_for_each_entry(ctx, &sqd->ctx_list, sqd_list) { 345 - int ret = __io_sq_thread(ctx, cap_entries); 321 + int ret = __io_sq_thread(ctx, sqd, cap_entries, &ist); 346 322 347 323 if (!sqt_spin && (ret > 0 || !wq_list_empty(&ctx->iopoll_list))) 348 324 sqt_spin = true; ··· 349 327 if (io_sq_tw(&retry_list, IORING_TW_CAP_ENTRIES_VALUE)) 350 328 sqt_spin = true; 351 329 352 - list_for_each_entry(ctx, &sqd->ctx_list, sqd_list) 353 - if (io_napi(ctx)) 330 + list_for_each_entry(ctx, &sqd->ctx_list, sqd_list) { 331 + if (io_napi(ctx)) { 332 + io_sq_start_worktime(&ist); 354 333 io_napi_sqpoll_busy_poll(ctx); 334 + } 335 + } 336 + 337 + io_sq_update_worktime(sqd, &ist); 355 338 356 339 if (sqt_spin || !time_after(jiffies, timeout)) { 357 - if (sqt_spin) { 358 - io_sq_update_worktime(sqd, &start); 340 + if (sqt_spin) 359 341 timeout = jiffies + sqd->sq_thread_idle; 360 - } 361 342 if (unlikely(need_resched())) { 362 343 mutex_unlock(&sqd->lock); 363 344 cond_resched();
+1
io_uring/sqpoll.h
··· 29 29 void io_put_sq_data(struct io_sq_data *sqd); 30 30 void io_sqpoll_wait_sq(struct io_ring_ctx *ctx); 31 31 int io_sqpoll_wq_cpu_affinity(struct io_ring_ctx *ctx, cpumask_var_t mask); 32 + u64 io_sq_cpu_usec(struct task_struct *tsk); 32 33 33 34 static inline struct task_struct *sqpoll_task_locked(struct io_sq_data *sqd) 34 35 {
+1 -1
io_uring/waitid.c
··· 250 250 return -EINVAL; 251 251 252 252 iwa = io_uring_alloc_async_data(NULL, req); 253 - if (!unlikely(iwa)) 253 + if (unlikely(!iwa)) 254 254 return -ENOMEM; 255 255 iwa->req = req; 256 256
+1 -1
kernel/irq/chip.c
··· 1030 1030 void __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, 1031 1031 const char *name) 1032 1032 { 1033 - scoped_irqdesc_get_and_lock(irq, 0) 1033 + scoped_irqdesc_get_and_buslock(irq, 0) 1034 1034 __irq_do_set_handler(scoped_irqdesc, handle, is_chained, name); 1035 1035 } 1036 1036 EXPORT_SYMBOL_GPL(__irq_set_handler);
+2 -2
kernel/irq/manage.c
··· 659 659 660 660 static int __disable_irq_nosync(unsigned int irq) 661 661 { 662 - scoped_irqdesc_get_and_lock(irq, IRQ_GET_DESC_CHECK_GLOBAL) { 662 + scoped_irqdesc_get_and_buslock(irq, IRQ_GET_DESC_CHECK_GLOBAL) { 663 663 __disable_irq(scoped_irqdesc); 664 664 return 0; 665 665 } ··· 789 789 */ 790 790 void enable_irq(unsigned int irq) 791 791 { 792 - scoped_irqdesc_get_and_lock(irq, IRQ_GET_DESC_CHECK_GLOBAL) { 792 + scoped_irqdesc_get_and_buslock(irq, IRQ_GET_DESC_CHECK_GLOBAL) { 793 793 struct irq_desc *desc = scoped_irqdesc; 794 794 795 795 if (WARN(!desc->irq_data.chip, "enable_irq before setup/request_irq: irq %u\n", irq))
+111 -15
kernel/sched/ext.c
··· 67 67 68 68 static struct delayed_work scx_watchdog_work; 69 69 70 - /* for %SCX_KICK_WAIT */ 71 - static unsigned long __percpu *scx_kick_cpus_pnt_seqs; 70 + /* 71 + * For %SCX_KICK_WAIT: Each CPU has a pointer to an array of pick_task sequence 72 + * numbers. The arrays are allocated with kvzalloc() as size can exceed percpu 73 + * allocator limits on large machines. O(nr_cpu_ids^2) allocation, allocated 74 + * lazily when enabling and freed when disabling to avoid waste when sched_ext 75 + * isn't active. 76 + */ 77 + struct scx_kick_pseqs { 78 + struct rcu_head rcu; 79 + unsigned long seqs[]; 80 + }; 81 + 82 + static DEFINE_PER_CPU(struct scx_kick_pseqs __rcu *, scx_kick_pseqs); 72 83 73 84 /* 74 85 * Direct dispatch marker. ··· 791 780 if (rq->scx.flags & SCX_RQ_IN_WAKEUP) 792 781 return; 793 782 783 + /* Don't do anything if there already is a deferred operation. */ 784 + if (rq->scx.flags & SCX_RQ_BAL_CB_PENDING) 785 + return; 786 + 794 787 /* 795 788 * If in balance, the balance callbacks will be called before rq lock is 796 789 * released. Schedule one. 790 + * 791 + * 792 + * We can't directly insert the callback into the 793 + * rq's list: The call can drop its lock and make the pending balance 794 + * callback visible to unrelated code paths that call rq_pin_lock(). 795 + * 796 + * Just let balance_one() know that it must do it itself. 797 797 */ 798 798 if (rq->scx.flags & SCX_RQ_IN_BALANCE) { 799 - queue_balance_callback(rq, &rq->scx.deferred_bal_cb, 800 - deferred_bal_cb_workfn); 799 + rq->scx.flags |= SCX_RQ_BAL_CB_PENDING; 801 800 return; 802 801 } 803 802 ··· 2024 2003 dspc->cursor = 0; 2025 2004 } 2026 2005 2006 + static inline void maybe_queue_balance_callback(struct rq *rq) 2007 + { 2008 + lockdep_assert_rq_held(rq); 2009 + 2010 + if (!(rq->scx.flags & SCX_RQ_BAL_CB_PENDING)) 2011 + return; 2012 + 2013 + queue_balance_callback(rq, &rq->scx.deferred_bal_cb, 2014 + deferred_bal_cb_workfn); 2015 + 2016 + rq->scx.flags &= ~SCX_RQ_BAL_CB_PENDING; 2017 + } 2018 + 2027 2019 static int balance_one(struct rq *rq, struct task_struct *prev) 2028 2020 { 2029 2021 struct scx_sched *sch = scx_root; ··· 2183 2149 } 2184 2150 #endif 2185 2151 rq_repin_lock(rq, rf); 2152 + 2153 + maybe_queue_balance_callback(rq); 2186 2154 2187 2155 return ret; 2188 2156 } ··· 3507 3471 struct scx_dispatch_q *dsq; 3508 3472 int node; 3509 3473 3474 + irq_work_sync(&sch->error_irq_work); 3510 3475 kthread_stop(sch->helper->task); 3476 + 3511 3477 free_percpu(sch->pcpu); 3512 3478 3513 3479 for_each_node_state(node, N_POSSIBLE) ··· 3888 3850 } 3889 3851 } 3890 3852 3853 + static void free_kick_pseqs_rcu(struct rcu_head *rcu) 3854 + { 3855 + struct scx_kick_pseqs *pseqs = container_of(rcu, struct scx_kick_pseqs, rcu); 3856 + 3857 + kvfree(pseqs); 3858 + } 3859 + 3860 + static void free_kick_pseqs(void) 3861 + { 3862 + int cpu; 3863 + 3864 + for_each_possible_cpu(cpu) { 3865 + struct scx_kick_pseqs **pseqs = per_cpu_ptr(&scx_kick_pseqs, cpu); 3866 + struct scx_kick_pseqs *to_free; 3867 + 3868 + to_free = rcu_replace_pointer(*pseqs, NULL, true); 3869 + if (to_free) 3870 + call_rcu(&to_free->rcu, free_kick_pseqs_rcu); 3871 + } 3872 + } 3873 + 3891 3874 static void scx_disable_workfn(struct kthread_work *work) 3892 3875 { 3893 3876 struct scx_sched *sch = container_of(work, struct scx_sched, disable_work); ··· 4045 3986 free_percpu(scx_dsp_ctx); 4046 3987 scx_dsp_ctx = NULL; 4047 3988 scx_dsp_max_batch = 0; 3989 + free_kick_pseqs(); 4048 3990 4049 3991 mutex_unlock(&scx_enable_mutex); 4050 3992 ··· 4408 4348 irq_work_queue(&sch->error_irq_work); 4409 4349 } 4410 4350 4351 + static int alloc_kick_pseqs(void) 4352 + { 4353 + int cpu; 4354 + 4355 + /* 4356 + * Allocate per-CPU arrays sized by nr_cpu_ids. Use kvzalloc as size 4357 + * can exceed percpu allocator limits on large machines. 4358 + */ 4359 + for_each_possible_cpu(cpu) { 4360 + struct scx_kick_pseqs **pseqs = per_cpu_ptr(&scx_kick_pseqs, cpu); 4361 + struct scx_kick_pseqs *new_pseqs; 4362 + 4363 + WARN_ON_ONCE(rcu_access_pointer(*pseqs)); 4364 + 4365 + new_pseqs = kvzalloc_node(struct_size(new_pseqs, seqs, nr_cpu_ids), 4366 + GFP_KERNEL, cpu_to_node(cpu)); 4367 + if (!new_pseqs) { 4368 + free_kick_pseqs(); 4369 + return -ENOMEM; 4370 + } 4371 + 4372 + rcu_assign_pointer(*pseqs, new_pseqs); 4373 + } 4374 + 4375 + return 0; 4376 + } 4377 + 4411 4378 static struct scx_sched *scx_alloc_and_add_sched(struct sched_ext_ops *ops) 4412 4379 { 4413 4380 struct scx_sched *sch; ··· 4582 4495 goto err_unlock; 4583 4496 } 4584 4497 4498 + ret = alloc_kick_pseqs(); 4499 + if (ret) 4500 + goto err_unlock; 4501 + 4585 4502 sch = scx_alloc_and_add_sched(ops); 4586 4503 if (IS_ERR(sch)) { 4587 4504 ret = PTR_ERR(sch); 4588 - goto err_unlock; 4505 + goto err_free_pseqs; 4589 4506 } 4590 4507 4591 4508 /* ··· 4792 4701 4793 4702 return 0; 4794 4703 4704 + err_free_pseqs: 4705 + free_kick_pseqs(); 4795 4706 err_unlock: 4796 4707 mutex_unlock(&scx_enable_mutex); 4797 4708 return ret; ··· 5175 5082 { 5176 5083 struct rq *this_rq = this_rq(); 5177 5084 struct scx_rq *this_scx = &this_rq->scx; 5178 - unsigned long *pseqs = this_cpu_ptr(scx_kick_cpus_pnt_seqs); 5085 + struct scx_kick_pseqs __rcu *pseqs_pcpu = __this_cpu_read(scx_kick_pseqs); 5179 5086 bool should_wait = false; 5087 + unsigned long *pseqs; 5180 5088 s32 cpu; 5089 + 5090 + if (unlikely(!pseqs_pcpu)) { 5091 + pr_warn_once("kick_cpus_irq_workfn() called with NULL scx_kick_pseqs"); 5092 + return; 5093 + } 5094 + 5095 + pseqs = rcu_dereference_bh(pseqs_pcpu)->seqs; 5181 5096 5182 5097 for_each_cpu(cpu, this_scx->cpus_to_kick) { 5183 5098 should_wait |= kick_one_cpu(cpu, this_rq, pseqs); ··· 5308 5207 SCX_TG_ONLINE); 5309 5208 5310 5209 scx_idle_init_masks(); 5311 - 5312 - scx_kick_cpus_pnt_seqs = 5313 - __alloc_percpu(sizeof(scx_kick_cpus_pnt_seqs[0]) * nr_cpu_ids, 5314 - __alignof__(scx_kick_cpus_pnt_seqs[0])); 5315 - BUG_ON(!scx_kick_cpus_pnt_seqs); 5316 5210 5317 5211 for_each_possible_cpu(cpu) { 5318 5212 struct rq *rq = cpu_rq(cpu); ··· 5784 5688 BTF_ID_FLAGS(func, scx_bpf_dispatch_nr_slots) 5785 5689 BTF_ID_FLAGS(func, scx_bpf_dispatch_cancel) 5786 5690 BTF_ID_FLAGS(func, scx_bpf_dsq_move_to_local) 5787 - BTF_ID_FLAGS(func, scx_bpf_dsq_move_set_slice) 5788 - BTF_ID_FLAGS(func, scx_bpf_dsq_move_set_vtime) 5691 + BTF_ID_FLAGS(func, scx_bpf_dsq_move_set_slice, KF_RCU) 5692 + BTF_ID_FLAGS(func, scx_bpf_dsq_move_set_vtime, KF_RCU) 5789 5693 BTF_ID_FLAGS(func, scx_bpf_dsq_move, KF_RCU) 5790 5694 BTF_ID_FLAGS(func, scx_bpf_dsq_move_vtime, KF_RCU) 5791 5695 BTF_KFUNCS_END(scx_kfunc_ids_dispatch) ··· 5916 5820 5917 5821 BTF_KFUNCS_START(scx_kfunc_ids_unlocked) 5918 5822 BTF_ID_FLAGS(func, scx_bpf_create_dsq, KF_SLEEPABLE) 5919 - BTF_ID_FLAGS(func, scx_bpf_dsq_move_set_slice) 5920 - BTF_ID_FLAGS(func, scx_bpf_dsq_move_set_vtime) 5823 + BTF_ID_FLAGS(func, scx_bpf_dsq_move_set_slice, KF_RCU) 5824 + BTF_ID_FLAGS(func, scx_bpf_dsq_move_set_vtime, KF_RCU) 5921 5825 BTF_ID_FLAGS(func, scx_bpf_dsq_move, KF_RCU) 5922 5826 BTF_ID_FLAGS(func, scx_bpf_dsq_move_vtime, KF_RCU) 5923 5827 BTF_KFUNCS_END(scx_kfunc_ids_unlocked)
+12
kernel/sched/fair.c
··· 6437 6437 6438 6438 cfs_rq->throttle_count = pcfs_rq->throttle_count; 6439 6439 cfs_rq->throttled_clock_pelt = rq_clock_pelt(cpu_rq(cpu)); 6440 + 6441 + /* 6442 + * It is not enough to sync the "pelt_clock_throttled" indicator 6443 + * with the parent cfs_rq when the hierarchy is not queued. 6444 + * Always join a throttled hierarchy with PELT clock throttled 6445 + * and leaf it to the first enqueue, or distribution to 6446 + * unthrottle the PELT clock. 6447 + */ 6448 + if (cfs_rq->throttle_count) 6449 + cfs_rq->pelt_clock_throttled = 1; 6440 6450 } 6441 6451 6442 6452 /* conditionally throttle active cfs_rq's from put_prev_entity() */ ··· 13197 13187 if (!cfs_rq_pelt_clock_throttled(cfs_rq)) 13198 13188 list_add_leaf_cfs_rq(cfs_rq); 13199 13189 } 13190 + 13191 + assert_list_leaf_cfs_rq(rq_of(cfs_rq)); 13200 13192 } 13201 13193 #else /* !CONFIG_FAIR_GROUP_SCHED: */ 13202 13194 static void propagate_entity_cfs_rq(struct sched_entity *se) { }
+1 -2
kernel/sched/sched.h
··· 784 784 SCX_RQ_BAL_KEEP = 1 << 3, /* balance decided to keep current */ 785 785 SCX_RQ_BYPASSING = 1 << 4, 786 786 SCX_RQ_CLK_VALID = 1 << 5, /* RQ clock is fresh and valid */ 787 + SCX_RQ_BAL_CB_PENDING = 1 << 6, /* must queue a cb after dispatching */ 787 788 788 789 SCX_RQ_IN_WAKEUP = 1 << 16, 789 790 SCX_RQ_IN_BALANCE = 1 << 17, ··· 3741 3740 struct mm_struct *mm) 3742 3741 { 3743 3742 struct mm_cid __percpu *pcpu_cid = mm->pcpu_cid; 3744 - struct cpumask *cpumask; 3745 3743 int cid; 3746 3744 3747 3745 lockdep_assert_rq_held(rq); 3748 - cpumask = mm_cidmask(mm); 3749 3746 cid = __this_cpu_read(pcpu_cid->cid); 3750 3747 if (mm_cid_is_valid(cid)) { 3751 3748 mm_cid_snapshot_time(rq, mm);
+1 -1
kernel/time/timekeeping.c
··· 3070 3070 return -ENOMEM; 3071 3071 } 3072 3072 3073 - for (int i = 0; i <= MAX_AUX_CLOCKS; i++) { 3073 + for (int i = 0; i < MAX_AUX_CLOCKS; i++) { 3074 3074 char id[2] = { [0] = '0' + i, }; 3075 3075 struct kobject *clk = kobject_create_and_add(id, auxo); 3076 3076
+1
kernel/trace/rv/monitors/pagefault/Kconfig
··· 5 5 select RV_LTL_MONITOR 6 6 depends on RV_MON_RTAPP 7 7 depends on X86 || RISCV 8 + depends on MMU 8 9 default y 9 10 select LTL_MON_EVENTS_ID 10 11 bool "pagefault monitor"
+6 -6
kernel/trace/rv/rv.c
··· 501 501 502 502 list_for_each_entry_continue(mon, &rv_monitors_list, list) { 503 503 if (mon->enabled) 504 - return mon; 504 + return &mon->list; 505 505 } 506 506 507 507 return NULL; ··· 509 509 510 510 static void *enabled_monitors_start(struct seq_file *m, loff_t *pos) 511 511 { 512 - struct rv_monitor *mon; 512 + struct list_head *head; 513 513 loff_t l; 514 514 515 515 mutex_lock(&rv_interface_lock); ··· 517 517 if (list_empty(&rv_monitors_list)) 518 518 return NULL; 519 519 520 - mon = list_entry(&rv_monitors_list, struct rv_monitor, list); 520 + head = &rv_monitors_list; 521 521 522 522 for (l = 0; l <= *pos; ) { 523 - mon = enabled_monitors_next(m, mon, &l); 524 - if (!mon) 523 + head = enabled_monitors_next(m, head, &l); 524 + if (!head) 525 525 break; 526 526 } 527 527 528 - return mon; 528 + return head; 529 529 } 530 530 531 531 /*
+1 -1
lib/crypto/Kconfig
··· 97 97 98 98 config CRYPTO_LIB_POLY1305_ARCH 99 99 bool 100 - depends on CRYPTO_LIB_POLY1305 && !UML 100 + depends on CRYPTO_LIB_POLY1305 && !UML && !KMSAN 101 101 default y if ARM 102 102 default y if ARM64 && KERNEL_MODE_NEON 103 103 default y if MIPS
+21 -10
mm/slub.c
··· 2052 2052 } 2053 2053 } 2054 2054 2055 - static inline void mark_failed_objexts_alloc(struct slab *slab) 2055 + static inline bool mark_failed_objexts_alloc(struct slab *slab) 2056 2056 { 2057 - slab->obj_exts = OBJEXTS_ALLOC_FAIL; 2057 + return cmpxchg(&slab->obj_exts, 0, OBJEXTS_ALLOC_FAIL) == 0; 2058 2058 } 2059 2059 2060 2060 static inline void handle_failed_objexts_alloc(unsigned long obj_exts, ··· 2076 2076 #else /* CONFIG_MEM_ALLOC_PROFILING_DEBUG */ 2077 2077 2078 2078 static inline void mark_objexts_empty(struct slabobj_ext *obj_exts) {} 2079 - static inline void mark_failed_objexts_alloc(struct slab *slab) {} 2079 + static inline bool mark_failed_objexts_alloc(struct slab *slab) { return false; } 2080 2080 static inline void handle_failed_objexts_alloc(unsigned long obj_exts, 2081 2081 struct slabobj_ext *vec, unsigned int objects) {} 2082 2082 ··· 2124 2124 slab_nid(slab)); 2125 2125 } 2126 2126 if (!vec) { 2127 - /* Mark vectors which failed to allocate */ 2128 - mark_failed_objexts_alloc(slab); 2127 + /* 2128 + * Try to mark vectors which failed to allocate. 2129 + * If this operation fails, there may be a racing process 2130 + * that has already completed the allocation. 2131 + */ 2132 + if (!mark_failed_objexts_alloc(slab) && 2133 + slab_obj_exts(slab)) 2134 + return 0; 2129 2135 2130 2136 return -ENOMEM; 2131 2137 } ··· 2142 2136 #ifdef CONFIG_MEMCG 2143 2137 new_exts |= MEMCG_DATA_OBJEXTS; 2144 2138 #endif 2139 + retry: 2145 2140 old_exts = READ_ONCE(slab->obj_exts); 2146 2141 handle_failed_objexts_alloc(old_exts, vec, objects); 2147 2142 if (new_slab) { ··· 2152 2145 * be simply assigned. 2153 2146 */ 2154 2147 slab->obj_exts = new_exts; 2155 - } else if ((old_exts & ~OBJEXTS_FLAGS_MASK) || 2156 - cmpxchg(&slab->obj_exts, old_exts, new_exts) != old_exts) { 2148 + } else if (old_exts & ~OBJEXTS_FLAGS_MASK) { 2157 2149 /* 2158 2150 * If the slab is already in use, somebody can allocate and 2159 2151 * assign slabobj_exts in parallel. In this case the existing ··· 2164 2158 else 2165 2159 kfree(vec); 2166 2160 return 0; 2161 + } else if (cmpxchg(&slab->obj_exts, old_exts, new_exts) != old_exts) { 2162 + /* Retry if a racing thread changed slab->obj_exts from under us. */ 2163 + goto retry; 2167 2164 } 2168 2165 2169 2166 if (allow_spin) ··· 3428 3419 3429 3420 if (!allow_spin && !spin_trylock_irqsave(&n->list_lock, flags)) { 3430 3421 /* Unlucky, discard newly allocated slab */ 3431 - slab->frozen = 1; 3432 3422 defer_deactivate_slab(slab, NULL); 3433 3423 return NULL; 3434 3424 } ··· 6476 6468 struct slab *slab = container_of(pos, struct slab, llnode); 6477 6469 6478 6470 #ifdef CONFIG_SLUB_TINY 6479 - discard_slab(slab->slab_cache, slab); 6471 + free_slab(slab->slab_cache, slab); 6480 6472 #else 6481 - deactivate_slab(slab->slab_cache, slab, slab->flush_freelist); 6473 + if (slab->frozen) 6474 + deactivate_slab(slab->slab_cache, slab, slab->flush_freelist); 6475 + else 6476 + free_slab(slab->slab_cache, slab); 6482 6477 #endif 6483 6478 } 6484 6479 }
+12 -2
net/batman-adv/originator.c
··· 763 763 bat_priv = netdev_priv(mesh_iface); 764 764 765 765 primary_if = batadv_primary_if_get_selected(bat_priv); 766 - if (!primary_if || primary_if->if_status != BATADV_IF_ACTIVE) { 766 + if (!primary_if) { 767 767 ret = -ENOENT; 768 768 goto out_put_mesh_iface; 769 + } 770 + 771 + if (primary_if->if_status != BATADV_IF_ACTIVE) { 772 + ret = -ENOENT; 773 + goto out_put_primary_if; 769 774 } 770 775 771 776 hard_iface = batadv_netlink_get_hardif(bat_priv, cb); ··· 1332 1327 bat_priv = netdev_priv(mesh_iface); 1333 1328 1334 1329 primary_if = batadv_primary_if_get_selected(bat_priv); 1335 - if (!primary_if || primary_if->if_status != BATADV_IF_ACTIVE) { 1330 + if (!primary_if) { 1336 1331 ret = -ENOENT; 1337 1332 goto out_put_mesh_iface; 1333 + } 1334 + 1335 + if (primary_if->if_status != BATADV_IF_ACTIVE) { 1336 + ret = -ENOENT; 1337 + goto out_put_primary_if; 1338 1338 } 1339 1339 1340 1340 hard_iface = batadv_netlink_get_hardif(bat_priv, cb);
+7
net/bluetooth/hci_conn.c
··· 843 843 if (bis) 844 844 return; 845 845 846 + bis = hci_conn_hash_lookup_big_state(hdev, 847 + conn->iso_qos.bcast.big, 848 + BT_OPEN, 849 + HCI_ROLE_MASTER); 850 + if (bis) 851 + return; 852 + 846 853 hci_le_terminate_big(hdev, conn); 847 854 } else { 848 855 hci_le_big_terminate(hdev, conn->iso_qos.bcast.big,
+9 -2
net/bluetooth/hci_event.c
··· 1607 1607 1608 1608 hci_dev_set_flag(hdev, HCI_LE_ADV); 1609 1609 1610 - if (adv && !adv->periodic) 1610 + if (adv) 1611 1611 adv->enabled = true; 1612 + else if (!set->handle) 1613 + hci_dev_set_flag(hdev, HCI_LE_ADV_0); 1612 1614 1613 1615 conn = hci_lookup_le_connect(hdev); 1614 1616 if (conn) ··· 1621 1619 if (cp->num_of_sets) { 1622 1620 if (adv) 1623 1621 adv->enabled = false; 1622 + else if (!set->handle) 1623 + hci_dev_clear_flag(hdev, HCI_LE_ADV_0); 1624 1624 1625 1625 /* If just one instance was disabled check if there are 1626 1626 * any other instance enabled before clearing HCI_LE_ADV ··· 3963 3959 hci_dev_set_flag(hdev, HCI_LE_PER_ADV); 3964 3960 3965 3961 if (adv) 3966 - adv->enabled = true; 3962 + adv->periodic_enabled = true; 3967 3963 } else { 3964 + if (adv) 3965 + adv->periodic_enabled = false; 3966 + 3968 3967 /* If just one instance was disabled check if there are 3969 3968 * any other instance enabled before clearing HCI_LE_PER_ADV. 3970 3969 * The current periodic adv instance will be marked as
+14 -9
net/bluetooth/hci_sync.c
··· 863 863 { 864 864 struct hci_cmd_sync_work_entry *entry; 865 865 866 - entry = hci_cmd_sync_lookup_entry(hdev, func, data, destroy); 867 - if (!entry) 868 - return false; 866 + mutex_lock(&hdev->cmd_sync_work_lock); 869 867 870 - hci_cmd_sync_cancel_entry(hdev, entry); 868 + entry = _hci_cmd_sync_lookup_entry(hdev, func, data, destroy); 869 + if (!entry) { 870 + mutex_unlock(&hdev->cmd_sync_work_lock); 871 + return false; 872 + } 873 + 874 + _hci_cmd_sync_cancel_entry(hdev, entry, -ECANCELED); 875 + 876 + mutex_unlock(&hdev->cmd_sync_work_lock); 871 877 872 878 return true; 873 879 } ··· 1607 1601 1608 1602 /* If periodic advertising already disabled there is nothing to do. */ 1609 1603 adv = hci_find_adv_instance(hdev, instance); 1610 - if (!adv || !adv->periodic || !adv->enabled) 1604 + if (!adv || !adv->periodic_enabled) 1611 1605 return 0; 1612 1606 1613 1607 memset(&cp, 0, sizeof(cp)); ··· 1672 1666 1673 1667 /* If periodic advertising already enabled there is nothing to do. */ 1674 1668 adv = hci_find_adv_instance(hdev, instance); 1675 - if (adv && adv->periodic && adv->enabled) 1669 + if (adv && adv->periodic_enabled) 1676 1670 return 0; 1677 1671 1678 1672 memset(&cp, 0, sizeof(cp)); ··· 2606 2600 /* If current advertising instance is set to instance 0x00 2607 2601 * then we need to re-enable it. 2608 2602 */ 2609 - if (!hdev->cur_adv_instance) 2610 - err = hci_enable_ext_advertising_sync(hdev, 2611 - hdev->cur_adv_instance); 2603 + if (hci_dev_test_and_clear_flag(hdev, HCI_LE_ADV_0)) 2604 + err = hci_enable_ext_advertising_sync(hdev, 0x00); 2612 2605 } else { 2613 2606 /* Schedule for most recent instance to be restarted and begin 2614 2607 * the software rotation loop
+8 -2
net/bluetooth/iso.c
··· 2032 2032 */ 2033 2033 if (!bacmp(&hcon->dst, BDADDR_ANY)) { 2034 2034 bacpy(&hcon->dst, &iso_pi(parent)->dst); 2035 - hcon->dst_type = iso_pi(parent)->dst_type; 2035 + hcon->dst_type = le_addr_type(iso_pi(parent)->dst_type); 2036 2036 } 2037 2037 2038 2038 if (test_bit(HCI_CONN_PA_SYNC, &hcon->flags)) { ··· 2046 2046 } 2047 2047 2048 2048 bacpy(&iso_pi(sk)->dst, &hcon->dst); 2049 - iso_pi(sk)->dst_type = hcon->dst_type; 2049 + 2050 + /* Convert from HCI to three-value type */ 2051 + if (hcon->dst_type == ADDR_LE_DEV_PUBLIC) 2052 + iso_pi(sk)->dst_type = BDADDR_LE_PUBLIC; 2053 + else 2054 + iso_pi(sk)->dst_type = BDADDR_LE_RANDOM; 2055 + 2050 2056 iso_pi(sk)->sync_handle = iso_pi(parent)->sync_handle; 2051 2057 memcpy(iso_pi(sk)->base, iso_pi(parent)->base, iso_pi(parent)->base_len); 2052 2058 iso_pi(sk)->base_len = iso_pi(parent)->base_len;
+2 -2
net/bluetooth/l2cap_core.c
··· 282 282 if (!delayed_work_pending(&chan->monitor_timer) && 283 283 chan->retrans_timeout) { 284 284 l2cap_set_timer(chan, &chan->retrans_timer, 285 - secs_to_jiffies(chan->retrans_timeout)); 285 + msecs_to_jiffies(chan->retrans_timeout)); 286 286 } 287 287 } 288 288 ··· 291 291 __clear_retrans_timer(chan); 292 292 if (chan->monitor_timeout) { 293 293 l2cap_set_timer(chan, &chan->monitor_timer, 294 - secs_to_jiffies(chan->monitor_timeout)); 294 + msecs_to_jiffies(chan->monitor_timeout)); 295 295 } 296 296 } 297 297
+15 -11
net/bluetooth/mgmt.c
··· 2175 2175 sk = cmd->sk; 2176 2176 2177 2177 if (status) { 2178 + mgmt_cmd_status(cmd->sk, hdev->id, MGMT_OP_SET_MESH_RECEIVER, 2179 + status); 2178 2180 mgmt_pending_foreach(MGMT_OP_SET_MESH_RECEIVER, hdev, true, 2179 2181 cmd_status_rsp, &status); 2180 - return; 2182 + goto done; 2181 2183 } 2182 2184 2183 - mgmt_pending_remove(cmd); 2184 2185 mgmt_cmd_complete(sk, hdev->id, MGMT_OP_SET_MESH_RECEIVER, 0, NULL, 0); 2186 + 2187 + done: 2188 + mgmt_pending_free(cmd); 2185 2189 } 2186 2190 2187 2191 static int set_mesh_sync(struct hci_dev *hdev, void *data) 2188 2192 { 2189 2193 struct mgmt_pending_cmd *cmd = data; 2190 - struct mgmt_cp_set_mesh cp; 2194 + DEFINE_FLEX(struct mgmt_cp_set_mesh, cp, ad_types, num_ad_types, 2195 + sizeof(hdev->mesh_ad_types)); 2191 2196 size_t len; 2192 2197 2193 2198 mutex_lock(&hdev->mgmt_pending_lock); ··· 2202 2197 return -ECANCELED; 2203 2198 } 2204 2199 2205 - memcpy(&cp, cmd->param, sizeof(cp)); 2200 + len = cmd->param_len; 2201 + memcpy(cp, cmd->param, min(__struct_size(cp), len)); 2206 2202 2207 2203 mutex_unlock(&hdev->mgmt_pending_lock); 2208 2204 2209 - len = cmd->param_len; 2210 - 2211 2205 memset(hdev->mesh_ad_types, 0, sizeof(hdev->mesh_ad_types)); 2212 2206 2213 - if (cp.enable) 2207 + if (cp->enable) 2214 2208 hci_dev_set_flag(hdev, HCI_MESH); 2215 2209 else 2216 2210 hci_dev_clear_flag(hdev, HCI_MESH); 2217 2211 2218 - hdev->le_scan_interval = __le16_to_cpu(cp.period); 2219 - hdev->le_scan_window = __le16_to_cpu(cp.window); 2212 + hdev->le_scan_interval = __le16_to_cpu(cp->period); 2213 + hdev->le_scan_window = __le16_to_cpu(cp->window); 2220 2214 2221 - len -= sizeof(cp); 2215 + len -= sizeof(struct mgmt_cp_set_mesh); 2222 2216 2223 2217 /* If filters don't fit, forward all adv pkts */ 2224 2218 if (len <= sizeof(hdev->mesh_ad_types)) 2225 - memcpy(hdev->mesh_ad_types, cp.ad_types, len); 2219 + memcpy(hdev->mesh_ad_types, cp->ad_types, len); 2226 2220 2227 2221 hci_update_passive_scan_sync(hdev); 2228 2222 return 0;
+11 -15
net/bluetooth/rfcomm/tty.c
··· 643 643 tty_port_tty_hangup(&dev->port, true); 644 644 645 645 dev->modem_status = 646 - ((v24_sig & RFCOMM_V24_RTC) ? (TIOCM_DSR | TIOCM_DTR) : 0) | 647 - ((v24_sig & RFCOMM_V24_RTR) ? (TIOCM_RTS | TIOCM_CTS) : 0) | 646 + ((v24_sig & RFCOMM_V24_RTC) ? TIOCM_DSR : 0) | 647 + ((v24_sig & RFCOMM_V24_RTR) ? TIOCM_CTS : 0) | 648 648 ((v24_sig & RFCOMM_V24_IC) ? TIOCM_RI : 0) | 649 649 ((v24_sig & RFCOMM_V24_DV) ? TIOCM_CD : 0); 650 650 } ··· 1055 1055 static int rfcomm_tty_tiocmget(struct tty_struct *tty) 1056 1056 { 1057 1057 struct rfcomm_dev *dev = tty->driver_data; 1058 + struct rfcomm_dlc *dlc = dev->dlc; 1059 + u8 v24_sig; 1058 1060 1059 1061 BT_DBG("tty %p dev %p", tty, dev); 1060 1062 1061 - return dev->modem_status; 1063 + rfcomm_dlc_get_modem_status(dlc, &v24_sig); 1064 + 1065 + return (v24_sig & (TIOCM_DTR | TIOCM_RTS)) | dev->modem_status; 1062 1066 } 1063 1067 1064 1068 static int rfcomm_tty_tiocmset(struct tty_struct *tty, unsigned int set, unsigned int clear) ··· 1075 1071 1076 1072 rfcomm_dlc_get_modem_status(dlc, &v24_sig); 1077 1073 1078 - if (set & TIOCM_DSR || set & TIOCM_DTR) 1074 + if (set & TIOCM_DTR) 1079 1075 v24_sig |= RFCOMM_V24_RTC; 1080 - if (set & TIOCM_RTS || set & TIOCM_CTS) 1076 + if (set & TIOCM_RTS) 1081 1077 v24_sig |= RFCOMM_V24_RTR; 1082 - if (set & TIOCM_RI) 1083 - v24_sig |= RFCOMM_V24_IC; 1084 - if (set & TIOCM_CD) 1085 - v24_sig |= RFCOMM_V24_DV; 1086 1078 1087 - if (clear & TIOCM_DSR || clear & TIOCM_DTR) 1079 + if (clear & TIOCM_DTR) 1088 1080 v24_sig &= ~RFCOMM_V24_RTC; 1089 - if (clear & TIOCM_RTS || clear & TIOCM_CTS) 1081 + if (clear & TIOCM_RTS) 1090 1082 v24_sig &= ~RFCOMM_V24_RTR; 1091 - if (clear & TIOCM_RI) 1092 - v24_sig &= ~RFCOMM_V24_IC; 1093 - if (clear & TIOCM_CD) 1094 - v24_sig &= ~RFCOMM_V24_DV; 1095 1083 1096 1084 rfcomm_dlc_set_modem_status(dlc, v24_sig); 1097 1085
+24 -3
net/core/devmem.c
··· 17 17 #include <net/page_pool/helpers.h> 18 18 #include <net/page_pool/memory_provider.h> 19 19 #include <net/sock.h> 20 + #include <net/tcp.h> 20 21 #include <trace/events/page_pool.h> 21 22 22 23 #include "devmem.h" ··· 358 357 unsigned int dmabuf_id) 359 358 { 360 359 struct net_devmem_dmabuf_binding *binding; 361 - struct dst_entry *dst = __sk_dst_get(sk); 360 + struct net_device *dst_dev; 361 + struct dst_entry *dst; 362 362 int err = 0; 363 363 364 364 binding = net_devmem_lookup_dmabuf(dmabuf_id); ··· 368 366 goto out_err; 369 367 } 370 368 369 + rcu_read_lock(); 370 + dst = __sk_dst_get(sk); 371 + /* If dst is NULL (route expired), attempt to rebuild it. */ 372 + if (unlikely(!dst)) { 373 + if (inet_csk(sk)->icsk_af_ops->rebuild_header(sk)) { 374 + err = -EHOSTUNREACH; 375 + goto out_unlock; 376 + } 377 + dst = __sk_dst_get(sk); 378 + if (unlikely(!dst)) { 379 + err = -ENODEV; 380 + goto out_unlock; 381 + } 382 + } 383 + 371 384 /* The dma-addrs in this binding are only reachable to the corresponding 372 385 * net_device. 373 386 */ 374 - if (!dst || !dst->dev || dst->dev->ifindex != binding->dev->ifindex) { 387 + dst_dev = dst_dev_rcu(dst); 388 + if (unlikely(!dst_dev) || unlikely(dst_dev != binding->dev)) { 375 389 err = -ENODEV; 376 - goto out_err; 390 + goto out_unlock; 377 391 } 378 392 393 + rcu_read_unlock(); 379 394 return binding; 380 395 396 + out_unlock: 397 + rcu_read_unlock(); 381 398 out_err: 382 399 if (binding) 383 400 net_devmem_dmabuf_binding_put(binding);
+14 -7
net/ipv4/tcp_input.c
··· 891 891 } 892 892 } 893 893 894 - void tcp_rcvbuf_grow(struct sock *sk) 894 + void tcp_rcvbuf_grow(struct sock *sk, u32 newval) 895 895 { 896 896 const struct net *net = sock_net(sk); 897 897 struct tcp_sock *tp = tcp_sk(sk); 898 - int rcvwin, rcvbuf, cap; 898 + u32 rcvwin, rcvbuf, cap, oldval; 899 + u64 grow; 900 + 901 + oldval = tp->rcvq_space.space; 902 + tp->rcvq_space.space = newval; 899 903 900 904 if (!READ_ONCE(net->ipv4.sysctl_tcp_moderate_rcvbuf) || 901 905 (sk->sk_userlocks & SOCK_RCVBUF_LOCK)) 902 906 return; 903 907 908 + /* DRS is always one RTT late. */ 909 + rcvwin = newval << 1; 910 + 904 911 /* slow start: allow the sender to double its rate. */ 905 - rcvwin = tp->rcvq_space.space << 1; 912 + grow = (u64)rcvwin * (newval - oldval); 913 + do_div(grow, oldval); 914 + rcvwin += grow << 1; 906 915 907 916 if (!RB_EMPTY_ROOT(&tp->out_of_order_queue)) 908 917 rcvwin += TCP_SKB_CB(tp->ooo_last_skb)->end_seq - tp->rcv_nxt; ··· 958 949 959 950 trace_tcp_rcvbuf_grow(sk, time); 960 951 961 - tp->rcvq_space.space = copied; 962 - 963 - tcp_rcvbuf_grow(sk); 952 + tcp_rcvbuf_grow(sk, copied); 964 953 965 954 new_measure: 966 955 tp->rcvq_space.seq = tp->copied_seq; ··· 5283 5276 } 5284 5277 /* do not grow rcvbuf for not-yet-accepted or orphaned sockets. */ 5285 5278 if (sk->sk_socket) 5286 - tcp_rcvbuf_grow(sk); 5279 + tcp_rcvbuf_grow(sk, tp->rcvq_space.space); 5287 5280 } 5288 5281 5289 5282 static int __must_check tcp_queue_rcv(struct sock *sk, struct sk_buff *skb,
+3
net/mac80211/cfg.c
··· 1876 1876 link_conf->nontransmitted = false; 1877 1877 link_conf->ema_ap = false; 1878 1878 link_conf->bssid_indicator = 0; 1879 + link_conf->fils_discovery.min_interval = 0; 1880 + link_conf->fils_discovery.max_interval = 0; 1881 + link_conf->unsol_bcast_probe_resp_interval = 0; 1879 1882 1880 1883 __sta_info_flush(sdata, true, link_id, NULL); 1881 1884
+8 -3
net/mac80211/key.c
··· 508 508 ret = ieee80211_key_enable_hw_accel(new); 509 509 } 510 510 } else { 511 - if (!new->local->wowlan) 511 + if (!new->local->wowlan) { 512 512 ret = ieee80211_key_enable_hw_accel(new); 513 - else if (link_id < 0 || !sdata->vif.active_links || 514 - BIT(link_id) & sdata->vif.active_links) 513 + } else if (link_id < 0 || !sdata->vif.active_links || 514 + BIT(link_id) & sdata->vif.active_links) { 515 515 new->flags |= KEY_FLAG_UPLOADED_TO_HARDWARE; 516 + if (!(new->conf.flags & (IEEE80211_KEY_FLAG_GENERATE_MMIC | 517 + IEEE80211_KEY_FLAG_PUT_MIC_SPACE | 518 + IEEE80211_KEY_FLAG_RESERVE_TAILROOM))) 519 + decrease_tailroom_need_count(sdata, 1); 520 + } 516 521 } 517 522 518 523 if (ret)
+1
net/mptcp/mib.c
··· 85 85 SNMP_MIB_ITEM("DssFallback", MPTCP_MIB_DSSFALLBACK), 86 86 SNMP_MIB_ITEM("SimultConnectFallback", MPTCP_MIB_SIMULTCONNFALLBACK), 87 87 SNMP_MIB_ITEM("FallbackFailed", MPTCP_MIB_FALLBACKFAILED), 88 + SNMP_MIB_ITEM("WinProbe", MPTCP_MIB_WINPROBE), 88 89 }; 89 90 90 91 /* mptcp_mib_alloc - allocate percpu mib counters
+1
net/mptcp/mib.h
··· 88 88 MPTCP_MIB_DSSFALLBACK, /* Bad or missing DSS */ 89 89 MPTCP_MIB_SIMULTCONNFALLBACK, /* Simultaneous connect */ 90 90 MPTCP_MIB_FALLBACKFAILED, /* Can't fallback due to msk status */ 91 + MPTCP_MIB_WINPROBE, /* MPTCP-level zero window probe */ 91 92 __MPTCP_MIB_MAX 92 93 }; 93 94
+53 -30
net/mptcp/protocol.c
··· 194 194 * - mptcp does not maintain a msk-level window clamp 195 195 * - returns true when the receive buffer is actually updated 196 196 */ 197 - static bool mptcp_rcvbuf_grow(struct sock *sk) 197 + static bool mptcp_rcvbuf_grow(struct sock *sk, u32 newval) 198 198 { 199 199 struct mptcp_sock *msk = mptcp_sk(sk); 200 200 const struct net *net = sock_net(sk); 201 - int rcvwin, rcvbuf, cap; 201 + u32 rcvwin, rcvbuf, cap, oldval; 202 + u64 grow; 202 203 204 + oldval = msk->rcvq_space.space; 205 + msk->rcvq_space.space = newval; 203 206 if (!READ_ONCE(net->ipv4.sysctl_tcp_moderate_rcvbuf) || 204 207 (sk->sk_userlocks & SOCK_RCVBUF_LOCK)) 205 208 return false; 206 209 207 - rcvwin = msk->rcvq_space.space << 1; 210 + /* DRS is always one RTT late. */ 211 + rcvwin = newval << 1; 212 + 213 + /* slow start: allow the sender to double its rate. */ 214 + grow = (u64)rcvwin * (newval - oldval); 215 + do_div(grow, oldval); 216 + rcvwin += grow << 1; 208 217 209 218 if (!RB_EMPTY_ROOT(&msk->out_of_order_queue)) 210 219 rcvwin += MPTCP_SKB_CB(msk->ooo_last_skb)->end_seq - msk->ack_seq; ··· 343 334 skb_set_owner_r(skb, sk); 344 335 /* do not grow rcvbuf for not-yet-accepted or orphaned sockets. */ 345 336 if (sk->sk_socket) 346 - mptcp_rcvbuf_grow(sk); 337 + mptcp_rcvbuf_grow(sk, msk->rcvq_space.space); 347 338 } 348 339 349 340 static void mptcp_init_skb(struct sock *ssk, struct sk_buff *skb, int offset, ··· 1007 998 if (WARN_ON_ONCE(!msk->recovery)) 1008 999 break; 1009 1000 1010 - WRITE_ONCE(msk->first_pending, mptcp_send_next(sk)); 1001 + msk->first_pending = mptcp_send_next(sk); 1011 1002 } 1012 1003 1013 1004 dfrag_clear(sk, dfrag); ··· 1300 1291 if (copy == 0) { 1301 1292 u64 snd_una = READ_ONCE(msk->snd_una); 1302 1293 1303 - if (snd_una != msk->snd_nxt || tcp_write_queue_tail(ssk)) { 1294 + /* No need for zero probe if there are any data pending 1295 + * either at the msk or ssk level; skb is the current write 1296 + * queue tail and can be empty at this point. 1297 + */ 1298 + if (snd_una != msk->snd_nxt || skb->len || 1299 + skb != tcp_send_head(ssk)) { 1304 1300 tcp_remove_empty_skb(ssk); 1305 1301 return 0; 1306 1302 } ··· 1356 1342 mpext->dsn64); 1357 1343 1358 1344 if (zero_window_probe) { 1345 + MPTCP_INC_STATS(sock_net(ssk), MPTCP_MIB_WINPROBE); 1359 1346 mptcp_subflow_ctx(ssk)->rel_write_seq += copy; 1360 1347 mpext->frozen = 1; 1361 1348 if (READ_ONCE(msk->csum_enabled)) ··· 1559 1544 1560 1545 mptcp_update_post_push(msk, dfrag, ret); 1561 1546 } 1562 - WRITE_ONCE(msk->first_pending, mptcp_send_next(sk)); 1547 + msk->first_pending = mptcp_send_next(sk); 1563 1548 1564 1549 if (msk->snd_burst <= 0 || 1565 1550 !sk_stream_memory_free(ssk) || ··· 1919 1904 get_page(dfrag->page); 1920 1905 list_add_tail(&dfrag->list, &msk->rtx_queue); 1921 1906 if (!msk->first_pending) 1922 - WRITE_ONCE(msk->first_pending, dfrag); 1907 + msk->first_pending = dfrag; 1923 1908 } 1924 1909 pr_debug("msk=%p dfrag at seq=%llu len=%u sent=%u new=%d\n", msk, 1925 1910 dfrag->data_seq, dfrag->data_len, dfrag->already_sent, ··· 1952 1937 1953 1938 static void mptcp_rcv_space_adjust(struct mptcp_sock *msk, int copied); 1954 1939 1955 - static int __mptcp_recvmsg_mskq(struct sock *sk, 1956 - struct msghdr *msg, 1957 - size_t len, int flags, 1940 + static int __mptcp_recvmsg_mskq(struct sock *sk, struct msghdr *msg, 1941 + size_t len, int flags, int copied_total, 1958 1942 struct scm_timestamping_internal *tss, 1959 1943 int *cmsg_flags) 1960 1944 { 1961 1945 struct mptcp_sock *msk = mptcp_sk(sk); 1962 1946 struct sk_buff *skb, *tmp; 1947 + int total_data_len = 0; 1963 1948 int copied = 0; 1964 1949 1965 1950 skb_queue_walk_safe(&sk->sk_receive_queue, skb, tmp) { 1966 - u32 offset = MPTCP_SKB_CB(skb)->offset; 1951 + u32 delta, offset = MPTCP_SKB_CB(skb)->offset; 1967 1952 u32 data_len = skb->len - offset; 1968 - u32 count = min_t(size_t, len - copied, data_len); 1953 + u32 count; 1969 1954 int err; 1970 1955 1956 + if (flags & MSG_PEEK) { 1957 + /* skip already peeked skbs */ 1958 + if (total_data_len + data_len <= copied_total) { 1959 + total_data_len += data_len; 1960 + continue; 1961 + } 1962 + 1963 + /* skip the already peeked data in the current skb */ 1964 + delta = copied_total - total_data_len; 1965 + offset += delta; 1966 + data_len -= delta; 1967 + } 1968 + 1969 + count = min_t(size_t, len - copied, data_len); 1971 1970 if (!(flags & MSG_TRUNC)) { 1972 1971 err = skb_copy_datagram_msg(skb, offset, msg, count); 1973 1972 if (unlikely(err < 0)) { ··· 1998 1969 1999 1970 copied += count; 2000 1971 2001 - if (count < data_len) { 2002 - if (!(flags & MSG_PEEK)) { 1972 + if (!(flags & MSG_PEEK)) { 1973 + msk->bytes_consumed += count; 1974 + if (count < data_len) { 2003 1975 MPTCP_SKB_CB(skb)->offset += count; 2004 1976 MPTCP_SKB_CB(skb)->map_seq += count; 2005 - msk->bytes_consumed += count; 1977 + break; 2006 1978 } 2007 - break; 2008 - } 2009 1979 2010 - if (!(flags & MSG_PEEK)) { 2011 1980 /* avoid the indirect call, we know the destructor is sock_rfree */ 2012 1981 skb->destructor = NULL; 2013 1982 skb->sk = NULL; ··· 2013 1986 sk_mem_uncharge(sk, skb->truesize); 2014 1987 __skb_unlink(skb, &sk->sk_receive_queue); 2015 1988 skb_attempt_defer_free(skb); 2016 - msk->bytes_consumed += count; 2017 1989 } 2018 1990 2019 1991 if (copied >= len) ··· 2076 2050 if (msk->rcvq_space.copied <= msk->rcvq_space.space) 2077 2051 goto new_measure; 2078 2052 2079 - msk->rcvq_space.space = msk->rcvq_space.copied; 2080 - if (mptcp_rcvbuf_grow(sk)) { 2081 - 2053 + if (mptcp_rcvbuf_grow(sk, msk->rcvq_space.copied)) { 2082 2054 /* Make subflows follow along. If we do not do this, we 2083 2055 * get drops at subflow level if skbs can't be moved to 2084 2056 * the mptcp rx queue fast enough (announced rcv_win can ··· 2088 2064 2089 2065 ssk = mptcp_subflow_tcp_sock(subflow); 2090 2066 slow = lock_sock_fast(ssk); 2091 - tcp_sk(ssk)->rcvq_space.space = msk->rcvq_space.copied; 2092 - tcp_rcvbuf_grow(ssk); 2067 + /* subflows can be added before tcp_init_transfer() */ 2068 + if (tcp_sk(ssk)->rcvq_space.space) 2069 + tcp_rcvbuf_grow(ssk, msk->rcvq_space.copied); 2093 2070 unlock_sock_fast(ssk, slow); 2094 2071 } 2095 2072 } ··· 2209 2184 while (copied < len) { 2210 2185 int err, bytes_read; 2211 2186 2212 - bytes_read = __mptcp_recvmsg_mskq(sk, msg, len - copied, flags, &tss, &cmsg_flags); 2187 + bytes_read = __mptcp_recvmsg_mskq(sk, msg, len - copied, flags, 2188 + copied, &tss, &cmsg_flags); 2213 2189 if (unlikely(bytes_read < 0)) { 2214 2190 if (!copied) 2215 2191 copied = bytes_read; ··· 2901 2875 struct mptcp_sock *msk = mptcp_sk(sk); 2902 2876 struct mptcp_data_frag *dtmp, *dfrag; 2903 2877 2904 - WRITE_ONCE(msk->first_pending, NULL); 2878 + msk->first_pending = NULL; 2905 2879 list_for_each_entry_safe(dfrag, dtmp, &msk->rtx_queue, list) 2906 2880 dfrag_clear(sk, dfrag); 2907 2881 } ··· 3441 3415 3442 3416 void __mptcp_check_push(struct sock *sk, struct sock *ssk) 3443 3417 { 3444 - if (!mptcp_send_head(sk)) 3445 - return; 3446 - 3447 3418 if (!sock_owned_by_user(sk)) 3448 3419 __mptcp_subflow_push_pending(sk, ssk, false); 3449 3420 else
+1 -1
net/mptcp/protocol.h
··· 414 414 { 415 415 const struct mptcp_sock *msk = mptcp_sk(sk); 416 416 417 - return READ_ONCE(msk->first_pending); 417 + return msk->first_pending; 418 418 } 419 419 420 420 static inline struct mptcp_data_frag *mptcp_send_next(struct sock *sk)
+1 -1
net/netfilter/nft_connlimit.c
··· 48 48 return; 49 49 } 50 50 51 - count = priv->list->count; 51 + count = READ_ONCE(priv->list->count); 52 52 53 53 if ((count > priv->limit) ^ priv->invert) { 54 54 regs->verdict.code = NFT_BREAK;
+27 -3
net/netfilter/nft_ct.c
··· 22 22 #include <net/netfilter/nf_conntrack_timeout.h> 23 23 #include <net/netfilter/nf_conntrack_l4proto.h> 24 24 #include <net/netfilter/nf_conntrack_expect.h> 25 + #include <net/netfilter/nf_conntrack_seqadj.h> 25 26 26 27 struct nft_ct_helper_obj { 27 28 struct nf_conntrack_helper *helper4; ··· 380 379 } 381 380 #endif 382 381 382 + static void __nft_ct_get_destroy(const struct nft_ctx *ctx, struct nft_ct *priv) 383 + { 384 + #ifdef CONFIG_NF_CONNTRACK_LABELS 385 + if (priv->key == NFT_CT_LABELS) 386 + nf_connlabels_put(ctx->net); 387 + #endif 388 + } 389 + 383 390 static int nft_ct_get_init(const struct nft_ctx *ctx, 384 391 const struct nft_expr *expr, 385 392 const struct nlattr * const tb[]) ··· 422 413 if (tb[NFTA_CT_DIRECTION] != NULL) 423 414 return -EINVAL; 424 415 len = NF_CT_LABELS_MAX_SIZE; 416 + 417 + err = nf_connlabels_get(ctx->net, (len * BITS_PER_BYTE) - 1); 418 + if (err) 419 + return err; 425 420 break; 426 421 #endif 427 422 case NFT_CT_HELPER: ··· 507 494 case IP_CT_DIR_REPLY: 508 495 break; 509 496 default: 510 - return -EINVAL; 497 + err = -EINVAL; 498 + goto err; 511 499 } 512 500 } 513 501 ··· 516 502 err = nft_parse_register_store(ctx, tb[NFTA_CT_DREG], &priv->dreg, NULL, 517 503 NFT_DATA_VALUE, len); 518 504 if (err < 0) 519 - return err; 505 + goto err; 520 506 521 507 err = nf_ct_netns_get(ctx->net, ctx->family); 522 508 if (err < 0) 523 - return err; 509 + goto err; 524 510 525 511 if (priv->key == NFT_CT_BYTES || 526 512 priv->key == NFT_CT_PKTS || ··· 528 514 nf_ct_set_acct(ctx->net, true); 529 515 530 516 return 0; 517 + err: 518 + __nft_ct_get_destroy(ctx, priv); 519 + return err; 531 520 } 532 521 533 522 static void __nft_ct_set_destroy(const struct nft_ctx *ctx, struct nft_ct *priv) ··· 643 626 static void nft_ct_get_destroy(const struct nft_ctx *ctx, 644 627 const struct nft_expr *expr) 645 628 { 629 + struct nft_ct *priv = nft_expr_priv(expr); 630 + 631 + __nft_ct_get_destroy(ctx, priv); 646 632 nf_ct_netns_put(ctx->net, ctx->family); 647 633 } 648 634 ··· 1193 1173 if (help) { 1194 1174 rcu_assign_pointer(help->helper, to_assign); 1195 1175 set_bit(IPS_HELPER_BIT, &ct->status); 1176 + 1177 + if ((ct->status & IPS_NAT_MASK) && !nfct_seqadj(ct)) 1178 + if (!nfct_seqadj_ext_add(ct)) 1179 + regs->verdict.code = NF_DROP; 1196 1180 } 1197 1181 } 1198 1182
+1 -1
net/sctp/input.c
··· 190 190 goto discard_release; 191 191 nf_reset_ct(skb); 192 192 193 - if (sk_filter(sk, skb)) 193 + if (sk_filter(sk, skb) || skb->len < sizeof(struct sctp_chunkhdr)) 194 194 goto discard_release; 195 195 196 196 /* Create an SCTP packet structure. */
+3 -1
net/tls/tls_device.c
··· 724 724 /* shouldn't get to wraparound: 725 725 * too long in async stage, something bad happened 726 726 */ 727 - if (WARN_ON_ONCE(resync_async->rcd_delta == USHRT_MAX)) 727 + if (WARN_ON_ONCE(resync_async->rcd_delta == USHRT_MAX)) { 728 + tls_offload_rx_resync_async_request_cancel(resync_async); 728 729 return false; 730 + } 729 731 730 732 /* asynchronous stage: log all headers seq such that 731 733 * req_seq <= seq <= end_seq, and wait for real resync request
+1 -2
net/wireless/nl80211.c
··· 4139 4139 rdev->wiphy.txq_quantum = old_txq_quantum; 4140 4140 } 4141 4141 4142 - if (old_rts_threshold) 4143 - kfree(old_radio_rts_threshold); 4142 + kfree(old_radio_rts_threshold); 4144 4143 return result; 4145 4144 } 4146 4145
+1 -7
rust/kernel/auxiliary.rs
··· 217 217 218 218 /// Returns a reference to the parent [`device::Device`], if any. 219 219 pub fn parent(&self) -> Option<&device::Device> { 220 - let ptr: *const Self = self; 221 - // CAST: `Device<Ctx: DeviceContext>` types are transparent to each other. 222 - let ptr: *const Device = ptr.cast(); 223 - // SAFETY: `ptr` was derived from `&self`. 224 - let this = unsafe { &*ptr }; 225 - 226 - this.as_ref().parent() 220 + self.as_ref().parent() 227 221 } 228 222 } 229 223
+2 -2
rust/kernel/device.rs
··· 251 251 252 252 /// Returns a reference to the parent device, if any. 253 253 #[cfg_attr(not(CONFIG_AUXILIARY_BUS), expect(dead_code))] 254 - pub(crate) fn parent(&self) -> Option<&Self> { 254 + pub(crate) fn parent(&self) -> Option<&Device> { 255 255 // SAFETY: 256 256 // - By the type invariant `self.as_raw()` is always valid. 257 257 // - The parent device is only ever set at device creation. ··· 264 264 // - Since `parent` is not NULL, it must be a valid pointer to a `struct device`. 265 265 // - `parent` is valid for the lifetime of `self`, since a `struct device` holds a 266 266 // reference count of its parent. 267 - Some(unsafe { Self::from_raw(parent) }) 267 + Some(unsafe { Device::from_raw(parent) }) 268 268 } 269 269 } 270 270
+2 -2
tools/net/ynl/lib/ynl-priv.h
··· 313 313 struct nlattr *attr; 314 314 size_t len; 315 315 316 - len = strlen(str); 316 + len = strlen(str) + 1; 317 317 if (__ynl_attr_put_overflow(nlh, len)) 318 318 return; 319 319 ··· 321 321 attr->nla_type = attr_type; 322 322 323 323 strcpy((char *)ynl_attr_data(attr), str); 324 - attr->nla_len = NLA_HDRLEN + NLA_ALIGN(len); 324 + attr->nla_len = NLA_HDRLEN + len; 325 325 326 326 nlh->nlmsg_len += NLMSG_ALIGN(attr->nla_len); 327 327 }
+3
tools/net/ynl/pyynl/ethtool.py
··· 44 44 Pretty-print a set of fields from the reply. desc specifies the 45 45 fields and the optional type (bool/yn). 46 46 """ 47 + if not reply: 48 + return 49 + 47 50 if len(desc) == 0: 48 51 return print_field(reply, *zip(reply.keys(), reply.keys())) 49 52
+3 -2
tools/objtool/check.c
··· 217 217 * these come from the Rust standard library). 218 218 */ 219 219 return str_ends_with(func->name, "_4core5sliceSp15copy_from_slice17len_mismatch_fail") || 220 + str_ends_with(func->name, "_4core6option13expect_failed") || 220 221 str_ends_with(func->name, "_4core6option13unwrap_failed") || 221 222 str_ends_with(func->name, "_4core6result13unwrap_failed") || 222 223 str_ends_with(func->name, "_4core9panicking5panic") || ··· 4711 4710 4712 4711 for_each_reloc(sec->rsec, reloc) { 4713 4712 if (arch_absolute_reloc(file->elf, reloc)) { 4714 - WARN("section %s has absolute relocation at offset 0x%lx", 4715 - sec->name, reloc_offset(reloc)); 4713 + WARN("section %s has absolute relocation at offset 0x%llx", 4714 + sec->name, (unsigned long long)reloc_offset(reloc)); 4716 4715 ret++; 4717 4716 } 4718 4717 }
+1 -1
tools/testing/selftests/net/bareudp.sh
··· 1 - #!/bin/sh 1 + #!/bin/bash 2 2 # SPDX-License-Identifier: GPL-2.0 3 3 4 4 # Test various bareudp tunnel configurations.