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dt-bindings: PCI: designware: Add binding for Designware PCIe in ECAM mode
Describe the binding for firmware-configured instances of the Synopsys
DesignWare PCIe controller in RC mode, that are almost but not quite ECAM
compliant.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
authored by
Ard Biesheuvel
and committed by
Bjorn Helgaas
19f3f22a
58fb207f
+42
+42
Documentation/devicetree/bindings/pci/designware-pcie-ecam.txt
+42
Documentation/devicetree/bindings/pci/designware-pcie-ecam.txt
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* Synopsys DesignWare PCIe root complex in ECAM shift mode
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In some cases, firmware may already have configured the Synopsys DesignWare
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PCIe controller in RC mode with static ATU window mappings that cover all
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config, MMIO and I/O spaces in a [mostly] ECAM compatible fashion.
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In this case, there is no need for the OS to perform any low level setup
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of clocks, PHYs or device registers, nor is there any reason for the driver
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to reconfigure ATU windows for config and/or IO space accesses at runtime.
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In cases where the IP was synthesized with a minimum ATU window size of
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64 KB, it cannot be supported by the generic ECAM driver, because it
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requires special config space accessors that filter accesses to device #1
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and beyond on the first bus.
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Required properties:
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- compatible: "marvell,armada8k-pcie-ecam" or
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"socionext,synquacer-pcie-ecam" or
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"snps,dw-pcie-ecam" (must be preceded by a more specific match)
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Please refer to the binding document of "pci-host-ecam-generic" in the
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file host-generic-pci.txt for a description of the remaining required
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and optional properties.
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Example:
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pcie1: pcie@7f000000 {
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compatible = "socionext,synquacer-pcie-ecam", "snps,dw-pcie-ecam";
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device_type = "pci";
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reg = <0x0 0x7f000000 0x0 0xf00000>;
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bus-range = <0x0 0xe>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x1000000 0x00 0x00010000 0x00 0x7ff00000 0x0 0x00010000>,
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<0x2000000 0x00 0x70000000 0x00 0x70000000 0x0 0x0f000000>,
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<0x3000000 0x3f 0x00000000 0x3f 0x00000000 0x1 0x00000000>;
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#interrupt-cells = <0x1>;
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = <0x0 0x0 0x0 0x0 &gic 0x0 0x0 0x0 182 0x4>;
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msi-map = <0x0 &its 0x0 0x10000>;
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dma-coherent;
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};