···698698kernel, which in turn slows the system as a whole down, due to a bigger699699icache footprint for the CPU and simply because there is less memory700700available for the pagecache. Just think about it; a pagecache miss causes a701701-disk seek, which easily takes 5 miliseconds. There are a LOT of cpu cycles702702-that can go into these 5 miliseconds.701701+disk seek, which easily takes 5 milliseconds. There are a LOT of cpu cycles702702+that can go into these 5 milliseconds.703703704704A reasonable rule of thumb is to not put inline at functions that have more705705than 3 lines of code in them. An exception to this rule are the cases where
+1-1
drivers/ide/ide-atapi.c
···577577578578 /*579579 * If necessary schedule the packet transfer to occur 'timeout'580580- * miliseconds later in ide_delayed_transfer_pc() after the580580+ * milliseconds later in ide_delayed_transfer_pc() after the581581 * device says it's ready for a packet.582582 */583583 if (drive->atapi_flags & IDE_AFLAG_ZIP_DRIVE) {
+1-1
drivers/isdn/mISDN/dsp_core.c
···502502 break;503503 }504504 dsp->cmx_delay = (*((int *)data)) << 3;505505- /* miliseconds to samples */505505+ /* milliseconds to samples */506506 if (dsp->cmx_delay >= (CMX_BUFF_HALF>>1))507507 /* clip to half of maximum usable buffer508508 (half of half buffer) */
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drivers/net/ipg.h
···514514#define IPG_DMALIST_ALIGN_PAD 0x07515515#define IPG_MULTICAST_HASHTABLE_SIZE 0x40516516517517-/* Number of miliseconds to wait after issuing a software reset.517517+/* Number of milliseconds to wait after issuing a software reset.518518 * 0x05 <= IPG_AC_RESETWAIT to account for proper 10Mbps operation.519519 */520520#define IPG_AC_RESETWAIT 0x05
+1-1
drivers/s390/scsi/zfcp_fc.c
···116116{117117 if (atomic_dec_return(&wka_port->refcount) != 0)118118 return;119119- /* wait 10 miliseconds, other reqs might pop in */119119+ /* wait 10 milliseconds, other reqs might pop in */120120 schedule_delayed_work(&wka_port->work, HZ / 100);121121}122122
+1-1
drivers/scsi/dpt/osd_util.h
···342342/* wakes up the specifed thread */343343void osdWakeThread(uLONG);344344345345-/* osd sleep for x miliseconds */345345+/* osd sleep for x milliseconds */346346void osdSleep(uLONG);347347348348#define DPT_THREAD_PRIORITY_LOWEST 0x00
+1-1
drivers/usb/serial/io_ti.c
···102102 __u8 shadow_mcr;103103 __u8 shadow_lsr;104104 __u8 lsr_mask;105105- __u32 ump_read_timeout; /* Number of miliseconds the UMP will105105+ __u32 ump_read_timeout; /* Number of milliseconds the UMP will106106 wait without data before completing107107 a read short */108108 int baud_rate;
+1-1
sound/pci/vx222/vx222_ops.c
···367367 unsigned int port;368368 const unsigned char *image;369369370370- /* XILINX reset (wait at least 1 milisecond between reset on and off). */370370+ /* XILINX reset (wait at least 1 millisecond between reset on and off). */371371 vx_outl(chip, CNTRL, VX_CNTRL_REGISTER_VALUE | VX_XILINX_RESET_MASK);372372 vx_inl(chip, CNTRL);373373 msleep(10);