[ARM] sa1111: allow cascaded IRQs to be used by platforms

+88 -24

arch/arm/common/sa1111.c

··· 35 35 36 36 #include <asm/hardware/sa1111.h> 37 37 38 + /* SA1111 IRQs */ 39 + #define IRQ_GPAIN0 (0) 40 + #define IRQ_GPAIN1 (1) 41 + #define IRQ_GPAIN2 (2) 42 + #define IRQ_GPAIN3 (3) 43 + #define IRQ_GPBIN0 (4) 44 + #define IRQ_GPBIN1 (5) 45 + #define IRQ_GPBIN2 (6) 46 + #define IRQ_GPBIN3 (7) 47 + #define IRQ_GPBIN4 (8) 48 + #define IRQ_GPBIN5 (9) 49 + #define IRQ_GPCIN0 (10) 50 + #define IRQ_GPCIN1 (11) 51 + #define IRQ_GPCIN2 (12) 52 + #define IRQ_GPCIN3 (13) 53 + #define IRQ_GPCIN4 (14) 54 + #define IRQ_GPCIN5 (15) 55 + #define IRQ_GPCIN6 (16) 56 + #define IRQ_GPCIN7 (17) 57 + #define IRQ_MSTXINT (18) 58 + #define IRQ_MSRXINT (19) 59 + #define IRQ_MSSTOPERRINT (20) 60 + #define IRQ_TPTXINT (21) 61 + #define IRQ_TPRXINT (22) 62 + #define IRQ_TPSTOPERRINT (23) 63 + #define SSPXMTINT (24) 64 + #define SSPRCVINT (25) 65 + #define SSPROR (26) 66 + #define AUDXMTDMADONEA (32) 67 + #define AUDRCVDMADONEA (33) 68 + #define AUDXMTDMADONEB (34) 69 + #define AUDRCVDMADONEB (35) 70 + #define AUDTFSR (36) 71 + #define AUDRFSR (37) 72 + #define AUDTUR (38) 73 + #define AUDROR (39) 74 + #define AUDDTS (40) 75 + #define AUDRDD (41) 76 + #define AUDSTO (42) 77 + #define IRQ_USBPWR (43) 78 + #define IRQ_HCIM (44) 79 + #define IRQ_HCIBUFFACC (45) 80 + #define IRQ_HCIRMTWKP (46) 81 + #define IRQ_NHCIMFCIR (47) 82 + #define IRQ_USB_PORT_RESUME (48) 83 + #define IRQ_S0_READY_NINT (49) 84 + #define IRQ_S1_READY_NINT (50) 85 + #define IRQ_S0_CD_VALID (51) 86 + #define IRQ_S1_CD_VALID (52) 87 + #define IRQ_S0_BVD1_STSCHG (53) 88 + #define IRQ_S1_BVD1_STSCHG (54) 89 + 38 90 extern void __init sa1110_mb_enable(void); 39 91 40 92 /* ··· 101 49 struct clk *clk; 102 50 unsigned long phys; 103 51 int irq; 52 + int irq_base; /* base for cascaded on-chip IRQs */ 104 53 spinlock_t lock; 105 54 void __iomem *base; 106 55 #ifdef CONFIG_PM ··· 205 152 sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) 206 153 { 207 154 unsigned int stat0, stat1, i; 208 - void __iomem *base = get_irq_data(irq); 155 + struct sa1111 *sachip = get_irq_data(irq); 156 + void __iomem *mapbase = sachip->base + SA1111_INTC; 209 157 210 - stat0 = sa1111_readl(base + SA1111_INTSTATCLR0); 211 - stat1 = sa1111_readl(base + SA1111_INTSTATCLR1); 158 + stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0); 159 + stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1); 212 160 213 - sa1111_writel(stat0, base + SA1111_INTSTATCLR0); 161 + sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0); 214 162 215 163 desc->chip->ack(irq); 216 164 217 - sa1111_writel(stat1, base + SA1111_INTSTATCLR1); 165 + sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1); 218 166 219 167 if (stat0 == 0 && stat1 == 0) { 220 168 do_bad_IRQ(irq, desc); 221 169 return; 222 170 } 223 171 224 - for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1) 172 + for (i = 0; stat0; i++, stat0 >>= 1) 225 173 if (stat0 & 1) 226 - handle_edge_irq(i, irq_desc + i); 174 + generic_handle_irq(i + sachip->irq_base); 227 175 228 - for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1) 176 + for (i = 32; stat1; i++, stat1 >>= 1) 229 177 if (stat1 & 1) 230 - handle_edge_irq(i, irq_desc + i); 178 + generic_handle_irq(i + sachip->irq_base); 231 179 232 180 /* For level-based interrupts */ 233 181 desc->chip->unmask(irq); 234 182 } 235 183 236 - #define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START)) 237 - #define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32)) 184 + #define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base)) 185 + #define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32)) 238 186 239 187 static void sa1111_ack_irq(unsigned int irq) 240 188 { ··· 243 189 244 190 static void sa1111_mask_lowirq(unsigned int irq) 245 191 { 246 - void __iomem *mapbase = get_irq_chip_data(irq); 192 + struct sa1111 *sachip = get_irq_chip_data(irq); 193 + void __iomem *mapbase = sachip->base + SA1111_INTC; 247 194 unsigned long ie0; 248 195 249 196 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); ··· 254 199 255 200 static void sa1111_unmask_lowirq(unsigned int irq) 256 201 { 257 - void __iomem *mapbase = get_irq_chip_data(irq); 202 + struct sa1111 *sachip = get_irq_chip_data(irq); 203 + void __iomem *mapbase = sachip->base + SA1111_INTC; 258 204 unsigned long ie0; 259 205 260 206 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); ··· 272 216 */ 273 217 static int sa1111_retrigger_lowirq(unsigned int irq) 274 218 { 219 + struct sa1111 *sachip = get_irq_chip_data(irq); 220 + void __iomem *mapbase = sachip->base + SA1111_INTC; 275 221 unsigned int mask = SA1111_IRQMASK_LO(irq); 276 - void __iomem *mapbase = get_irq_chip_data(irq); 277 222 unsigned long ip0; 278 223 int i; 279 224 ··· 294 237 295 238 static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) 296 239 { 240 + struct sa1111 *sachip = get_irq_chip_data(irq); 241 + void __iomem *mapbase = sachip->base + SA1111_INTC; 297 242 unsigned int mask = SA1111_IRQMASK_LO(irq); 298 - void __iomem *mapbase = get_irq_chip_data(irq); 299 243 unsigned long ip0; 300 244 301 245 if (flags == IRQ_TYPE_PROBE) ··· 318 260 319 261 static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) 320 262 { 263 + struct sa1111 *sachip = get_irq_chip_data(irq); 264 + void __iomem *mapbase = sachip->base + SA1111_INTC; 321 265 unsigned int mask = SA1111_IRQMASK_LO(irq); 322 - void __iomem *mapbase = get_irq_chip_data(irq); 323 266 unsigned long we0; 324 267 325 268 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); ··· 345 286 346 287 static void sa1111_mask_highirq(unsigned int irq) 347 288 { 348 - void __iomem *mapbase = get_irq_chip_data(irq); 289 + struct sa1111 *sachip = get_irq_chip_data(irq); 290 + void __iomem *mapbase = sachip->base + SA1111_INTC; 349 291 unsigned long ie1; 350 292 351 293 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); ··· 356 296 357 297 static void sa1111_unmask_highirq(unsigned int irq) 358 298 { 359 - void __iomem *mapbase = get_irq_chip_data(irq); 299 + struct sa1111 *sachip = get_irq_chip_data(irq); 300 + void __iomem *mapbase = sachip->base + SA1111_INTC; 360 301 unsigned long ie1; 361 302 362 303 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); ··· 374 313 */ 375 314 static int sa1111_retrigger_highirq(unsigned int irq) 376 315 { 316 + struct sa1111 *sachip = get_irq_chip_data(irq); 317 + void __iomem *mapbase = sachip->base + SA1111_INTC; 377 318 unsigned int mask = SA1111_IRQMASK_HI(irq); 378 - void __iomem *mapbase = get_irq_chip_data(irq); 379 319 unsigned long ip1; 380 320 int i; 381 321 ··· 396 334 397 335 static int sa1111_type_highirq(unsigned int irq, unsigned int flags) 398 336 { 337 + struct sa1111 *sachip = get_irq_chip_data(irq); 338 + void __iomem *mapbase = sachip->base + SA1111_INTC; 399 339 unsigned int mask = SA1111_IRQMASK_HI(irq); 400 - void __iomem *mapbase = get_irq_chip_data(irq); 401 340 unsigned long ip1; 402 341 403 342 if (flags == IRQ_TYPE_PROBE) ··· 420 357 421 358 static int sa1111_wake_highirq(unsigned int irq, unsigned int on) 422 359 { 360 + struct sa1111 *sachip = get_irq_chip_data(irq); 361 + void __iomem *mapbase = sachip->base + SA1111_INTC; 423 362 unsigned int mask = SA1111_IRQMASK_HI(irq); 424 - void __iomem *mapbase = get_irq_chip_data(irq); 425 363 unsigned long we1; 426 364 427 365 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); ··· 476 412 477 413 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { 478 414 set_irq_chip(irq, &sa1111_low_chip); 479 - set_irq_chip_data(irq, irqbase); 415 + set_irq_chip_data(irq, sachip); 480 416 set_irq_handler(irq, handle_edge_irq); 481 417 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 482 418 } 483 419 484 420 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { 485 421 set_irq_chip(irq, &sa1111_high_chip); 486 - set_irq_chip_data(irq, irqbase); 422 + set_irq_chip_data(irq, sachip); 487 423 set_irq_handler(irq, handle_edge_irq); 488 424 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 489 425 } ··· 492 428 * Register SA1111 interrupt 493 429 */ 494 430 set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); 495 - set_irq_data(sachip->irq, irqbase); 431 + set_irq_data(sachip->irq, sachip); 496 432 set_irq_chained_handler(sachip->irq, sa1111_irq_handler); 497 433 } 498 434

+4

arch/arm/include/asm/hardware/sa1111.h

··· 578 578 void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v); 579 579 void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v); 580 580 581 + struct sa1111_platform_data { 582 + int irq_base; /* base for cascaded on-chip IRQs */ 583 + }; 584 + 581 585 #endif /* _ASM_ARCH_SA1111 */

+1 -53

arch/arm/mach-pxa/include/mach/irqs.h

··· 135 135 #define IRQ_BOARD_END (IRQ_BOARD_START + 16) 136 136 #endif 137 137 138 - #define IRQ_SA1111_START (IRQ_BOARD_END) 139 - #define IRQ_GPAIN0 (IRQ_BOARD_END + 0) 140 - #define IRQ_GPAIN1 (IRQ_BOARD_END + 1) 141 - #define IRQ_GPAIN2 (IRQ_BOARD_END + 2) 142 - #define IRQ_GPAIN3 (IRQ_BOARD_END + 3) 143 - #define IRQ_GPBIN0 (IRQ_BOARD_END + 4) 144 - #define IRQ_GPBIN1 (IRQ_BOARD_END + 5) 145 - #define IRQ_GPBIN2 (IRQ_BOARD_END + 6) 146 - #define IRQ_GPBIN3 (IRQ_BOARD_END + 7) 147 - #define IRQ_GPBIN4 (IRQ_BOARD_END + 8) 148 - #define IRQ_GPBIN5 (IRQ_BOARD_END + 9) 149 - #define IRQ_GPCIN0 (IRQ_BOARD_END + 10) 150 - #define IRQ_GPCIN1 (IRQ_BOARD_END + 11) 151 - #define IRQ_GPCIN2 (IRQ_BOARD_END + 12) 152 - #define IRQ_GPCIN3 (IRQ_BOARD_END + 13) 153 - #define IRQ_GPCIN4 (IRQ_BOARD_END + 14) 154 - #define IRQ_GPCIN5 (IRQ_BOARD_END + 15) 155 - #define IRQ_GPCIN6 (IRQ_BOARD_END + 16) 156 - #define IRQ_GPCIN7 (IRQ_BOARD_END + 17) 157 - #define IRQ_MSTXINT (IRQ_BOARD_END + 18) 158 - #define IRQ_MSRXINT (IRQ_BOARD_END + 19) 159 - #define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20) 160 - #define IRQ_TPTXINT (IRQ_BOARD_END + 21) 161 - #define IRQ_TPRXINT (IRQ_BOARD_END + 22) 162 - #define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23) 163 - #define SSPXMTINT (IRQ_BOARD_END + 24) 164 - #define SSPRCVINT (IRQ_BOARD_END + 25) 165 - #define SSPROR (IRQ_BOARD_END + 26) 166 - #define AUDXMTDMADONEA (IRQ_BOARD_END + 32) 167 - #define AUDRCVDMADONEA (IRQ_BOARD_END + 33) 168 - #define AUDXMTDMADONEB (IRQ_BOARD_END + 34) 169 - #define AUDRCVDMADONEB (IRQ_BOARD_END + 35) 170 - #define AUDTFSR (IRQ_BOARD_END + 36) 171 - #define AUDRFSR (IRQ_BOARD_END + 37) 172 - #define AUDTUR (IRQ_BOARD_END + 38) 173 - #define AUDROR (IRQ_BOARD_END + 39) 174 - #define AUDDTS (IRQ_BOARD_END + 40) 175 - #define AUDRDD (IRQ_BOARD_END + 41) 176 - #define AUDSTO (IRQ_BOARD_END + 42) 177 - #define IRQ_USBPWR (IRQ_BOARD_END + 43) 178 - #define IRQ_HCIM (IRQ_BOARD_END + 44) 179 - #define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45) 180 - #define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46) 181 - #define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47) 182 - #define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48) 183 - #define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49) 184 - #define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50) 185 - #define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51) 186 - #define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52) 187 - #define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53) 188 - #define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54) 189 - 190 138 /* 191 139 * Figure out the MAX IRQ number. 192 140 * ··· 143 195 * Otherwise, we have the standard IRQs only. 144 196 */ 145 197 #ifdef CONFIG_SA1111 146 - #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) 198 + #define NR_IRQS (IRQ_BOARD_END + 55) 147 199 #elif defined(CONFIG_PXA_HAVE_BOARD_IRQS) 148 200 #define NR_IRQS (IRQ_BOARD_END) 149 201 #else

+7

arch/arm/mach-pxa/lubbock.c

··· 228 228 }, 229 229 }; 230 230 231 + static struct sa1111_platform_data sa1111_info = { 232 + .irq_base = IRQ_BOARD_END, 233 + }; 234 + 231 235 static struct platform_device sa1111_device = { 232 236 .name = "sa1111", 233 237 .id = -1, 234 238 .num_resources = ARRAY_SIZE(sa1111_resources), 235 239 .resource = sa1111_resources, 240 + .dev = { 241 + .platform_data = &sa1111_info, 242 + }, 236 243 }; 237 244 238 245 /* ADS7846 is connected through SSP ... and if your board has J5 populated,

+5

arch/arm/mach-sa1100/badge4.c

··· 51 51 }, 52 52 }; 53 53 54 + static struct sa1111_platform_data sa1111_info = { 55 + .irq_base = IRQ_BOARD_END, 56 + }; 57 + 54 58 static u64 sa1111_dmamask = 0xffffffffUL; 55 59 56 60 static struct platform_device sa1111_device = { ··· 63 59 .dev = { 64 60 .dma_mask = &sa1111_dmamask, 65 61 .coherent_dma_mask = 0xffffffff, 62 + .platform_data = &sa1111_info, 66 63 }, 67 64 .num_resources = ARRAY_SIZE(sa1111_resources), 68 65 .resource = sa1111_resources,

+1 -53

arch/arm/mach-sa1100/include/mach/irqs.h

··· 68 68 #define IRQ_BOARD_START 49 69 69 #define IRQ_BOARD_END 65 70 70 71 - #define IRQ_SA1111_START (IRQ_BOARD_END) 72 - #define IRQ_GPAIN0 (IRQ_BOARD_END + 0) 73 - #define IRQ_GPAIN1 (IRQ_BOARD_END + 1) 74 - #define IRQ_GPAIN2 (IRQ_BOARD_END + 2) 75 - #define IRQ_GPAIN3 (IRQ_BOARD_END + 3) 76 - #define IRQ_GPBIN0 (IRQ_BOARD_END + 4) 77 - #define IRQ_GPBIN1 (IRQ_BOARD_END + 5) 78 - #define IRQ_GPBIN2 (IRQ_BOARD_END + 6) 79 - #define IRQ_GPBIN3 (IRQ_BOARD_END + 7) 80 - #define IRQ_GPBIN4 (IRQ_BOARD_END + 8) 81 - #define IRQ_GPBIN5 (IRQ_BOARD_END + 9) 82 - #define IRQ_GPCIN0 (IRQ_BOARD_END + 10) 83 - #define IRQ_GPCIN1 (IRQ_BOARD_END + 11) 84 - #define IRQ_GPCIN2 (IRQ_BOARD_END + 12) 85 - #define IRQ_GPCIN3 (IRQ_BOARD_END + 13) 86 - #define IRQ_GPCIN4 (IRQ_BOARD_END + 14) 87 - #define IRQ_GPCIN5 (IRQ_BOARD_END + 15) 88 - #define IRQ_GPCIN6 (IRQ_BOARD_END + 16) 89 - #define IRQ_GPCIN7 (IRQ_BOARD_END + 17) 90 - #define IRQ_MSTXINT (IRQ_BOARD_END + 18) 91 - #define IRQ_MSRXINT (IRQ_BOARD_END + 19) 92 - #define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20) 93 - #define IRQ_TPTXINT (IRQ_BOARD_END + 21) 94 - #define IRQ_TPRXINT (IRQ_BOARD_END + 22) 95 - #define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23) 96 - #define SSPXMTINT (IRQ_BOARD_END + 24) 97 - #define SSPRCVINT (IRQ_BOARD_END + 25) 98 - #define SSPROR (IRQ_BOARD_END + 26) 99 - #define AUDXMTDMADONEA (IRQ_BOARD_END + 32) 100 - #define AUDRCVDMADONEA (IRQ_BOARD_END + 33) 101 - #define AUDXMTDMADONEB (IRQ_BOARD_END + 34) 102 - #define AUDRCVDMADONEB (IRQ_BOARD_END + 35) 103 - #define AUDTFSR (IRQ_BOARD_END + 36) 104 - #define AUDRFSR (IRQ_BOARD_END + 37) 105 - #define AUDTUR (IRQ_BOARD_END + 38) 106 - #define AUDROR (IRQ_BOARD_END + 39) 107 - #define AUDDTS (IRQ_BOARD_END + 40) 108 - #define AUDRDD (IRQ_BOARD_END + 41) 109 - #define AUDSTO (IRQ_BOARD_END + 42) 110 - #define IRQ_USBPWR (IRQ_BOARD_END + 43) 111 - #define IRQ_HCIM (IRQ_BOARD_END + 44) 112 - #define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45) 113 - #define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46) 114 - #define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47) 115 - #define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48) 116 - #define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49) 117 - #define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50) 118 - #define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51) 119 - #define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52) 120 - #define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53) 121 - #define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54) 122 - 123 71 /* 124 72 * Figure out the MAX IRQ number. 125 73 * ··· 76 128 * Otherwise, we have the standard IRQs only. 77 129 */ 78 130 #ifdef CONFIG_SA1111 79 - #define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) 131 + #define NR_IRQS (IRQ_BOARD_END + 55) 80 132 #elif defined(CONFIG_SHARPSL_LOCOMO) 81 133 #define NR_IRQS (IRQ_BOARD_START + 4) 82 134 #else

+5

arch/arm/mach-sa1100/jornada720.c

··· 208 208 }, 209 209 }; 210 210 211 + static struct sa1111_platform_data sa1111_info = { 212 + .irq_base = IRQ_BOARD_END, 213 + }; 214 + 211 215 static u64 sa1111_dmamask = 0xffffffffUL; 212 216 213 217 static struct platform_device sa1111_device = { ··· 220 216 .dev = { 221 217 .dma_mask = &sa1111_dmamask, 222 218 .coherent_dma_mask = 0xffffffff, 219 + .platform_data = &sa1111_info, 223 220 }, 224 221 .num_resources = ARRAY_SIZE(sa1111_resources), 225 222 .resource = sa1111_resources,

+5

arch/arm/mach-sa1100/neponset.c

··· 241 241 }, 242 242 }; 243 243 244 + static struct sa1111_platform_data sa1111_info = { 245 + .irq_base = IRQ_BOARD_END, 246 + }; 247 + 244 248 static u64 sa1111_dmamask = 0xffffffffUL; 245 249 246 250 static struct platform_device sa1111_device = { ··· 253 249 .dev = { 254 250 .dma_mask = &sa1111_dmamask, 255 251 .coherent_dma_mask = 0xffffffff, 252 + .platform_data = &sa1111_info, 256 253 }, 257 254 .num_resources = ARRAY_SIZE(sa1111_resources), 258 255 .resource = sa1111_resources,