Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

staging: vt6655: fix camelcase in PortOffset

Replace camel case variable PortOffset with snake case
variable port_offset.

Signed-off-by: Tommaso Merciai <tomm.merciai@gmail.com>
Link: https://lore.kernel.org/r/20211005205702.14029-4-tomm.merciai@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Tommaso Merciai and committed by
Greg Kroah-Hartman
1977dcf0 aeec304c

+172 -172
+3 -3
drivers/staging/vt6655/baseband.c
··· 1905 1905 bool bb_read_embedded(struct vnt_private *priv, unsigned char by_bb_addr, 1906 1906 unsigned char *pby_data) 1907 1907 { 1908 - void __iomem *iobase = priv->PortOffset; 1908 + void __iomem *iobase = priv->port_offset; 1909 1909 unsigned short ww; 1910 1910 unsigned char by_value; 1911 1911 ··· 1948 1948 bool bb_write_embedded(struct vnt_private *priv, unsigned char by_bb_addr, 1949 1949 unsigned char by_data) 1950 1950 { 1951 - void __iomem *iobase = priv->PortOffset; 1951 + void __iomem *iobase = priv->port_offset; 1952 1952 unsigned short ww; 1953 1953 unsigned char by_value; 1954 1954 ··· 1992 1992 { 1993 1993 bool result = true; 1994 1994 int ii; 1995 - void __iomem *iobase = priv->PortOffset; 1995 + void __iomem *iobase = priv->port_offset; 1996 1996 unsigned char by_rf_type = priv->byRFType; 1997 1997 unsigned char by_local_id = priv->byLocalID; 1998 1998
+44 -44
drivers/staging/vt6655/card.c
··· 190 190 if (bb_type == BB_TYPE_11A) { 191 191 if (priv->byRFType == RF_AIROHA7230) { 192 192 /* AL7230 use single PAPE and connect to PAPE_2.4G */ 193 - MACvSetBBType(priv->PortOffset, BB_TYPE_11G); 193 + MACvSetBBType(priv->port_offset, BB_TYPE_11G); 194 194 priv->abyBBVGA[0] = 0x20; 195 195 priv->abyBBVGA[2] = 0x10; 196 196 priv->abyBBVGA[3] = 0x10; ··· 199 199 bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); 200 200 201 201 } else if (priv->byRFType == RF_UW2452) { 202 - MACvSetBBType(priv->PortOffset, BB_TYPE_11A); 202 + MACvSetBBType(priv->port_offset, BB_TYPE_11A); 203 203 priv->abyBBVGA[0] = 0x18; 204 204 bb_read_embedded(priv, 0xE7, &byData); 205 205 if (byData == 0x14) { ··· 207 207 bb_write_embedded(priv, 0xE1, 0x57); 208 208 } 209 209 } else { 210 - MACvSetBBType(priv->PortOffset, BB_TYPE_11A); 210 + MACvSetBBType(priv->port_offset, BB_TYPE_11A); 211 211 } 212 212 bb_write_embedded(priv, 0x88, 0x03); 213 213 bySlot = C_SLOT_SHORT; ··· 215 215 byDIFS = C_SIFS_A + 2 * C_SLOT_SHORT; 216 216 byCWMaxMin = 0xA4; 217 217 } else if (bb_type == BB_TYPE_11B) { 218 - MACvSetBBType(priv->PortOffset, BB_TYPE_11B); 218 + MACvSetBBType(priv->port_offset, BB_TYPE_11B); 219 219 if (priv->byRFType == RF_AIROHA7230) { 220 220 priv->abyBBVGA[0] = 0x1C; 221 221 priv->abyBBVGA[2] = 0x00; ··· 238 238 byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG; 239 239 byCWMaxMin = 0xA5; 240 240 } else { /* PK_TYPE_11GA & PK_TYPE_11GB */ 241 - MACvSetBBType(priv->PortOffset, BB_TYPE_11G); 241 + MACvSetBBType(priv->port_offset, BB_TYPE_11G); 242 242 if (priv->byRFType == RF_AIROHA7230) { 243 243 priv->abyBBVGA[0] = 0x1C; 244 244 priv->abyBBVGA[2] = 0x00; ··· 292 292 293 293 if (priv->bySIFS != bySIFS) { 294 294 priv->bySIFS = bySIFS; 295 - VNSvOutPortB(priv->PortOffset + MAC_REG_SIFS, priv->bySIFS); 295 + VNSvOutPortB(priv->port_offset + MAC_REG_SIFS, priv->bySIFS); 296 296 } 297 297 if (priv->byDIFS != byDIFS) { 298 298 priv->byDIFS = byDIFS; 299 - VNSvOutPortB(priv->PortOffset + MAC_REG_DIFS, priv->byDIFS); 299 + VNSvOutPortB(priv->port_offset + MAC_REG_DIFS, priv->byDIFS); 300 300 } 301 301 if (priv->byEIFS != C_EIFS) { 302 302 priv->byEIFS = C_EIFS; 303 - VNSvOutPortB(priv->PortOffset + MAC_REG_EIFS, priv->byEIFS); 303 + VNSvOutPortB(priv->port_offset + MAC_REG_EIFS, priv->byEIFS); 304 304 } 305 305 if (priv->bySlot != bySlot) { 306 306 priv->bySlot = bySlot; 307 - VNSvOutPortB(priv->PortOffset + MAC_REG_SLOT, priv->bySlot); 307 + VNSvOutPortB(priv->port_offset + MAC_REG_SLOT, priv->bySlot); 308 308 309 309 bb_set_short_slot_time(priv); 310 310 } 311 311 if (priv->byCWMaxMin != byCWMaxMin) { 312 312 priv->byCWMaxMin = byCWMaxMin; 313 - VNSvOutPortB(priv->PortOffset + MAC_REG_CWMAXMIN0, 313 + VNSvOutPortB(priv->port_offset + MAC_REG_CWMAXMIN0, 314 314 priv->byCWMaxMin); 315 315 } 316 316 ··· 348 348 qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp, 349 349 local_tsf); 350 350 /* adjust TSF, HW's TSF add TSF Offset reg */ 351 - VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST, 351 + VNSvOutPortD(priv->port_offset + MAC_REG_TSFOFST, 352 352 (u32)qwTSFOffset); 353 - VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST + 4, 353 + VNSvOutPortD(priv->port_offset + MAC_REG_TSFOFST + 4, 354 354 (u32)(qwTSFOffset >> 32)); 355 - MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, 355 + MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, 356 356 TFTCTL_TSFSYNCEN); 357 357 } 358 358 return true; ··· 381 381 qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval); 382 382 383 383 /* set HW beacon interval */ 384 - VNSvOutPortW(priv->PortOffset + MAC_REG_BI, wBeaconInterval); 384 + VNSvOutPortW(priv->port_offset + MAC_REG_BI, wBeaconInterval); 385 385 priv->wBeaconInterval = wBeaconInterval; 386 386 /* Set NextTBTT */ 387 - VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT, (u32)qwNextTBTT); 388 - VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT + 4, 387 + VNSvOutPortD(priv->port_offset + MAC_REG_NEXTTBTT, (u32)qwNextTBTT); 388 + VNSvOutPortD(priv->port_offset + MAC_REG_NEXTTBTT + 4, 389 389 (u32)(qwNextTBTT >> 32)); 390 - MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN); 390 + MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN); 391 391 392 392 return true; 393 393 } ··· 409 409 410 410 switch (priv->byRFType) { 411 411 case RF_RFMD2959: 412 - MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, 412 + MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL, 413 413 SOFTPWRCTL_TXPEINV); 414 - MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL, 414 + MACvWordRegBitsOn(priv->port_offset, MAC_REG_SOFTPWRCTL, 415 415 SOFTPWRCTL_SWPE1); 416 416 break; 417 417 418 418 case RF_AIROHA: 419 419 case RF_AL2230S: 420 420 case RF_AIROHA7230: 421 - MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, 421 + MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL, 422 422 SOFTPWRCTL_SWPE2); 423 - MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL, 423 + MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL, 424 424 SOFTPWRCTL_SWPE3); 425 425 break; 426 426 } 427 427 428 - MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_RXON); 428 + MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON); 429 429 430 430 bb_set_deep_sleep(priv, priv->byLocalID); 431 431 432 432 priv->bRadioOff = true; 433 433 pr_debug("chester power off\n"); 434 - MACvRegBitsOn(priv->PortOffset, MAC_REG_GPIOCTL0, 434 + MACvRegBitsOn(priv->port_offset, MAC_REG_GPIOCTL0, 435 435 LED_ACTSET); /* LED issue */ 436 436 } 437 437 ··· 467 467 MACvSetCurrTXDescAddr(TYPE_AC0DMA, priv, priv->td1_pool_dma); 468 468 469 469 /* set MAC Beacon TX pointer */ 470 - MACvSetCurrBCNTxDescAddr(priv->PortOffset, 470 + MACvSetCurrBCNTxDescAddr(priv->port_offset, 471 471 (priv->tx_beacon_dma)); 472 472 } 473 473 ··· 509 509 } 510 510 511 511 /* set perPkt mode */ 512 - MACvRx0PerPktMode(priv->PortOffset); 513 - MACvRx1PerPktMode(priv->PortOffset); 512 + MACvRx0PerPktMode(priv->port_offset); 513 + MACvRx1PerPktMode(priv->port_offset); 514 514 /* set MAC RD pointer */ 515 515 MACvSetCurrRx0DescAddr(priv, priv->rd0_pool_dma); 516 516 ··· 599 599 spin_lock_irqsave(&priv->lock, flags); 600 600 601 601 /* Set to Page1 */ 602 - MACvSelectPage1(priv->PortOffset); 602 + MACvSelectPage1(priv->port_offset); 603 603 604 604 /* RSPINF_b_1 */ 605 605 vnt_get_phy_field(priv, 14, ··· 609 609 /* swap over to get correct write order */ 610 610 swap(phy.swap[0], phy.swap[1]); 611 611 612 - VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_1, phy.field_write); 612 + VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_1, phy.field_write); 613 613 614 614 /* RSPINF_b_2 */ 615 615 vnt_get_phy_field(priv, 14, ··· 618 618 619 619 swap(phy.swap[0], phy.swap[1]); 620 620 621 - VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_2, phy.field_write); 621 + VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_2, phy.field_write); 622 622 623 623 /* RSPINF_b_5 */ 624 624 vnt_get_phy_field(priv, 14, ··· 627 627 628 628 swap(phy.swap[0], phy.swap[1]); 629 629 630 - VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_5, phy.field_write); 630 + VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_5, phy.field_write); 631 631 632 632 /* RSPINF_b_11 */ 633 633 vnt_get_phy_field(priv, 14, ··· 636 636 637 637 swap(phy.swap[0], phy.swap[1]); 638 638 639 - VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_11, phy.field_write); 639 + VNSvOutPortD(priv->port_offset + MAC_REG_RSPINF_B_11, phy.field_write); 640 640 641 641 /* RSPINF_a_6 */ 642 642 s_vCalculateOFDMRParameter(RATE_6M, 643 643 bb_type, 644 644 &byTxRate, 645 645 &byRsvTime); 646 - VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_6, 646 + VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_6, 647 647 MAKEWORD(byTxRate, byRsvTime)); 648 648 /* RSPINF_a_9 */ 649 649 s_vCalculateOFDMRParameter(RATE_9M, 650 650 bb_type, 651 651 &byTxRate, 652 652 &byRsvTime); 653 - VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_9, 653 + VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_9, 654 654 MAKEWORD(byTxRate, byRsvTime)); 655 655 /* RSPINF_a_12 */ 656 656 s_vCalculateOFDMRParameter(RATE_12M, 657 657 bb_type, 658 658 &byTxRate, 659 659 &byRsvTime); 660 - VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_12, 660 + VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_12, 661 661 MAKEWORD(byTxRate, byRsvTime)); 662 662 /* RSPINF_a_18 */ 663 663 s_vCalculateOFDMRParameter(RATE_18M, 664 664 bb_type, 665 665 &byTxRate, 666 666 &byRsvTime); 667 - VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_18, 667 + VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_18, 668 668 MAKEWORD(byTxRate, byRsvTime)); 669 669 /* RSPINF_a_24 */ 670 670 s_vCalculateOFDMRParameter(RATE_24M, 671 671 bb_type, 672 672 &byTxRate, 673 673 &byRsvTime); 674 - VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_24, 674 + VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_24, 675 675 MAKEWORD(byTxRate, byRsvTime)); 676 676 /* RSPINF_a_36 */ 677 677 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, ··· 679 679 bb_type, 680 680 &byTxRate, 681 681 &byRsvTime); 682 - VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_36, 682 + VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_36, 683 683 MAKEWORD(byTxRate, byRsvTime)); 684 684 /* RSPINF_a_48 */ 685 685 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, ··· 687 687 bb_type, 688 688 &byTxRate, 689 689 &byRsvTime); 690 - VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_48, 690 + VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_48, 691 691 MAKEWORD(byTxRate, byRsvTime)); 692 692 /* RSPINF_a_54 */ 693 693 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, ··· 695 695 bb_type, 696 696 &byTxRate, 697 697 &byRsvTime); 698 - VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_54, 698 + VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_54, 699 699 MAKEWORD(byTxRate, byRsvTime)); 700 700 /* RSPINF_a_72 */ 701 701 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, ··· 703 703 bb_type, 704 704 &byTxRate, 705 705 &byRsvTime); 706 - VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_72, 706 + VNSvOutPortW(priv->port_offset + MAC_REG_RSPINF_A_72, 707 707 MAKEWORD(byTxRate, byRsvTime)); 708 708 /* Set to Page0 */ 709 - MACvSelectPage0(priv->PortOffset); 709 + MACvSelectPage0(priv->port_offset); 710 710 711 711 spin_unlock_irqrestore(&priv->lock, flags); 712 712 } ··· 796 796 */ 797 797 bool CARDbGetCurrentTSF(struct vnt_private *priv, u64 *pqwCurrTSF) 798 798 { 799 - void __iomem *iobase = priv->PortOffset; 799 + void __iomem *iobase = priv->port_offset; 800 800 unsigned short ww; 801 801 unsigned char byData; 802 802 ··· 857 857 void CARDvSetFirstNextTBTT(struct vnt_private *priv, 858 858 unsigned short wBeaconInterval) 859 859 { 860 - void __iomem *iobase = priv->PortOffset; 860 + void __iomem *iobase = priv->port_offset; 861 861 u64 qwNextTBTT = 0; 862 862 863 863 CARDbGetCurrentTSF(priv, &qwNextTBTT); /* Get Local TSF counter */ ··· 886 886 void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF, 887 887 unsigned short wBeaconInterval) 888 888 { 889 - void __iomem *iobase = priv->PortOffset; 889 + void __iomem *iobase = priv->port_offset; 890 890 891 891 qwTSF = CARDqGetNextTBTT(qwTSF, wBeaconInterval); 892 892 /* Set NextTBTT */
+5 -5
drivers/staging/vt6655/channel.c
··· 173 173 } 174 174 175 175 /* clear NAV */ 176 - MACvRegBitsOn(priv->PortOffset, MAC_REG_MACCR, MACCR_CLRNAV); 176 + MACvRegBitsOn(priv->port_offset, MAC_REG_MACCR, MACCR_CLRNAV); 177 177 178 178 /* TX_PE will reserve 3 us for MAX2829 A mode only, 179 179 * it is for better TX throughput ··· 199 199 spin_lock_irqsave(&priv->lock, flags); 200 200 201 201 /* set HW default power register */ 202 - MACvSelectPage1(priv->PortOffset); 202 + MACvSelectPage1(priv->port_offset); 203 203 RFbSetPower(priv, RATE_1M, priv->byCurrentCh); 204 - VNSvOutPortB(priv->PortOffset + MAC_REG_PWRCCK, 204 + VNSvOutPortB(priv->port_offset + MAC_REG_PWRCCK, 205 205 priv->byCurPwr); 206 206 RFbSetPower(priv, RATE_6M, priv->byCurrentCh); 207 - VNSvOutPortB(priv->PortOffset + MAC_REG_PWROFDM, 207 + VNSvOutPortB(priv->port_offset + MAC_REG_PWROFDM, 208 208 priv->byCurPwr); 209 - MACvSelectPage0(priv->PortOffset); 209 + MACvSelectPage0(priv->port_offset); 210 210 211 211 spin_unlock_irqrestore(&priv->lock, flags); 212 212 }
+1 -1
drivers/staging/vt6655/device.h
··· 124 124 unsigned char *tx1_bufs; 125 125 unsigned char *tx_beacon_bufs; 126 126 127 - void __iomem *PortOffset; 127 + void __iomem *port_offset; 128 128 u32 memaddr; 129 129 u32 ioaddr; 130 130
+72 -72
drivers/staging/vt6655/device_main.c
··· 219 219 MACvInitialize(priv); 220 220 221 221 /* Get Local ID */ 222 - VNSvInPortB(priv->PortOffset + MAC_REG_LOCALID, &priv->byLocalID); 222 + VNSvInPortB(priv->port_offset + MAC_REG_LOCALID, &priv->byLocalID); 223 223 224 224 spin_lock_irqsave(&priv->lock, flags); 225 225 226 - SROMvReadAllContents(priv->PortOffset, priv->abyEEPROM); 226 + SROMvReadAllContents(priv->port_offset, priv->abyEEPROM); 227 227 228 228 spin_unlock_irqrestore(&priv->lock, flags); 229 229 ··· 232 232 priv->byMaxChannel = CB_MAX_CHANNEL; 233 233 234 234 /* Get Antena */ 235 - byValue = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_ANTENNA); 235 + byValue = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_ANTENNA); 236 236 if (byValue & EEP_ANTINV) 237 237 priv->bTxRxAntInv = true; 238 238 else ··· 292 292 293 293 /* Get Desire Power Value */ 294 294 priv->byCurPwr = 0xFF; 295 - priv->byCCKPwr = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_CCK); 296 - priv->byOFDMPwrG = SROMbyReadEmbedded(priv->PortOffset, 295 + priv->byCCKPwr = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_PWR_CCK); 296 + priv->byOFDMPwrG = SROMbyReadEmbedded(priv->port_offset, 297 297 EEP_OFS_PWR_OFDMG); 298 298 299 299 /* Load power Table */ 300 300 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) { 301 301 priv->abyCCKPwrTbl[ii + 1] = 302 - SROMbyReadEmbedded(priv->PortOffset, 302 + SROMbyReadEmbedded(priv->port_offset, 303 303 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL)); 304 304 if (priv->abyCCKPwrTbl[ii + 1] == 0) 305 305 priv->abyCCKPwrTbl[ii + 1] = priv->byCCKPwr; 306 306 307 307 priv->abyOFDMPwrTbl[ii + 1] = 308 - SROMbyReadEmbedded(priv->PortOffset, 308 + SROMbyReadEmbedded(priv->port_offset, 309 309 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL)); 310 310 if (priv->abyOFDMPwrTbl[ii + 1] == 0) 311 311 priv->abyOFDMPwrTbl[ii + 1] = priv->byOFDMPwrG; ··· 323 323 /* Load OFDM A Power Table */ 324 324 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) { 325 325 priv->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] = 326 - SROMbyReadEmbedded(priv->PortOffset, 326 + SROMbyReadEmbedded(priv->port_offset, 327 327 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL)); 328 328 329 329 priv->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] = 330 - SROMbyReadEmbedded(priv->PortOffset, 330 + SROMbyReadEmbedded(priv->port_offset, 331 331 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm)); 332 332 } 333 333 334 334 if (priv->byLocalID > REV_ID_VT3253_B1) { 335 - MACvSelectPage1(priv->PortOffset); 335 + MACvSelectPage1(priv->port_offset); 336 336 337 - VNSvOutPortB(priv->PortOffset + MAC_REG_MSRCTL + 1, 337 + VNSvOutPortB(priv->port_offset + MAC_REG_MSRCTL + 1, 338 338 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN)); 339 339 340 - MACvSelectPage0(priv->PortOffset); 340 + MACvSelectPage0(priv->port_offset); 341 341 } 342 342 343 343 /* use relative tx timeout and 802.11i D4 */ 344 - MACvWordRegBitsOn(priv->PortOffset, 344 + MACvWordRegBitsOn(priv->port_offset, 345 345 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT)); 346 346 347 347 /* set performance parameter by registry */ ··· 349 349 MACvSetLongRetryLimit(priv, priv->byLongRetryLimit); 350 350 351 351 /* reset TSF counter */ 352 - VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); 352 + VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); 353 353 /* enable TSF counter */ 354 - VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 354 + VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 355 355 356 356 /* initialize BBP registers */ 357 357 bb_vt3253_init(priv); ··· 371 371 372 372 priv->bRadioOff = false; 373 373 374 - priv->byRadioCtl = SROMbyReadEmbedded(priv->PortOffset, 374 + priv->byRadioCtl = SROMbyReadEmbedded(priv->port_offset, 375 375 EEP_OFS_RADIOCTL); 376 376 priv->bHWRadioOff = false; 377 377 378 378 if (priv->byRadioCtl & EEP_RADIOCTL_ENABLE) { 379 379 /* Get GPIO */ 380 - MACvGPIOIn(priv->PortOffset, &priv->byGPIO); 380 + MACvGPIOIn(priv->port_offset, &priv->byGPIO); 381 381 382 382 if (((priv->byGPIO & GPIO0_DATA) && 383 383 !(priv->byRadioCtl & EEP_RADIOCTL_INV)) || ··· 390 390 CARDbRadioPowerOff(priv); 391 391 392 392 /* get Permanent network address */ 393 - SROMvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr); 393 + SROMvReadEtherAddress(priv->port_offset, priv->abyCurrentNetAddr); 394 394 pr_debug("Network address = %pM\n", priv->abyCurrentNetAddr); 395 395 396 396 /* reset Tx pointer */ ··· 399 399 CARDvSafeResetTx(priv); 400 400 401 401 if (priv->byLocalID <= REV_ID_VT3253_A1) 402 - MACvRegBitsOn(priv->PortOffset, MAC_REG_RCR, RCR_WPAERR); 402 + MACvRegBitsOn(priv->port_offset, MAC_REG_RCR, RCR_WPAERR); 403 403 404 404 /* Turn On Rx DMA */ 405 - MACvReceive0(priv->PortOffset); 406 - MACvReceive1(priv->PortOffset); 405 + MACvReceive0(priv->port_offset); 406 + MACvReceive1(priv->port_offset); 407 407 408 408 /* start the adapter */ 409 - MACvStart(priv->PortOffset); 409 + MACvStart(priv->port_offset); 410 410 } 411 411 412 412 static void device_print_info(struct vnt_private *priv) 413 413 { 414 414 dev_info(&priv->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n", 415 415 priv->abyCurrentNetAddr, (unsigned long)priv->ioaddr, 416 - (unsigned long)priv->PortOffset, priv->pcid->irq); 416 + (unsigned long)priv->port_offset, priv->pcid->irq); 417 417 } 418 418 419 419 static void device_free_info(struct vnt_private *priv) ··· 424 424 if (priv->mac_hw) 425 425 ieee80211_unregister_hw(priv->hw); 426 426 427 - if (priv->PortOffset) 428 - iounmap(priv->PortOffset); 427 + if (priv->port_offset) 428 + iounmap(priv->port_offset); 429 429 430 430 if (priv->pcid) 431 431 pci_release_regions(priv->pcid); ··· 1029 1029 u32 isr; 1030 1030 unsigned long flags; 1031 1031 1032 - MACvReadISR(priv->PortOffset, &isr); 1032 + MACvReadISR(priv->port_offset, &isr); 1033 1033 1034 1034 if (isr == 0) 1035 1035 return; ··· 1042 1042 spin_lock_irqsave(&priv->lock, flags); 1043 1043 1044 1044 /* Read low level stats */ 1045 - MACvReadMIBCounter(priv->PortOffset, &mib_counter); 1045 + MACvReadMIBCounter(priv->port_offset, &mib_counter); 1046 1046 1047 1047 low_stats->dot11RTSSuccessCount += mib_counter & 0xff; 1048 1048 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff; ··· 1056 1056 * update ISR counter 1057 1057 */ 1058 1058 while (isr && priv->vif) { 1059 - MACvWriteISR(priv->PortOffset, isr); 1059 + MACvWriteISR(priv->port_offset, isr); 1060 1060 1061 1061 if (isr & ISR_FETALERR) { 1062 1062 pr_debug(" ISR_FETALERR\n"); 1063 - VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0); 1064 - VNSvOutPortW(priv->PortOffset + 1063 + VNSvOutPortB(priv->port_offset + MAC_REG_SOFTPWRCTL, 0); 1064 + VNSvOutPortW(priv->port_offset + 1065 1065 MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI); 1066 1066 device_error(priv, isr); 1067 1067 } ··· 1116 1116 ieee80211_queue_stopped(priv->hw, 0)) 1117 1117 ieee80211_wake_queues(priv->hw); 1118 1118 1119 - MACvReadISR(priv->PortOffset, &isr); 1119 + MACvReadISR(priv->port_offset, &isr); 1120 1120 1121 - MACvReceive0(priv->PortOffset); 1122 - MACvReceive1(priv->PortOffset); 1121 + MACvReceive0(priv->port_offset); 1122 + MACvReceive1(priv->port_offset); 1123 1123 1124 1124 if (max_count > priv->opts.int_works) 1125 1125 break; ··· 1136 1136 if (priv->vif) 1137 1137 vnt_interrupt_process(priv); 1138 1138 1139 - MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); 1139 + MACvIntEnable(priv->port_offset, IMR_MASK_VALUE); 1140 1140 } 1141 1141 1142 1142 static irqreturn_t vnt_interrupt(int irq, void *arg) ··· 1145 1145 1146 1146 schedule_work(&priv->interrupt_work); 1147 1147 1148 - MACvIntDisable(priv->PortOffset); 1148 + MACvIntDisable(priv->port_offset); 1149 1149 1150 1150 return IRQ_HANDLED; 1151 1151 } ··· 1201 1201 wmb(); /* second memory barrier */ 1202 1202 1203 1203 if (head_td->td_info->flags & TD_FLAGS_NETIF_SKB) 1204 - MACvTransmitAC0(priv->PortOffset); 1204 + MACvTransmitAC0(priv->port_offset); 1205 1205 else 1206 - MACvTransmit0(priv->PortOffset); 1206 + MACvTransmit0(priv->port_offset); 1207 1207 1208 1208 priv->iTDUsed[dma_idx]++; 1209 1209 ··· 1255 1255 device_init_registers(priv); 1256 1256 1257 1257 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n"); 1258 - MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); 1258 + MACvIntEnable(priv->port_offset, IMR_MASK_VALUE); 1259 1259 1260 1260 ieee80211_wake_queues(hw); 1261 1261 ··· 1305 1305 case NL80211_IFTYPE_STATION: 1306 1306 break; 1307 1307 case NL80211_IFTYPE_ADHOC: 1308 - MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST); 1308 + MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST); 1309 1309 1310 - MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC); 1310 + MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC); 1311 1311 1312 1312 break; 1313 1313 case NL80211_IFTYPE_AP: 1314 - MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST); 1314 + MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST); 1315 1315 1316 - MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP); 1316 + MACvRegBitsOn(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP); 1317 1317 1318 1318 break; 1319 1319 default: ··· 1334 1334 case NL80211_IFTYPE_STATION: 1335 1335 break; 1336 1336 case NL80211_IFTYPE_ADHOC: 1337 - MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX); 1338 - MACvRegBitsOff(priv->PortOffset, 1337 + MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX); 1338 + MACvRegBitsOff(priv->port_offset, 1339 1339 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1340 - MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC); 1340 + MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC); 1341 1341 break; 1342 1342 case NL80211_IFTYPE_AP: 1343 - MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX); 1344 - MACvRegBitsOff(priv->PortOffset, 1343 + MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX); 1344 + MACvRegBitsOff(priv->port_offset, 1345 1345 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1346 - MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP); 1346 + MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP); 1347 1347 break; 1348 1348 default: 1349 1349 break; ··· 1407 1407 1408 1408 spin_lock_irqsave(&priv->lock, flags); 1409 1409 1410 - MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid); 1410 + MACvWriteBSSIDAddress(priv->port_offset, (u8 *)conf->bssid); 1411 1411 1412 1412 spin_unlock_irqrestore(&priv->lock, flags); 1413 1413 } ··· 1423 1423 1424 1424 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 1425 1425 if (conf->use_short_preamble) { 1426 - MACvEnableBarkerPreambleMd(priv->PortOffset); 1426 + MACvEnableBarkerPreambleMd(priv->port_offset); 1427 1427 priv->byPreambleType = true; 1428 1428 } else { 1429 - MACvDisableBarkerPreambleMd(priv->PortOffset); 1429 + MACvDisableBarkerPreambleMd(priv->port_offset); 1430 1430 priv->byPreambleType = false; 1431 1431 } 1432 1432 } 1433 1433 1434 1434 if (changed & BSS_CHANGED_ERP_CTS_PROT) { 1435 1435 if (conf->use_cts_prot) 1436 - MACvEnableProtectMD(priv->PortOffset); 1436 + MACvEnableProtectMD(priv->port_offset); 1437 1437 else 1438 - MACvDisableProtectMD(priv->PortOffset); 1438 + MACvDisableProtectMD(priv->port_offset); 1439 1439 } 1440 1440 1441 1441 if (changed & BSS_CHANGED_ERP_SLOT) { ··· 1459 1459 if (conf->enable_beacon) { 1460 1460 vnt_beacon_enable(priv, vif, conf); 1461 1461 1462 - MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR, 1462 + MACvRegBitsOn(priv->port_offset, MAC_REG_TCR, 1463 1463 TCR_AUTOBCNTX); 1464 1464 } else { 1465 - MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, 1465 + MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, 1466 1466 TCR_AUTOBCNTX); 1467 1467 } 1468 1468 } ··· 1477 1477 1478 1478 CARDvSetFirstNextTBTT(priv, conf->beacon_int); 1479 1479 } else { 1480 - VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, 1480 + VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL, 1481 1481 TFTCTL_TSFCNTRST); 1482 - VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, 1482 + VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL, 1483 1483 TFTCTL_TSFCNTREN); 1484 1484 } 1485 1485 } ··· 1513 1513 1514 1514 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC; 1515 1515 1516 - VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode); 1516 + VNSvInPortB(priv->port_offset + MAC_REG_RCR, &rx_mode); 1517 1517 1518 1518 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode); 1519 1519 ··· 1524 1524 spin_lock_irqsave(&priv->lock, flags); 1525 1525 1526 1526 if (priv->mc_list_count > 2) { 1527 - MACvSelectPage1(priv->PortOffset); 1527 + MACvSelectPage1(priv->port_offset); 1528 1528 1529 - VNSvOutPortD(priv->PortOffset + 1529 + VNSvOutPortD(priv->port_offset + 1530 1530 MAC_REG_MAR0, 0xffffffff); 1531 - VNSvOutPortD(priv->PortOffset + 1531 + VNSvOutPortD(priv->port_offset + 1532 1532 MAC_REG_MAR0 + 4, 0xffffffff); 1533 1533 1534 - MACvSelectPage0(priv->PortOffset); 1534 + MACvSelectPage0(priv->port_offset); 1535 1535 } else { 1536 - MACvSelectPage1(priv->PortOffset); 1536 + MACvSelectPage1(priv->port_offset); 1537 1537 1538 - VNSvOutPortD(priv->PortOffset + 1538 + VNSvOutPortD(priv->port_offset + 1539 1539 MAC_REG_MAR0, (u32)multicast); 1540 - VNSvOutPortD(priv->PortOffset + 1540 + VNSvOutPortD(priv->port_offset + 1541 1541 MAC_REG_MAR0 + 4, 1542 1542 (u32)(multicast >> 32)); 1543 1543 1544 - MACvSelectPage0(priv->PortOffset); 1544 + MACvSelectPage0(priv->port_offset); 1545 1545 } 1546 1546 1547 1547 spin_unlock_irqrestore(&priv->lock, flags); ··· 1561 1561 rx_mode |= RCR_BSSID; 1562 1562 } 1563 1563 1564 - VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode); 1564 + VNSvOutPortB(priv->port_offset + MAC_REG_RCR, rx_mode); 1565 1565 1566 1566 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode); 1567 1567 } ··· 1621 1621 struct vnt_private *priv = hw->priv; 1622 1622 1623 1623 /* reset TSF counter */ 1624 - VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); 1624 + VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); 1625 1625 } 1626 1626 1627 1627 static const struct ieee80211_ops vnt_mac_ops = { ··· 1698 1698 1699 1699 priv->memaddr = pci_resource_start(pcid, 0); 1700 1700 priv->ioaddr = pci_resource_start(pcid, 1); 1701 - priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK, 1701 + priv->port_offset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK, 1702 1702 256); 1703 - if (!priv->PortOffset) { 1703 + if (!priv->port_offset) { 1704 1704 dev_err(&pcid->dev, ": Failed to IO remapping ..\n"); 1705 1705 device_free_info(priv); 1706 1706 return -ENODEV; ··· 1729 1729 } 1730 1730 /* initial to reload eeprom */ 1731 1731 MACvInitialize(priv); 1732 - MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr); 1732 + MACvReadEtherAddress(priv->port_offset, priv->abyCurrentNetAddr); 1733 1733 1734 1734 /* Get RFType */ 1735 - priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE); 1735 + priv->byRFType = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_RFTYPE); 1736 1736 priv->byRFType &= RF_MASK; 1737 1737 1738 1738 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
+23 -23
drivers/staging/vt6655/mac.c
··· 57 57 bool MACbIsRegBitsOff(struct vnt_private *priv, unsigned char byRegOfs, 58 58 unsigned char byTestBits) 59 59 { 60 - void __iomem *io_base = priv->PortOffset; 60 + void __iomem *io_base = priv->port_offset; 61 61 62 62 return !(ioread8(io_base + byRegOfs) & byTestBits); 63 63 } ··· 77 77 */ 78 78 bool MACbIsIntDisable(struct vnt_private *priv) 79 79 { 80 - void __iomem *io_base = priv->PortOffset; 80 + void __iomem *io_base = priv->port_offset; 81 81 82 82 if (ioread32(io_base + MAC_REG_IMR)) 83 83 return false; ··· 102 102 void MACvSetShortRetryLimit(struct vnt_private *priv, 103 103 unsigned char byRetryLimit) 104 104 { 105 - void __iomem *io_base = priv->PortOffset; 105 + void __iomem *io_base = priv->port_offset; 106 106 /* set SRT */ 107 107 iowrite8(byRetryLimit, io_base + MAC_REG_SRT); 108 108 } ··· 124 124 void MACvSetLongRetryLimit(struct vnt_private *priv, 125 125 unsigned char byRetryLimit) 126 126 { 127 - void __iomem *io_base = priv->PortOffset; 127 + void __iomem *io_base = priv->port_offset; 128 128 /* set LRT */ 129 129 iowrite8(byRetryLimit, io_base + MAC_REG_LRT); 130 130 } ··· 145 145 */ 146 146 void MACvSetLoopbackMode(struct vnt_private *priv, unsigned char byLoopbackMode) 147 147 { 148 - void __iomem *io_base = priv->PortOffset; 148 + void __iomem *io_base = priv->port_offset; 149 149 150 150 byLoopbackMode <<= 6; 151 151 /* set TCR */ ··· 168 168 */ 169 169 void MACvSaveContext(struct vnt_private *priv, unsigned char *cxt_buf) 170 170 { 171 - void __iomem *io_base = priv->PortOffset; 171 + void __iomem *io_base = priv->port_offset; 172 172 173 173 /* read page0 register */ 174 174 memcpy_fromio(cxt_buf, io_base, MAC_MAX_CONTEXT_SIZE_PAGE0); ··· 198 198 */ 199 199 void MACvRestoreContext(struct vnt_private *priv, unsigned char *cxt_buf) 200 200 { 201 - void __iomem *io_base = priv->PortOffset; 201 + void __iomem *io_base = priv->port_offset; 202 202 203 203 MACvSelectPage1(io_base); 204 204 /* restore page1 */ ··· 249 249 */ 250 250 bool MACbSoftwareReset(struct vnt_private *priv) 251 251 { 252 - void __iomem *io_base = priv->PortOffset; 252 + void __iomem *io_base = priv->port_offset; 253 253 unsigned short ww; 254 254 255 255 /* turn on HOSTCR_SOFTRST, just write 0x01 to reset */ ··· 312 312 */ 313 313 bool MACbSafeRxOff(struct vnt_private *priv) 314 314 { 315 - void __iomem *io_base = priv->PortOffset; 315 + void __iomem *io_base = priv->port_offset; 316 316 unsigned short ww; 317 317 318 318 /* turn off wow temp for turn off Rx safely */ ··· 366 366 */ 367 367 bool MACbSafeTxOff(struct vnt_private *priv) 368 368 { 369 - void __iomem *io_base = priv->PortOffset; 369 + void __iomem *io_base = priv->port_offset; 370 370 unsigned short ww; 371 371 372 372 /* Clear TX DMA */ ··· 422 422 */ 423 423 bool MACbSafeStop(struct vnt_private *priv) 424 424 { 425 - void __iomem *io_base = priv->PortOffset; 425 + void __iomem *io_base = priv->port_offset; 426 426 427 427 MACvRegBitsOff(io_base, MAC_REG_TCR, TCR_AUTOBCNTX); 428 428 ··· 457 457 */ 458 458 bool MACbShutdown(struct vnt_private *priv) 459 459 { 460 - void __iomem *io_base = priv->PortOffset; 460 + void __iomem *io_base = priv->port_offset; 461 461 /* disable MAC IMR */ 462 462 MACvIntDisable(io_base); 463 463 MACvSetLoopbackMode(priv, MAC_LB_INTERNAL); ··· 485 485 */ 486 486 void MACvInitialize(struct vnt_private *priv) 487 487 { 488 - void __iomem *io_base = priv->PortOffset; 488 + void __iomem *io_base = priv->port_offset; 489 489 /* clear sticky bits */ 490 490 MACvClearStckDS(io_base); 491 491 /* disable force PME-enable */ ··· 517 517 */ 518 518 void MACvSetCurrRx0DescAddr(struct vnt_private *priv, u32 curr_desc_addr) 519 519 { 520 - void __iomem *io_base = priv->PortOffset; 520 + void __iomem *io_base = priv->port_offset; 521 521 unsigned short ww; 522 522 unsigned char org_dma_ctl; 523 523 ··· 551 551 */ 552 552 void MACvSetCurrRx1DescAddr(struct vnt_private *priv, u32 curr_desc_addr) 553 553 { 554 - void __iomem *io_base = priv->PortOffset; 554 + void __iomem *io_base = priv->port_offset; 555 555 unsigned short ww; 556 556 unsigned char org_dma_ctl; 557 557 ··· 586 586 void MACvSetCurrTx0DescAddrEx(struct vnt_private *priv, 587 587 u32 curr_desc_addr) 588 588 { 589 - void __iomem *io_base = priv->PortOffset; 589 + void __iomem *io_base = priv->port_offset; 590 590 unsigned short ww; 591 591 unsigned char org_dma_ctl; 592 592 ··· 622 622 void MACvSetCurrAC0DescAddrEx(struct vnt_private *priv, 623 623 u32 curr_desc_addr) 624 624 { 625 - void __iomem *io_base = priv->PortOffset; 625 + void __iomem *io_base = priv->port_offset; 626 626 unsigned short ww; 627 627 unsigned char org_dma_ctl; 628 628 ··· 666 666 */ 667 667 void MACvTimer0MicroSDelay(struct vnt_private *priv, unsigned int uDelay) 668 668 { 669 - void __iomem *io_base = priv->PortOffset; 669 + void __iomem *io_base = priv->port_offset; 670 670 unsigned char byValue; 671 671 unsigned int uu, ii; 672 672 ··· 703 703 void MACvOneShotTimer1MicroSec(struct vnt_private *priv, 704 704 unsigned int uDelayTime) 705 705 { 706 - void __iomem *io_base = priv->PortOffset; 706 + void __iomem *io_base = priv->port_offset; 707 707 708 708 iowrite8(0, io_base + MAC_REG_TMCTL1); 709 709 iowrite32(uDelayTime, io_base + MAC_REG_TMDATA1); ··· 713 713 void MACvSetMISCFifo(struct vnt_private *priv, unsigned short offset, 714 714 u32 data) 715 715 { 716 - void __iomem *io_base = priv->PortOffset; 716 + void __iomem *io_base = priv->port_offset; 717 717 718 718 if (offset > 273) 719 719 return; ··· 724 724 725 725 bool MACbPSWakeup(struct vnt_private *priv) 726 726 { 727 - void __iomem *io_base = priv->PortOffset; 727 + void __iomem *io_base = priv->port_offset; 728 728 unsigned int ww; 729 729 /* Read PSCTL */ 730 730 if (MACbIsRegBitsOff(priv, MAC_REG_PSCTL, PSCTL_PS)) ··· 765 765 unsigned char *pbyAddr, u32 *pdwKey, 766 766 unsigned char byLocalID) 767 767 { 768 - void __iomem *io_base = priv->PortOffset; 768 + void __iomem *io_base = priv->port_offset; 769 769 unsigned short offset; 770 770 u32 data; 771 771 int ii; ··· 830 830 */ 831 831 void MACvDisableKeyEntry(struct vnt_private *priv, unsigned int uEntryIdx) 832 832 { 833 - void __iomem *io_base = priv->PortOffset; 833 + void __iomem *io_base = priv->port_offset; 834 834 unsigned short offset; 835 835 836 836 offset = MISCFIFO_KEYETRY0;
+12 -12
drivers/staging/vt6655/power.c
··· 52 52 u16 wAID = priv->current_aid | BIT(14) | BIT(15); 53 53 54 54 /* set period of power up before TBTT */ 55 - VNSvOutPortW(priv->PortOffset + MAC_REG_PWBT, C_PWBT); 55 + VNSvOutPortW(priv->port_offset + MAC_REG_PWBT, C_PWBT); 56 56 if (priv->op_mode != NL80211_IFTYPE_ADHOC) { 57 57 /* set AID */ 58 - VNSvOutPortW(priv->PortOffset + MAC_REG_AIDATIM, wAID); 58 + VNSvOutPortW(priv->port_offset + MAC_REG_AIDATIM, wAID); 59 59 } 60 60 61 61 /* Set AutoSleep */ 62 - MACvRegBitsOn(priv->PortOffset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP); 62 + MACvRegBitsOn(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP); 63 63 64 64 /* Set HWUTSF */ 65 - MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_HWUTSF); 65 + MACvRegBitsOn(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF); 66 66 67 67 if (wListenInterval >= 2) { 68 68 /* clear always listen beacon */ 69 - MACvRegBitsOff(priv->PortOffset, MAC_REG_PSCTL, PSCTL_ALBCN); 69 + MACvRegBitsOff(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN); 70 70 /* first time set listen next beacon */ 71 - MACvRegBitsOn(priv->PortOffset, MAC_REG_PSCTL, PSCTL_LNBCN); 71 + MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN); 72 72 } else { 73 73 /* always listen beacon */ 74 - MACvRegBitsOn(priv->PortOffset, MAC_REG_PSCTL, PSCTL_ALBCN); 74 + MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN); 75 75 } 76 76 77 77 /* enable power saving hw function */ 78 - MACvRegBitsOn(priv->PortOffset, MAC_REG_PSCTL, PSCTL_PSEN); 78 + MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_PSEN); 79 79 priv->bEnablePSMode = true; 80 80 81 81 priv->bPWBitOn = true; ··· 98 98 MACbPSWakeup(priv); 99 99 100 100 /* clear AutoSleep */ 101 - MACvRegBitsOff(priv->PortOffset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP); 101 + MACvRegBitsOff(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP); 102 102 103 103 /* clear HWUTSF */ 104 - MACvRegBitsOff(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_HWUTSF); 104 + MACvRegBitsOff(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF); 105 105 106 106 /* set always listen beacon */ 107 - MACvRegBitsOn(priv->PortOffset, MAC_REG_PSCTL, PSCTL_ALBCN); 107 + MACvRegBitsOn(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN); 108 108 109 109 priv->bEnablePSMode = false; 110 110 ··· 135 135 136 136 if (priv->wake_up_count == 1) { 137 137 /* Turn on wake up to listen next beacon */ 138 - MACvRegBitsOn(priv->PortOffset, 138 + MACvRegBitsOn(priv->port_offset, 139 139 MAC_REG_PSCTL, PSCTL_LNBCN); 140 140 wake_up = true; 141 141 }
+6 -6
drivers/staging/vt6655/rf.c
··· 406 406 */ 407 407 static bool s_bAL7230Init(struct vnt_private *priv) 408 408 { 409 - void __iomem *iobase = priv->PortOffset; 409 + void __iomem *iobase = priv->port_offset; 410 410 int ii; 411 411 bool ret; 412 412 ··· 455 455 */ 456 456 static bool s_bAL7230SelectChannel(struct vnt_private *priv, unsigned char byChannel) 457 457 { 458 - void __iomem *iobase = priv->PortOffset; 458 + void __iomem *iobase = priv->port_offset; 459 459 bool ret; 460 460 461 461 ret = true; ··· 494 494 */ 495 495 bool IFRFbWriteEmbedded(struct vnt_private *priv, unsigned long dwData) 496 496 { 497 - void __iomem *iobase = priv->PortOffset; 497 + void __iomem *iobase = priv->port_offset; 498 498 unsigned short ww; 499 499 unsigned long dwValue; 500 500 ··· 527 527 */ 528 528 static bool RFbAL2230Init(struct vnt_private *priv) 529 529 { 530 - void __iomem *iobase = priv->PortOffset; 530 + void __iomem *iobase = priv->port_offset; 531 531 int ii; 532 532 bool ret; 533 533 ··· 572 572 573 573 static bool RFbAL2230SelectChannel(struct vnt_private *priv, unsigned char byChannel) 574 574 { 575 - void __iomem *iobase = priv->PortOffset; 575 + void __iomem *iobase = priv->port_offset; 576 576 bool ret; 577 577 578 578 ret = true; ··· 679 679 bool RFvWriteWakeProgSyn(struct vnt_private *priv, unsigned char byRFType, 680 680 u16 uChannel) 681 681 { 682 - void __iomem *iobase = priv->PortOffset; 682 + void __iomem *iobase = priv->port_offset; 683 683 int ii; 684 684 unsigned char byInitCount = 0; 685 685 unsigned char bySleepCount = 0;
+6 -6
drivers/staging/vt6655/rxtx.c
··· 1422 1422 1423 1423 priv->wBCNBufLen = sizeof(*short_head) + skb->len; 1424 1424 1425 - MACvSetCurrBCNTxDescAddr(priv->PortOffset, priv->tx_beacon_dma); 1425 + MACvSetCurrBCNTxDescAddr(priv->port_offset, priv->tx_beacon_dma); 1426 1426 1427 - MACvSetCurrBCNLength(priv->PortOffset, priv->wBCNBufLen); 1427 + MACvSetCurrBCNLength(priv->port_offset, priv->wBCNBufLen); 1428 1428 /* Set auto Transmit on */ 1429 - MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX); 1429 + MACvRegBitsOn(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX); 1430 1430 /* Poll Transmit the adapter */ 1431 - MACvTransmitBCN(priv->PortOffset); 1431 + MACvTransmitBCN(priv->port_offset); 1432 1432 1433 1433 return 0; 1434 1434 } ··· 1452 1452 int vnt_beacon_enable(struct vnt_private *priv, struct ieee80211_vif *vif, 1453 1453 struct ieee80211_bss_conf *conf) 1454 1454 { 1455 - VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); 1455 + VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); 1456 1456 1457 - VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1457 + VNSvOutPortB(priv->port_offset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1458 1458 1459 1459 CARDvSetFirstNextTBTT(priv, conf->beacon_int); 1460 1460