MIPS: IP28: Change to build with -mr10k-cache-barrier=store

Richard Sandiford's new code for inserting the cache-barriers, for GCC
4.3 and above and already incorporated in the current GCC-release, uses
a slightly different option-syntax.

Signed-off-by: peter fuerst <post@pfrst.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by peter fuerst and committed by Ralf Baechle 195d1a96 7e9e05ca

+3 -3
+3 -3
arch/mips/Makefile
··· 473 473 # Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys 474 474 # 475 475 ifdef CONFIG_SGI_IP28 476 - ifeq ($(call cc-option-yn,-mr10k-cache-barrier=1), n) 477 - $(error gcc doesn't support needed option -mr10k-cache-barrier=1) 476 + ifeq ($(call cc-option-yn,-mr10k-cache-barrier=store), n) 477 + $(error gcc doesn't support needed option -mr10k-cache-barrier=store) 478 478 endif 479 479 endif 480 480 core-$(CONFIG_SGI_IP28) += arch/mips/sgi-ip22/ 481 - cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=1 -I$(srctree)/arch/mips/include/asm/mach-ip28 481 + cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=store -I$(srctree)/arch/mips/include/asm/mach-ip28 482 482 load-$(CONFIG_SGI_IP28) += 0xa800000020004000 483 483 484 484 #