Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Cross-merge networking fixes after downstream PR.

No conflicts.

Adjacent changes:
e3f02f32a050 ("ionic: fix kernel panic due to multi-buffer handling")
d9c04209990b ("ionic: Mark error paths in the data path as unlikely")

Signed-off-by: Jakub Kicinski <kuba@kernel.org>

+3712 -1736
+4
CREDITS
··· 1214 1214 S: (ask for current address) 1215 1215 S: USA 1216 1216 1217 + N: Larry Finger 1218 + E: Larry.Finger@lwfinger.net 1219 + D: Maintainer of wireless drivers, too many to list here 1220 + 1217 1221 N: Jürgen Fischer 1218 1222 E: fischer@norbit.de 1219 1223 D: Author of Adaptec AHA-152x SCSI driver
+2 -2
Documentation/devicetree/bindings/dma/fsl,edma.yaml
··· 59 59 - 3 60 60 61 61 dma-channels: 62 - minItems: 1 63 - maxItems: 64 62 + minimum: 1 63 + maximum: 64 64 64 65 65 clocks: 66 66 minItems: 1
+1 -1
Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml
··· 77 77 - clocks 78 78 79 79 allOf: 80 - - $ref: i2c-controller.yaml 80 + - $ref: /schemas/i2c/i2c-controller.yaml# 81 81 - if: 82 82 properties: 83 83 compatible:
+1 -1
Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml
··· 21 21 google,cros-ec-spi or google,cros-ec-i2c. 22 22 23 23 allOf: 24 - - $ref: i2c-controller.yaml# 24 + - $ref: /schemas/i2c/i2c-controller.yaml# 25 25 26 26 properties: 27 27 compatible:
-1
Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
··· 128 128 - cell-index 129 129 - reg 130 130 - fsl,fman-ports 131 - - ptp-timer 132 131 133 132 dependencies: 134 133 pcs-handle-names:
-3
Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml
··· 29 29 - qcom,pm7325-gpio 30 30 - qcom,pm7550ba-gpio 31 31 - qcom,pm8005-gpio 32 - - qcom,pm8008-gpio 33 32 - qcom,pm8018-gpio 34 33 - qcom,pm8019-gpio 35 34 - qcom,pm8038-gpio ··· 125 126 compatible: 126 127 contains: 127 128 enum: 128 - - qcom,pm8008-gpio 129 129 - qcom,pmi8950-gpio 130 130 - qcom,pmr735d-gpio 131 131 then: ··· 446 448 - gpio1-gpio10 for pm7325 447 449 - gpio1-gpio8 for pm7550ba 448 450 - gpio1-gpio4 for pm8005 449 - - gpio1-gpio2 for pm8008 450 451 - gpio1-gpio6 for pm8018 451 452 - gpio1-gpio12 for pm8038 452 453 - gpio1-gpio40 for pm8058
+1
Documentation/filesystems/proc.rst
··· 571 571 um userfaultfd missing tracking 572 572 uw userfaultfd wr-protect tracking 573 573 ss shadow stack page 574 + sl sealed 574 575 == ======================================= 575 576 576 577 Note that there is no guarantee that every flag and associated mnemonic will
+8 -7
Documentation/i2c/i2c_bus.svg
··· 1 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?> 2 2 <!-- Created with Inkscape (http://www.inkscape.org/) --> 3 + <!-- Updated to inclusive terminology by Wolfram Sang --> 3 4 4 5 <svg 5 6 xmlns:dc="http://purl.org/dc/elements/1.1/" ··· 1121 1120 <rect 1122 1121 style="opacity:1;fill:#ffb9b9;fill-opacity:1;stroke:#f00000;stroke-width:2.8125;stroke-linecap:round;stroke-linejoin:round;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1" 1123 1122 id="rect4424-3-2-9-7" 1124 - width="112.5" 1123 + width="134.5" 1125 1124 height="113.75008" 1126 1125 x="112.5" 1127 1126 y="471.11221" ··· 1134 1133 y="521.46259" 1135 1134 id="text4349"><tspan 1136 1135 sodipodi:role="line" 1137 - x="167.5354" 1136 + x="178.5354" 1138 1137 y="521.46259" 1139 1138 style="font-size:25px;line-height:1.25;font-family:sans-serif;text-align:center;text-anchor:middle" 1140 1139 id="tspan1273">I2C</tspan><tspan 1141 1140 sodipodi:role="line" 1142 - x="167.5354" 1141 + x="178.5354" 1143 1142 y="552.71259" 1144 1143 style="font-size:25px;line-height:1.25;font-family:sans-serif;text-align:center;text-anchor:middle" 1145 - id="tspan1285">Master</tspan></text> 1144 + id="tspan1285">Controller</tspan></text> 1146 1145 <rect 1147 1146 style="color:#000000;clip-rule:nonzero;display:inline;overflow:visible;visibility:visible;opacity:1;isolation:auto;mix-blend-mode:normal;color-interpolation:sRGB;color-interpolation-filters:linearRGB;solid-color:#000000;solid-opacity:1;fill:#b9ffb9;fill-opacity:1;fill-rule:nonzero;stroke:#006400;stroke-width:2.8125;stroke-linecap:round;stroke-linejoin:round;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;color-rendering:auto;image-rendering:auto;shape-rendering:auto;text-rendering:auto;enable-background:accumulate" 1148 1147 id="rect4424-3-2-9-7-3-3-5-3" ··· 1172 1171 x="318.59131" 1173 1172 y="552.08752" 1174 1173 style="font-size:25.00000191px;line-height:1.25;font-family:sans-serif;text-align:center;text-anchor:middle;stroke-width:1px" 1175 - id="tspan1287">Slave</tspan></text> 1174 + id="tspan1287">Target</tspan></text> 1176 1175 <path 1177 1176 style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1.99968767;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1" 1178 1177 d="m 112.49995,677.36223 c 712.50005,0 712.50005,0 712.50005,0" ··· 1234 1233 x="468.59131" 1235 1234 y="552.08746" 1236 1235 style="font-size:25.00000191px;line-height:1.25;font-family:sans-serif;text-align:center;text-anchor:middle;stroke-width:1px" 1237 - id="tspan1287-6">Slave</tspan></text> 1236 + id="tspan1287-6">Target</tspan></text> 1238 1237 <rect 1239 1238 style="color:#000000;clip-rule:nonzero;display:inline;overflow:visible;visibility:visible;opacity:1;isolation:auto;mix-blend-mode:normal;color-interpolation:sRGB;color-interpolation-filters:linearRGB;solid-color:#000000;solid-opacity:1;vector-effect:none;fill:#b9ffb9;fill-opacity:1;fill-rule:nonzero;stroke:#006400;stroke-width:2.8125;stroke-linecap:round;stroke-linejoin:round;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;color-rendering:auto;image-rendering:auto;shape-rendering:auto;text-rendering:auto;enable-background:accumulate" 1240 1239 id="rect4424-3-2-9-7-3-3-5-3-1" ··· 1259 1258 x="618.59131" 1260 1259 y="552.08746" 1261 1260 style="font-size:25.00000191px;line-height:1.25;font-family:sans-serif;text-align:center;text-anchor:middle;stroke-width:1px" 1262 - id="tspan1287-9">Slave</tspan></text> 1261 + id="tspan1287-9">Target</tspan></text> 1263 1262 <path 1264 1263 style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1.99968743;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1;marker-end:url(#DotM)" 1265 1264 d="m 150,583.61221 v 93.75"
+50 -29
Documentation/i2c/summary.rst
··· 3 3 ============================= 4 4 5 5 I²C (pronounce: I squared C and written I2C in the kernel documentation) is 6 - a protocol developed by Philips. It is a slow two-wire protocol (variable 7 - speed, up to 400 kHz), with a high speed extension (3.4 MHz). It provides 6 + a protocol developed by Philips. It is a two-wire protocol with variable 7 + speed (typically up to 400 kHz, high speed modes up to 5 MHz). It provides 8 8 an inexpensive bus for connecting many types of devices with infrequent or 9 - low bandwidth communications needs. I2C is widely used with embedded 10 - systems. Some systems use variants that don't meet branding requirements, 9 + low bandwidth communications needs. I2C is widely used with embedded 10 + systems. Some systems use variants that don't meet branding requirements, 11 11 and so are not advertised as being I2C but come under different names, 12 12 e.g. TWI (Two Wire Interface), IIC. 13 13 14 - The latest official I2C specification is the `"I2C-bus specification and user 15 - manual" (UM10204) <https://www.nxp.com/webapp/Download?colCode=UM10204>`_ 16 - published by NXP Semiconductors. However, you need to log-in to the site to 17 - access the PDF. An older version of the specification (revision 6) is archived 18 - `here <https://web.archive.org/web/20210813122132/https://www.nxp.com/docs/en/user-guide/UM10204.pdf>`_. 14 + The latest official I2C specification is the `"I²C-bus specification and user 15 + manual" (UM10204) <https://www.nxp.com/docs/en/user-guide/UM10204.pdf>`_ 16 + published by NXP Semiconductors, version 7 as of this writing. 19 17 20 18 SMBus (System Management Bus) is based on the I2C protocol, and is mostly 21 - a subset of I2C protocols and signaling. Many I2C devices will work on an 19 + a subset of I2C protocols and signaling. Many I2C devices will work on an 22 20 SMBus, but some SMBus protocols add semantics beyond what is required to 23 - achieve I2C branding. Modern PC mainboards rely on SMBus. The most common 21 + achieve I2C branding. Modern PC mainboards rely on SMBus. The most common 24 22 devices connected through SMBus are RAM modules configured using I2C EEPROMs, 25 23 and hardware monitoring chips. 26 24 27 25 Because the SMBus is mostly a subset of the generalized I2C bus, we can 28 - use its protocols on many I2C systems. However, there are systems that don't 26 + use its protocols on many I2C systems. However, there are systems that don't 29 27 meet both SMBus and I2C electrical constraints; and others which can't 30 28 implement all the common SMBus protocol semantics or messages. 31 29 ··· 31 33 Terminology 32 34 =========== 33 35 34 - Using the terminology from the official documentation, the I2C bus connects 35 - one or more *master* chips and one or more *slave* chips. 36 + The I2C bus connects one or more controller chips and one or more target chips. 36 37 37 38 .. kernel-figure:: i2c_bus.svg 38 - :alt: Simple I2C bus with one master and 3 slaves 39 + :alt: Simple I2C bus with one controller and 3 targets 39 40 40 41 Simple I2C bus 41 42 42 - A **master** chip is a node that starts communications with slaves. In the 43 - Linux kernel implementation it is called an **adapter** or bus. Adapter 44 - drivers are in the ``drivers/i2c/busses/`` subdirectory. 43 + A **controller** chip is a node that starts communications with targets. In the 44 + Linux kernel implementation it is also called an "adapter" or "bus". Controller 45 + drivers are usually in the ``drivers/i2c/busses/`` subdirectory. 45 46 46 - An **algorithm** contains general code that can be used to implement a 47 - whole class of I2C adapters. Each specific adapter driver either depends on 48 - an algorithm driver in the ``drivers/i2c/algos/`` subdirectory, or includes 49 - its own implementation. 47 + An **algorithm** contains general code that can be used to implement a whole 48 + class of I2C controllers. Each specific controller driver either depends on an 49 + algorithm driver in the ``drivers/i2c/algos/`` subdirectory, or includes its 50 + own implementation. 50 51 51 - A **slave** chip is a node that responds to communications when addressed 52 - by the master. In Linux it is called a **client**. Client drivers are kept 53 - in a directory specific to the feature they provide, for example 54 - ``drivers/media/gpio/`` for GPIO expanders and ``drivers/media/i2c/`` for 52 + A **target** chip is a node that responds to communications when addressed by a 53 + controller. In the Linux kernel implementation it is also called a "client". 54 + While targets are usually separate external chips, Linux can also act as a 55 + target (needs hardware support) and respond to another controller on the bus. 56 + This is then called a **local target**. In contrast, an external chip is called 57 + a **remote target**. 58 + 59 + Target drivers are kept in a directory specific to the feature they provide, 60 + for example ``drivers/gpio/`` for GPIO expanders and ``drivers/media/i2c/`` for 55 61 video-related chips. 56 62 57 - For the example configuration in figure, you will need a driver for your 58 - I2C adapter, and drivers for your I2C devices (usually one driver for each 59 - device). 63 + For the example configuration in the figure above, you will need one driver for 64 + the I2C controller, and drivers for your I2C targets. Usually one driver for 65 + each target. 66 + 67 + Synonyms 68 + -------- 69 + 70 + As mentioned above, the Linux I2C implementation historically uses the terms 71 + "adapter" for controller and "client" for target. A number of data structures 72 + have these synonyms in their name. So, when discussing implementation details, 73 + you should be aware of these terms as well. The official wording is preferred, 74 + though. 75 + 76 + Outdated terminology 77 + -------------------- 78 + 79 + In earlier I2C specifications, controller was named "master" and target was 80 + named "slave". These terms have been obsoleted with v7 of the specification and 81 + their use is also discouraged by the Linux Kernel Code of Conduct. You may 82 + still find them in references to documentation which has not been updated. The 83 + general attitude, however, is to use the inclusive terms: controller and 84 + target. Work to replace the old terminology in the Linux Kernel is on-going.
+5 -2
Documentation/netlink/specs/ethtool.yaml
··· 1634 1634 attributes: 1635 1635 - header 1636 1636 reply: 1637 - attributes: &pse 1637 + attributes: 1638 1638 - header 1639 1639 - podl-pse-admin-state 1640 1640 - podl-pse-admin-control ··· 1651 1651 1652 1652 do: 1653 1653 request: 1654 - attributes: *pse 1654 + attributes: 1655 + - header 1656 + - podl-pse-admin-control 1657 + - c33-pse-admin-control 1655 1658 - 1656 1659 name: rss-get 1657 1660 doc: Get RSS params.
-2
Documentation/netlink/specs/nfsd.yaml
··· 123 123 doc: dump pending nfsd rpc 124 124 attribute-set: rpc-status 125 125 dump: 126 - pre: nfsd-nl-rpc-status-get-start 127 - post: nfsd-nl-rpc-status-get-done 128 126 reply: 129 127 attributes: 130 128 - xid
+9 -12
MAINTAINERS
··· 3601 3601 F: drivers/net/wireless/broadcom/b43/ 3602 3602 3603 3603 B43LEGACY WIRELESS DRIVER 3604 - M: Larry Finger <Larry.Finger@lwfinger.net> 3605 3604 L: linux-wireless@vger.kernel.org 3606 3605 L: b43-dev@lists.infradead.org 3607 - S: Maintained 3606 + S: Orphan 3608 3607 W: https://wireless.wiki.kernel.org/en/users/Drivers/b43 3609 3608 F: drivers/net/wireless/broadcom/b43legacy/ 3610 3609 ··· 4082 4083 4083 4084 BPF [SECURITY & LSM] (Security Audit and Enforcement using BPF) 4084 4085 M: KP Singh <kpsingh@kernel.org> 4085 - R: Matt Bobrowski <mattbobrowski@google.com> 4086 + M: Matt Bobrowski <mattbobrowski@google.com> 4086 4087 L: bpf@vger.kernel.org 4087 4088 S: Maintained 4088 4089 F: Documentation/bpf/prog_lsm.rst 4089 4090 F: include/linux/bpf_lsm.h 4090 4091 F: kernel/bpf/bpf_lsm.c 4092 + F: kernel/trace/bpf_trace.c 4091 4093 F: security/bpf/ 4092 4094 4093 4095 BPF [SELFTESTS] (Test Runners & Infrastructure) ··· 12383 12383 12384 12384 KVM PARAVIRT (KVM/paravirt) 12385 12385 M: Paolo Bonzini <pbonzini@redhat.com> 12386 - R: Wanpeng Li <wanpengli@tencent.com> 12387 12386 R: Vitaly Kuznetsov <vkuznets@redhat.com> 12388 12387 L: kvm@vger.kernel.org 12389 12388 S: Supported ··· 17533 17534 PENSANDO ETHERNET DRIVERS 17534 17535 M: Shannon Nelson <shannon.nelson@amd.com> 17535 17536 M: Brett Creeley <brett.creeley@amd.com> 17536 - M: drivers@pensando.io 17537 17537 L: netdev@vger.kernel.org 17538 17538 S: Supported 17539 17539 F: Documentation/networking/device_drivers/ethernet/pensando/ionic.rst ··· 18210 18212 M: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 18211 18213 M: Banajit Goswami <bgoswami@quicinc.com> 18212 18214 L: alsa-devel@alsa-project.org (moderated for non-subscribers) 18215 + L: linux-arm-msm@vger.kernel.org 18213 18216 S: Supported 18214 18217 F: Documentation/devicetree/bindings/soc/qcom/qcom,apr* 18215 18218 F: Documentation/devicetree/bindings/sound/qcom,* ··· 18375 18376 L: ath12k@lists.infradead.org 18376 18377 S: Supported 18377 18378 W: https://wireless.wiki.kernel.org/en/users/Drivers/ath12k 18378 - T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git 18379 + T: git git://git.kernel.org/pub/scm/linux/kernel/git/ath/ath.git 18379 18380 F: drivers/net/wireless/ath/ath12k/ 18380 18381 N: ath12k 18381 18382 ··· 18385 18386 L: ath10k@lists.infradead.org 18386 18387 S: Supported 18387 18388 W: https://wireless.wiki.kernel.org/en/users/Drivers/ath10k 18388 - T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git 18389 + T: git git://git.kernel.org/pub/scm/linux/kernel/git/ath/ath.git 18389 18390 F: drivers/net/wireless/ath/ath10k/ 18390 18391 N: ath10k 18391 18392 ··· 18396 18397 S: Supported 18397 18398 W: https://wireless.wiki.kernel.org/en/users/Drivers/ath11k 18398 18399 B: https://wireless.wiki.kernel.org/en/users/Drivers/ath11k/bugreport 18399 - T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git 18400 + T: git git://git.kernel.org/pub/scm/linux/kernel/git/ath/ath.git 18400 18401 F: drivers/net/wireless/ath/ath11k/ 18401 18402 N: ath11k 18402 18403 ··· 18405 18406 L: linux-wireless@vger.kernel.org 18406 18407 S: Maintained 18407 18408 W: https://wireless.wiki.kernel.org/en/users/Drivers/ath9k 18408 - T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git 18409 + T: git git://git.kernel.org/pub/scm/linux/kernel/git/ath/ath.git 18409 18410 F: Documentation/devicetree/bindings/net/wireless/qca,ath9k.yaml 18410 18411 F: drivers/net/wireless/ath/ath9k/ 18411 18412 ··· 19518 19519 19519 19520 RTL8187 WIRELESS DRIVER 19520 19521 M: Hin-Tak Leung <hintak.leung@gmail.com> 19521 - M: Larry Finger <Larry.Finger@lwfinger.net> 19522 19522 L: linux-wireless@vger.kernel.org 19523 19523 S: Maintained 19524 19524 T: git https://github.com/pkshih/rtw.git ··· 21255 21257 F: drivers/staging/olpc_dcon/ 21256 21258 21257 21259 STAGING - REALTEK RTL8712U DRIVERS 21258 - M: Larry Finger <Larry.Finger@lwfinger.net> 21259 21260 M: Florian Schilhabel <florian.c.schilhabel@googlemail.com>. 21260 21261 S: Odd Fixes 21261 21262 F: drivers/staging/rtl8712/ ··· 22759 22762 R: Jason Gunthorpe <jgg@ziepe.ca> 22760 22763 L: linux-integrity@vger.kernel.org 22761 22764 S: Maintained 22762 - W: https://gitlab.com/jarkkojs/linux-tpmdd-test 22765 + W: https://codeberg.org/jarkko/linux-tpmdd-test 22763 22766 Q: https://patchwork.kernel.org/project/linux-integrity/list/ 22764 22767 T: git git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd.git 22765 22768 F: Documentation/devicetree/bindings/tpm/
+1 -1
Makefile
··· 2 2 VERSION = 6 3 3 PATCHLEVEL = 10 4 4 SUBLEVEL = 0 5 - EXTRAVERSION = -rc4 5 + EXTRAVERSION = -rc5 6 6 NAME = Baby Opossum Posse 7 7 8 8 # *DOCUMENTATION*
+1 -1
arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi
··· 85 85 }; 86 86 }; 87 87 88 - panel { 88 + panel_dpi: panel { 89 89 compatible = "sii,43wvf1g"; 90 90 pinctrl-names = "default"; 91 91 pinctrl-0 = <&pinctrl_display_power>;
+4 -2
arch/arm/boot/dts/nxp/imx/imx53-qsb-hdmi.dtso
··· 10 10 /plugin/; 11 11 12 12 &{/} { 13 - /delete-node/ panel; 14 - 15 13 hdmi: connector-hdmi { 16 14 compatible = "hdmi-connector"; 17 15 label = "hdmi"; ··· 78 80 }; 79 81 }; 80 82 }; 83 + }; 84 + 85 + &panel_dpi { 86 + status = "disabled"; 81 87 }; 82 88 83 89 &tve {
+2 -1
arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
··· 6 6 #include <dt-bindings/phy/phy-imx8-pcie.h> 7 7 #include <dt-bindings/pwm/pwm.h> 8 8 #include "imx8mm.dtsi" 9 + #include "imx8mm-overdrive.dtsi" 9 10 10 11 / { 11 12 chosen { ··· 936 935 /* Verdin GPIO_9_DSI (pulled-up as active-low) */ 937 936 pinctrl_gpio_9_dsi: gpio9dsigrp { 938 937 fsl,pins = 939 - <MX8MM_IOMUXC_NAND_RE_B_GPIO3_IO15 0x146>; /* SODIMM 17 */ 938 + <MX8MM_IOMUXC_NAND_RE_B_GPIO3_IO15 0x1c6>; /* SODIMM 17 */ 940 939 }; 941 940 942 941 /* Verdin GPIO_10_DSI (pulled-up as active-low) */
+1 -1
arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
··· 254 254 <&clk IMX8MP_CLK_CLKOUT2>, 255 255 <&clk IMX8MP_AUDIO_PLL2_OUT>; 256 256 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>; 257 - assigned-clock-rates = <13000000>, <13000000>, <156000000>; 257 + assigned-clock-rates = <13000000>, <13000000>, <208000000>; 258 258 reset-gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; 259 259 status = "disabled"; 260 260
+1 -1
arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
··· 219 219 220 220 bluetooth { 221 221 compatible = "brcm,bcm4330-bt"; 222 - shutdown-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; 222 + shutdown-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 223 223 }; 224 224 }; 225 225
+1 -1
arch/arm64/boot/dts/freescale/imx8qm-mek.dts
··· 36 36 regulator-name = "SD1_SPWR"; 37 37 regulator-min-microvolt = <3000000>; 38 38 regulator-max-microvolt = <3000000>; 39 - gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>; 39 + gpio = <&lsio_gpio4 7 GPIO_ACTIVE_HIGH>; 40 40 enable-active-high; 41 41 }; 42 42
-1
arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
··· 296 296 vmmc-supply = <&reg_usdhc2_vmmc>; 297 297 bus-width = <4>; 298 298 status = "okay"; 299 - no-sdio; 300 299 no-mmc; 301 300 }; 302 301
+12
arch/arm64/kvm/hyp/nvhe/ffa.c
··· 177 177 res); 178 178 } 179 179 180 + static void ffa_rx_release(struct arm_smccc_res *res) 181 + { 182 + arm_smccc_1_1_smc(FFA_RX_RELEASE, 183 + 0, 0, 184 + 0, 0, 0, 0, 0, 185 + res); 186 + } 187 + 180 188 static void do_ffa_rxtx_map(struct arm_smccc_res *res, 181 189 struct kvm_cpu_context *ctxt) 182 190 { ··· 551 543 if (WARN_ON(offset > len || 552 544 fraglen > KVM_FFA_MBOX_NR_PAGES * PAGE_SIZE)) { 553 545 ret = FFA_RET_ABORTED; 546 + ffa_rx_release(res); 554 547 goto out_unlock; 555 548 } 556 549 557 550 if (len > ffa_desc_buf.len) { 558 551 ret = FFA_RET_NO_MEMORY; 552 + ffa_rx_release(res); 559 553 goto out_unlock; 560 554 } 561 555 562 556 buf = ffa_desc_buf.buf; 563 557 memcpy(buf, hyp_buffers.rx, fraglen); 558 + ffa_rx_release(res); 564 559 565 560 for (fragoff = fraglen; fragoff < len; fragoff += fraglen) { 566 561 ffa_mem_frag_rx(res, handle_lo, handle_hi, fragoff); ··· 574 563 575 564 fraglen = res->a3; 576 565 memcpy((void *)buf + fragoff, hyp_buffers.rx, fraglen); 566 + ffa_rx_release(res); 577 567 } 578 568 579 569 ffa_mem_reclaim(res, handle_lo, handle_hi, flags);
+1 -1
arch/arm64/kvm/vgic/vgic-init.c
··· 391 391 392 392 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) { 393 393 list_for_each_entry_safe(rdreg, next, &dist->rd_regions, list) 394 - vgic_v3_free_redist_region(rdreg); 394 + vgic_v3_free_redist_region(kvm, rdreg); 395 395 INIT_LIST_HEAD(&dist->rd_regions); 396 396 } else { 397 397 dist->vgic_cpu_base = VGIC_ADDR_UNDEF;
+13 -2
arch/arm64/kvm/vgic/vgic-mmio-v3.c
··· 919 919 return ret; 920 920 } 921 921 922 - void vgic_v3_free_redist_region(struct vgic_redist_region *rdreg) 922 + void vgic_v3_free_redist_region(struct kvm *kvm, struct vgic_redist_region *rdreg) 923 923 { 924 + struct kvm_vcpu *vcpu; 925 + unsigned long c; 926 + 927 + lockdep_assert_held(&kvm->arch.config_lock); 928 + 929 + /* Garbage collect the region */ 930 + kvm_for_each_vcpu(c, vcpu, kvm) { 931 + if (vcpu->arch.vgic_cpu.rdreg == rdreg) 932 + vcpu->arch.vgic_cpu.rdreg = NULL; 933 + } 934 + 924 935 list_del(&rdreg->list); 925 936 kfree(rdreg); 926 937 } ··· 956 945 957 946 mutex_lock(&kvm->arch.config_lock); 958 947 rdreg = vgic_v3_rdist_region_from_index(kvm, index); 959 - vgic_v3_free_redist_region(rdreg); 948 + vgic_v3_free_redist_region(kvm, rdreg); 960 949 mutex_unlock(&kvm->arch.config_lock); 961 950 return ret; 962 951 }
+1 -1
arch/arm64/kvm/vgic/vgic.h
··· 316 316 317 317 struct vgic_redist_region *vgic_v3_rdist_region_from_index(struct kvm *kvm, 318 318 u32 index); 319 - void vgic_v3_free_redist_region(struct vgic_redist_region *rdreg); 319 + void vgic_v3_free_redist_region(struct kvm *kvm, struct vgic_redist_region *rdreg); 320 320 321 321 bool vgic_v3_rdist_overlap(struct kvm *kvm, gpa_t base, size_t size); 322 322
+4 -1
arch/loongarch/Kconfig
··· 143 143 select HAVE_LIVEPATCH 144 144 select HAVE_MOD_ARCH_SPECIFIC 145 145 select HAVE_NMI 146 - select HAVE_OBJTOOL if AS_HAS_EXPLICIT_RELOCS 146 + select HAVE_OBJTOOL if AS_HAS_EXPLICIT_RELOCS && AS_HAS_THIN_ADD_SUB && !CC_IS_CLANG 147 147 select HAVE_PCI 148 148 select HAVE_PERF_EVENTS 149 149 select HAVE_PERF_REGS ··· 260 260 261 261 config AS_HAS_FCSR_CLASS 262 262 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0) 263 + 264 + config AS_HAS_THIN_ADD_SUB 265 + def_bool $(cc-option,-Wa$(comma)-mthin-add-sub) 263 266 264 267 config AS_HAS_LSX_EXTENSION 265 268 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
+1
arch/loongarch/Kconfig.debug
··· 28 28 29 29 config UNWINDER_ORC 30 30 bool "ORC unwinder" 31 + depends on HAVE_OBJTOOL 31 32 select OBJTOOL 32 33 help 33 34 This option enables the ORC (Oops Rewind Capability) unwinder for
+3 -1
arch/loongarch/include/asm/hw_breakpoint.h
··· 75 75 #define CSR_MWPC_NUM 0x3f 76 76 77 77 #define CTRL_PLV_ENABLE 0x1e 78 + #define CTRL_PLV0_ENABLE 0x02 79 + #define CTRL_PLV3_ENABLE 0x10 78 80 79 81 #define MWPnCFG3_LoadEn 8 80 82 #define MWPnCFG3_StoreEn 9 ··· 103 101 struct perf_event_attr; 104 102 105 103 extern int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl, 106 - int *gen_len, int *gen_type, int *offset); 104 + int *gen_len, int *gen_type); 107 105 extern int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint *hw); 108 106 extern int hw_breakpoint_arch_parse(struct perf_event *bp, 109 107 const struct perf_event_attr *attr,
+55 -41
arch/loongarch/kernel/hw_breakpoint.c
··· 174 174 static int hw_breakpoint_control(struct perf_event *bp, 175 175 enum hw_breakpoint_ops ops) 176 176 { 177 - u32 ctrl; 177 + u32 ctrl, privilege; 178 178 int i, max_slots, enable; 179 + struct pt_regs *regs; 179 180 struct perf_event **slots; 180 181 struct arch_hw_breakpoint *info = counter_arch_bp(bp); 182 + 183 + if (arch_check_bp_in_kernelspace(info)) 184 + privilege = CTRL_PLV0_ENABLE; 185 + else 186 + privilege = CTRL_PLV3_ENABLE; 187 + 188 + /* Whether bp belongs to a task. */ 189 + if (bp->hw.target) 190 + regs = task_pt_regs(bp->hw.target); 181 191 182 192 if (info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) { 183 193 /* Breakpoint */ ··· 207 197 switch (ops) { 208 198 case HW_BREAKPOINT_INSTALL: 209 199 /* Set the FWPnCFG/MWPnCFG 1~4 register. */ 210 - write_wb_reg(CSR_CFG_ADDR, i, 0, info->address); 211 - write_wb_reg(CSR_CFG_ADDR, i, 1, info->address); 212 - write_wb_reg(CSR_CFG_MASK, i, 0, info->mask); 213 - write_wb_reg(CSR_CFG_MASK, i, 1, info->mask); 214 - write_wb_reg(CSR_CFG_ASID, i, 0, 0); 215 - write_wb_reg(CSR_CFG_ASID, i, 1, 0); 216 200 if (info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) { 217 - write_wb_reg(CSR_CFG_CTRL, i, 0, CTRL_PLV_ENABLE); 201 + write_wb_reg(CSR_CFG_ADDR, i, 0, info->address); 202 + write_wb_reg(CSR_CFG_MASK, i, 0, info->mask); 203 + write_wb_reg(CSR_CFG_ASID, i, 0, 0); 204 + write_wb_reg(CSR_CFG_CTRL, i, 0, privilege); 218 205 } else { 206 + write_wb_reg(CSR_CFG_ADDR, i, 1, info->address); 207 + write_wb_reg(CSR_CFG_MASK, i, 1, info->mask); 208 + write_wb_reg(CSR_CFG_ASID, i, 1, 0); 219 209 ctrl = encode_ctrl_reg(info->ctrl); 220 - write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl | CTRL_PLV_ENABLE); 210 + write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl | privilege); 221 211 } 222 212 enable = csr_read64(LOONGARCH_CSR_CRMD); 223 213 csr_write64(CSR_CRMD_WE | enable, LOONGARCH_CSR_CRMD); 214 + if (bp->hw.target) 215 + regs->csr_prmd |= CSR_PRMD_PWE; 224 216 break; 225 217 case HW_BREAKPOINT_UNINSTALL: 226 218 /* Reset the FWPnCFG/MWPnCFG 1~4 register. */ 227 - write_wb_reg(CSR_CFG_ADDR, i, 0, 0); 228 - write_wb_reg(CSR_CFG_ADDR, i, 1, 0); 229 - write_wb_reg(CSR_CFG_MASK, i, 0, 0); 230 - write_wb_reg(CSR_CFG_MASK, i, 1, 0); 231 - write_wb_reg(CSR_CFG_CTRL, i, 0, 0); 232 - write_wb_reg(CSR_CFG_CTRL, i, 1, 0); 233 - write_wb_reg(CSR_CFG_ASID, i, 0, 0); 234 - write_wb_reg(CSR_CFG_ASID, i, 1, 0); 219 + if (info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) { 220 + write_wb_reg(CSR_CFG_ADDR, i, 0, 0); 221 + write_wb_reg(CSR_CFG_MASK, i, 0, 0); 222 + write_wb_reg(CSR_CFG_CTRL, i, 0, 0); 223 + write_wb_reg(CSR_CFG_ASID, i, 0, 0); 224 + } else { 225 + write_wb_reg(CSR_CFG_ADDR, i, 1, 0); 226 + write_wb_reg(CSR_CFG_MASK, i, 1, 0); 227 + write_wb_reg(CSR_CFG_CTRL, i, 1, 0); 228 + write_wb_reg(CSR_CFG_ASID, i, 1, 0); 229 + } 230 + if (bp->hw.target) 231 + regs->csr_prmd &= ~CSR_PRMD_PWE; 235 232 break; 236 233 } 237 234 ··· 300 283 * to generic breakpoint descriptions. 301 284 */ 302 285 int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl, 303 - int *gen_len, int *gen_type, int *offset) 286 + int *gen_len, int *gen_type) 304 287 { 305 288 /* Type */ 306 289 switch (ctrl.type) { ··· 319 302 default: 320 303 return -EINVAL; 321 304 } 322 - 323 - if (!ctrl.len) 324 - return -EINVAL; 325 - 326 - *offset = __ffs(ctrl.len); 327 305 328 306 /* Len */ 329 307 switch (ctrl.len) { ··· 398 386 struct arch_hw_breakpoint *hw) 399 387 { 400 388 int ret; 401 - u64 alignment_mask, offset; 389 + u64 alignment_mask; 402 390 403 391 /* Build the arch_hw_breakpoint. */ 404 392 ret = arch_build_bp_info(bp, attr, hw); 405 393 if (ret) 406 394 return ret; 407 395 408 - if (hw->ctrl.type != LOONGARCH_BREAKPOINT_EXECUTE) 409 - alignment_mask = 0x7; 410 - else 396 + if (hw->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) { 411 397 alignment_mask = 0x3; 412 - offset = hw->address & alignment_mask; 413 - 414 - hw->address &= ~alignment_mask; 415 - hw->ctrl.len <<= offset; 398 + hw->address &= ~alignment_mask; 399 + } 416 400 417 401 return 0; 418 402 } ··· 479 471 slots = this_cpu_ptr(bp_on_reg); 480 472 481 473 for (i = 0; i < boot_cpu_data.watch_ireg_count; ++i) { 482 - bp = slots[i]; 483 - if (bp == NULL) 484 - continue; 485 - perf_bp_event(bp, regs); 474 + if ((csr_read32(LOONGARCH_CSR_FWPS) & (0x1 << i))) { 475 + bp = slots[i]; 476 + if (bp == NULL) 477 + continue; 478 + perf_bp_event(bp, regs); 479 + csr_write32(0x1 << i, LOONGARCH_CSR_FWPS); 480 + update_bp_registers(regs, 0, 0); 481 + } 486 482 } 487 - update_bp_registers(regs, 0, 0); 488 483 } 489 484 NOKPROBE_SYMBOL(breakpoint_handler); 490 485 ··· 499 488 slots = this_cpu_ptr(wp_on_reg); 500 489 501 490 for (i = 0; i < boot_cpu_data.watch_dreg_count; ++i) { 502 - wp = slots[i]; 503 - if (wp == NULL) 504 - continue; 505 - perf_bp_event(wp, regs); 491 + if ((csr_read32(LOONGARCH_CSR_MWPS) & (0x1 << i))) { 492 + wp = slots[i]; 493 + if (wp == NULL) 494 + continue; 495 + perf_bp_event(wp, regs); 496 + csr_write32(0x1 << i, LOONGARCH_CSR_MWPS); 497 + update_bp_registers(regs, 0, 1); 498 + } 506 499 } 507 - update_bp_registers(regs, 0, 1); 508 500 } 509 501 NOKPROBE_SYMBOL(watchpoint_handler); 510 502
+27 -20
arch/loongarch/kernel/ptrace.c
··· 494 494 struct arch_hw_breakpoint_ctrl ctrl, 495 495 struct perf_event_attr *attr) 496 496 { 497 - int err, len, type, offset; 497 + int err, len, type; 498 498 499 - err = arch_bp_generic_fields(ctrl, &len, &type, &offset); 499 + err = arch_bp_generic_fields(ctrl, &len, &type); 500 500 if (err) 501 501 return err; 502 502 503 - switch (note_type) { 504 - case NT_LOONGARCH_HW_BREAK: 505 - if ((type & HW_BREAKPOINT_X) != type) 506 - return -EINVAL; 507 - break; 508 - case NT_LOONGARCH_HW_WATCH: 509 - if ((type & HW_BREAKPOINT_RW) != type) 510 - return -EINVAL; 511 - break; 512 - default: 513 - return -EINVAL; 514 - } 515 - 516 503 attr->bp_len = len; 517 504 attr->bp_type = type; 518 - attr->bp_addr += offset; 519 505 520 506 return 0; 521 507 } ··· 595 609 return PTR_ERR(bp); 596 610 597 611 attr = bp->attr; 598 - decode_ctrl_reg(uctrl, &ctrl); 599 - err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr); 600 - if (err) 601 - return err; 612 + 613 + switch (note_type) { 614 + case NT_LOONGARCH_HW_BREAK: 615 + ctrl.type = LOONGARCH_BREAKPOINT_EXECUTE; 616 + ctrl.len = LOONGARCH_BREAKPOINT_LEN_4; 617 + break; 618 + case NT_LOONGARCH_HW_WATCH: 619 + decode_ctrl_reg(uctrl, &ctrl); 620 + break; 621 + default: 622 + return -EINVAL; 623 + } 624 + 625 + if (uctrl & CTRL_PLV_ENABLE) { 626 + err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr); 627 + if (err) 628 + return err; 629 + attr.disabled = 0; 630 + } else { 631 + attr.disabled = 1; 632 + } 602 633 603 634 return modify_user_hw_breakpoint(bp, &attr); 604 635 } ··· 645 642 { 646 643 struct perf_event *bp; 647 644 struct perf_event_attr attr; 645 + 646 + /* Kernel-space address cannot be monitored by user-space */ 647 + if ((unsigned long)addr >= XKPRANGE) 648 + return -EINVAL; 648 649 649 650 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx); 650 651 if (IS_ERR(bp))
+1 -1
arch/loongarch/kvm/exit.c
··· 761 761 default: 762 762 ret = KVM_HCALL_INVALID_CODE; 763 763 break; 764 - }; 764 + } 765 765 766 766 kvm_write_reg(vcpu, LOONGARCH_GPR_A0, ret); 767 767 }
+1 -1
arch/mips/include/asm/mipsmtregs.h
··· 322 322 " .set push \n" \ 323 323 " .set "MIPS_ISA_LEVEL" \n" \ 324 324 _ASM_SET_MFTC0 \ 325 - " mftc0 $1, " #rt ", " #sel " \n" \ 325 + " mftc0 %0, " #rt ", " #sel " \n" \ 326 326 _ASM_UNSET_MFTC0 \ 327 327 " .set pop \n" \ 328 328 : "=r" (__res)); \
+1 -1
arch/mips/kernel/syscalls/syscall_o32.tbl
··· 27 27 17 o32 break sys_ni_syscall 28 28 # 18 was sys_stat 29 29 18 o32 unused18 sys_ni_syscall 30 - 19 o32 lseek sys_lseek 30 + 19 o32 lseek sys_lseek compat_sys_lseek 31 31 20 o32 getpid sys_getpid 32 32 21 o32 mount sys_mount 33 33 22 o32 umount sys_oldumount
+2
arch/powerpc/crypto/.gitignore
··· 1 1 # SPDX-License-Identifier: GPL-2.0-only 2 2 aesp10-ppc.S 3 + aesp8-ppc.S 3 4 ghashp10-ppc.S 5 + ghashp8-ppc.S
+13 -5
arch/powerpc/kvm/book3s_64_vio.c
··· 130 130 } 131 131 rcu_read_unlock(); 132 132 133 - fdput(f); 134 - 135 - if (!found) 133 + if (!found) { 134 + fdput(f); 136 135 return -EINVAL; 136 + } 137 137 138 138 table_group = iommu_group_get_iommudata(grp); 139 - if (WARN_ON(!table_group)) 139 + if (WARN_ON(!table_group)) { 140 + fdput(f); 140 141 return -EFAULT; 142 + } 141 143 142 144 for (i = 0; i < IOMMU_TABLE_GROUP_MAX_TABLES; ++i) { 143 145 struct iommu_table *tbltmp = table_group->tables[i]; ··· 160 158 break; 161 159 } 162 160 } 163 - if (!tbl) 161 + if (!tbl) { 162 + fdput(f); 164 163 return -EINVAL; 164 + } 165 165 166 166 rcu_read_lock(); 167 167 list_for_each_entry_rcu(stit, &stt->iommu_tables, next) { ··· 174 170 /* stit is being destroyed */ 175 171 iommu_tce_table_put(tbl); 176 172 rcu_read_unlock(); 173 + fdput(f); 177 174 return -ENOTTY; 178 175 } 179 176 /* ··· 182 177 * its KVM reference counter and can return. 183 178 */ 184 179 rcu_read_unlock(); 180 + fdput(f); 185 181 return 0; 186 182 } 187 183 rcu_read_unlock(); ··· 190 184 stit = kzalloc(sizeof(*stit), GFP_KERNEL); 191 185 if (!stit) { 192 186 iommu_tce_table_put(tbl); 187 + fdput(f); 193 188 return -ENOMEM; 194 189 } 195 190 ··· 199 192 200 193 list_add_rcu(&stit->next, &stt->iommu_tables); 201 194 195 + fdput(f); 202 196 return 0; 203 197 } 204 198
+1
arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
··· 45 45 no-1-8-v; 46 46 no-mmc; 47 47 no-sdio; 48 + disable-wp; 48 49 }; 49 50 50 51 &uart0 {
+2 -1
arch/x86/kernel/cpu/resctrl/monitor.c
··· 519 519 * allows architectures that ignore the closid parameter to avoid an 520 520 * unnecessary check. 521 521 */ 522 - if (idx == resctrl_arch_rmid_idx_encode(RESCTRL_RESERVED_CLOSID, 522 + if (!resctrl_arch_mon_capable() || 523 + idx == resctrl_arch_rmid_idx_encode(RESCTRL_RESERVED_CLOSID, 523 524 RESCTRL_RESERVED_RMID)) 524 525 return; 525 526
+2 -2
arch/x86/kvm/svm/svm.c
··· 2843 2843 2844 2844 if (sev_es_prevent_msr_access(vcpu, msr_info)) { 2845 2845 msr_info->data = 0; 2846 - return -EINVAL; 2846 + return vcpu->kvm->arch.has_protected_state ? -EINVAL : 0; 2847 2847 } 2848 2848 2849 2849 switch (msr_info->index) { ··· 2998 2998 u64 data = msr->data; 2999 2999 3000 3000 if (sev_es_prevent_msr_access(vcpu, msr)) 3001 - return -EINVAL; 3001 + return vcpu->kvm->arch.has_protected_state ? -EINVAL : 0; 3002 3002 3003 3003 switch (ecx) { 3004 3004 case MSR_AMD64_TSC_RATIO:
+4 -5
arch/x86/kvm/x86.c
··· 10718 10718 10719 10719 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256); 10720 10720 10721 + static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu); 10722 + 10721 10723 if (irqchip_split(vcpu->kvm)) 10722 10724 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors); 10723 - else { 10724 - static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu); 10725 - if (ioapic_in_kernel(vcpu->kvm)) 10726 - kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors); 10727 - } 10725 + else if (ioapic_in_kernel(vcpu->kvm)) 10726 + kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors); 10728 10727 10729 10728 if (is_guest_mode(vcpu)) 10730 10729 vcpu->arch.load_eoi_exitmap_pending = true;
+2 -21
drivers/acpi/acpica/exregion.c
··· 44 44 struct acpi_mem_mapping *mm = mem_info->cur_mm; 45 45 u32 length; 46 46 acpi_size map_length; 47 - acpi_size page_boundary_map_length; 48 47 #ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED 49 48 u32 remainder; 50 49 #endif ··· 137 138 map_length = (acpi_size) 138 139 ((mem_info->address + mem_info->length) - address); 139 140 140 - /* 141 - * If mapping the entire remaining portion of the region will cross 142 - * a page boundary, just map up to the page boundary, do not cross. 143 - * On some systems, crossing a page boundary while mapping regions 144 - * can cause warnings if the pages have different attributes 145 - * due to resource management. 146 - * 147 - * This has the added benefit of constraining a single mapping to 148 - * one page, which is similar to the original code that used a 4k 149 - * maximum window. 150 - */ 151 - page_boundary_map_length = (acpi_size) 152 - (ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address); 153 - if (page_boundary_map_length == 0) { 154 - page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE; 155 - } 156 - 157 - if (map_length > page_boundary_map_length) { 158 - map_length = page_boundary_map_length; 159 - } 141 + if (map_length > ACPI_DEFAULT_PAGE_SIZE) 142 + map_length = ACPI_DEFAULT_PAGE_SIZE; 160 143 161 144 /* Create a new mapping starting at the address given */ 162 145
+4
drivers/acpi/internal.h
··· 302 302 void acpi_mipi_scan_crs_csi2(void); 303 303 void acpi_mipi_init_crs_csi2_swnodes(void); 304 304 void acpi_mipi_crs_csi2_cleanup(void); 305 + #ifdef CONFIG_X86 305 306 bool acpi_graph_ignore_port(acpi_handle handle); 307 + #else 308 + static inline bool acpi_graph_ignore_port(acpi_handle handle) { return false; } 309 + #endif 306 310 307 311 #endif /* _ACPI_INTERNAL_H_ */
+19 -9
drivers/acpi/mipi-disco-img.c
··· 725 725 acpi_mipi_del_crs_csi2(csi2); 726 726 } 727 727 728 - static const struct dmi_system_id dmi_ignore_port_nodes[] = { 729 - { 730 - .matches = { 731 - DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 732 - DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "XPS 9315"), 733 - }, 734 - }, 735 - { } 728 + #ifdef CONFIG_X86 729 + #include <asm/cpu_device_id.h> 730 + #include <asm/intel-family.h> 731 + 732 + /* CPU matches for Dell generations with broken ACPI MIPI DISCO info */ 733 + static const struct x86_cpu_id dell_broken_mipi_disco_cpu_gens[] = { 734 + X86_MATCH_VFM(INTEL_TIGERLAKE, NULL), 735 + X86_MATCH_VFM(INTEL_TIGERLAKE_L, NULL), 736 + X86_MATCH_VFM(INTEL_ALDERLAKE, NULL), 737 + X86_MATCH_VFM(INTEL_ALDERLAKE_L, NULL), 738 + X86_MATCH_VFM(INTEL_RAPTORLAKE, NULL), 739 + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, NULL), 740 + X86_MATCH_VFM(INTEL_RAPTORLAKE_S, NULL), 741 + {} 736 742 }; 737 743 738 744 static const char *strnext(const char *s1, const char *s2) ··· 767 761 static bool dmi_tested, ignore_port; 768 762 769 763 if (!dmi_tested) { 770 - ignore_port = dmi_first_match(dmi_ignore_port_nodes); 764 + if (dmi_name_in_vendors("Dell Inc.") && 765 + x86_match_cpu(dell_broken_mipi_disco_cpu_gens)) 766 + ignore_port = true; 767 + 771 768 dmi_tested = true; 772 769 } 773 770 ··· 803 794 kfree(orig_path); 804 795 return false; 805 796 } 797 + #endif
+8
drivers/ata/ahci.c
··· 1735 1735 if (ap->pflags & ATA_PFLAG_EXTERNAL) 1736 1736 return; 1737 1737 1738 + /* If no LPM states are supported by the HBA, do not bother with LPM */ 1739 + if ((ap->host->flags & ATA_HOST_NO_PART) && 1740 + (ap->host->flags & ATA_HOST_NO_SSC) && 1741 + (ap->host->flags & ATA_HOST_NO_DEVSLP)) { 1742 + ata_port_dbg(ap, "no LPM states supported, not enabling LPM\n"); 1743 + return; 1744 + } 1745 + 1738 1746 /* user modified policy via module param */ 1739 1747 if (mobile_lpm_policy != -1) { 1740 1748 policy = mobile_lpm_policy;
+1 -1
drivers/dma/Kconfig
··· 394 394 395 395 config MCF_EDMA 396 396 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" 397 - depends on M5441x || COMPILE_TEST 397 + depends on M5441x || (COMPILE_TEST && FSL_EDMA=n) 398 398 select DMA_ENGINE 399 399 select DMA_VIRTUAL_CHANNELS 400 400 help
+3 -1
drivers/dma/idxd/irq.c
··· 611 611 612 612 spin_unlock(&irq_entry->list_lock); 613 613 614 - list_for_each_entry(desc, &flist, list) { 614 + list_for_each_entry_safe(desc, n, &flist, list) { 615 615 /* 616 616 * Check against the original status as ABORT is software defined 617 617 * and 0xff, which DSA_COMP_STATUS_MASK can mask out. 618 618 */ 619 + list_del(&desc->list); 620 + 619 621 if (unlikely(desc->completion->status == IDXD_COMP_DESC_ABORT)) { 620 622 idxd_desc_complete(desc, IDXD_COMPLETE_ABORT, true); 621 623 continue;
+30 -25
drivers/dma/ioat/init.c
··· 534 534 return err; 535 535 } 536 536 537 - static int ioat_register(struct ioatdma_device *ioat_dma) 538 - { 539 - int err = dma_async_device_register(&ioat_dma->dma_dev); 540 - 541 - if (err) { 542 - ioat_disable_interrupts(ioat_dma); 543 - dma_pool_destroy(ioat_dma->completion_pool); 544 - } 545 - 546 - return err; 547 - } 548 - 549 537 static void ioat_dma_remove(struct ioatdma_device *ioat_dma) 550 538 { 551 539 struct dma_device *dma = &ioat_dma->dma_dev; ··· 1169 1181 ioat_chan->reg_base + IOAT_DCACTRL_OFFSET); 1170 1182 } 1171 1183 1172 - err = ioat_register(ioat_dma); 1184 + err = dma_async_device_register(&ioat_dma->dma_dev); 1173 1185 if (err) 1174 - return err; 1186 + goto err_disable_interrupts; 1175 1187 1176 1188 ioat_kobject_add(ioat_dma, &ioat_ktype); 1177 1189 ··· 1180 1192 1181 1193 /* disable relaxed ordering */ 1182 1194 err = pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &val16); 1183 - if (err) 1184 - return pcibios_err_to_errno(err); 1195 + if (err) { 1196 + err = pcibios_err_to_errno(err); 1197 + goto err_disable_interrupts; 1198 + } 1185 1199 1186 1200 /* clear relaxed ordering enable */ 1187 1201 val16 &= ~PCI_EXP_DEVCTL_RELAX_EN; 1188 1202 err = pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, val16); 1189 - if (err) 1190 - return pcibios_err_to_errno(err); 1203 + if (err) { 1204 + err = pcibios_err_to_errno(err); 1205 + goto err_disable_interrupts; 1206 + } 1191 1207 1192 1208 if (ioat_dma->cap & IOAT_CAP_DPS) 1193 1209 writeb(ioat_pending_level + 1, 1194 1210 ioat_dma->reg_base + IOAT_PREFETCH_LIMIT_OFFSET); 1195 1211 1196 1212 return 0; 1213 + 1214 + err_disable_interrupts: 1215 + ioat_disable_interrupts(ioat_dma); 1216 + dma_pool_destroy(ioat_dma->completion_pool); 1217 + return err; 1197 1218 } 1198 1219 1199 1220 static void ioat_shutdown(struct pci_dev *pdev) ··· 1347 1350 void __iomem * const *iomap; 1348 1351 struct device *dev = &pdev->dev; 1349 1352 struct ioatdma_device *device; 1353 + unsigned int i; 1354 + u8 version; 1350 1355 int err; 1351 1356 1352 1357 err = pcim_enable_device(pdev); ··· 1362 1363 if (!iomap) 1363 1364 return -ENOMEM; 1364 1365 1366 + version = readb(iomap[IOAT_MMIO_BAR] + IOAT_VER_OFFSET); 1367 + if (version < IOAT_VER_3_0) 1368 + return -ENODEV; 1369 + 1365 1370 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 1366 1371 if (err) 1367 1372 return err; ··· 1376 1373 pci_set_master(pdev); 1377 1374 pci_set_drvdata(pdev, device); 1378 1375 1379 - device->version = readb(device->reg_base + IOAT_VER_OFFSET); 1376 + device->version = version; 1380 1377 if (device->version >= IOAT_VER_3_4) 1381 1378 ioat_dca_enabled = 0; 1382 - if (device->version >= IOAT_VER_3_0) { 1383 - if (is_skx_ioat(pdev)) 1384 - device->version = IOAT_VER_3_2; 1385 - err = ioat3_dma_probe(device, ioat_dca_enabled); 1386 - } else 1387 - return -ENODEV; 1388 1379 1380 + if (is_skx_ioat(pdev)) 1381 + device->version = IOAT_VER_3_2; 1382 + 1383 + err = ioat3_dma_probe(device, ioat_dca_enabled); 1389 1384 if (err) { 1385 + for (i = 0; i < IOAT_MAX_CHANS; i++) 1386 + kfree(device->idx[i]); 1387 + kfree(device); 1390 1388 dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n"); 1391 1389 return -ENODEV; 1392 1390 } ··· 1449 1445 static void __exit ioat_exit_module(void) 1450 1446 { 1451 1447 pci_unregister_driver(&ioat_pci_driver); 1448 + kmem_cache_destroy(ioat_sed_cache); 1452 1449 kmem_cache_destroy(ioat_cache); 1453 1450 } 1454 1451 module_exit(ioat_exit_module);
+1 -4
drivers/dma/ti/k3-udma-glue.c
··· 200 200 201 201 ret = of_k3_udma_glue_parse(udmax_np, common); 202 202 if (ret) 203 - goto out_put_spec; 203 + return ret; 204 204 205 205 ret = of_k3_udma_glue_parse_chn_common(common, thread_id, tx_chn); 206 - 207 - out_put_spec: 208 - of_node_put(udmax_np); 209 206 return ret; 210 207 } 211 208
+2 -2
drivers/dma/xilinx/xdma.c
··· 885 885 u32 st; 886 886 bool repeat_tx; 887 887 888 + spin_lock(&xchan->vchan.lock); 889 + 888 890 if (xchan->stop_requested) 889 891 complete(&xchan->last_interrupt); 890 - 891 - spin_lock(&xchan->vchan.lock); 892 892 893 893 /* get submitted request */ 894 894 vd = vchan_next_desc(&xchan->vchan);
+3 -1
drivers/firmware/psci/psci.c
··· 497 497 498 498 static int psci_system_suspend(unsigned long unused) 499 499 { 500 + int err; 500 501 phys_addr_t pa_cpu_resume = __pa_symbol(cpu_resume); 501 502 502 - return invoke_psci_fn(PSCI_FN_NATIVE(1_0, SYSTEM_SUSPEND), 503 + err = invoke_psci_fn(PSCI_FN_NATIVE(1_0, SYSTEM_SUSPEND), 503 504 pa_cpu_resume, 0, 0); 505 + return psci_to_linux_errno(err); 504 506 } 505 507 506 508 static int psci_system_suspend_enter(suspend_state_t state)
-34
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
··· 41 41 #include <linux/dma-buf.h> 42 42 #include <linux/dma-fence-array.h> 43 43 #include <linux/pci-p2pdma.h> 44 - #include <linux/pm_runtime.h> 45 - #include "amdgpu_trace.h" 46 44 47 45 /** 48 46 * amdgpu_dma_buf_attach - &dma_buf_ops.attach implementation ··· 56 58 struct drm_gem_object *obj = dmabuf->priv; 57 59 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj); 58 60 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); 59 - int r; 60 61 61 62 if (pci_p2pdma_distance(adev->pdev, attach->dev, false) < 0) 62 63 attach->peer2peer = false; 63 64 64 - r = pm_runtime_get_sync(adev_to_drm(adev)->dev); 65 - trace_amdgpu_runpm_reference_dumps(1, __func__); 66 - if (r < 0) 67 - goto out; 68 - 69 65 return 0; 70 - 71 - out: 72 - pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); 73 - trace_amdgpu_runpm_reference_dumps(0, __func__); 74 - return r; 75 - } 76 - 77 - /** 78 - * amdgpu_dma_buf_detach - &dma_buf_ops.detach implementation 79 - * 80 - * @dmabuf: DMA-buf where we remove the attachment from 81 - * @attach: the attachment to remove 82 - * 83 - * Called when an attachment is removed from the DMA-buf. 84 - */ 85 - static void amdgpu_dma_buf_detach(struct dma_buf *dmabuf, 86 - struct dma_buf_attachment *attach) 87 - { 88 - struct drm_gem_object *obj = dmabuf->priv; 89 - struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj); 90 - struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); 91 - 92 - pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); 93 - pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); 94 - trace_amdgpu_runpm_reference_dumps(0, __func__); 95 66 } 96 67 97 68 /** ··· 234 267 235 268 const struct dma_buf_ops amdgpu_dmabuf_ops = { 236 269 .attach = amdgpu_dma_buf_attach, 237 - .detach = amdgpu_dma_buf_detach, 238 270 .pin = amdgpu_dma_buf_pin, 239 271 .unpin = amdgpu_dma_buf_unpin, 240 272 .map_dma_buf = amdgpu_dma_buf_map,
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
··· 181 181 amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, 182 182 seq, flags | AMDGPU_FENCE_FLAG_INT); 183 183 pm_runtime_get_noresume(adev_to_drm(adev)->dev); 184 - trace_amdgpu_runpm_reference_dumps(1, __func__); 185 184 ptr = &ring->fence_drv.fences[seq & ring->fence_drv.num_fences_mask]; 186 185 if (unlikely(rcu_dereference_protected(*ptr, 1))) { 187 186 struct dma_fence *old; ··· 308 309 dma_fence_put(fence); 309 310 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); 310 311 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); 311 - trace_amdgpu_runpm_reference_dumps(0, __func__); 312 312 } while (last_seq != seq); 313 313 314 314 return true;
+34 -32
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
··· 684 684 struct amdgpu_ring *ring = &adev->gfx.kiq[inst].ring; 685 685 struct amdgpu_kiq *kiq = &adev->gfx.kiq[inst]; 686 686 unsigned int ndw; 687 - signed long r; 687 + int r; 688 688 uint32_t seq; 689 689 690 - if (!adev->gmc.flush_pasid_uses_kiq || !ring->sched.ready || 691 - !down_read_trylock(&adev->reset_domain->sem)) { 690 + /* 691 + * A GPU reset should flush all TLBs anyway, so no need to do 692 + * this while one is ongoing. 693 + */ 694 + if (!down_read_trylock(&adev->reset_domain->sem)) 695 + return 0; 692 696 697 + if (!adev->gmc.flush_pasid_uses_kiq || !ring->sched.ready) { 693 698 if (adev->gmc.flush_tlb_needs_extra_type_2) 694 699 adev->gmc.gmc_funcs->flush_gpu_tlb_pasid(adev, pasid, 695 700 2, all_hub, ··· 708 703 adev->gmc.gmc_funcs->flush_gpu_tlb_pasid(adev, pasid, 709 704 flush_type, all_hub, 710 705 inst); 711 - return 0; 712 - } 706 + r = 0; 707 + } else { 708 + /* 2 dwords flush + 8 dwords fence */ 709 + ndw = kiq->pmf->invalidate_tlbs_size + 8; 713 710 714 - /* 2 dwords flush + 8 dwords fence */ 715 - ndw = kiq->pmf->invalidate_tlbs_size + 8; 711 + if (adev->gmc.flush_tlb_needs_extra_type_2) 712 + ndw += kiq->pmf->invalidate_tlbs_size; 716 713 717 - if (adev->gmc.flush_tlb_needs_extra_type_2) 718 - ndw += kiq->pmf->invalidate_tlbs_size; 714 + if (adev->gmc.flush_tlb_needs_extra_type_0) 715 + ndw += kiq->pmf->invalidate_tlbs_size; 719 716 720 - if (adev->gmc.flush_tlb_needs_extra_type_0) 721 - ndw += kiq->pmf->invalidate_tlbs_size; 717 + spin_lock(&adev->gfx.kiq[inst].ring_lock); 718 + amdgpu_ring_alloc(ring, ndw); 719 + if (adev->gmc.flush_tlb_needs_extra_type_2) 720 + kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 2, all_hub); 722 721 723 - spin_lock(&adev->gfx.kiq[inst].ring_lock); 724 - amdgpu_ring_alloc(ring, ndw); 725 - if (adev->gmc.flush_tlb_needs_extra_type_2) 726 - kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 2, all_hub); 722 + if (flush_type == 2 && adev->gmc.flush_tlb_needs_extra_type_0) 723 + kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 0, all_hub); 727 724 728 - if (flush_type == 2 && adev->gmc.flush_tlb_needs_extra_type_0) 729 - kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 0, all_hub); 725 + kiq->pmf->kiq_invalidate_tlbs(ring, pasid, flush_type, all_hub); 726 + r = amdgpu_fence_emit_polling(ring, &seq, MAX_KIQ_REG_WAIT); 727 + if (r) { 728 + amdgpu_ring_undo(ring); 729 + spin_unlock(&adev->gfx.kiq[inst].ring_lock); 730 + goto error_unlock_reset; 731 + } 730 732 731 - kiq->pmf->kiq_invalidate_tlbs(ring, pasid, flush_type, all_hub); 732 - r = amdgpu_fence_emit_polling(ring, &seq, MAX_KIQ_REG_WAIT); 733 - if (r) { 734 - amdgpu_ring_undo(ring); 733 + amdgpu_ring_commit(ring); 735 734 spin_unlock(&adev->gfx.kiq[inst].ring_lock); 736 - goto error_unlock_reset; 735 + if (amdgpu_fence_wait_polling(ring, seq, usec_timeout) < 1) { 736 + dev_err(adev->dev, "timeout waiting for kiq fence\n"); 737 + r = -ETIME; 738 + } 737 739 } 738 - 739 - amdgpu_ring_commit(ring); 740 - spin_unlock(&adev->gfx.kiq[inst].ring_lock); 741 - r = amdgpu_fence_wait_polling(ring, seq, usec_timeout); 742 - if (r < 1) { 743 - dev_err(adev->dev, "wait for kiq fence error: %ld.\n", r); 744 - r = -ETIME; 745 - goto error_unlock_reset; 746 - } 747 - r = 0; 748 740 749 741 error_unlock_reset: 750 742 up_read(&adev->reset_domain->sem);
-15
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
··· 554 554 __entry->value) 555 555 ); 556 556 557 - TRACE_EVENT(amdgpu_runpm_reference_dumps, 558 - TP_PROTO(uint32_t index, const char *func), 559 - TP_ARGS(index, func), 560 - TP_STRUCT__entry( 561 - __field(uint32_t, index) 562 - __string(func, func) 563 - ), 564 - TP_fast_assign( 565 - __entry->index = index; 566 - __assign_str(func); 567 - ), 568 - TP_printk("amdgpu runpm reference dump 0x%x: 0x%s\n", 569 - __entry->index, 570 - __get_str(func)) 571 - ); 572 557 #undef AMDGPU_JOB_GET_TIMELINE_NAME 573 558 #endif 574 559
+13 -2
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
··· 4195 4195 static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev, 4196 4196 struct amdgpu_cu_info *cu_info) 4197 4197 { 4198 - int i, j, k, counter, xcc_id, active_cu_number = 0; 4199 - u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0; 4198 + int i, j, k, prev_counter, counter, xcc_id, active_cu_number = 0; 4199 + u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0, tmp; 4200 4200 unsigned disable_masks[4 * 4]; 4201 + bool is_symmetric_cus; 4201 4202 4202 4203 if (!adev || !cu_info) 4203 4204 return -EINVAL; ··· 4216 4215 4217 4216 mutex_lock(&adev->grbm_idx_mutex); 4218 4217 for (xcc_id = 0; xcc_id < NUM_XCC(adev->gfx.xcc_mask); xcc_id++) { 4218 + is_symmetric_cus = true; 4219 4219 for (i = 0; i < adev->gfx.config.max_shader_engines; i++) { 4220 4220 for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) { 4221 4221 mask = 1; ··· 4244 4242 ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8)); 4245 4243 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; 4246 4244 } 4245 + if (i && is_symmetric_cus && prev_counter != counter) 4246 + is_symmetric_cus = false; 4247 + prev_counter = counter; 4248 + } 4249 + if (is_symmetric_cus) { 4250 + tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_DEBUG); 4251 + tmp = REG_SET_FIELD(tmp, CP_CPC_DEBUG, CPC_HARVESTING_RELAUNCH_DISABLE, 1); 4252 + tmp = REG_SET_FIELD(tmp, CP_CPC_DEBUG, CPC_HARVESTING_DISPATCH_DISABLE, 1); 4253 + WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_CPC_DEBUG, tmp); 4247 4254 } 4248 4255 gfx_v9_4_3_xcc_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff, 4249 4256 xcc_id);
+48 -28
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
··· 154 154 void *pkt, int size, 155 155 int api_status_off) 156 156 { 157 - int ndw = size / 4; 158 - signed long r; 159 - union MESAPI__MISC *x_pkt = pkt; 160 - struct MES_API_STATUS *api_status; 157 + union MESAPI__QUERY_MES_STATUS mes_status_pkt; 158 + signed long timeout = 3000000; /* 3000 ms */ 161 159 struct amdgpu_device *adev = mes->adev; 162 160 struct amdgpu_ring *ring = &mes->ring; 163 - unsigned long flags; 164 - signed long timeout = 3000000; /* 3000 ms */ 161 + struct MES_API_STATUS *api_status; 162 + union MESAPI__MISC *x_pkt = pkt; 165 163 const char *op_str, *misc_op_str; 166 - u32 fence_offset; 167 - u64 fence_gpu_addr; 168 - u64 *fence_ptr; 164 + unsigned long flags; 165 + u64 status_gpu_addr; 166 + u32 status_offset; 167 + u64 *status_ptr; 168 + signed long r; 169 169 int ret; 170 170 171 171 if (x_pkt->header.opcode >= MES_SCH_API_MAX) ··· 177 177 /* Worst case in sriov where all other 15 VF timeout, each VF needs about 600ms */ 178 178 timeout = 15 * 600 * 1000; 179 179 } 180 - BUG_ON(size % 4 != 0); 181 180 182 - ret = amdgpu_device_wb_get(adev, &fence_offset); 181 + ret = amdgpu_device_wb_get(adev, &status_offset); 183 182 if (ret) 184 183 return ret; 185 - fence_gpu_addr = 186 - adev->wb.gpu_addr + (fence_offset * 4); 187 - fence_ptr = (u64 *)&adev->wb.wb[fence_offset]; 188 - *fence_ptr = 0; 184 + 185 + status_gpu_addr = adev->wb.gpu_addr + (status_offset * 4); 186 + status_ptr = (u64 *)&adev->wb.wb[status_offset]; 187 + *status_ptr = 0; 189 188 190 189 spin_lock_irqsave(&mes->ring_lock, flags); 191 - if (amdgpu_ring_alloc(ring, ndw)) { 192 - spin_unlock_irqrestore(&mes->ring_lock, flags); 193 - amdgpu_device_wb_free(adev, fence_offset); 194 - return -ENOMEM; 195 - } 190 + r = amdgpu_ring_alloc(ring, (size + sizeof(mes_status_pkt)) / 4); 191 + if (r) 192 + goto error_unlock_free; 196 193 197 194 api_status = (struct MES_API_STATUS *)((char *)pkt + api_status_off); 198 - api_status->api_completion_fence_addr = fence_gpu_addr; 195 + api_status->api_completion_fence_addr = status_gpu_addr; 199 196 api_status->api_completion_fence_value = 1; 200 197 201 - amdgpu_ring_write_multiple(ring, pkt, ndw); 198 + amdgpu_ring_write_multiple(ring, pkt, size / 4); 199 + 200 + memset(&mes_status_pkt, 0, sizeof(mes_status_pkt)); 201 + mes_status_pkt.header.type = MES_API_TYPE_SCHEDULER; 202 + mes_status_pkt.header.opcode = MES_SCH_API_QUERY_SCHEDULER_STATUS; 203 + mes_status_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS; 204 + mes_status_pkt.api_status.api_completion_fence_addr = 205 + ring->fence_drv.gpu_addr; 206 + mes_status_pkt.api_status.api_completion_fence_value = 207 + ++ring->fence_drv.sync_seq; 208 + 209 + amdgpu_ring_write_multiple(ring, &mes_status_pkt, 210 + sizeof(mes_status_pkt) / 4); 211 + 202 212 amdgpu_ring_commit(ring); 203 213 spin_unlock_irqrestore(&mes->ring_lock, flags); 204 214 ··· 216 206 misc_op_str = mes_v11_0_get_misc_op_string(x_pkt); 217 207 218 208 if (misc_op_str) 219 - dev_dbg(adev->dev, "MES msg=%s (%s) was emitted\n", op_str, misc_op_str); 209 + dev_dbg(adev->dev, "MES msg=%s (%s) was emitted\n", op_str, 210 + misc_op_str); 220 211 else if (op_str) 221 212 dev_dbg(adev->dev, "MES msg=%s was emitted\n", op_str); 222 213 else 223 - dev_dbg(adev->dev, "MES msg=%d was emitted\n", x_pkt->header.opcode); 214 + dev_dbg(adev->dev, "MES msg=%d was emitted\n", 215 + x_pkt->header.opcode); 224 216 225 - r = amdgpu_mes_fence_wait_polling(fence_ptr, (u64)1, timeout); 226 - amdgpu_device_wb_free(adev, fence_offset); 227 - if (r < 1) { 217 + r = amdgpu_fence_wait_polling(ring, ring->fence_drv.sync_seq, timeout); 218 + if (r < 1 || !*status_ptr) { 228 219 229 220 if (misc_op_str) 230 221 dev_err(adev->dev, "MES failed to respond to msg=%s (%s)\n", ··· 240 229 while (halt_if_hws_hang) 241 230 schedule(); 242 231 243 - return -ETIMEDOUT; 232 + r = -ETIMEDOUT; 233 + goto error_wb_free; 244 234 } 245 235 236 + amdgpu_device_wb_free(adev, status_offset); 246 237 return 0; 238 + 239 + error_unlock_free: 240 + spin_unlock_irqrestore(&mes->ring_lock, flags); 241 + 242 + error_wb_free: 243 + amdgpu_device_wb_free(adev, status_offset); 244 + return r; 247 245 } 248 246 249 247 static int convert_to_mes_queue_type(int queue_type)
+5
drivers/gpu/drm/amd/amdgpu/psp_v14_0.c
··· 32 32 #include "mp/mp_14_0_2_sh_mask.h" 33 33 34 34 MODULE_FIRMWARE("amdgpu/psp_14_0_2_sos.bin"); 35 + MODULE_FIRMWARE("amdgpu/psp_14_0_2_ta.bin"); 35 36 MODULE_FIRMWARE("amdgpu/psp_14_0_3_sos.bin"); 37 + MODULE_FIRMWARE("amdgpu/psp_14_0_3_ta.bin"); 36 38 37 39 /* For large FW files the time to complete can be very long */ 38 40 #define USBC_PD_POLLING_LIMIT_S 240 ··· 66 64 case IP_VERSION(14, 0, 2): 67 65 case IP_VERSION(14, 0, 3): 68 66 err = psp_init_sos_microcode(psp, ucode_prefix); 67 + if (err) 68 + return err; 69 + err = psp_init_ta_microcode(psp, ucode_prefix); 69 70 if (err) 70 71 return err; 71 72 break;
+1 -1
drivers/gpu/drm/amd/display/Kconfig
··· 8 8 depends on BROKEN || !CC_IS_CLANG || ARM64 || RISCV || SPARC64 || X86_64 9 9 select SND_HDA_COMPONENT if SND_HDA_CORE 10 10 # !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752 11 - select DRM_AMD_DC_FP if ARCH_HAS_KERNEL_FPU_SUPPORT && (!ARM64 || !CC_IS_CLANG) 11 + select DRM_AMD_DC_FP if ARCH_HAS_KERNEL_FPU_SUPPORT && !(CC_IS_CLANG && (ARM64 || RISCV)) 12 12 help 13 13 Choose this option if you want to use the new display engine 14 14 support for AMDGPU. This adds required support for Vega and
+10 -3
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
··· 9169 9169 9170 9170 trace_amdgpu_dm_atomic_commit_tail_begin(state); 9171 9171 9172 - if (dm->dc->caps.ips_support && dm->dc->idle_optimizations_allowed) 9173 - dc_allow_idle_optimizations(dm->dc, false); 9174 - 9175 9172 drm_atomic_helper_update_legacy_modeset_state(dev, state); 9176 9173 drm_dp_mst_atomic_wait_for_dependencies(state); 9177 9174 ··· 11437 11440 mutex_unlock(&adev->dm.dc_lock); 11438 11441 } 11439 11442 11443 + static inline void amdgpu_dm_exit_ips_for_hw_access(struct dc *dc) 11444 + { 11445 + if (dc->ctx->dmub_srv && !dc->ctx->dmub_srv->idle_exit_counter) 11446 + dc_exit_ips_for_hw_access(dc); 11447 + } 11448 + 11440 11449 void dm_write_reg_func(const struct dc_context *ctx, uint32_t address, 11441 11450 u32 value, const char *func_name) 11442 11451 { ··· 11453 11450 return; 11454 11451 } 11455 11452 #endif 11453 + 11454 + amdgpu_dm_exit_ips_for_hw_access(ctx->dc); 11456 11455 cgs_write_register(ctx->cgs_device, address, value); 11457 11456 trace_amdgpu_dc_wreg(&ctx->perf_trace->write_count, address, value); 11458 11457 } ··· 11477 11472 ASSERT(false); 11478 11473 return 0; 11479 11474 } 11475 + 11476 + amdgpu_dm_exit_ips_for_hw_access(ctx->dc); 11480 11477 11481 11478 value = cgs_read_register(ctx->cgs_device, address); 11482 11479
+1 -1
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
··· 177 177 .urgent_latency_pixel_data_only_us = 4.0, 178 178 .urgent_latency_pixel_mixed_with_vm_data_us = 4.0, 179 179 .urgent_latency_vm_data_only_us = 4.0, 180 - .dram_clock_change_latency_us = 11.72, 180 + .dram_clock_change_latency_us = 34.0, 181 181 .urgent_out_of_order_return_per_channel_pixel_only_bytes = 4096, 182 182 .urgent_out_of_order_return_per_channel_pixel_and_vm_bytes = 4096, 183 183 .urgent_out_of_order_return_per_channel_vm_only_bytes = 4096,
+1 -1
drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c
··· 215 215 .urgent_latency_pixel_data_only_us = 4.0, 216 216 .urgent_latency_pixel_mixed_with_vm_data_us = 4.0, 217 217 .urgent_latency_vm_data_only_us = 4.0, 218 - .dram_clock_change_latency_us = 11.72, 218 + .dram_clock_change_latency_us = 34, 219 219 .urgent_out_of_order_return_per_channel_pixel_only_bytes = 4096, 220 220 .urgent_out_of_order_return_per_channel_pixel_and_vm_bytes = 4096, 221 221 .urgent_out_of_order_return_per_channel_vm_only_bytes = 4096,
+72
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
··· 1439 1439 } 1440 1440 } 1441 1441 } 1442 + 1443 + static bool should_avoid_empty_tu(struct pipe_ctx *pipe_ctx) 1444 + { 1445 + /* Calculate average pixel count per TU, return false if under ~2.00 to 1446 + * avoid empty TUs. This is only required for DPIA tunneling as empty TUs 1447 + * are legal to generate for native DP links. Assume TU size 64 as there 1448 + * is currently no scenario where it's reprogrammed from HW default. 1449 + * MTPs have no such limitation, so this does not affect MST use cases. 1450 + */ 1451 + unsigned int pix_clk_mhz; 1452 + unsigned int symclk_mhz; 1453 + unsigned int avg_pix_per_tu_x1000; 1454 + unsigned int tu_size_bytes = 64; 1455 + struct dc_crtc_timing *timing = &pipe_ctx->stream->timing; 1456 + struct dc_link_settings *link_settings = &pipe_ctx->link_config.dp_link_settings; 1457 + const struct dc *dc = pipe_ctx->stream->link->dc; 1458 + 1459 + if (pipe_ctx->stream->link->ep_type != DISPLAY_ENDPOINT_USB4_DPIA) 1460 + return false; 1461 + 1462 + // Not necessary for MST configurations 1463 + if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) 1464 + return false; 1465 + 1466 + pix_clk_mhz = timing->pix_clk_100hz / 10000; 1467 + 1468 + // If this is true, can't block due to dynamic ODM 1469 + if (pix_clk_mhz > dc->clk_mgr->bw_params->clk_table.entries[0].dispclk_mhz) 1470 + return false; 1471 + 1472 + switch (link_settings->link_rate) { 1473 + case LINK_RATE_LOW: 1474 + symclk_mhz = 162; 1475 + break; 1476 + case LINK_RATE_HIGH: 1477 + symclk_mhz = 270; 1478 + break; 1479 + case LINK_RATE_HIGH2: 1480 + symclk_mhz = 540; 1481 + break; 1482 + case LINK_RATE_HIGH3: 1483 + symclk_mhz = 810; 1484 + break; 1485 + default: 1486 + // We shouldn't be tunneling any other rates, something is wrong 1487 + ASSERT(0); 1488 + return false; 1489 + } 1490 + 1491 + avg_pix_per_tu_x1000 = (1000 * pix_clk_mhz * tu_size_bytes) 1492 + / (symclk_mhz * link_settings->lane_count); 1493 + 1494 + // Add small empirically-decided margin to account for potential jitter 1495 + return (avg_pix_per_tu_x1000 < 2020); 1496 + } 1497 + 1498 + bool dcn35_is_dp_dig_pixel_rate_div_policy(struct pipe_ctx *pipe_ctx) 1499 + { 1500 + struct dc *dc = pipe_ctx->stream->ctx->dc; 1501 + 1502 + if (!is_h_timing_divisible_by_2(pipe_ctx->stream)) 1503 + return false; 1504 + 1505 + if (should_avoid_empty_tu(pipe_ctx)) 1506 + return false; 1507 + 1508 + if (dc_is_dp_signal(pipe_ctx->stream->signal) && !dc->link_srv->dp_is_128b_132b_signal(pipe_ctx) && 1509 + dc->debug.enable_dp_dig_pixel_rate_div_policy) 1510 + return true; 1511 + 1512 + return false; 1513 + }
+2
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h
··· 95 95 void dcn35_set_long_vblank(struct pipe_ctx **pipe_ctx, 96 96 int num_pipes, uint32_t v_total_min, uint32_t v_total_max); 97 97 98 + bool dcn35_is_dp_dig_pixel_rate_div_policy(struct pipe_ctx *pipe_ctx); 99 + 98 100 #endif /* __DC_HWSS_DCN35_H__ */
+1 -1
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
··· 158 158 .setup_hpo_hw_control = dcn35_setup_hpo_hw_control, 159 159 .calculate_dccg_k1_k2_values = dcn32_calculate_dccg_k1_k2_values, 160 160 .set_pixels_per_cycle = dcn32_set_pixels_per_cycle, 161 - .is_dp_dig_pixel_rate_div_policy = dcn32_is_dp_dig_pixel_rate_div_policy, 161 + .is_dp_dig_pixel_rate_div_policy = dcn35_is_dp_dig_pixel_rate_div_policy, 162 162 .dsc_pg_control = dcn35_dsc_pg_control, 163 163 .dsc_pg_status = dcn32_dsc_pg_status, 164 164 .enable_plane = dcn35_enable_plane,
+2
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
··· 164 164 165 165 for (i = 0; i < SUMO_MAX_HARDWARE_POWERLEVELS; i++) { 166 166 if (table[i].ulSupportedSCLK != 0) { 167 + if (table[i].usVoltageIndex >= SUMO_MAX_NUMBER_VOLTAGES) 168 + continue; 167 169 vid_mapping_table->entries[table[i].usVoltageIndex].vid_7bit = 168 170 table[i].usVoltageID; 169 171 vid_mapping_table->entries[table[i].usVoltageIndex].vid_2bit =
+4
drivers/gpu/drm/i915/display/intel_dp.c
··· 442 442 struct intel_encoder *encoder = &intel_dig_port->base; 443 443 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 444 444 445 + /* eDP MSO is not compatible with joiner */ 446 + if (intel_dp->mso_link_count) 447 + return false; 448 + 445 449 return DISPLAY_VER(dev_priv) >= 12 || 446 450 (DISPLAY_VER(dev_priv) == 11 && 447 451 encoder->port != PORT_A);
+2
drivers/gpu/drm/radeon/sumo_dpm.c
··· 1619 1619 1620 1620 for (i = 0; i < SUMO_MAX_HARDWARE_POWERLEVELS; i++) { 1621 1621 if (table[i].ulSupportedSCLK != 0) { 1622 + if (table[i].usVoltageIndex >= SUMO_MAX_NUMBER_VOLTAGES) 1623 + continue; 1622 1624 vid_mapping_table->entries[table[i].usVoltageIndex].vid_7bit = 1623 1625 table[i].usVoltageID; 1624 1626 vid_mapping_table->entries[table[i].usVoltageIndex].vid_2bit =
+1 -1
drivers/gpu/drm/vmwgfx/Kconfig
··· 2 2 config DRM_VMWGFX 3 3 tristate "DRM driver for VMware Virtual GPU" 4 4 depends on DRM && PCI && MMU 5 - depends on X86 || ARM64 5 + depends on (X86 && HYPERVISOR_GUEST) || ARM64 6 6 select DRM_TTM 7 7 select DRM_TTM_HELPER 8 8 select MAPPING_DIRTY_HELPERS
+2 -2
drivers/gpu/drm/xe/xe_guc.c
··· 631 631 struct xe_device *xe = guc_to_xe(guc); 632 632 int err; 633 633 634 - guc_enable_irq(guc); 635 - 636 634 if (IS_SRIOV_VF(xe) && xe_device_has_memirq(xe)) { 637 635 struct xe_gt *gt = guc_to_gt(guc); 638 636 struct xe_tile *tile = gt_to_tile(gt); ··· 638 640 err = xe_memirq_init_guc(&tile->sriov.vf.memirq, guc); 639 641 if (err) 640 642 return err; 643 + } else { 644 + guc_enable_irq(guc); 641 645 } 642 646 643 647 xe_mmio_rmw32(guc_to_gt(guc), PMINTRMSK,
+1 -1
drivers/i2c/busses/i2c-ocores.c
··· 431 431 oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8); 432 432 433 433 /* Init the device */ 434 - oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK); 435 434 oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_EN); 435 + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK); 436 436 437 437 return 0; 438 438 }
+1 -3
drivers/infiniband/hw/bnxt_re/bnxt_re.h
··· 107 107 struct bnxt_re_sqp_entries *sqp_tbl; 108 108 }; 109 109 110 - #define BNXT_RE_MIN_MSIX 2 111 - #define BNXT_RE_MAX_MSIX 9 112 110 #define BNXT_RE_AEQ_IDX 0 113 111 #define BNXT_RE_NQ_IDX 1 114 112 #define BNXT_RE_GEN_P5_MAX_VF 64 ··· 166 168 struct bnxt_qplib_rcfw rcfw; 167 169 168 170 /* NQ */ 169 - struct bnxt_qplib_nq nq[BNXT_RE_MAX_MSIX]; 171 + struct bnxt_qplib_nq nq[BNXT_MAX_ROCE_MSIX]; 170 172 171 173 /* Device Resources */ 172 174 struct bnxt_qplib_dev_attr dev_attr;
+1
drivers/infiniband/hw/mana/mr.c
··· 112 112 "start 0x%llx, iova 0x%llx length 0x%llx access_flags 0x%x", 113 113 start, iova, length, access_flags); 114 114 115 + access_flags &= ~IB_ACCESS_OPTIONAL; 115 116 if (access_flags & ~VALID_MR_FLAGS) 116 117 return ERR_PTR(-EINVAL); 117 118
+2 -2
drivers/infiniband/hw/mlx5/main.c
··· 3759 3759 spin_lock_init(&dev->dm.lock); 3760 3760 dev->dm.dev = mdev; 3761 3761 return 0; 3762 - err: 3763 - mlx5r_macsec_dealloc_gids(dev); 3764 3762 err_mp: 3765 3763 mlx5_ib_cleanup_multiport_master(dev); 3764 + err: 3765 + mlx5r_macsec_dealloc_gids(dev); 3766 3766 return err; 3767 3767 } 3768 3768
+4 -4
drivers/infiniband/hw/mlx5/mr.c
··· 246 246 MLX5_SET(mkc, mkc, access_mode_1_0, ent->rb_key.access_mode & 0x3); 247 247 MLX5_SET(mkc, mkc, access_mode_4_2, 248 248 (ent->rb_key.access_mode >> 2) & 0x7); 249 + MLX5_SET(mkc, mkc, ma_translation_mode, !!ent->rb_key.ats); 249 250 250 251 MLX5_SET(mkc, mkc, translations_octword_size, 251 252 get_mkc_octo_size(ent->rb_key.access_mode, ··· 642 641 new = &((*new)->rb_left); 643 642 if (cmp < 0) 644 643 new = &((*new)->rb_right); 645 - if (cmp == 0) { 646 - mutex_unlock(&cache->rb_lock); 644 + if (cmp == 0) 647 645 return -EEXIST; 648 - } 649 646 } 650 647 651 648 /* Add new node and rebalance tree. */ ··· 718 719 } 719 720 mr->mmkey.cache_ent = ent; 720 721 mr->mmkey.type = MLX5_MKEY_MR; 722 + mr->mmkey.rb_key = ent->rb_key; 723 + mr->mmkey.cacheable = true; 721 724 init_waitqueue_head(&mr->mmkey.wait); 722 725 return mr; 723 726 } ··· 1170 1169 mr->ibmr.pd = pd; 1171 1170 mr->umem = umem; 1172 1171 mr->page_shift = order_base_2(page_size); 1173 - mr->mmkey.cacheable = true; 1174 1172 set_mr_fields(dev, mr, umem->length, access_flags, iova); 1175 1173 1176 1174 return mr;
+8 -5
drivers/infiniband/hw/mlx5/srq.c
··· 199 199 int err; 200 200 struct mlx5_srq_attr in = {}; 201 201 __u32 max_srq_wqes = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz); 202 + __u32 max_sge_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq) / 203 + sizeof(struct mlx5_wqe_data_seg); 202 204 203 205 if (init_attr->srq_type != IB_SRQT_BASIC && 204 206 init_attr->srq_type != IB_SRQT_XRC && 205 207 init_attr->srq_type != IB_SRQT_TM) 206 208 return -EOPNOTSUPP; 207 209 208 - /* Sanity check SRQ size before proceeding */ 209 - if (init_attr->attr.max_wr >= max_srq_wqes) { 210 - mlx5_ib_dbg(dev, "max_wr %d, cap %d\n", 211 - init_attr->attr.max_wr, 212 - max_srq_wqes); 210 + /* Sanity check SRQ and sge size before proceeding */ 211 + if (init_attr->attr.max_wr >= max_srq_wqes || 212 + init_attr->attr.max_sge > max_sge_sz) { 213 + mlx5_ib_dbg(dev, "max_wr %d,wr_cap %d,max_sge %d, sge_cap:%d\n", 214 + init_attr->attr.max_wr, max_srq_wqes, 215 + init_attr->attr.max_sge, max_sge_sz); 213 216 return -EINVAL; 214 217 } 215 218
+13
drivers/infiniband/sw/rxe/rxe_resp.c
··· 344 344 * receive buffer later. For rmda operations additional 345 345 * length checks are performed in check_rkey. 346 346 */ 347 + if ((qp_type(qp) == IB_QPT_GSI) || (qp_type(qp) == IB_QPT_UD)) { 348 + unsigned int payload = payload_size(pkt); 349 + unsigned int recv_buffer_len = 0; 350 + int i; 351 + 352 + for (i = 0; i < qp->resp.wqe->dma.num_sge; i++) 353 + recv_buffer_len += qp->resp.wqe->dma.sge[i].length; 354 + if (payload + 40 > recv_buffer_len) { 355 + rxe_dbg_qp(qp, "The receive buffer is too small for this UD packet.\n"); 356 + return RESPST_ERR_LENGTH; 357 + } 358 + } 359 + 347 360 if (pkt->mask & RXE_PAYLOAD_MASK && ((qp_type(qp) == IB_QPT_RC) || 348 361 (qp_type(qp) == IB_QPT_UC))) { 349 362 unsigned int mtu = qp->mtu;
+1 -1
drivers/infiniband/sw/rxe/rxe_verbs.c
··· 812 812 int i; 813 813 814 814 for (i = 0; i < ibwr->num_sge; i++, sge++) { 815 - memcpy(p, ib_virt_dma_to_page(sge->addr), sge->length); 815 + memcpy(p, ib_virt_dma_to_ptr(sge->addr), sge->length); 816 816 p += sge->length; 817 817 } 818 818 }
+1
drivers/input/joystick/xpad.c
··· 209 209 { 0x0738, 0xf738, "Super SFIV FightStick TE S", 0, XTYPE_XBOX360 }, 210 210 { 0x07ff, 0xffff, "Mad Catz GamePad", 0, XTYPE_XBOX360 }, 211 211 { 0x0b05, 0x1a38, "ASUS ROG RAIKIRI", 0, XTYPE_XBOXONE }, 212 + { 0x0b05, 0x1abb, "ASUS ROG RAIKIRI PRO", 0, XTYPE_XBOXONE }, 212 213 { 0x0c12, 0x0005, "Intec wireless", 0, XTYPE_XBOX }, 213 214 { 0x0c12, 0x8801, "Nyko Xbox Controller", 0, XTYPE_XBOX }, 214 215 { 0x0c12, 0x8802, "Zeroplus Xbox Controller", 0, XTYPE_XBOX },
+31
drivers/input/mouse/elantech.c
··· 1477 1477 } 1478 1478 1479 1479 /* 1480 + * Some hw_version 4 models fail to properly activate absolute mode on 1481 + * resume without going through disable/enable cycle. 1482 + */ 1483 + static const struct dmi_system_id elantech_needs_reenable[] = { 1484 + #if defined(CONFIG_DMI) && defined(CONFIG_X86) 1485 + { 1486 + /* Lenovo N24 */ 1487 + .matches = { 1488 + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 1489 + DMI_MATCH(DMI_PRODUCT_NAME, "81AF"), 1490 + }, 1491 + }, 1492 + #endif 1493 + { } 1494 + }; 1495 + 1496 + /* 1480 1497 * Put the touchpad back into absolute mode when reconnecting 1481 1498 */ 1482 1499 static int elantech_reconnect(struct psmouse *psmouse) 1483 1500 { 1501 + int err; 1502 + 1484 1503 psmouse_reset(psmouse); 1485 1504 1486 1505 if (elantech_detect(psmouse, 0)) 1487 1506 return -1; 1507 + 1508 + if (dmi_check_system(elantech_needs_reenable)) { 1509 + err = ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_DISABLE); 1510 + if (err) 1511 + psmouse_warn(psmouse, "failed to deactivate mouse on %s: %d\n", 1512 + psmouse->ps2dev.serio->phys, err); 1513 + 1514 + err = ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_ENABLE); 1515 + if (err) 1516 + psmouse_warn(psmouse, "failed to reactivate mouse on %s: %d\n", 1517 + psmouse->ps2dev.serio->phys, err); 1518 + } 1488 1519 1489 1520 if (elantech_set_absolute_mode(psmouse)) { 1490 1521 psmouse_err(psmouse,
+16 -2
drivers/input/serio/i8042-acpipnpio.h
··· 76 76 #define SERIO_QUIRK_PROBE_DEFER BIT(5) 77 77 #define SERIO_QUIRK_RESET_ALWAYS BIT(6) 78 78 #define SERIO_QUIRK_RESET_NEVER BIT(7) 79 - #define SERIO_QUIRK_DIECT BIT(8) 79 + #define SERIO_QUIRK_DIRECT BIT(8) 80 80 #define SERIO_QUIRK_DUMBKBD BIT(9) 81 81 #define SERIO_QUIRK_NOLOOP BIT(10) 82 82 #define SERIO_QUIRK_NOTIMEOUT BIT(11) ··· 1332 1332 .driver_data = (void *)(SERIO_QUIRK_NOMUX | SERIO_QUIRK_RESET_ALWAYS | 1333 1333 SERIO_QUIRK_NOLOOP | SERIO_QUIRK_NOPNP) 1334 1334 }, 1335 + { 1336 + /* 1337 + * The Ayaneo Kun is a handheld device where some the buttons 1338 + * are handled by an AT keyboard. The keyboard is usually 1339 + * detected as raw, but sometimes, usually after a cold boot, 1340 + * it is detected as translated. Make sure that the keyboard 1341 + * is always in raw mode. 1342 + */ 1343 + .matches = { 1344 + DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AYANEO"), 1345 + DMI_MATCH(DMI_BOARD_NAME, "KUN"), 1346 + }, 1347 + .driver_data = (void *)(SERIO_QUIRK_DIRECT) 1348 + }, 1335 1349 { } 1336 1350 }; 1337 1351 ··· 1669 1655 if (quirks & SERIO_QUIRK_RESET_NEVER) 1670 1656 i8042_reset = I8042_RESET_NEVER; 1671 1657 } 1672 - if (quirks & SERIO_QUIRK_DIECT) 1658 + if (quirks & SERIO_QUIRK_DIRECT) 1673 1659 i8042_direct = true; 1674 1660 if (quirks & SERIO_QUIRK_DUMBKBD) 1675 1661 i8042_dumbkbd = true;
+11 -1
drivers/input/touchscreen/ads7846.c
··· 1111 1111 }; 1112 1112 MODULE_DEVICE_TABLE(of, ads7846_dt_ids); 1113 1113 1114 + static const struct spi_device_id ads7846_spi_ids[] = { 1115 + { "tsc2046", 7846 }, 1116 + { "ads7843", 7843 }, 1117 + { "ads7845", 7845 }, 1118 + { "ads7846", 7846 }, 1119 + { "ads7873", 7873 }, 1120 + { }, 1121 + }; 1122 + MODULE_DEVICE_TABLE(spi, ads7846_spi_ids); 1123 + 1114 1124 static const struct ads7846_platform_data *ads7846_get_props(struct device *dev) 1115 1125 { 1116 1126 struct ads7846_platform_data *pdata; ··· 1396 1386 }, 1397 1387 .probe = ads7846_probe, 1398 1388 .remove = ads7846_remove, 1389 + .id_table = ads7846_spi_ids, 1399 1390 }; 1400 1391 1401 1392 module_spi_driver(ads7846_driver); 1402 1393 1403 1394 MODULE_DESCRIPTION("ADS7846 TouchScreen Driver"); 1404 1395 MODULE_LICENSE("GPL"); 1405 - MODULE_ALIAS("spi:ads7846");
+2 -2
drivers/input/touchscreen/ili210x.c
··· 261 261 if (!error && data[0] == 2) { 262 262 error = i2c_master_recv(client, data + ILI251X_DATA_SIZE1, 263 263 ILI251X_DATA_SIZE2); 264 - if (error >= 0 && error != ILI251X_DATA_SIZE2) 265 - error = -EIO; 264 + if (error >= 0) 265 + error = error == ILI251X_DATA_SIZE2 ? 0 : -EIO; 266 266 } 267 267 268 268 return error;
+3
drivers/net/bonding/bond_main.c
··· 5773 5773 if (real_dev) { 5774 5774 ret = ethtool_get_ts_info_by_layer(real_dev, info); 5775 5775 } else { 5776 + info->phc_index = -1; 5777 + info->so_timestamping = SOF_TIMESTAMPING_RX_SOFTWARE | 5778 + SOF_TIMESTAMPING_SOFTWARE; 5776 5779 /* Check if all slaves support software tx timestamping */ 5777 5780 rcu_read_lock(); 5778 5781 bond_for_each_slave_rcu(bond, slave, iter) {
+13 -1
drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
··· 1618 1618 clear_bit(MCP251XFD_FLAGS_DOWN, priv->flags); 1619 1619 can_rx_offload_enable(&priv->offload); 1620 1620 1621 + priv->wq = alloc_ordered_workqueue("%s-mcp251xfd_wq", 1622 + WQ_FREEZABLE | WQ_MEM_RECLAIM, 1623 + dev_name(&spi->dev)); 1624 + if (!priv->wq) { 1625 + err = -ENOMEM; 1626 + goto out_can_rx_offload_disable; 1627 + } 1628 + INIT_WORK(&priv->tx_work, mcp251xfd_tx_obj_write_sync); 1629 + 1621 1630 err = request_threaded_irq(spi->irq, NULL, mcp251xfd_irq, 1622 1631 IRQF_SHARED | IRQF_ONESHOT, 1623 1632 dev_name(&spi->dev), priv); 1624 1633 if (err) 1625 - goto out_can_rx_offload_disable; 1634 + goto out_destroy_workqueue; 1626 1635 1627 1636 err = mcp251xfd_chip_interrupts_enable(priv); 1628 1637 if (err) ··· 1643 1634 1644 1635 out_free_irq: 1645 1636 free_irq(spi->irq, priv); 1637 + out_destroy_workqueue: 1638 + destroy_workqueue(priv->wq); 1646 1639 out_can_rx_offload_disable: 1647 1640 can_rx_offload_disable(&priv->offload); 1648 1641 set_bit(MCP251XFD_FLAGS_DOWN, priv->flags); ··· 1672 1661 hrtimer_cancel(&priv->tx_irq_timer); 1673 1662 mcp251xfd_chip_interrupts_disable(priv); 1674 1663 free_irq(ndev->irq, priv); 1664 + destroy_workqueue(priv->wq); 1675 1665 can_rx_offload_disable(&priv->offload); 1676 1666 mcp251xfd_timestamp_stop(priv); 1677 1667 mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);
+47 -8
drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c
··· 131 131 tx_obj->xfer[0].len = len; 132 132 } 133 133 134 + static void mcp251xfd_tx_failure_drop(const struct mcp251xfd_priv *priv, 135 + struct mcp251xfd_tx_ring *tx_ring, 136 + int err) 137 + { 138 + struct net_device *ndev = priv->ndev; 139 + struct net_device_stats *stats = &ndev->stats; 140 + unsigned int frame_len = 0; 141 + u8 tx_head; 142 + 143 + tx_ring->head--; 144 + stats->tx_dropped++; 145 + tx_head = mcp251xfd_get_tx_head(tx_ring); 146 + can_free_echo_skb(ndev, tx_head, &frame_len); 147 + netdev_completed_queue(ndev, 1, frame_len); 148 + netif_wake_queue(ndev); 149 + 150 + if (net_ratelimit()) 151 + netdev_err(priv->ndev, "ERROR in %s: %d\n", __func__, err); 152 + } 153 + 154 + void mcp251xfd_tx_obj_write_sync(struct work_struct *work) 155 + { 156 + struct mcp251xfd_priv *priv = container_of(work, struct mcp251xfd_priv, 157 + tx_work); 158 + struct mcp251xfd_tx_obj *tx_obj = priv->tx_work_obj; 159 + struct mcp251xfd_tx_ring *tx_ring = priv->tx; 160 + int err; 161 + 162 + err = spi_sync(priv->spi, &tx_obj->msg); 163 + if (err) 164 + mcp251xfd_tx_failure_drop(priv, tx_ring, err); 165 + } 166 + 134 167 static int mcp251xfd_tx_obj_write(const struct mcp251xfd_priv *priv, 135 168 struct mcp251xfd_tx_obj *tx_obj) 136 169 { ··· 195 162 return false; 196 163 } 197 164 165 + static bool mcp251xfd_work_busy(struct work_struct *work) 166 + { 167 + return work_busy(work); 168 + } 169 + 198 170 netdev_tx_t mcp251xfd_start_xmit(struct sk_buff *skb, 199 171 struct net_device *ndev) 200 172 { ··· 213 175 if (can_dev_dropped_skb(ndev, skb)) 214 176 return NETDEV_TX_OK; 215 177 216 - if (mcp251xfd_tx_busy(priv, tx_ring)) 178 + if (mcp251xfd_tx_busy(priv, tx_ring) || 179 + mcp251xfd_work_busy(&priv->tx_work)) 217 180 return NETDEV_TX_BUSY; 218 181 219 182 tx_obj = mcp251xfd_get_tx_obj_next(tx_ring); ··· 232 193 netdev_sent_queue(priv->ndev, frame_len); 233 194 234 195 err = mcp251xfd_tx_obj_write(priv, tx_obj); 235 - if (err) 236 - goto out_err; 237 - 238 - return NETDEV_TX_OK; 239 - 240 - out_err: 241 - netdev_err(priv->ndev, "ERROR in %s: %d\n", __func__, err); 196 + if (err == -EBUSY) { 197 + netif_stop_queue(ndev); 198 + priv->tx_work_obj = tx_obj; 199 + queue_work(priv->wq, &priv->tx_work); 200 + } else if (err) { 201 + mcp251xfd_tx_failure_drop(priv, tx_ring, err); 202 + } 242 203 243 204 return NETDEV_TX_OK; 244 205 }
+5
drivers/net/can/spi/mcp251xfd/mcp251xfd.h
··· 633 633 struct mcp251xfd_rx_ring *rx[MCP251XFD_FIFO_RX_NUM]; 634 634 struct mcp251xfd_tx_ring tx[MCP251XFD_FIFO_TX_NUM]; 635 635 636 + struct workqueue_struct *wq; 637 + struct work_struct tx_work; 638 + struct mcp251xfd_tx_obj *tx_work_obj; 639 + 636 640 DECLARE_BITMAP(flags, __MCP251XFD_FLAGS_SIZE__); 637 641 638 642 u8 rx_ring_num; ··· 956 952 void mcp251xfd_timestamp_init(struct mcp251xfd_priv *priv); 957 953 void mcp251xfd_timestamp_stop(struct mcp251xfd_priv *priv); 958 954 955 + void mcp251xfd_tx_obj_write_sync(struct work_struct *work); 959 956 netdev_tx_t mcp251xfd_start_xmit(struct sk_buff *skb, 960 957 struct net_device *ndev); 961 958
+1 -1
drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c
··· 303 303 } 304 304 usb_free_urb(urb); 305 305 306 - return 0; 306 + return err; 307 307 } 308 308 309 309 int kvaser_usb_can_rx_over_error(struct net_device *netdev)
+57 -4
drivers/net/dsa/microchip/ksz9477.c
··· 355 355 SPI_AUTO_EDGE_DETECTION, 0); 356 356 357 357 /* default configuration */ 358 - ksz_read8(dev, REG_SW_LUE_CTRL_1, &data8); 359 - data8 = SW_AGING_ENABLE | SW_LINK_AUTO_AGING | 360 - SW_SRC_ADDR_FILTER | SW_FLUSH_STP_TABLE | SW_FLUSH_MSTP_TABLE; 361 - ksz_write8(dev, REG_SW_LUE_CTRL_1, data8); 358 + ksz_write8(dev, REG_SW_LUE_CTRL_1, 359 + SW_AGING_ENABLE | SW_LINK_AUTO_AGING | SW_SRC_ADDR_FILTER); 362 360 363 361 /* disable interrupts */ 364 362 ksz_write32(dev, REG_SW_INT_MASK__4, SWITCH_INT_MASK); ··· 425 427 /* used by MIB counter reading code to know freeze is enabled */ 426 428 p->freeze = freeze; 427 429 mutex_unlock(&p->mib.cnt_mutex); 430 + } 431 + 432 + int ksz9477_errata_monitor(struct ksz_device *dev, int port, 433 + u64 tx_late_col) 434 + { 435 + u32 pmavbc; 436 + u8 status; 437 + u16 pqm; 438 + int ret; 439 + 440 + ret = ksz_pread8(dev, port, REG_PORT_STATUS_0, &status); 441 + if (ret) 442 + return ret; 443 + if (!(FIELD_GET(PORT_INTF_SPEED_MASK, status) == PORT_INTF_SPEED_NONE) && 444 + !(status & PORT_INTF_FULL_DUPLEX)) { 445 + /* Errata DS80000754 recommends monitoring potential faults in 446 + * half-duplex mode. The switch might not be able to communicate anymore 447 + * in these states. 448 + * If you see this message, please read the errata-sheet for more information: 449 + * https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/Errata/KSZ9477S-Errata-DS80000754.pdf 450 + * To workaround this issue, half-duplex mode should be avoided. 451 + * A software reset could be implemented to recover from this state. 452 + */ 453 + dev_warn_once(dev->dev, 454 + "Half-duplex detected on port %d, transmission halt may occur\n", 455 + port); 456 + if (tx_late_col != 0) { 457 + /* Transmission halt with late collisions */ 458 + dev_crit_once(dev->dev, 459 + "TX late collisions detected, transmission may be halted on port %d\n", 460 + port); 461 + } 462 + ret = ksz_read8(dev, REG_SW_LUE_CTRL_0, &status); 463 + if (ret) 464 + return ret; 465 + if (status & SW_VLAN_ENABLE) { 466 + ret = ksz_pread16(dev, port, REG_PORT_QM_TX_CNT_0__4, &pqm); 467 + if (ret) 468 + return ret; 469 + ret = ksz_read32(dev, REG_PMAVBC, &pmavbc); 470 + if (ret) 471 + return ret; 472 + if ((FIELD_GET(PMAVBC_MASK, pmavbc) <= PMAVBC_MIN) || 473 + (FIELD_GET(PORT_QM_TX_CNT_M, pqm) >= PORT_QM_TX_CNT_MAX)) { 474 + /* Transmission halt with Half-Duplex and VLAN */ 475 + dev_crit_once(dev->dev, 476 + "resources out of limits, transmission may be halted\n"); 477 + } 478 + } 479 + } 480 + return ret; 428 481 } 429 482 430 483 void ksz9477_port_init_cnt(struct ksz_device *dev, int port) ··· 1347 1298 1348 1299 /* Enable REG_SW_MTU__2 reg by setting SW_JUMBO_PACKET */ 1349 1300 ksz_cfg(dev, REG_SW_MAC_CTRL_1, SW_JUMBO_PACKET, true); 1301 + 1302 + /* Use collision based back pressure mode. */ 1303 + ksz_cfg(dev, REG_SW_MAC_CTRL_1, SW_BACK_PRESSURE, 1304 + SW_BACK_PRESSURE_COLLISION); 1350 1305 1351 1306 /* Now we can configure default MTU value */ 1352 1307 ret = regmap_update_bits(ksz_regmap_16(dev), REG_SW_MTU__2, REG_SW_MTU_MASK,
+2
drivers/net/dsa/microchip/ksz9477.h
··· 36 36 bool ingress, struct netlink_ext_ack *extack); 37 37 void ksz9477_port_mirror_del(struct ksz_device *dev, int port, 38 38 struct dsa_mall_mirror_tc_entry *mirror); 39 + int ksz9477_errata_monitor(struct ksz_device *dev, int port, 40 + u64 tx_late_col); 39 41 void ksz9477_get_caps(struct ksz_device *dev, int port, 40 42 struct phylink_config *config); 41 43 int ksz9477_fdb_dump(struct ksz_device *dev, int port,
+9 -2
drivers/net/dsa/microchip/ksz9477_reg.h
··· 247 247 #define REG_SW_MAC_CTRL_1 0x0331 248 248 249 249 #define SW_BACK_PRESSURE BIT(5) 250 + #define SW_BACK_PRESSURE_COLLISION 0 250 251 #define FAIR_FLOW_CTRL BIT(4) 251 252 #define NO_EXC_COLLISION_DROP BIT(3) 252 253 #define SW_JUMBO_PACKET BIT(2) ··· 843 842 844 843 #define REG_PORT_STATUS_0 0x0030 845 844 846 - #define PORT_INTF_SPEED_M 0x3 847 - #define PORT_INTF_SPEED_S 3 845 + #define PORT_INTF_SPEED_MASK GENMASK(4, 3) 846 + #define PORT_INTF_SPEED_NONE GENMASK(1, 0) 848 847 #define PORT_INTF_FULL_DUPLEX BIT(2) 849 848 #define PORT_TX_FLOW_CTRL BIT(1) 850 849 #define PORT_RX_FLOW_CTRL BIT(0) ··· 1167 1166 1168 1167 #define PORT_RMII_CLK_SEL BIT(7) 1169 1168 #define PORT_MII_SEL_EDGE BIT(5) 1169 + 1170 + #define REG_PMAVBC 0x03AC 1171 + 1172 + #define PMAVBC_MASK GENMASK(26, 16) 1173 + #define PMAVBC_MIN 0x580 1170 1174 1171 1175 /* 4 - MAC */ 1172 1176 #define REG_PORT_MAC_CTRL_0 0x0400 ··· 1500 1494 1501 1495 #define PORT_QM_TX_CNT_USED_S 0 1502 1496 #define PORT_QM_TX_CNT_M (BIT(11) - 1) 1497 + #define PORT_QM_TX_CNT_MAX 0x200 1503 1498 1504 1499 #define REG_PORT_QM_TX_CNT_1__4 0x0A14 1505 1500
+12 -1
drivers/net/dsa/microchip/ksz_common.c
··· 1382 1382 .tc_cbs_supported = true, 1383 1383 .ops = &ksz9477_dev_ops, 1384 1384 .phylink_mac_ops = &ksz9477_phylink_mac_ops, 1385 + .phy_errata_9477 = true, 1385 1386 .mib_names = ksz9477_mib_names, 1386 1387 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 1387 1388 .reg_mib_cnt = MIB_COUNTER_NUM, ··· 1417 1416 .num_ipms = 8, 1418 1417 .ops = &ksz9477_dev_ops, 1419 1418 .phylink_mac_ops = &ksz9477_phylink_mac_ops, 1419 + .phy_errata_9477 = true, 1420 1420 .mib_names = ksz9477_mib_names, 1421 1421 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 1422 1422 .reg_mib_cnt = MIB_COUNTER_NUM, ··· 1452 1450 .num_ipms = 8, 1453 1451 .ops = &ksz9477_dev_ops, 1454 1452 .phylink_mac_ops = &ksz9477_phylink_mac_ops, 1453 + .phy_errata_9477 = true, 1455 1454 .mib_names = ksz9477_mib_names, 1456 1455 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 1457 1456 .reg_mib_cnt = MIB_COUNTER_NUM, ··· 1543 1540 .tc_cbs_supported = true, 1544 1541 .ops = &ksz9477_dev_ops, 1545 1542 .phylink_mac_ops = &ksz9477_phylink_mac_ops, 1543 + .phy_errata_9477 = true, 1546 1544 .mib_names = ksz9477_mib_names, 1547 1545 .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), 1548 1546 .reg_mib_cnt = MIB_COUNTER_NUM, ··· 1824 1820 struct rtnl_link_stats64 *stats; 1825 1821 struct ksz_stats_raw *raw; 1826 1822 struct ksz_port_mib *mib; 1823 + int ret; 1827 1824 1828 1825 mib = &dev->ports[port].mib; 1829 1826 stats = &mib->stats64; ··· 1866 1861 pstats->rx_pause_frames = raw->rx_pause; 1867 1862 1868 1863 spin_unlock(&mib->stats64_lock); 1864 + 1865 + if (dev->info->phy_errata_9477) { 1866 + ret = ksz9477_errata_monitor(dev, port, raw->tx_late_col); 1867 + if (ret) 1868 + dev_err(dev->dev, "Failed to monitor transmission halt\n"); 1869 + } 1869 1870 } 1870 1871 1871 1872 void ksz88xx_r_mib_stats64(struct ksz_device *dev, int port) ··· 2196 2185 struct ksz_device *dev = kirq->dev; 2197 2186 int ret; 2198 2187 2199 - ret = ksz_write32(dev, kirq->reg_mask, kirq->masked); 2188 + ret = ksz_write8(dev, kirq->reg_mask, kirq->masked); 2200 2189 if (ret) 2201 2190 dev_err(dev->dev, "failed to change IRQ mask\n"); 2202 2191
+1
drivers/net/dsa/microchip/ksz_common.h
··· 66 66 bool tc_cbs_supported; 67 67 const struct ksz_dev_ops *ops; 68 68 const struct phylink_mac_ops *phylink_mac_ops; 69 + bool phy_errata_9477; 69 70 bool ksz87xx_eee_link_erratum; 70 71 const struct ksz_mib_names *mib_names; 71 72 int mib_cnt;
+18
drivers/net/ethernet/ibm/ibmvnic.c
··· 2482 2482 (tx_pool->consumer_index + 1) % tx_pool->num_buffers; 2483 2483 2484 2484 tx_buff = &tx_pool->tx_buff[bufidx]; 2485 + 2486 + /* Sanity checks on our free map to make sure it points to an index 2487 + * that is not being occupied by another skb. If skb memory is 2488 + * not freed then we see congestion control kick in and halt tx. 2489 + */ 2490 + if (unlikely(tx_buff->skb)) { 2491 + dev_warn_ratelimited(dev, "TX free map points to untracked skb (%s %d idx=%d)\n", 2492 + skb_is_gso(skb) ? "tso_pool" : "tx_pool", 2493 + queue_num, bufidx); 2494 + dev_kfree_skb_any(tx_buff->skb); 2495 + } 2496 + 2485 2497 tx_buff->skb = skb; 2486 2498 tx_buff->index = bufidx; 2487 2499 tx_buff->pool_index = queue_num; ··· 4072 4060 adapter->tx_scrq = NULL; 4073 4061 adapter->num_active_tx_scrqs = 0; 4074 4062 } 4063 + 4064 + /* Clean any remaining outstanding SKBs 4065 + * we freed the irq so we won't be hearing 4066 + * from them 4067 + */ 4068 + clean_tx_pools(adapter); 4075 4069 4076 4070 if (adapter->rx_scrq) { 4077 4071 for (i = 0; i < adapter->num_active_rx_scrqs; i++) {
+9 -1
drivers/net/ethernet/intel/ice/ice_main.c
··· 4139 4139 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked) 4140 4140 { 4141 4141 struct ice_pf *pf = vsi->back; 4142 - int err = 0, timeout = 50; 4142 + int i, err = 0, timeout = 50; 4143 4143 4144 4144 if (!new_rx && !new_tx) 4145 4145 return -EINVAL; ··· 4165 4165 4166 4166 ice_vsi_close(vsi); 4167 4167 ice_vsi_rebuild(vsi, ICE_VSI_FLAG_NO_INIT); 4168 + 4169 + ice_for_each_traffic_class(i) { 4170 + if (vsi->tc_cfg.ena_tc & BIT(i)) 4171 + netdev_set_tc_queue(vsi->netdev, 4172 + vsi->tc_cfg.tc_info[i].netdev_tc, 4173 + vsi->tc_cfg.tc_info[i].qcount_tx, 4174 + vsi->tc_cfg.tc_info[i].qoffset); 4175 + } 4168 4176 ice_pf_dcb_recfg(pf, locked); 4169 4177 ice_vsi_open(vsi); 4170 4178 done:
+1
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
··· 6907 6907 /* 9704 == 9728 - 20 and rounding to 8 */ 6908 6908 dev->max_mtu = MVPP2_BM_JUMBO_PKT_SIZE; 6909 6909 device_set_node(&dev->dev, port_fwnode); 6910 + dev->dev_port = port->id; 6910 6911 6911 6912 port->pcs_gmac.ops = &mvpp2_phylink_gmac_pcs_ops; 6912 6913 port->pcs_gmac.neg_mode = true;
+5 -5
drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c
··· 648 648 } else if (lvl == NIX_TXSCH_LVL_TL4) { 649 649 parent = schq_list[NIX_TXSCH_LVL_TL3][prio]; 650 650 req->reg[0] = NIX_AF_TL4X_PARENT(schq); 651 - req->regval[0] = parent << 16; 651 + req->regval[0] = (u64)parent << 16; 652 652 req->num_regs++; 653 653 req->reg[1] = NIX_AF_TL4X_SCHEDULE(schq); 654 654 req->regval[1] = dwrr_val; 655 655 } else if (lvl == NIX_TXSCH_LVL_TL3) { 656 656 parent = schq_list[NIX_TXSCH_LVL_TL2][prio]; 657 657 req->reg[0] = NIX_AF_TL3X_PARENT(schq); 658 - req->regval[0] = parent << 16; 658 + req->regval[0] = (u64)parent << 16; 659 659 req->num_regs++; 660 660 req->reg[1] = NIX_AF_TL3X_SCHEDULE(schq); 661 661 req->regval[1] = dwrr_val; ··· 670 670 } else if (lvl == NIX_TXSCH_LVL_TL2) { 671 671 parent = schq_list[NIX_TXSCH_LVL_TL1][prio]; 672 672 req->reg[0] = NIX_AF_TL2X_PARENT(schq); 673 - req->regval[0] = parent << 16; 673 + req->regval[0] = (u64)parent << 16; 674 674 675 675 req->num_regs++; 676 676 req->reg[1] = NIX_AF_TL2X_SCHEDULE(schq); 677 - req->regval[1] = TXSCH_TL1_DFLT_RR_PRIO << 24 | dwrr_val; 677 + req->regval[1] = (u64)hw->txschq_aggr_lvl_rr_prio << 24 | dwrr_val; 678 678 679 679 if (lvl == hw->txschq_link_cfg_lvl) { 680 680 req->num_regs++; ··· 698 698 699 699 req->num_regs++; 700 700 req->reg[1] = NIX_AF_TL1X_TOPOLOGY(schq); 701 - req->regval[1] = (TXSCH_TL1_DFLT_RR_PRIO << 1); 701 + req->regval[1] = hw->txschq_aggr_lvl_rr_prio << 1; 702 702 703 703 req->num_regs++; 704 704 req->reg[2] = NIX_AF_TL1X_CIR(schq);
+28 -27
drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h
··· 139 139 #define NIX_LF_CINTX_ENA_W1C(a) (NIX_LFBASE | 0xD50 | (a) << 12) 140 140 141 141 /* NIX AF transmit scheduler registers */ 142 - #define NIX_AF_SMQX_CFG(a) (0x700 | (a) << 16) 143 - #define NIX_AF_TL1X_SCHEDULE(a) (0xC00 | (a) << 16) 144 - #define NIX_AF_TL1X_CIR(a) (0xC20 | (a) << 16) 145 - #define NIX_AF_TL1X_TOPOLOGY(a) (0xC80 | (a) << 16) 146 - #define NIX_AF_TL2X_PARENT(a) (0xE88 | (a) << 16) 147 - #define NIX_AF_TL2X_SCHEDULE(a) (0xE00 | (a) << 16) 148 - #define NIX_AF_TL2X_TOPOLOGY(a) (0xE80 | (a) << 16) 149 - #define NIX_AF_TL2X_CIR(a) (0xE20 | (a) << 16) 150 - #define NIX_AF_TL2X_PIR(a) (0xE30 | (a) << 16) 151 - #define NIX_AF_TL3X_PARENT(a) (0x1088 | (a) << 16) 152 - #define NIX_AF_TL3X_SCHEDULE(a) (0x1000 | (a) << 16) 153 - #define NIX_AF_TL3X_SHAPE(a) (0x1010 | (a) << 16) 154 - #define NIX_AF_TL3X_CIR(a) (0x1020 | (a) << 16) 155 - #define NIX_AF_TL3X_PIR(a) (0x1030 | (a) << 16) 156 - #define NIX_AF_TL3X_TOPOLOGY(a) (0x1080 | (a) << 16) 157 - #define NIX_AF_TL4X_PARENT(a) (0x1288 | (a) << 16) 158 - #define NIX_AF_TL4X_SCHEDULE(a) (0x1200 | (a) << 16) 159 - #define NIX_AF_TL4X_SHAPE(a) (0x1210 | (a) << 16) 160 - #define NIX_AF_TL4X_CIR(a) (0x1220 | (a) << 16) 161 - #define NIX_AF_TL4X_PIR(a) (0x1230 | (a) << 16) 162 - #define NIX_AF_TL4X_TOPOLOGY(a) (0x1280 | (a) << 16) 163 - #define NIX_AF_MDQX_SCHEDULE(a) (0x1400 | (a) << 16) 164 - #define NIX_AF_MDQX_SHAPE(a) (0x1410 | (a) << 16) 165 - #define NIX_AF_MDQX_CIR(a) (0x1420 | (a) << 16) 166 - #define NIX_AF_MDQX_PIR(a) (0x1430 | (a) << 16) 167 - #define NIX_AF_MDQX_PARENT(a) (0x1480 | (a) << 16) 168 - #define NIX_AF_TL3_TL2X_LINKX_CFG(a, b) (0x1700 | (a) << 16 | (b) << 3) 142 + #define NIX_AF_SMQX_CFG(a) (0x700 | (u64)(a) << 16) 143 + #define NIX_AF_TL4X_SDP_LINK_CFG(a) (0xB10 | (u64)(a) << 16) 144 + #define NIX_AF_TL1X_SCHEDULE(a) (0xC00 | (u64)(a) << 16) 145 + #define NIX_AF_TL1X_CIR(a) (0xC20 | (u64)(a) << 16) 146 + #define NIX_AF_TL1X_TOPOLOGY(a) (0xC80 | (u64)(a) << 16) 147 + #define NIX_AF_TL2X_PARENT(a) (0xE88 | (u64)(a) << 16) 148 + #define NIX_AF_TL2X_SCHEDULE(a) (0xE00 | (u64)(a) << 16) 149 + #define NIX_AF_TL2X_TOPOLOGY(a) (0xE80 | (u64)(a) << 16) 150 + #define NIX_AF_TL2X_CIR(a) (0xE20 | (u64)(a) << 16) 151 + #define NIX_AF_TL2X_PIR(a) (0xE30 | (u64)(a) << 16) 152 + #define NIX_AF_TL3X_PARENT(a) (0x1088 | (u64)(a) << 16) 153 + #define NIX_AF_TL3X_SCHEDULE(a) (0x1000 | (u64)(a) << 16) 154 + #define NIX_AF_TL3X_SHAPE(a) (0x1010 | (u64)(a) << 16) 155 + #define NIX_AF_TL3X_CIR(a) (0x1020 | (u64)(a) << 16) 156 + #define NIX_AF_TL3X_PIR(a) (0x1030 | (u64)(a) << 16) 157 + #define NIX_AF_TL3X_TOPOLOGY(a) (0x1080 | (u64)(a) << 16) 158 + #define NIX_AF_TL4X_PARENT(a) (0x1288 | (u64)(a) << 16) 159 + #define NIX_AF_TL4X_SCHEDULE(a) (0x1200 | (u64)(a) << 16) 160 + #define NIX_AF_TL4X_SHAPE(a) (0x1210 | (u64)(a) << 16) 161 + #define NIX_AF_TL4X_CIR(a) (0x1220 | (u64)(a) << 16) 162 + #define NIX_AF_TL4X_PIR(a) (0x1230 | (u64)(a) << 16) 163 + #define NIX_AF_TL4X_TOPOLOGY(a) (0x1280 | (u64)(a) << 16) 164 + #define NIX_AF_MDQX_SCHEDULE(a) (0x1400 | (u64)(a) << 16) 165 + #define NIX_AF_MDQX_SHAPE(a) (0x1410 | (u64)(a) << 16) 166 + #define NIX_AF_MDQX_CIR(a) (0x1420 | (u64)(a) << 16) 167 + #define NIX_AF_MDQX_PIR(a) (0x1430 | (u64)(a) << 16) 168 + #define NIX_AF_MDQX_PARENT(a) (0x1480 | (u64)(a) << 16) 169 + #define NIX_AF_TL3_TL2X_LINKX_CFG(a, b) (0x1700 | (u64)(a) << 16 | (b) << 3) 169 170 170 171 /* LMT LF registers */ 171 172 #define LMT_LFBASE BIT_ULL(RVU_FUNC_BLKADDR_SHIFT)
+1 -1
drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c
··· 513 513 514 514 static void otx2_adjust_adaptive_coalese(struct otx2_nic *pfvf, struct otx2_cq_poll *cq_poll) 515 515 { 516 - struct dim_sample dim_sample; 516 + struct dim_sample dim_sample = { 0 }; 517 517 u64 rx_frames, rx_bytes; 518 518 u64 tx_frames, tx_bytes; 519 519
+1 -2
drivers/net/ethernet/marvell/octeontx2/nic/qos.c
··· 153 153 num_regs++; 154 154 155 155 otx2_config_sched_shaping(pfvf, node, cfg, &num_regs); 156 - 157 156 } else if (level == NIX_TXSCH_LVL_TL4) { 158 157 otx2_config_sched_shaping(pfvf, node, cfg, &num_regs); 159 158 } else if (level == NIX_TXSCH_LVL_TL3) { ··· 175 176 /* check if node is root */ 176 177 if (node->qid == OTX2_QOS_QID_INNER && !node->parent) { 177 178 cfg->reg[num_regs] = NIX_AF_TL2X_SCHEDULE(node->schq); 178 - cfg->regval[num_regs] = TXSCH_TL1_DFLT_RR_PRIO << 24 | 179 + cfg->regval[num_regs] = (u64)hw->txschq_aggr_lvl_rr_prio << 24 | 179 180 mtu_to_dwrr_weight(pfvf, 180 181 pfvf->tx_max_pktlen); 181 182 num_regs++;
+15 -3
drivers/net/ethernet/mellanox/mlxsw/pci.c
··· 1779 1779 return -EBUSY; 1780 1780 } 1781 1781 1782 - static int mlxsw_pci_reset_at_pci_disable(struct mlxsw_pci *mlxsw_pci) 1782 + static int mlxsw_pci_reset_at_pci_disable(struct mlxsw_pci *mlxsw_pci, 1783 + bool pci_reset_sbr_supported) 1783 1784 { 1784 1785 struct pci_dev *pdev = mlxsw_pci->pdev; 1785 1786 char mrsr_pl[MLXSW_REG_MRSR_LEN]; 1786 1787 int err; 1788 + 1789 + if (!pci_reset_sbr_supported) { 1790 + pci_dbg(pdev, "Performing PCI hot reset instead of \"all reset\"\n"); 1791 + goto sbr; 1792 + } 1787 1793 1788 1794 mlxsw_reg_mrsr_pack(mrsr_pl, 1789 1795 MLXSW_REG_MRSR_COMMAND_RESET_AT_PCI_DISABLE); ··· 1797 1791 if (err) 1798 1792 return err; 1799 1793 1794 + sbr: 1800 1795 device_lock_assert(&pdev->dev); 1801 1796 1802 1797 pci_cfg_access_lock(pdev); ··· 1825 1818 mlxsw_pci_reset(struct mlxsw_pci *mlxsw_pci, const struct pci_device_id *id) 1826 1819 { 1827 1820 struct pci_dev *pdev = mlxsw_pci->pdev; 1821 + bool pci_reset_sbr_supported = false; 1828 1822 char mcam_pl[MLXSW_REG_MCAM_LEN]; 1829 1823 bool pci_reset_supported = false; 1830 1824 u32 sys_status; ··· 1845 1837 mlxsw_reg_mcam_pack(mcam_pl, 1846 1838 MLXSW_REG_MCAM_FEATURE_GROUP_ENHANCED_FEATURES); 1847 1839 err = mlxsw_reg_query(mlxsw_pci->core, MLXSW_REG(mcam), mcam_pl); 1848 - if (!err) 1840 + if (!err) { 1849 1841 mlxsw_reg_mcam_unpack(mcam_pl, MLXSW_REG_MCAM_PCI_RESET, 1850 1842 &pci_reset_supported); 1843 + mlxsw_reg_mcam_unpack(mcam_pl, MLXSW_REG_MCAM_PCI_RESET_SBR, 1844 + &pci_reset_sbr_supported); 1845 + } 1851 1846 1852 1847 if (pci_reset_supported) { 1853 1848 pci_dbg(pdev, "Starting PCI reset flow\n"); 1854 - err = mlxsw_pci_reset_at_pci_disable(mlxsw_pci); 1849 + err = mlxsw_pci_reset_at_pci_disable(mlxsw_pci, 1850 + pci_reset_sbr_supported); 1855 1851 } else { 1856 1852 pci_dbg(pdev, "Starting software reset flow\n"); 1857 1853 err = mlxsw_pci_reset_sw(mlxsw_pci);
+2
drivers/net/ethernet/mellanox/mlxsw/reg.h
··· 10671 10671 MLXSW_REG_MCAM_MCIA_128B = 34, 10672 10672 /* If set, MRSR.command=6 is supported. */ 10673 10673 MLXSW_REG_MCAM_PCI_RESET = 48, 10674 + /* If set, MRSR.command=6 is supported with Secondary Bus Reset. */ 10675 + MLXSW_REG_MCAM_PCI_RESET_SBR = 67, 10674 10676 }; 10675 10677 10676 10678 #define MLXSW_REG_BYTES_PER_DWORD 0x4
+14 -6
drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c
··· 1611 1611 int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core, 1612 1612 unsigned int sb_index) 1613 1613 { 1614 + u16 local_port, local_port_1, first_local_port, last_local_port; 1614 1615 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); 1615 - u16 local_port, local_port_1, last_local_port; 1616 1616 struct mlxsw_sp_sb_sr_occ_query_cb_ctx cb_ctx; 1617 1617 u8 masked_count, current_page = 0; 1618 1618 unsigned long cb_priv = 0; ··· 1632 1632 masked_count = 0; 1633 1633 mlxsw_reg_sbsr_pack(sbsr_pl, false); 1634 1634 mlxsw_reg_sbsr_port_page_set(sbsr_pl, current_page); 1635 + first_local_port = current_page * MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE; 1635 1636 last_local_port = current_page * MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE + 1636 1637 MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE - 1; 1637 1638 ··· 1650 1649 if (local_port != MLXSW_PORT_CPU_PORT) { 1651 1650 /* Ingress quotas are not supported for the CPU port */ 1652 1651 mlxsw_reg_sbsr_ingress_port_mask_set(sbsr_pl, 1653 - local_port, 1); 1652 + local_port - first_local_port, 1653 + 1); 1654 1654 } 1655 - mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, local_port, 1); 1655 + mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, 1656 + local_port - first_local_port, 1657 + 1); 1656 1658 for (i = 0; i < mlxsw_sp->sb_vals->pool_count; i++) { 1657 1659 err = mlxsw_sp_sb_pm_occ_query(mlxsw_sp, local_port, i, 1658 1660 &bulk_list); ··· 1692 1688 unsigned int sb_index) 1693 1689 { 1694 1690 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); 1695 - u16 local_port, last_local_port; 1691 + u16 local_port, first_local_port, last_local_port; 1696 1692 LIST_HEAD(bulk_list); 1697 1693 unsigned int masked_count; 1698 1694 u8 current_page = 0; ··· 1710 1706 masked_count = 0; 1711 1707 mlxsw_reg_sbsr_pack(sbsr_pl, true); 1712 1708 mlxsw_reg_sbsr_port_page_set(sbsr_pl, current_page); 1709 + first_local_port = current_page * MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE; 1713 1710 last_local_port = current_page * MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE + 1714 1711 MLXSW_REG_SBSR_NUM_PORTS_IN_PAGE - 1; 1715 1712 ··· 1728 1723 if (local_port != MLXSW_PORT_CPU_PORT) { 1729 1724 /* Ingress quotas are not supported for the CPU port */ 1730 1725 mlxsw_reg_sbsr_ingress_port_mask_set(sbsr_pl, 1731 - local_port, 1); 1726 + local_port - first_local_port, 1727 + 1); 1732 1728 } 1733 - mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, local_port, 1); 1729 + mlxsw_reg_sbsr_egress_port_mask_set(sbsr_pl, 1730 + local_port - first_local_port, 1731 + 1); 1734 1732 for (i = 0; i < mlxsw_sp->sb_vals->pool_count; i++) { 1735 1733 err = mlxsw_sp_sb_pm_occ_clear(mlxsw_sp, local_port, i, 1736 1734 &bulk_list);
+2
drivers/net/ethernet/microsoft/mana/mana_en.c
··· 2838 2838 if (ret) 2839 2839 goto init_fail; 2840 2840 2841 + /* madev is owned by the auxiliary device */ 2842 + madev = NULL; 2841 2843 ret = auxiliary_device_add(adev); 2842 2844 if (ret) 2843 2845 goto add_fail;
+3 -1
drivers/net/ethernet/pensando/ionic/ionic_dev.h
··· 375 375 unsigned int ionic_cq_service(struct ionic_cq *cq, unsigned int work_to_do, 376 376 ionic_cq_cb cb, ionic_cq_done_cb done_cb, 377 377 void *done_arg); 378 - unsigned int ionic_tx_cq_service(struct ionic_cq *cq, unsigned int work_to_do); 378 + unsigned int ionic_tx_cq_service(struct ionic_cq *cq, 379 + unsigned int work_to_do, 380 + bool in_napi); 379 381 380 382 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev, 381 383 struct ionic_queue *q, unsigned int index, const char *name,
+1 -1
drivers/net/ethernet/pensando/ionic/ionic_lif.c
··· 1203 1203 ionic_rx_service, NULL, NULL); 1204 1204 1205 1205 if (lif->hwstamp_txq) 1206 - tx_work = ionic_tx_cq_service(&lif->hwstamp_txq->cq, budget); 1206 + tx_work = ionic_tx_cq_service(&lif->hwstamp_txq->cq, budget, !!budget); 1207 1207 1208 1208 work_done = max(max(n_work, a_work), max(rx_work, tx_work)); 1209 1209 if (work_done < budget && napi_complete_done(napi, work_done)) {
+35 -20
drivers/net/ethernet/pensando/ionic/ionic_txrx.c
··· 23 23 24 24 static void ionic_tx_clean(struct ionic_queue *q, 25 25 struct ionic_tx_desc_info *desc_info, 26 - struct ionic_txq_comp *comp); 26 + struct ionic_txq_comp *comp, 27 + bool in_napi); 27 28 28 29 static inline void ionic_txq_post(struct ionic_queue *q, bool ring_dbell) 29 30 { ··· 481 480 return nxmit; 482 481 } 483 482 483 + static void ionic_xdp_rx_put_bufs(struct ionic_queue *q, 484 + struct ionic_buf_info *buf_info, 485 + int nbufs) 486 + { 487 + int i; 488 + 489 + for (i = 0; i < nbufs; i++) { 490 + dma_unmap_page(q->dev, buf_info->dma_addr, 491 + IONIC_PAGE_SIZE, DMA_FROM_DEVICE); 492 + buf_info->page = NULL; 493 + buf_info++; 494 + } 495 + } 496 + 484 497 static bool ionic_run_xdp(struct ionic_rx_stats *stats, 485 498 struct net_device *netdev, 486 499 struct bpf_prog *xdp_prog, ··· 508 493 struct netdev_queue *nq; 509 494 struct xdp_frame *xdpf; 510 495 int remain_len; 496 + int nbufs = 1; 511 497 int frag_len; 512 498 int err = 0; 513 499 ··· 558 542 if (page_is_pfmemalloc(bi->page)) 559 543 xdp_buff_set_frag_pfmemalloc(&xdp_buf); 560 544 } while (remain_len > 0); 545 + nbufs += sinfo->nr_frags; 561 546 } 562 547 563 548 xdp_action = bpf_prog_run_xdp(xdp_prog, &xdp_buf); ··· 591 574 goto out_xdp_abort; 592 575 } 593 576 594 - dma_unmap_page(rxq->dev, buf_info->dma_addr, 595 - IONIC_PAGE_SIZE, DMA_FROM_DEVICE); 596 - 597 577 err = ionic_xdp_post_frame(txq, xdpf, XDP_TX, 598 578 buf_info->page, 599 579 buf_info->page_offset, ··· 600 586 netdev_dbg(netdev, "tx ionic_xdp_post_frame err %d\n", err); 601 587 goto out_xdp_abort; 602 588 } 603 - buf_info->page = NULL; 589 + ionic_xdp_rx_put_bufs(rxq, buf_info, nbufs); 604 590 stats->xdp_tx++; 605 591 606 592 /* the Tx completion will free the buffers */ 607 593 break; 608 594 609 595 case XDP_REDIRECT: 610 - /* unmap the pages before handing them to a different device */ 611 - dma_unmap_page(rxq->dev, buf_info->dma_addr, 612 - IONIC_PAGE_SIZE, DMA_FROM_DEVICE); 613 - 614 596 err = xdp_do_redirect(netdev, &xdp_buf, xdp_prog); 615 597 if (unlikely(err)) { 616 598 netdev_dbg(netdev, "xdp_do_redirect err %d\n", err); 617 599 goto out_xdp_abort; 618 600 } 619 - buf_info->page = NULL; 601 + ionic_xdp_rx_put_bufs(rxq, buf_info, nbufs); 620 602 rxq->xdp_flush = true; 621 603 stats->xdp_redirect++; 622 604 break; ··· 942 932 u32 work_done = 0; 943 933 u32 flags = 0; 944 934 945 - work_done = ionic_tx_cq_service(cq, budget); 935 + work_done = ionic_tx_cq_service(cq, budget, !!budget); 946 936 947 937 if (unlikely(!budget)) 948 938 return budget; ··· 1025 1015 txqcq = lif->txqcqs[qi]; 1026 1016 txcq = &lif->txqcqs[qi]->cq; 1027 1017 1028 - tx_work_done = ionic_tx_cq_service(txcq, IONIC_TX_BUDGET_DEFAULT); 1018 + tx_work_done = ionic_tx_cq_service(txcq, IONIC_TX_BUDGET_DEFAULT, !!budget); 1029 1019 1030 1020 if (unlikely(!budget)) 1031 1021 return budget; ··· 1158 1148 1159 1149 static void ionic_tx_clean(struct ionic_queue *q, 1160 1150 struct ionic_tx_desc_info *desc_info, 1161 - struct ionic_txq_comp *comp) 1151 + struct ionic_txq_comp *comp, 1152 + bool in_napi) 1162 1153 { 1163 1154 struct ionic_tx_stats *stats = q_to_tx_stats(q); 1164 1155 struct ionic_qcq *qcq = q_to_qcq(q); ··· 1211 1200 desc_info->bytes = skb->len; 1212 1201 stats->clean++; 1213 1202 1214 - napi_consume_skb(skb, 1); 1203 + napi_consume_skb(skb, likely(in_napi) ? 1 : 0); 1215 1204 } 1216 1205 1217 1206 static bool ionic_tx_service(struct ionic_cq *cq, 1218 - unsigned int *total_pkts, unsigned int *total_bytes) 1207 + unsigned int *total_pkts, 1208 + unsigned int *total_bytes, 1209 + bool in_napi) 1219 1210 { 1220 1211 struct ionic_tx_desc_info *desc_info; 1221 1212 struct ionic_queue *q = cq->bound_q; ··· 1239 1226 desc_info->bytes = 0; 1240 1227 index = q->tail_idx; 1241 1228 q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1); 1242 - ionic_tx_clean(q, desc_info, comp); 1229 + ionic_tx_clean(q, desc_info, comp, in_napi); 1243 1230 if (desc_info->skb) { 1244 1231 pkts++; 1245 1232 bytes += desc_info->bytes; ··· 1253 1240 return true; 1254 1241 } 1255 1242 1256 - unsigned int ionic_tx_cq_service(struct ionic_cq *cq, unsigned int work_to_do) 1243 + unsigned int ionic_tx_cq_service(struct ionic_cq *cq, 1244 + unsigned int work_to_do, 1245 + bool in_napi) 1257 1246 { 1258 1247 unsigned int work_done = 0; 1259 1248 unsigned int bytes = 0; ··· 1264 1249 if (work_to_do == 0) 1265 1250 return 0; 1266 1251 1267 - while (ionic_tx_service(cq, &pkts, &bytes)) { 1252 + while (ionic_tx_service(cq, &pkts, &bytes, in_napi)) { 1268 1253 if (cq->tail_idx == cq->num_descs - 1) 1269 1254 cq->done_color = !cq->done_color; 1270 1255 cq->tail_idx = (cq->tail_idx + 1) & (cq->num_descs - 1); ··· 1290 1275 { 1291 1276 u32 work_done; 1292 1277 1293 - work_done = ionic_tx_cq_service(cq, cq->num_descs); 1278 + work_done = ionic_tx_cq_service(cq, cq->num_descs, false); 1294 1279 if (work_done) 1295 1280 ionic_intr_credits(cq->idev->intr_ctrl, cq->bound_intr->index, 1296 1281 work_done, IONIC_INTR_CRED_RESET_COALESCE); ··· 1307 1292 desc_info = &q->tx_info[q->tail_idx]; 1308 1293 desc_info->bytes = 0; 1309 1294 q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1); 1310 - ionic_tx_clean(q, desc_info, NULL); 1295 + ionic_tx_clean(q, desc_info, NULL, false); 1311 1296 if (desc_info->skb) { 1312 1297 pkts++; 1313 1298 bytes += desc_info->bytes;
+1
drivers/net/phy/micrel.c
··· 5607 5607 { PHY_ID_KSZ8081, MICREL_PHY_ID_MASK }, 5608 5608 { PHY_ID_KSZ8873MLL, MICREL_PHY_ID_MASK }, 5609 5609 { PHY_ID_KSZ886X, MICREL_PHY_ID_MASK }, 5610 + { PHY_ID_KSZ9477, MICREL_PHY_ID_MASK }, 5610 5611 { PHY_ID_LAN8814, MICREL_PHY_ID_MASK }, 5611 5612 { PHY_ID_LAN8804, MICREL_PHY_ID_MASK }, 5612 5613 { PHY_ID_LAN8841, MICREL_PHY_ID_MASK },
+1
drivers/net/pse-pd/Kconfig
··· 23 23 config PSE_PD692X0 24 24 tristate "PD692X0 PSE controller" 25 25 depends on I2C 26 + select FW_LOADER 26 27 select FW_UPLOAD 27 28 help 28 29 This module provides support for PD692x0 regulator based Ethernet
+5 -1
drivers/net/usb/ax88179_178a.c
··· 326 326 327 327 if (netif_carrier_ok(dev->net) != link) { 328 328 usbnet_link_change(dev, link, 1); 329 - netdev_info(dev->net, "ax88179 - Link status is: %d\n", link); 329 + if (!link) 330 + netdev_info(dev->net, "ax88179 - Link status is: 0\n"); 330 331 } 331 332 } 332 333 ··· 1543 1542 GMII_PHY_PHYSR, 2, &tmp16); 1544 1543 1545 1544 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) { 1545 + netdev_info(dev->net, "ax88179 - Link status is: 0\n"); 1546 1546 return 0; 1547 1547 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) { 1548 1548 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ; ··· 1580 1578 ax179_data->eee_enabled = ax88179_chk_eee(dev); 1581 1579 1582 1580 netif_carrier_on(dev->net); 1581 + 1582 + netdev_info(dev->net, "ax88179 - Link status is: 1\n"); 1583 1583 1584 1584 return 0; 1585 1585 }
+2
drivers/net/usb/qmi_wwan.c
··· 1372 1372 {QMI_QUIRK_SET_DTR(0x1bc7, 0x1260, 2)}, /* Telit LE910Cx */ 1373 1373 {QMI_QUIRK_SET_DTR(0x1bc7, 0x1261, 2)}, /* Telit LE910Cx */ 1374 1374 {QMI_QUIRK_SET_DTR(0x1bc7, 0x1900, 1)}, /* Telit LN940 series */ 1375 + {QMI_QUIRK_SET_DTR(0x1bc7, 0x3000, 0)}, /* Telit FN912 series */ 1376 + {QMI_QUIRK_SET_DTR(0x1bc7, 0x3001, 0)}, /* Telit FN912 series */ 1375 1377 {QMI_FIXED_INTF(0x1c9e, 0x9801, 3)}, /* Telewell TW-3G HSPA+ */ 1376 1378 {QMI_FIXED_INTF(0x1c9e, 0x9803, 4)}, /* Telewell TW-3G HSPA+ */ 1377 1379 {QMI_FIXED_INTF(0x1c9e, 0x9b01, 3)}, /* XS Stick W100-2 from 4G Systems */
+8 -1
drivers/net/vxlan/vxlan_core.c
··· 2339 2339 struct ip_tunnel_key *pkey; 2340 2340 struct ip_tunnel_key key; 2341 2341 struct vxlan_dev *vxlan = netdev_priv(dev); 2342 - const struct iphdr *old_iph = ip_hdr(skb); 2342 + const struct iphdr *old_iph; 2343 2343 struct vxlan_metadata _md; 2344 2344 struct vxlan_metadata *md = &_md; 2345 2345 unsigned int pkt_len = skb->len; ··· 2353 2353 bool use_cache; 2354 2354 bool udp_sum = false; 2355 2355 bool xnet = !net_eq(vxlan->net, dev_net(vxlan->dev)); 2356 + bool no_eth_encap; 2356 2357 __be32 vni = 0; 2358 + 2359 + no_eth_encap = flags & VXLAN_F_GPE && skb->protocol != htons(ETH_P_TEB); 2360 + if (!skb_vlan_inet_prepare(skb, no_eth_encap)) 2361 + goto drop; 2362 + 2363 + old_iph = ip_hdr(skb); 2357 2364 2358 2365 info = skb_tunnel_info(skb); 2359 2366 use_cache = ip_tunnel_dst_cache_usable(skb, info);
-7
drivers/net/wireless/ti/wlcore/cmd.c
··· 1566 1566 cpu_to_le32(wl1271_tx_enabled_rates_get(wl, sta_rates, 1567 1567 wlvif->band)); 1568 1568 1569 - if (!cmd->supported_rates) { 1570 - wl1271_debug(DEBUG_CMD, 1571 - "peer has no supported rates yet, configuring basic rates: 0x%x", 1572 - wlvif->basic_rate_set); 1573 - cmd->supported_rates = cpu_to_le32(wlvif->basic_rate_set); 1574 - } 1575 - 1576 1569 wl1271_debug(DEBUG_CMD, "new peer rates=0x%x queues=0x%x", 1577 1570 cmd->supported_rates, sta->uapsd_queues); 1578 1571
+8 -9
drivers/net/wireless/ti/wlcore/main.c
··· 5139 5139 5140 5140 /* Add station (AP mode) */ 5141 5141 if (is_ap && 5142 - old_state == IEEE80211_STA_NOTEXIST && 5143 - new_state == IEEE80211_STA_NONE) { 5142 + old_state == IEEE80211_STA_AUTH && 5143 + new_state == IEEE80211_STA_ASSOC) { 5144 5144 ret = wl12xx_sta_add(wl, wlvif, sta); 5145 5145 if (ret) 5146 5146 return ret; 5147 + 5148 + wl_sta->fw_added = true; 5147 5149 5148 5150 wlcore_update_inconn_sta(wl, wlvif, wl_sta, true); 5149 5151 } 5150 5152 5151 5153 /* Remove station (AP mode) */ 5152 5154 if (is_ap && 5153 - old_state == IEEE80211_STA_NONE && 5154 - new_state == IEEE80211_STA_NOTEXIST) { 5155 + old_state == IEEE80211_STA_ASSOC && 5156 + new_state == IEEE80211_STA_AUTH) { 5157 + wl_sta->fw_added = false; 5158 + 5155 5159 /* must not fail */ 5156 5160 wl12xx_sta_remove(wl, wlvif, sta); 5157 5161 ··· 5166 5162 if (is_ap && 5167 5163 new_state == IEEE80211_STA_AUTHORIZED) { 5168 5164 ret = wl12xx_cmd_set_peer_state(wl, wlvif, wl_sta->hlid); 5169 - if (ret < 0) 5170 - return ret; 5171 - 5172 - /* reconfigure rates */ 5173 - ret = wl12xx_cmd_add_peer(wl, wlvif, sta, wl_sta->hlid); 5174 5165 if (ret < 0) 5175 5166 return ret; 5176 5167
+2 -5
drivers/net/wireless/ti/wlcore/tx.c
··· 140 140 static u8 wl12xx_tx_get_hlid_ap(struct wl1271 *wl, struct wl12xx_vif *wlvif, 141 141 struct sk_buff *skb, struct ieee80211_sta *sta) 142 142 { 143 - if (sta) { 144 - struct wl1271_station *wl_sta; 145 - 146 - wl_sta = (struct wl1271_station *)sta->drv_priv; 147 - return wl_sta->hlid; 143 + if (sta && wl1271_station(sta)->fw_added) { 144 + return wl1271_station(sta)->hlid; 148 145 } else { 149 146 struct ieee80211_hdr *hdr; 150 147
+6
drivers/net/wireless/ti/wlcore/wlcore_i.h
··· 324 324 325 325 struct wl1271_station { 326 326 u8 hlid; 327 + bool fw_added; 327 328 bool in_connection; 328 329 329 330 /* ··· 335 334 */ 336 335 u64 total_freed_pkts; 337 336 }; 337 + 338 + static inline struct wl1271_station *wl1271_station(struct ieee80211_sta *sta) 339 + { 340 + return (struct wl1271_station *)sta->drv_priv; 341 + } 338 342 339 343 struct wl12xx_vif { 340 344 struct wl1271 *wl;
+160 -29
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
··· 187 187 [QPHY_TX_TRANSCEIVER_BIAS_EN] = QSERDES_V6_TX_TRANSCEIVER_BIAS_EN, 188 188 }; 189 189 190 + static const unsigned int qmp_v6_n4_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { 191 + [QPHY_SW_RESET] = QPHY_V6_N4_PCS_SW_RESET, 192 + [QPHY_START_CTRL] = QPHY_V6_N4_PCS_START_CONTROL, 193 + [QPHY_PCS_STATUS] = QPHY_V6_N4_PCS_PCS_STATUS1, 194 + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_N4_PCS_POWER_DOWN_CONTROL, 195 + 196 + /* In PCS_USB */ 197 + [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL, 198 + [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR, 199 + 200 + [QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL, 201 + [QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS, 202 + [QPHY_COM_CMN_STATUS] = QSERDES_V6_COM_CMN_STATUS, 203 + [QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN, 204 + 205 + [QPHY_DP_PHY_STATUS] = QSERDES_V6_DP_PHY_STATUS, 206 + [QPHY_DP_PHY_VCO_DIV] = QSERDES_V6_DP_PHY_VCO_DIV, 207 + 208 + [QPHY_TX_TX_POL_INV] = QSERDES_V6_N4_TX_TX_POL_INV, 209 + [QPHY_TX_TX_DRV_LVL] = QSERDES_V6_N4_TX_TX_DRV_LVL, 210 + [QPHY_TX_TX_EMP_POST1_LVL] = QSERDES_V6_N4_TX_TX_EMP_POST1_LVL, 211 + [QPHY_TX_HIGHZ_DRVR_EN] = QSERDES_V6_N4_TX_HIGHZ_DRVR_EN, 212 + [QPHY_TX_TRANSCEIVER_BIAS_EN] = QSERDES_V6_N4_TX_TRANSCEIVER_BIAS_EN, 213 + }; 214 + 190 215 static const struct qmp_phy_init_tbl qmp_v3_usb3_serdes_tbl[] = { 191 216 QMP_PHY_INIT_CFG(QSERDES_V3_COM_PLL_IVCO, 0x07), 192 217 QMP_PHY_INIT_CFG(QSERDES_V3_COM_SYSCLK_EN_SEL, 0x14), ··· 1022 997 QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORE_CLK_EN, 0x0f), 1023 998 }; 1024 999 1000 + static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl[] = { 1001 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SVS_MODE_CLK_SEL, 0x15), 1002 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYSCLK_EN_SEL, 0x3b), 1003 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYS_CLK_CTRL, 0x02), 1004 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CLK_ENABLE1, 0x0c), 1005 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYSCLK_BUF_ENABLE, 0x06), 1006 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CLK_SELECT, 0x30), 1007 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_IVCO, 0x07), 1008 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CCTRL_MODE0, 0x36), 1009 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_RCTRL_MODE0, 0x16), 1010 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CP_CTRL_MODE0, 0x06), 1011 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x34), 1012 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START1_MODE0, 0x00), 1013 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START2_MODE0, 0xc0), 1014 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CMN_CONFIG_1, 0x12), 1015 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_INTEGLOOP_GAIN0_MODE0, 0x3f), 1016 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_INTEGLOOP_GAIN1_MODE0, 0x00), 1017 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE_MAP, 0x00), 1018 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BG_TIMER, 0x0a), 1019 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CORE_CLK_DIV_MODE0, 0x14), 1020 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE_CTRL, 0x00), 1021 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN, 0x17), 1022 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORE_CLK_EN, 0x0f), 1023 + }; 1024 + 1025 1025 static const struct qmp_phy_init_tbl qmp_v6_dp_tx_tbl[] = { 1026 1026 QMP_PHY_INIT_CFG(QSERDES_V6_TX_VMODE_CTRL1, 0x40), 1027 1027 QMP_PHY_INIT_CFG(QSERDES_V6_TX_PRE_STALL_LDO_BOOST_EN, 0x30), ··· 1059 1009 QMP_PHY_INIT_CFG(QSERDES_V6_TX_RES_CODE_LANE_OFFSET_TX, 0x0c), 1060 1010 QMP_PHY_INIT_CFG(QSERDES_V6_TX_RES_CODE_LANE_OFFSET_RX, 0x0c), 1061 1011 QMP_PHY_INIT_CFG(QSERDES_V6_TX_TX_BAND, 0x4), 1012 + }; 1013 + 1014 + static const struct qmp_phy_init_tbl qmp_v6_n4_dp_tx_tbl[] = { 1015 + QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_VMODE_CTRL1, 0x40), 1016 + QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_PRE_STALL_LDO_BOOST_EN, 0x00), 1017 + QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_INTERFACE_SELECT, 0xff), 1018 + QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_CLKBUF_ENABLE, 0x0f), 1019 + QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_RESET_TSYNC_EN, 0x03), 1020 + QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_TRAN_DRVR_EMP_EN, 0x0f), 1021 + QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_PARRATE_REC_DETECT_IDLE_EN, 0x00), 1022 + QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_RES_CODE_LANE_OFFSET_TX, 0x11), 1023 + QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_RES_CODE_LANE_OFFSET_RX, 0x11), 1024 + QMP_PHY_INIT_CFG(QSERDES_V6_N4_TX_TX_BAND, 0x1), 1062 1025 }; 1063 1026 1064 1027 static const struct qmp_phy_init_tbl qmp_v6_dp_serdes_tbl_rbr[] = { ··· 1120 1057 QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x08), 1121 1058 QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x71), 1122 1059 QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x0c), 1060 + }; 1061 + 1062 + static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl_rbr[] = { 1063 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x05), 1064 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x34), 1065 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x04), 1066 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x0b), 1067 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x37), 1068 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x04), 1069 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x71), 1070 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x0c), 1071 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01), 1072 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_ADJ_PER1, 0x00), 1073 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x6b), 1074 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x02), 1075 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0x92), 1076 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x01), 1077 + }; 1078 + 1079 + static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl_hbr[] = { 1080 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x03), 1081 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x34), 1082 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x08), 1083 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x0b), 1084 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x07), 1085 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x07), 1086 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x71), 1087 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x0c), 1088 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01), 1089 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_ADJ_PER1, 0x00), 1090 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x6b), 1091 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x02), 1092 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0x92), 1093 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x01), 1094 + }; 1095 + 1096 + static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl_hbr2[] = { 1097 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x01), 1098 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x46), 1099 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x08), 1100 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x05), 1101 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x0f), 1102 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x0e), 1103 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x97), 1104 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x10), 1105 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01), 1106 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_ADJ_PER1, 0x00), 1107 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x6b), 1108 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x02), 1109 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0x18), 1110 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x02), 1111 + }; 1112 + 1113 + static const struct qmp_phy_init_tbl qmp_v6_n4_dp_serdes_tbl_hbr3[] = { 1114 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x00), 1115 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x34), 1116 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x08), 1117 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x0b), 1118 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x17), 1119 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x15), 1120 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0x71), 1121 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x0c), 1122 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01), 1123 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_ADJ_PER1, 0x00), 1124 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x6b), 1125 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x02), 1126 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0x92), 1127 + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x01), 1123 1128 }; 1124 1129 1125 1130 static const struct qmp_phy_init_tbl sc8280xp_usb43dp_serdes_tbl[] = { ··· 1404 1273 }; 1405 1274 1406 1275 static const struct qmp_phy_init_tbl x1e80100_usb43dp_pcs_tbl[] = { 1407 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7), 1408 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03), 1409 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4), 1410 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG2, 0x89), 1411 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG3, 0x20), 1412 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG6, 0x13), 1413 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_REFGEN_REQ_CONFIG1, 0x21), 1414 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_RX_SIGDET_LVL, 0x55), 1415 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_CDR_RESET_TIME, 0x0a), 1416 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG1, 0xd4), 1417 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG2, 0x30), 1418 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_PCS_TX_RX_CONFIG, 0x0c), 1419 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG1, 0x4b), 1420 - QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG5, 0x10), 1276 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7), 1277 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03), 1278 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG1, 0xc4), 1279 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG2, 0x89), 1280 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG3, 0x20), 1281 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG6, 0x13), 1282 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_REFGEN_REQ_CONFIG1, 0x21), 1283 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_RX_SIGDET_LVL, 0x55), 1284 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_RX_CONFIG, 0x0a), 1285 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_ALIGN_DETECT_CONFIG1, 0xd4), 1286 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_ALIGN_DETECT_CONFIG2, 0x30), 1287 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_PCS_TX_RX_CONFIG, 0x0c), 1288 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_EQ_CONFIG1, 0x4b), 1289 + QMP_PHY_INIT_CFG(QPHY_V6_N4_PCS_EQ_CONFIG5, 0x10), 1421 1290 }; 1422 1291 1423 1292 static const struct qmp_phy_init_tbl x1e80100_usb43dp_pcs_usb_tbl[] = { ··· 1925 1794 .pcs_usb_tbl = x1e80100_usb43dp_pcs_usb_tbl, 1926 1795 .pcs_usb_tbl_num = ARRAY_SIZE(x1e80100_usb43dp_pcs_usb_tbl), 1927 1796 1928 - .dp_serdes_tbl = qmp_v6_dp_serdes_tbl, 1929 - .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v6_dp_serdes_tbl), 1930 - .dp_tx_tbl = qmp_v6_dp_tx_tbl, 1931 - .dp_tx_tbl_num = ARRAY_SIZE(qmp_v6_dp_tx_tbl), 1797 + .dp_serdes_tbl = qmp_v6_n4_dp_serdes_tbl, 1798 + .dp_serdes_tbl_num = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl), 1799 + .dp_tx_tbl = qmp_v6_n4_dp_tx_tbl, 1800 + .dp_tx_tbl_num = ARRAY_SIZE(qmp_v6_n4_dp_tx_tbl), 1932 1801 1933 - .serdes_tbl_rbr = qmp_v6_dp_serdes_tbl_rbr, 1934 - .serdes_tbl_rbr_num = ARRAY_SIZE(qmp_v6_dp_serdes_tbl_rbr), 1935 - .serdes_tbl_hbr = qmp_v6_dp_serdes_tbl_hbr, 1936 - .serdes_tbl_hbr_num = ARRAY_SIZE(qmp_v6_dp_serdes_tbl_hbr), 1937 - .serdes_tbl_hbr2 = qmp_v6_dp_serdes_tbl_hbr2, 1938 - .serdes_tbl_hbr2_num = ARRAY_SIZE(qmp_v6_dp_serdes_tbl_hbr2), 1939 - .serdes_tbl_hbr3 = qmp_v6_dp_serdes_tbl_hbr3, 1940 - .serdes_tbl_hbr3_num = ARRAY_SIZE(qmp_v6_dp_serdes_tbl_hbr3), 1802 + .serdes_tbl_rbr = qmp_v6_n4_dp_serdes_tbl_rbr, 1803 + .serdes_tbl_rbr_num = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_rbr), 1804 + .serdes_tbl_hbr = qmp_v6_n4_dp_serdes_tbl_hbr, 1805 + .serdes_tbl_hbr_num = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_hbr), 1806 + .serdes_tbl_hbr2 = qmp_v6_n4_dp_serdes_tbl_hbr2, 1807 + .serdes_tbl_hbr2_num = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_hbr2), 1808 + .serdes_tbl_hbr3 = qmp_v6_n4_dp_serdes_tbl_hbr3, 1809 + .serdes_tbl_hbr3_num = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_hbr3), 1941 1810 1942 - .swing_hbr_rbr = &qmp_dp_v5_voltage_swing_hbr_rbr, 1943 - .pre_emphasis_hbr_rbr = &qmp_dp_v5_pre_emphasis_hbr_rbr, 1811 + .swing_hbr_rbr = &qmp_dp_v6_voltage_swing_hbr_rbr, 1812 + .pre_emphasis_hbr_rbr = &qmp_dp_v6_pre_emphasis_hbr_rbr, 1944 1813 .swing_hbr3_hbr2 = &qmp_dp_v5_voltage_swing_hbr3_hbr2, 1945 1814 .pre_emphasis_hbr3_hbr2 = &qmp_dp_v5_pre_emphasis_hbr3_hbr2, 1946 1815 ··· 1953 1822 .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), 1954 1823 .vreg_list = qmp_phy_vreg_l, 1955 1824 .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), 1956 - .regs = qmp_v45_usb3phy_regs_layout, 1825 + .regs = qmp_v6_n4_usb3phy_regs_layout, 1957 1826 }; 1958 1827 1959 1828 static const struct qmp_phy_cfg sm6350_usb3dpphy_cfg = {
+32
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6-n4.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + /* 3 + * Copyright (c) 2023, Linaro Limited 4 + */ 5 + 6 + #ifndef QCOM_PHY_QMP_PCS_V6_N4_H_ 7 + #define QCOM_PHY_QMP_PCS_V6_N4_H_ 8 + 9 + /* Only for QMP V6 N4 PHY - USB/PCIe PCS registers */ 10 + #define QPHY_V6_N4_PCS_SW_RESET 0x000 11 + #define QPHY_V6_N4_PCS_PCS_STATUS1 0x014 12 + #define QPHY_V6_N4_PCS_POWER_DOWN_CONTROL 0x040 13 + #define QPHY_V6_N4_PCS_START_CONTROL 0x044 14 + #define QPHY_V6_N4_PCS_POWER_STATE_CONFIG1 0x090 15 + #define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG1 0x0c4 16 + #define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG2 0x0c8 17 + #define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG3 0x0cc 18 + #define QPHY_V6_N4_PCS_LOCK_DETECT_CONFIG6 0x0d8 19 + #define QPHY_V6_N4_PCS_REFGEN_REQ_CONFIG1 0x0dc 20 + #define QPHY_V6_N4_PCS_RX_SIGDET_LVL 0x188 21 + #define QPHY_V6_N4_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 22 + #define QPHY_V6_N4_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 23 + #define QPHY_V6_N4_PCS_RATE_SLEW_CNTRL1 0x198 24 + #define QPHY_V6_N4_PCS_RX_CONFIG 0x1b0 25 + #define QPHY_V6_N4_PCS_ALIGN_DETECT_CONFIG1 0x1c0 26 + #define QPHY_V6_N4_PCS_ALIGN_DETECT_CONFIG2 0x1c4 27 + #define QPHY_V6_N4_PCS_PCS_TX_RX_CONFIG 0x1d0 28 + #define QPHY_V6_N4_PCS_EQ_CONFIG1 0x1dc 29 + #define QPHY_V6_N4_PCS_EQ_CONFIG2 0x1e0 30 + #define QPHY_V6_N4_PCS_EQ_CONFIG5 0x1ec 31 + 32 + #endif
+13
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_n4.h
··· 6 6 #ifndef QCOM_PHY_QMP_QSERDES_TXRX_V6_N4_H_ 7 7 #define QCOM_PHY_QMP_QSERDES_TXRX_V6_N4_H_ 8 8 9 + #define QSERDES_V6_N4_TX_CLKBUF_ENABLE 0x08 10 + #define QSERDES_V6_N4_TX_TX_EMP_POST1_LVL 0x0c 11 + #define QSERDES_V6_N4_TX_TX_DRV_LVL 0x14 12 + #define QSERDES_V6_N4_TX_RESET_TSYNC_EN 0x1c 13 + #define QSERDES_V6_N4_TX_PRE_STALL_LDO_BOOST_EN 0x20 9 14 #define QSERDES_V6_N4_TX_RES_CODE_LANE_OFFSET_TX 0x30 10 15 #define QSERDES_V6_N4_TX_RES_CODE_LANE_OFFSET_RX 0x34 16 + #define QSERDES_V6_N4_TX_TRANSCEIVER_BIAS_EN 0x48 17 + #define QSERDES_V6_N4_TX_HIGHZ_DRVR_EN 0x4c 18 + #define QSERDES_V6_N4_TX_TX_POL_INV 0x50 19 + #define QSERDES_V6_N4_TX_PARRATE_REC_DETECT_IDLE_EN 0x54 11 20 #define QSERDES_V6_N4_TX_LANE_MODE_1 0x78 12 21 #define QSERDES_V6_N4_TX_LANE_MODE_2 0x7c 13 22 #define QSERDES_V6_N4_TX_LANE_MODE_3 0x80 23 + #define QSERDES_V6_N4_TX_TRAN_DRVR_EMP_EN 0xac 24 + #define QSERDES_V6_N4_TX_TX_BAND 0xd8 25 + #define QSERDES_V6_N4_TX_INTERFACE_SELECT 0xe4 26 + #define QSERDES_V6_N4_TX_VMODE_CTRL1 0xb0 14 27 15 28 #define QSERDES_V6_N4_RX_UCDR_FO_GAIN_RATE2 0x8 16 29 #define QSERDES_V6_N4_RX_UCDR_SO_GAIN_RATE2 0x18
+2
drivers/phy/qualcomm/phy-qcom-qmp.h
··· 46 46 47 47 #include "phy-qcom-qmp-pcs-v6.h" 48 48 49 + #include "phy-qcom-qmp-pcs-v6-n4.h" 50 + 49 51 #include "phy-qcom-qmp-pcs-v6_20.h" 50 52 51 53 #include "phy-qcom-qmp-pcs-v7.h"
+1 -1
drivers/pinctrl/bcm/pinctrl-bcm2835.c
··· 245 245 }; 246 246 247 247 static bool persist_gpio_outputs; 248 - module_param(persist_gpio_outputs, bool, 0644); 248 + module_param(persist_gpio_outputs, bool, 0444); 249 249 MODULE_PARM_DESC(persist_gpio_outputs, "Enable GPIO_OUT persistence when pin is freed"); 250 250 251 251 static inline u32 bcm2835_gpio_rd(struct bcm2835_pinctrl *pc, unsigned reg)
+1 -1
drivers/pinctrl/core.c
··· 1106 1106 * an -EPROBE_DEFER later, as that is the worst case. 1107 1107 */ 1108 1108 if (ret == -EPROBE_DEFER) { 1109 - pinctrl_free(p, false); 1110 1109 mutex_unlock(&pinctrl_maps_mutex); 1110 + pinctrl_free(p, false); 1111 1111 return ERR_PTR(ret); 1112 1112 } 1113 1113 }
+59 -9
drivers/pinctrl/pinctrl-rockchip.c
··· 634 634 635 635 static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = { 636 636 { 637 - .num = 2, 638 - .pin = 12, 639 - .reg = 0x24, 640 - .bit = 8, 641 - .mask = 0x3 642 - }, { 637 + /* gpio2_b7_sel */ 643 638 .num = 2, 644 639 .pin = 15, 645 640 .reg = 0x28, 646 641 .bit = 0, 647 642 .mask = 0x7 648 643 }, { 644 + /* gpio2_c7_sel */ 649 645 .num = 2, 650 646 .pin = 23, 651 647 .reg = 0x30, 648 + .bit = 14, 649 + .mask = 0x3 650 + }, { 651 + /* gpio3_b1_sel */ 652 + .num = 3, 653 + .pin = 9, 654 + .reg = 0x44, 655 + .bit = 2, 656 + .mask = 0x3 657 + }, { 658 + /* gpio3_b2_sel */ 659 + .num = 3, 660 + .pin = 10, 661 + .reg = 0x44, 662 + .bit = 4, 663 + .mask = 0x3 664 + }, { 665 + /* gpio3_b3_sel */ 666 + .num = 3, 667 + .pin = 11, 668 + .reg = 0x44, 669 + .bit = 6, 670 + .mask = 0x3 671 + }, { 672 + /* gpio3_b4_sel */ 673 + .num = 3, 674 + .pin = 12, 675 + .reg = 0x44, 676 + .bit = 8, 677 + .mask = 0x3 678 + }, { 679 + /* gpio3_b5_sel */ 680 + .num = 3, 681 + .pin = 13, 682 + .reg = 0x44, 683 + .bit = 10, 684 + .mask = 0x3 685 + }, { 686 + /* gpio3_b6_sel */ 687 + .num = 3, 688 + .pin = 14, 689 + .reg = 0x44, 690 + .bit = 12, 691 + .mask = 0x3 692 + }, { 693 + /* gpio3_b7_sel */ 694 + .num = 3, 695 + .pin = 15, 696 + .reg = 0x44, 652 697 .bit = 14, 653 698 .mask = 0x3 654 699 }, ··· 2478 2433 case RK3188: 2479 2434 case RK3288: 2480 2435 case RK3308: 2436 + case RK3328: 2481 2437 case RK3368: 2482 2438 case RK3399: 2483 2439 case RK3568: ··· 2537 2491 case RK3188: 2538 2492 case RK3288: 2539 2493 case RK3308: 2494 + case RK3328: 2540 2495 case RK3368: 2541 2496 case RK3399: 2542 2497 case RK3568: ··· 2751 2704 2752 2705 if (ret) { 2753 2706 /* revert the already done pin settings */ 2754 - for (cnt--; cnt >= 0; cnt--) 2707 + for (cnt--; cnt >= 0; cnt--) { 2708 + bank = pin_to_bank(info, pins[cnt]); 2755 2709 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); 2710 + } 2756 2711 2757 2712 return ret; 2758 2713 } ··· 2802 2753 case RK3188: 2803 2754 case RK3288: 2804 2755 case RK3308: 2756 + case RK3328: 2805 2757 case RK3368: 2806 2758 case RK3399: 2807 2759 case RK3568: ··· 3813 3763 PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0), 3814 3764 PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0), 3815 3765 PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 3816 - IOMUX_WIDTH_3BIT, 3766 + 0, 3817 3767 IOMUX_WIDTH_3BIT, 3818 3768 0), 3819 3769 PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", ··· 3827 3777 .pin_banks = rk3328_pin_banks, 3828 3778 .nr_banks = ARRAY_SIZE(rk3328_pin_banks), 3829 3779 .label = "RK3328-GPIO", 3830 - .type = RK3288, 3780 + .type = RK3328, 3831 3781 .grf_mux_offset = 0x0, 3832 3782 .iomux_recalced = rk3328_mux_recalced_data, 3833 3783 .niomux_recalced = ARRAY_SIZE(rk3328_mux_recalced_data),
+1
drivers/pinctrl/pinctrl-rockchip.h
··· 193 193 RK3188, 194 194 RK3288, 195 195 RK3308, 196 + RK3328, 196 197 RK3368, 197 198 RK3399, 198 199 RK3568,
+1
drivers/pinctrl/pinctrl-tps6594.c
··· 486 486 break; 487 487 case TPS6593: 488 488 case TPS6594: 489 + case LP8764: 489 490 pctrl_desc->pins = tps6594_pins; 490 491 pctrl_desc->npins = ARRAY_SIZE(tps6594_pins); 491 492
-1
drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
··· 1207 1207 { .compatible = "qcom,pm7325-gpio", .data = (void *) 10 }, 1208 1208 { .compatible = "qcom,pm7550ba-gpio", .data = (void *) 8}, 1209 1209 { .compatible = "qcom,pm8005-gpio", .data = (void *) 4 }, 1210 - { .compatible = "qcom,pm8008-gpio", .data = (void *) 2 }, 1211 1210 { .compatible = "qcom,pm8019-gpio", .data = (void *) 6 }, 1212 1211 /* pm8150 has 10 GPIOs with holes on 2, 5, 7 and 8 */ 1213 1212 { .compatible = "qcom,pm8150-gpio", .data = (void *) 10 },
+2 -2
drivers/pinctrl/renesas/pinctrl-rzg2l.c
··· 2071 2071 * This has to be atomically executed to protect against a concurrent 2072 2072 * interrupt. 2073 2073 */ 2074 - raw_spin_lock_irqsave(&pctrl->lock.rlock, flags); 2074 + spin_lock_irqsave(&pctrl->lock, flags); 2075 2075 ret = rzg2l_gpio_irq_set_type(data, irqd_get_trigger_type(data)); 2076 2076 if (!ret && !irqd_irq_disabled(data)) 2077 2077 rzg2l_gpio_irq_enable(data); 2078 - raw_spin_unlock_irqrestore(&pctrl->lock.rlock, flags); 2078 + spin_unlock_irqrestore(&pctrl->lock, flags); 2079 2079 2080 2080 if (ret) 2081 2081 dev_crit(pctrl->dev, "Failed to set IRQ type for virq=%u\n", virq);
+16 -7
drivers/pwm/pwm-stm32.c
··· 321 321 * First we need to find the minimal value for prescaler such that 322 322 * 323 323 * period_ns * clkrate 324 - * ------------------------------ 324 + * ------------------------------ < max_arr + 1 325 325 * NSEC_PER_SEC * (prescaler + 1) 326 326 * 327 - * isn't bigger than max_arr. 327 + * This equation is equivalent to 328 + * 329 + * period_ns * clkrate 330 + * ---------------------------- < prescaler + 1 331 + * NSEC_PER_SEC * (max_arr + 1) 332 + * 333 + * Using integer division and knowing that the right hand side is 334 + * integer, this is further equivalent to 335 + * 336 + * (period_ns * clkrate) // (NSEC_PER_SEC * (max_arr + 1)) ≤ prescaler 328 337 */ 329 338 330 339 prescaler = mul_u64_u64_div_u64(period_ns, clk_get_rate(priv->clk), 331 - (u64)NSEC_PER_SEC * priv->max_arr); 332 - if (prescaler > 0) 333 - prescaler -= 1; 334 - 340 + (u64)NSEC_PER_SEC * ((u64)priv->max_arr + 1)); 335 341 if (prescaler > MAX_TIM_PSC) 336 342 return -EINVAL; 337 343 338 344 prd = mul_u64_u64_div_u64(period_ns, clk_get_rate(priv->clk), 339 345 (u64)NSEC_PER_SEC * (prescaler + 1)); 346 + if (!prd) 347 + return -EINVAL; 340 348 341 349 /* 342 350 * All channels share the same prescaler and counter so when two ··· 681 673 * .apply() won't overflow. 682 674 */ 683 675 if (clk_get_rate(priv->clk) > 1000000000) 684 - return dev_err_probe(dev, -EINVAL, "Failed to lock clock\n"); 676 + return dev_err_probe(dev, -EINVAL, "Clock freq too high (%lu)\n", 677 + clk_get_rate(priv->clk)); 685 678 686 679 chip->ops = &stm32pwm_ops; 687 680
+19 -14
drivers/regulator/axp20x-regulator.c
··· 140 140 141 141 #define AXP717_DCDC1_NUM_VOLTAGES 88 142 142 #define AXP717_DCDC2_NUM_VOLTAGES 107 143 - #define AXP717_DCDC3_NUM_VOLTAGES 104 143 + #define AXP717_DCDC3_NUM_VOLTAGES 103 144 144 #define AXP717_DCDC_V_OUT_MASK GENMASK(6, 0) 145 145 #define AXP717_LDO_V_OUT_MASK GENMASK(4, 0) 146 146 ··· 763 763 REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), 764 764 }; 765 765 766 + /* 767 + * The manual says that the last voltage is 3.4V, encoded as 0b1101011 (107), 768 + * but every other method proves that this is wrong, so it's really 106 that 769 + * programs the final 3.4V. 770 + */ 766 771 static const struct linear_range axp717_dcdc2_ranges[] = { 767 772 REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), 768 773 REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), 769 - REGULATOR_LINEAR_RANGE(1600000, 88, 107, 100000), 774 + REGULATOR_LINEAR_RANGE(1600000, 88, 106, 100000), 770 775 }; 771 776 772 777 static const struct linear_range axp717_dcdc3_ranges[] = { ··· 795 790 AXP_DESC(AXP717, DCDC4, "dcdc4", "vin4", 1000, 3700, 100, 796 791 AXP717_DCDC4_CONTROL, AXP717_DCDC_V_OUT_MASK, 797 792 AXP717_DCDC_OUTPUT_CONTROL, BIT(3)), 798 - AXP_DESC(AXP717, ALDO1, "aldo1", "vin1", 500, 3500, 100, 793 + AXP_DESC(AXP717, ALDO1, "aldo1", "aldoin", 500, 3500, 100, 799 794 AXP717_ALDO1_CONTROL, AXP717_LDO_V_OUT_MASK, 800 795 AXP717_LDO0_OUTPUT_CONTROL, BIT(0)), 801 - AXP_DESC(AXP717, ALDO2, "aldo2", "vin1", 500, 3500, 100, 796 + AXP_DESC(AXP717, ALDO2, "aldo2", "aldoin", 500, 3500, 100, 802 797 AXP717_ALDO2_CONTROL, AXP717_LDO_V_OUT_MASK, 803 798 AXP717_LDO0_OUTPUT_CONTROL, BIT(1)), 804 - AXP_DESC(AXP717, ALDO3, "aldo3", "vin1", 500, 3500, 100, 799 + AXP_DESC(AXP717, ALDO3, "aldo3", "aldoin", 500, 3500, 100, 805 800 AXP717_ALDO3_CONTROL, AXP717_LDO_V_OUT_MASK, 806 801 AXP717_LDO0_OUTPUT_CONTROL, BIT(2)), 807 - AXP_DESC(AXP717, ALDO4, "aldo4", "vin1", 500, 3500, 100, 802 + AXP_DESC(AXP717, ALDO4, "aldo4", "aldoin", 500, 3500, 100, 808 803 AXP717_ALDO4_CONTROL, AXP717_LDO_V_OUT_MASK, 809 804 AXP717_LDO0_OUTPUT_CONTROL, BIT(3)), 810 - AXP_DESC(AXP717, BLDO1, "bldo1", "vin1", 500, 3500, 100, 805 + AXP_DESC(AXP717, BLDO1, "bldo1", "bldoin", 500, 3500, 100, 811 806 AXP717_BLDO1_CONTROL, AXP717_LDO_V_OUT_MASK, 812 807 AXP717_LDO0_OUTPUT_CONTROL, BIT(4)), 813 - AXP_DESC(AXP717, BLDO2, "bldo2", "vin1", 500, 3500, 100, 808 + AXP_DESC(AXP717, BLDO2, "bldo2", "bldoin", 500, 3500, 100, 814 809 AXP717_BLDO2_CONTROL, AXP717_LDO_V_OUT_MASK, 815 810 AXP717_LDO0_OUTPUT_CONTROL, BIT(5)), 816 - AXP_DESC(AXP717, BLDO3, "bldo3", "vin1", 500, 3500, 100, 811 + AXP_DESC(AXP717, BLDO3, "bldo3", "bldoin", 500, 3500, 100, 817 812 AXP717_BLDO3_CONTROL, AXP717_LDO_V_OUT_MASK, 818 813 AXP717_LDO0_OUTPUT_CONTROL, BIT(6)), 819 - AXP_DESC(AXP717, BLDO4, "bldo4", "vin1", 500, 3500, 100, 814 + AXP_DESC(AXP717, BLDO4, "bldo4", "bldoin", 500, 3500, 100, 820 815 AXP717_BLDO4_CONTROL, AXP717_LDO_V_OUT_MASK, 821 816 AXP717_LDO0_OUTPUT_CONTROL, BIT(7)), 822 - AXP_DESC(AXP717, CLDO1, "cldo1", "vin1", 500, 3500, 100, 817 + AXP_DESC(AXP717, CLDO1, "cldo1", "cldoin", 500, 3500, 100, 823 818 AXP717_CLDO1_CONTROL, AXP717_LDO_V_OUT_MASK, 824 819 AXP717_LDO1_OUTPUT_CONTROL, BIT(0)), 825 - AXP_DESC(AXP717, CLDO2, "cldo2", "vin1", 500, 3500, 100, 820 + AXP_DESC(AXP717, CLDO2, "cldo2", "cldoin", 500, 3500, 100, 826 821 AXP717_CLDO2_CONTROL, AXP717_LDO_V_OUT_MASK, 827 822 AXP717_LDO1_OUTPUT_CONTROL, BIT(1)), 828 - AXP_DESC(AXP717, CLDO3, "cldo3", "vin1", 500, 3500, 100, 823 + AXP_DESC(AXP717, CLDO3, "cldo3", "cldoin", 500, 3500, 100, 829 824 AXP717_CLDO3_CONTROL, AXP717_LDO_V_OUT_MASK, 830 825 AXP717_LDO1_OUTPUT_CONTROL, BIT(2)), 831 - AXP_DESC(AXP717, CLDO4, "cldo4", "vin1", 500, 3500, 100, 826 + AXP_DESC(AXP717, CLDO4, "cldo4", "cldoin", 500, 3500, 100, 832 827 AXP717_CLDO4_CONTROL, AXP717_LDO_V_OUT_MASK, 833 828 AXP717_LDO1_OUTPUT_CONTROL, BIT(3)), 834 829 AXP_DESC(AXP717, CPUSLDO, "cpusldo", "vin1", 500, 1400, 50,
+1 -1
drivers/regulator/bd71815-regulator.c
··· 256 256 * 10: 2.50mV/usec 10mV 4uS 257 257 * 11: 1.25mV/usec 10mV 8uS 258 258 */ 259 - static const unsigned int bd7181x_ramp_table[] = { 1250, 2500, 5000, 10000 }; 259 + static const unsigned int bd7181x_ramp_table[] = { 10000, 5000, 2500, 1250 }; 260 260 261 261 static int bd7181x_led_set_current_limit(struct regulator_dev *rdev, 262 262 int min_uA, int max_uA)
+1
drivers/regulator/core.c
··· 3347 3347 3348 3348 return map ? map : ERR_PTR(-EOPNOTSUPP); 3349 3349 } 3350 + EXPORT_SYMBOL_GPL(regulator_get_regmap); 3350 3351 3351 3352 /** 3352 3353 * regulator_get_hardware_vsel_register - get the HW voltage selector register
+4 -8
drivers/regulator/tps6594-regulator.c
··· 653 653 } 654 654 } 655 655 656 - if (tps->chip_id == LP8764) { 657 - nr_buck = ARRAY_SIZE(buck_regs); 658 - nr_ldo = 0; 659 - nr_types = REGS_INT_NB; 660 - } else if (tps->chip_id == TPS65224) { 656 + if (tps->chip_id == TPS65224) { 661 657 nr_buck = ARRAY_SIZE(tps65224_buck_regs); 662 658 nr_ldo = ARRAY_SIZE(tps65224_ldo_regs); 663 - nr_types = REGS_INT_NB; 659 + nr_types = TPS65224_REGS_INT_NB; 664 660 } else { 665 661 nr_buck = ARRAY_SIZE(buck_regs); 666 - nr_ldo = ARRAY_SIZE(tps6594_ldo_regs); 667 - nr_types = TPS65224_REGS_INT_NB; 662 + nr_ldo = (tps->chip_id == LP8764) ? 0 : ARRAY_SIZE(tps6594_ldo_regs); 663 + nr_types = REGS_INT_NB; 668 664 } 669 665 670 666 reg_irq_nb = nr_types * (nr_buck + nr_ldo);
+4
drivers/scsi/sd.c
··· 63 63 #include <scsi/scsi_cmnd.h> 64 64 #include <scsi/scsi_dbg.h> 65 65 #include <scsi/scsi_device.h> 66 + #include <scsi/scsi_devinfo.h> 66 67 #include <scsi/scsi_driver.h> 67 68 #include <scsi/scsi_eh.h> 68 69 #include <scsi/scsi_host.h> ··· 3118 3117 struct scsi_sense_hdr sshdr; 3119 3118 struct scsi_mode_data data; 3120 3119 int res; 3120 + 3121 + if (sdp->sdev_bflags & BLIST_SKIP_IO_HINTS) 3122 + return; 3121 3123 3122 3124 res = scsi_mode_sense(sdp, /*dbd=*/0x8, /*modepage=*/0x0a, 3123 3125 /*subpage=*/0x05, buffer, SD_BUF_SIZE, SD_TIMEOUT,
+3
drivers/soundwire/amd_manager.c
··· 571 571 amd_manager->wake_en_mask = wake_en_mask; 572 572 fwnode_property_read_u32(link, "amd-sdw-power-mode", &power_mode_mask); 573 573 amd_manager->power_mode_mask = power_mode_mask; 574 + 575 + fwnode_handle_put(link); 576 + 574 577 return 0; 575 578 } 576 579
+5 -1
drivers/soundwire/intel_auxdevice.c
··· 155 155 SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY; 156 156 157 157 intel_prop = devm_kzalloc(bus->dev, sizeof(*intel_prop), GFP_KERNEL); 158 - if (!intel_prop) 158 + if (!intel_prop) { 159 + fwnode_handle_put(link); 159 160 return -ENOMEM; 161 + } 160 162 161 163 /* initialize with hardware defaults, in case the properties are not found */ 162 164 intel_prop->doaise = 0x1; ··· 185 183 intel_prop->doais, 186 184 intel_prop->dodse, 187 185 intel_prop->dods); 186 + 187 + fwnode_handle_put(link); 188 188 189 189 return 0; 190 190 }
+24 -6
drivers/soundwire/mipi_disco.c
··· 66 66 prop->clk_freq = devm_kcalloc(bus->dev, prop->num_clk_freq, 67 67 sizeof(*prop->clk_freq), 68 68 GFP_KERNEL); 69 - if (!prop->clk_freq) 69 + if (!prop->clk_freq) { 70 + fwnode_handle_put(link); 70 71 return -ENOMEM; 72 + } 71 73 72 74 fwnode_property_read_u32_array(link, 73 75 "mipi-sdw-clock-frequencies-supported", ··· 94 92 prop->clk_gears = devm_kcalloc(bus->dev, prop->num_clk_gears, 95 93 sizeof(*prop->clk_gears), 96 94 GFP_KERNEL); 97 - if (!prop->clk_gears) 95 + if (!prop->clk_gears) { 96 + fwnode_handle_put(link); 98 97 return -ENOMEM; 98 + } 99 99 100 100 fwnode_property_read_u32_array(link, 101 101 "mipi-sdw-supported-clock-gears", ··· 119 115 120 116 fwnode_property_read_u32(link, "mipi-sdw-command-error-threshold", 121 117 &prop->err_threshold); 118 + 119 + fwnode_handle_put(link); 122 120 123 121 return 0; 124 122 } ··· 203 197 dpn[i].num_words, 204 198 sizeof(*dpn[i].words), 205 199 GFP_KERNEL); 206 - if (!dpn[i].words) 200 + if (!dpn[i].words) { 201 + fwnode_handle_put(node); 207 202 return -ENOMEM; 203 + } 208 204 209 205 fwnode_property_read_u32_array(node, 210 206 "mipi-sdw-port-wordlength-configs", ··· 244 236 dpn[i].num_channels, 245 237 sizeof(*dpn[i].channels), 246 238 GFP_KERNEL); 247 - if (!dpn[i].channels) 239 + if (!dpn[i].channels) { 240 + fwnode_handle_put(node); 248 241 return -ENOMEM; 242 + } 249 243 250 244 fwnode_property_read_u32_array(node, 251 245 "mipi-sdw-channel-number-list", ··· 261 251 dpn[i].num_ch_combinations, 262 252 sizeof(*dpn[i].ch_combinations), 263 253 GFP_KERNEL); 264 - if (!dpn[i].ch_combinations) 254 + if (!dpn[i].ch_combinations) { 255 + fwnode_handle_put(node); 265 256 return -ENOMEM; 257 + } 266 258 267 259 fwnode_property_read_u32_array(node, 268 260 "mipi-sdw-channel-combination-list", ··· 285 273 &dpn[i].port_encoding); 286 274 287 275 /* TODO: Read audio mode */ 276 + 277 + fwnode_handle_put(node); 288 278 289 279 i++; 290 280 } ··· 362 348 prop->dp0_prop = devm_kzalloc(&slave->dev, 363 349 sizeof(*prop->dp0_prop), 364 350 GFP_KERNEL); 365 - if (!prop->dp0_prop) 351 + if (!prop->dp0_prop) { 352 + fwnode_handle_put(port); 366 353 return -ENOMEM; 354 + } 367 355 368 356 sdw_slave_read_dp0(slave, port, prop->dp0_prop); 357 + 358 + fwnode_handle_put(port); 369 359 } 370 360 371 361 /*
+3 -3
drivers/spi/spi-cs42l43.c
··· 26 26 #include <linux/units.h> 27 27 28 28 #define CS42L43_FIFO_SIZE 16 29 - #define CS42L43_SPI_ROOT_HZ (40 * HZ_PER_MHZ) 29 + #define CS42L43_SPI_ROOT_HZ 49152000 30 30 #define CS42L43_SPI_MAX_LENGTH 65532 31 31 32 32 enum cs42l43_spi_cmd { ··· 54 54 55 55 static struct spi_board_info ampl_info = { 56 56 .modalias = "cs35l56", 57 - .max_speed_hz = 20 * HZ_PER_MHZ, 57 + .max_speed_hz = 11 * HZ_PER_MHZ, 58 58 .chip_select = 0, 59 59 .mode = SPI_MODE_0, 60 60 .swnode = &ampl, ··· 62 62 63 63 static struct spi_board_info ampr_info = { 64 64 .modalias = "cs35l56", 65 - .max_speed_hz = 20 * HZ_PER_MHZ, 65 + .max_speed_hz = 11 * HZ_PER_MHZ, 66 66 .chip_select = 1, 67 67 .mode = SPI_MODE_0, 68 68 .swnode = &ampr,
+2 -12
drivers/spi/spi-imx.c
··· 660 660 ctrl |= (spi_imx->target_burst * 8 - 1) 661 661 << MX51_ECSPI_CTRL_BL_OFFSET; 662 662 else { 663 - if (spi_imx->usedma) { 664 - ctrl |= (spi_imx->bits_per_word - 1) 665 - << MX51_ECSPI_CTRL_BL_OFFSET; 666 - } else { 667 - if (spi_imx->count >= MX51_ECSPI_CTRL_MAX_BURST) 668 - ctrl |= (MX51_ECSPI_CTRL_MAX_BURST * BITS_PER_BYTE - 1) 669 - << MX51_ECSPI_CTRL_BL_OFFSET; 670 - else 671 - ctrl |= (spi_imx->count / DIV_ROUND_UP(spi_imx->bits_per_word, 672 - BITS_PER_BYTE) * spi_imx->bits_per_word - 1) 673 - << MX51_ECSPI_CTRL_BL_OFFSET; 674 - } 663 + ctrl |= (spi_imx->bits_per_word - 1) 664 + << MX51_ECSPI_CTRL_BL_OFFSET; 675 665 } 676 666 677 667 /* set clock speed */
+5 -7
drivers/spi/spi-stm32-qspi.c
··· 349 349 350 350 static int stm32_qspi_get_mode(u8 buswidth) 351 351 { 352 - if (buswidth == 4) 352 + if (buswidth >= 4) 353 353 return CCR_BUSWIDTH_4; 354 354 355 355 return buswidth; ··· 653 653 return -EINVAL; 654 654 655 655 mode = spi->mode & (SPI_TX_OCTAL | SPI_RX_OCTAL); 656 - if ((mode == SPI_TX_OCTAL || mode == SPI_RX_OCTAL) || 657 - ((mode == (SPI_TX_OCTAL | SPI_RX_OCTAL)) && 658 - gpiod_count(qspi->dev, "cs") == -ENOENT)) { 656 + if (mode && gpiod_count(qspi->dev, "cs") == -ENOENT) { 659 657 dev_err(qspi->dev, "spi-rx-bus-width\\/spi-tx-bus-width\\/cs-gpios\n"); 660 658 dev_err(qspi->dev, "configuration not supported\n"); 661 659 ··· 674 676 qspi->cr_reg = CR_APMS | 3 << CR_FTHRES_SHIFT | CR_SSHIFT | CR_EN; 675 677 676 678 /* 677 - * Dual flash mode is only enable in case SPI_TX_OCTAL and SPI_TX_OCTAL 678 - * are both set in spi->mode and "cs-gpios" properties is found in DT 679 + * Dual flash mode is only enable in case SPI_TX_OCTAL or SPI_RX_OCTAL 680 + * is set in spi->mode and "cs-gpios" properties is found in DT 679 681 */ 680 - if (mode == (SPI_TX_OCTAL | SPI_RX_OCTAL)) { 682 + if (mode) { 681 683 qspi->cr_reg |= CR_DFM; 682 684 dev_dbg(qspi->dev, "Dual flash mode enable"); 683 685 }
+10 -6
drivers/spi/spi.c
··· 689 689 * Make sure that multiple logical CS doesn't map to the same physical CS. 690 690 * For example, spi->chip_select[0] != spi->chip_select[1] and so on. 691 691 */ 692 - for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { 693 - status = spi_dev_check_cs(dev, spi, idx, spi, idx + 1); 694 - if (status) 695 - return status; 692 + if (!spi_controller_is_target(ctlr)) { 693 + for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { 694 + status = spi_dev_check_cs(dev, spi, idx, spi, idx + 1); 695 + if (status) 696 + return status; 697 + } 696 698 } 697 699 698 700 /* Set the bus ID string */ ··· 4158 4156 return -EINVAL; 4159 4157 if (xfer->tx_nbits != SPI_NBITS_SINGLE && 4160 4158 xfer->tx_nbits != SPI_NBITS_DUAL && 4161 - xfer->tx_nbits != SPI_NBITS_QUAD) 4159 + xfer->tx_nbits != SPI_NBITS_QUAD && 4160 + xfer->tx_nbits != SPI_NBITS_OCTAL) 4162 4161 return -EINVAL; 4163 4162 if ((xfer->tx_nbits == SPI_NBITS_DUAL) && 4164 4163 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD))) ··· 4174 4171 return -EINVAL; 4175 4172 if (xfer->rx_nbits != SPI_NBITS_SINGLE && 4176 4173 xfer->rx_nbits != SPI_NBITS_DUAL && 4177 - xfer->rx_nbits != SPI_NBITS_QUAD) 4174 + xfer->rx_nbits != SPI_NBITS_QUAD && 4175 + xfer->rx_nbits != SPI_NBITS_OCTAL) 4178 4176 return -EINVAL; 4179 4177 if ((xfer->rx_nbits == SPI_NBITS_DUAL) && 4180 4178 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
+2 -1
drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c
··· 150 150 { 151 151 struct proc_thermal_pci *pci_info = devid; 152 152 struct proc_thermal_device *proc_priv; 153 - int ret = IRQ_HANDLED; 153 + int ret = IRQ_NONE; 154 154 u32 status; 155 155 156 156 proc_priv = pci_info->proc_priv; ··· 175 175 /* Disable enable interrupt flag */ 176 176 proc_thermal_mmio_write(pci_info, PROC_THERMAL_MMIO_INT_ENABLE_0, 0); 177 177 pkg_thermal_schedule_work(&pci_info->work); 178 + ret = IRQ_HANDLED; 178 179 } 179 180 180 181 pci_write_config_byte(pci_info->pdev, 0xdc, 0x01);
+5 -7
drivers/thermal/mediatek/lvts_thermal.c
··· 769 769 */ 770 770 gt = (((u32 *)calib)[0] >> lvts_data->gt_calib_bit_offset) & 0xff; 771 771 772 - if (gt && gt < LVTS_GOLDEN_TEMP_MAX) 772 + /* A zero value for gt means that device has invalid efuse data */ 773 + if (!gt) 774 + return -ENODATA; 775 + 776 + if (gt < LVTS_GOLDEN_TEMP_MAX) 773 777 golden_temp = gt; 774 778 775 779 golden_temp_offset = golden_temp * 500 + lvts_data->temp_offset; ··· 1462 1458 }, 1463 1459 VALID_SENSOR_MAP(1, 1, 1, 1), 1464 1460 .offset = 0x0, 1465 - .mode = LVTS_MSR_FILTERED_MODE, 1466 1461 }, 1467 1462 { 1468 1463 .lvts_sensor = { ··· 1472 1469 }, 1473 1470 VALID_SENSOR_MAP(1, 1, 0, 0), 1474 1471 .offset = 0x100, 1475 - .mode = LVTS_MSR_FILTERED_MODE, 1476 1472 } 1477 1473 }; 1478 1474 ··· 1485 1483 }, 1486 1484 VALID_SENSOR_MAP(0, 1, 0, 0), 1487 1485 .offset = 0x0, 1488 - .mode = LVTS_MSR_FILTERED_MODE, 1489 1486 }, 1490 1487 { 1491 1488 .lvts_sensor = { ··· 1497 1496 }, 1498 1497 VALID_SENSOR_MAP(1, 1, 1, 0), 1499 1498 .offset = 0x100, 1500 - .mode = LVTS_MSR_FILTERED_MODE, 1501 1499 }, 1502 1500 { 1503 1501 .lvts_sensor = { ··· 1507 1507 }, 1508 1508 VALID_SENSOR_MAP(1, 1, 0, 0), 1509 1509 .offset = 0x200, 1510 - .mode = LVTS_MSR_FILTERED_MODE, 1511 1510 }, 1512 1511 { 1513 1512 .lvts_sensor = { ··· 1517 1518 }, 1518 1519 VALID_SENSOR_MAP(1, 1, 0, 0), 1519 1520 .offset = 0x300, 1520 - .mode = LVTS_MSR_FILTERED_MODE, 1521 1521 } 1522 1522 }; 1523 1523
+27
drivers/thermal/thermal_core.c
··· 1406 1406 ida_init(&tz->ida); 1407 1407 mutex_init(&tz->lock); 1408 1408 init_completion(&tz->removal); 1409 + init_completion(&tz->resume); 1409 1410 id = ida_alloc(&thermal_tz_ida, GFP_KERNEL); 1410 1411 if (id < 0) { 1411 1412 result = id; ··· 1652 1651 thermal_zone_device_init(tz); 1653 1652 __thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED); 1654 1653 1654 + complete(&tz->resume); 1655 + tz->resuming = false; 1656 + 1655 1657 mutex_unlock(&tz->lock); 1656 1658 } 1657 1659 ··· 1672 1668 list_for_each_entry(tz, &thermal_tz_list, node) { 1673 1669 mutex_lock(&tz->lock); 1674 1670 1671 + if (tz->resuming) { 1672 + /* 1673 + * thermal_zone_device_resume() queued up for 1674 + * this zone has not acquired the lock yet, so 1675 + * release it to let the function run and wait 1676 + * util it has done the work. 1677 + */ 1678 + mutex_unlock(&tz->lock); 1679 + 1680 + wait_for_completion(&tz->resume); 1681 + 1682 + mutex_lock(&tz->lock); 1683 + } 1684 + 1675 1685 tz->suspended = true; 1676 1686 1677 1687 mutex_unlock(&tz->lock); ··· 1702 1684 mutex_lock(&tz->lock); 1703 1685 1704 1686 cancel_delayed_work(&tz->poll_queue); 1687 + 1688 + reinit_completion(&tz->resume); 1689 + tz->resuming = true; 1705 1690 1706 1691 /* 1707 1692 * Replace the work function with the resume one, which ··· 1730 1709 1731 1710 static struct notifier_block thermal_pm_nb = { 1732 1711 .notifier_call = thermal_pm_notify, 1712 + /* 1713 + * Run at the lowest priority to avoid interference between the thermal 1714 + * zone resume work items spawned by thermal_pm_notify() and the other 1715 + * PM notifiers. 1716 + */ 1717 + .priority = INT_MIN, 1733 1718 }; 1734 1719 1735 1720 static int __init thermal_init(void)
+4
drivers/thermal/thermal_core.h
··· 55 55 * @type: the thermal zone device type 56 56 * @device: &struct device for this thermal zone 57 57 * @removal: removal completion 58 + * @resume: resume completion 58 59 * @trip_temp_attrs: attributes for trip points for sysfs: trip temperature 59 60 * @trip_type_attrs: attributes for trip points for sysfs: trip type 60 61 * @trip_hyst_attrs: attributes for trip points for sysfs: trip hysteresis ··· 90 89 * @poll_queue: delayed work for polling 91 90 * @notify_event: Last notification event 92 91 * @suspended: thermal zone suspend indicator 92 + * @resuming: indicates whether or not thermal zone resume is in progress 93 93 * @trips: array of struct thermal_trip objects 94 94 */ 95 95 struct thermal_zone_device { ··· 98 96 char type[THERMAL_NAME_LENGTH]; 99 97 struct device device; 100 98 struct completion removal; 99 + struct completion resume; 101 100 struct attribute_group trips_attribute_group; 102 101 struct thermal_attr *trip_temp_attrs; 103 102 struct thermal_attr *trip_type_attrs; ··· 126 123 struct delayed_work poll_queue; 127 124 enum thermal_notify_event notify_event; 128 125 bool suspended; 126 + bool resuming; 129 127 #ifdef CONFIG_THERMAL_DEBUGFS 130 128 struct thermal_debugfs *debugfs; 131 129 #endif
+1
drivers/ufs/core/ufshcd.c
··· 8787 8787 (hba->quirks & UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH)) { 8788 8788 /* Reset the device and controller before doing reinit */ 8789 8789 ufshcd_device_reset(hba); 8790 + ufs_put_device_desc(hba); 8790 8791 ufshcd_hba_stop(hba); 8791 8792 ufshcd_vops_reinit_notify(hba); 8792 8793 ret = ufshcd_hba_enable(hba);
+6
drivers/usb/storage/scsiglue.c
··· 79 79 if (us->protocol == USB_PR_BULK && us->max_lun > 0) 80 80 sdev->sdev_bflags |= BLIST_FORCELUN; 81 81 82 + /* 83 + * Some USB storage devices reset if the IO advice hints grouping mode 84 + * page is queried. Hence skip that mode page. 85 + */ 86 + sdev->sdev_bflags |= BLIST_SKIP_IO_HINTS; 87 + 82 88 return 0; 83 89 } 84 90
+7
drivers/usb/storage/uas.c
··· 21 21 #include <scsi/scsi.h> 22 22 #include <scsi/scsi_eh.h> 23 23 #include <scsi/scsi_dbg.h> 24 + #include <scsi/scsi_devinfo.h> 24 25 #include <scsi/scsi_cmnd.h> 25 26 #include <scsi/scsi_device.h> 26 27 #include <scsi/scsi_host.h> ··· 820 819 { 821 820 struct uas_dev_info *devinfo = 822 821 (struct uas_dev_info *)sdev->host->hostdata; 822 + 823 + /* 824 + * Some USB storage devices reset if the IO advice hints grouping mode 825 + * page is queried. Hence skip that mode page. 826 + */ 827 + sdev->sdev_bflags |= BLIST_SKIP_IO_HINTS; 823 828 824 829 sdev->hostdata = devinfo; 825 830 return 0;
+61 -15
fs/bcachefs/alloc_background.c
··· 259 259 "invalid data type (got %u should be %u)", 260 260 a.v->data_type, alloc_data_type(*a.v, a.v->data_type)); 261 261 262 + for (unsigned i = 0; i < 2; i++) 263 + bkey_fsck_err_on(a.v->io_time[i] > LRU_TIME_MAX, 264 + c, err, 265 + alloc_key_io_time_bad, 266 + "invalid io_time[%s]: %llu, max %llu", 267 + i == READ ? "read" : "write", 268 + a.v->io_time[i], LRU_TIME_MAX); 269 + 262 270 switch (a.v->data_type) { 263 271 case BCH_DATA_free: 264 272 case BCH_DATA_need_gc_gens: ··· 765 757 alloc_data_type_set(new_a, new_a->data_type); 766 758 767 759 if (bch2_bucket_sectors_total(*new_a) > bch2_bucket_sectors_total(*old_a)) { 768 - new_a->io_time[READ] = max_t(u64, 1, atomic64_read(&c->io_clock[READ].now)); 769 - new_a->io_time[WRITE]= max_t(u64, 1, atomic64_read(&c->io_clock[WRITE].now)); 760 + new_a->io_time[READ] = bch2_current_io_time(c, READ); 761 + new_a->io_time[WRITE]= bch2_current_io_time(c, WRITE); 770 762 SET_BCH_ALLOC_V4_NEED_INC_GEN(new_a, true); 771 763 SET_BCH_ALLOC_V4_NEED_DISCARD(new_a, true); 772 764 } ··· 776 768 !bch2_bucket_is_open_safe(c, new.k->p.inode, new.k->p.offset)) { 777 769 new_a->gen++; 778 770 SET_BCH_ALLOC_V4_NEED_INC_GEN(new_a, false); 771 + alloc_data_type_set(new_a, new_a->data_type); 779 772 } 780 773 781 774 if (old_a->data_type != new_a->data_type || ··· 790 781 791 782 if (new_a->data_type == BCH_DATA_cached && 792 783 !new_a->io_time[READ]) 793 - new_a->io_time[READ] = max_t(u64, 1, atomic64_read(&c->io_clock[READ].now)); 784 + new_a->io_time[READ] = bch2_current_io_time(c, READ); 794 785 795 786 u64 old_lru = alloc_lru_idx_read(*old_a); 796 787 u64 new_lru = alloc_lru_idx_read(*new_a); ··· 891 882 closure_wake_up(&c->freelist_wait); 892 883 893 884 if (statechange(a->data_type == BCH_DATA_need_discard) && 894 - !bch2_bucket_is_open(c, new.k->p.inode, new.k->p.offset) && 885 + !bch2_bucket_is_open_safe(c, new.k->p.inode, new.k->p.offset) && 895 886 bucket_flushed(new_a)) 896 887 bch2_discard_one_bucket_fast(c, new.k->p); 897 888 ··· 1588 1579 if (ret) 1589 1580 goto err; 1590 1581 1591 - a_mut->v.io_time[READ] = atomic64_read(&c->io_clock[READ].now); 1582 + a_mut->v.io_time[READ] = bch2_current_io_time(c, READ); 1592 1583 ret = bch2_trans_update(trans, alloc_iter, 1593 1584 &a_mut->k_i, BTREE_TRIGGER_norun); 1594 1585 if (ret) ··· 1643 1634 mutex_lock(&c->discard_buckets_in_flight_lock); 1644 1635 darray_for_each(c->discard_buckets_in_flight, i) 1645 1636 if (bkey_eq(*i, bucket)) { 1646 - ret = -EEXIST; 1637 + ret = -BCH_ERR_EEXIST_discard_in_flight_add; 1647 1638 goto out; 1648 1639 } 1649 1640 ··· 1797 1788 } 1798 1789 1799 1790 SET_BCH_ALLOC_V4_NEED_DISCARD(&a->v, false); 1800 - alloc_data_type_set(&a->v, a->v.data_type); 1801 1791 write: 1792 + alloc_data_type_set(&a->v, a->v.data_type); 1793 + 1802 1794 ret = bch2_trans_update(trans, &iter, &a->k_i, 0) ?: 1803 1795 bch2_trans_commit(trans, NULL, NULL, 1804 1796 BCH_WATERMARK_btree| ··· 1985 1975 a->v.data_type = 0; 1986 1976 a->v.dirty_sectors = 0; 1987 1977 a->v.cached_sectors = 0; 1988 - a->v.io_time[READ] = atomic64_read(&c->io_clock[READ].now); 1989 - a->v.io_time[WRITE] = atomic64_read(&c->io_clock[WRITE].now); 1978 + a->v.io_time[READ] = bch2_current_io_time(c, READ); 1979 + a->v.io_time[WRITE] = bch2_current_io_time(c, WRITE); 1990 1980 1991 1981 ret = bch2_trans_commit(trans, NULL, NULL, 1992 1982 BCH_WATERMARK_btree| ··· 2021 2011 goto out; 2022 2012 } 2023 2013 2014 + static struct bkey_s_c next_lru_key(struct btree_trans *trans, struct btree_iter *iter, 2015 + struct bch_dev *ca, bool *wrapped) 2016 + { 2017 + struct bkey_s_c k; 2018 + again: 2019 + k = bch2_btree_iter_peek_upto(iter, lru_pos(ca->dev_idx, U64_MAX, LRU_TIME_MAX)); 2020 + if (!k.k && !*wrapped) { 2021 + bch2_btree_iter_set_pos(iter, lru_pos(ca->dev_idx, 0, 0)); 2022 + *wrapped = true; 2023 + goto again; 2024 + } 2025 + 2026 + return k; 2027 + } 2028 + 2024 2029 static void bch2_do_invalidates_work(struct work_struct *work) 2025 2030 { 2026 2031 struct bch_fs *c = container_of(work, struct bch_fs, invalidate_work); ··· 2049 2024 for_each_member_device(c, ca) { 2050 2025 s64 nr_to_invalidate = 2051 2026 should_invalidate_buckets(ca, bch2_dev_usage_read(ca)); 2027 + struct btree_iter iter; 2028 + bool wrapped = false; 2052 2029 2053 - ret = for_each_btree_key_upto(trans, iter, BTREE_ID_lru, 2054 - lru_pos(ca->dev_idx, 0, 0), 2055 - lru_pos(ca->dev_idx, U64_MAX, LRU_TIME_MAX), 2056 - BTREE_ITER_intent, k, 2057 - invalidate_one_bucket(trans, &iter, k, &nr_to_invalidate)); 2030 + bch2_trans_iter_init(trans, &iter, BTREE_ID_lru, 2031 + lru_pos(ca->dev_idx, 0, 2032 + ((bch2_current_io_time(c, READ) + U32_MAX) & 2033 + LRU_TIME_MAX)), 0); 2034 + 2035 + while (true) { 2036 + bch2_trans_begin(trans); 2037 + 2038 + struct bkey_s_c k = next_lru_key(trans, &iter, ca, &wrapped); 2039 + ret = bkey_err(k); 2040 + if (bch2_err_matches(ret, BCH_ERR_transaction_restart)) 2041 + continue; 2042 + if (ret) 2043 + break; 2044 + if (!k.k) 2045 + break; 2046 + 2047 + ret = invalidate_one_bucket(trans, &iter, k, &nr_to_invalidate); 2048 + if (ret) 2049 + break; 2050 + 2051 + bch2_btree_iter_advance(&iter); 2052 + } 2053 + bch2_trans_iter_exit(trans, &iter); 2058 2054 2059 2055 if (ret < 0) { 2060 2056 bch2_dev_put(ca); ··· 2250 2204 if (ret) 2251 2205 return ret; 2252 2206 2253 - now = atomic64_read(&c->io_clock[rw].now); 2207 + now = bch2_current_io_time(c, rw); 2254 2208 if (a->v.io_time[rw] == now) 2255 2209 goto out; 2256 2210
+7 -1
fs/bcachefs/alloc_background.h
··· 141 141 !bch2_bucket_sectors_fragmented(ca, a)) 142 142 return 0; 143 143 144 - u64 d = bch2_bucket_sectors_dirty(a); 144 + /* 145 + * avoid overflowing LRU_TIME_BITS on a corrupted fs, when 146 + * bucket_sectors_dirty is (much) bigger than bucket_size 147 + */ 148 + u64 d = min(bch2_bucket_sectors_dirty(a), 149 + ca->mi.bucket_size); 150 + 145 151 return div_u64(d * (1ULL << 31), ca->mi.bucket_size); 146 152 } 147 153
+5
fs/bcachefs/bcachefs.h
··· 1214 1214 return timespec_to_bch2_time(c, now); 1215 1215 } 1216 1216 1217 + static inline u64 bch2_current_io_time(const struct bch_fs *c, int rw) 1218 + { 1219 + return max(1ULL, (u64) atomic64_read(&c->io_clock[rw].now) & LRU_TIME_MAX); 1220 + } 1221 + 1217 1222 static inline struct stdio_redirect *bch2_fs_stdio_redirect(struct bch_fs *c) 1218 1223 { 1219 1224 struct stdio_redirect *stdio = c->stdio;
+9 -4
fs/bcachefs/bcachefs_format.h
··· 476 476 477 477 #define LRU_ID_STRIPES (1U << 16) 478 478 479 + #define LRU_TIME_BITS 48 480 + #define LRU_TIME_MAX ((1ULL << LRU_TIME_BITS) - 1) 481 + 479 482 /* Optional/variable size superblock sections: */ 480 483 481 484 struct bch_sb_field { ··· 990 987 991 988 #define BCH_ERROR_ACTIONS() \ 992 989 x(continue, 0) \ 993 - x(ro, 1) \ 994 - x(panic, 2) 990 + x(fix_safe, 1) \ 991 + x(panic, 2) \ 992 + x(ro, 3) 995 993 996 994 enum bch_error_actions { 997 995 #define x(t, n) BCH_ON_ERROR_##t = n, ··· 1386 1382 1387 1383 /* 1388 1384 * Maximum number of btrees that we will _ever_ have under the current scheme, 1389 - * where we refer to them with bitfields 1385 + * where we refer to them with 64 bit bitfields - and we also need a bit for 1386 + * the interior btree node type: 1390 1387 */ 1391 - #define BTREE_ID_NR_MAX 64 1388 + #define BTREE_ID_NR_MAX 63 1392 1389 1393 1390 static inline bool btree_id_is_alloc(enum btree_id id) 1394 1391 {
+1 -1
fs/bcachefs/bkey.c
··· 1064 1064 { 1065 1065 const struct bkey_format *f = bkey_packed(k) ? _f : &bch2_bkey_format_current; 1066 1066 u8 *l = k->key_start; 1067 - u8 *h = (u8 *) (k->_data + f->key_u64s) - 1; 1067 + u8 *h = (u8 *) ((u64 *) k->_data + f->key_u64s) - 1; 1068 1068 1069 1069 while (l < h) { 1070 1070 swap(*l, *h);
+5 -1
fs/bcachefs/bkey_methods.c
··· 398 398 for (i = 0; i < nr_compat; i++) 399 399 switch (!write ? i : nr_compat - 1 - i) { 400 400 case 0: 401 - if (big_endian != CPU_BIG_ENDIAN) 401 + if (big_endian != CPU_BIG_ENDIAN) { 402 402 bch2_bkey_swab_key(f, k); 403 + } else if (IS_ENABLED(CONFIG_BCACHEFS_DEBUG)) { 404 + bch2_bkey_swab_key(f, k); 405 + bch2_bkey_swab_key(f, k); 406 + } 403 407 break; 404 408 case 1: 405 409 if (version < bcachefs_metadata_version_bkey_renumber)
+2 -1
fs/bcachefs/bkey_methods.h
··· 129 129 struct bkey_packed *k) 130 130 { 131 131 if (version < bcachefs_metadata_version_current || 132 - big_endian != CPU_BIG_ENDIAN) 132 + big_endian != CPU_BIG_ENDIAN || 133 + IS_ENABLED(CONFIG_BCACHEFS_DEBUG)) 133 134 __bch2_bkey_compat(level, btree_id, version, 134 135 big_endian, write, f, k); 135 136
+8 -3
fs/bcachefs/btree_iter.c
··· 3161 3161 list_add_done: 3162 3162 seqmutex_unlock(&c->btree_trans_lock); 3163 3163 got_trans: 3164 + trans->ref.closure_get_happened = false; 3164 3165 trans->c = c; 3165 3166 trans->last_begin_time = local_clock(); 3166 3167 trans->fn_idx = fn_idx; ··· 3236 3235 trans_for_each_update(trans, i) 3237 3236 __btree_path_put(trans->paths + i->path, true); 3238 3237 trans->nr_updates = 0; 3239 - trans->locking_wait.task = NULL; 3240 3238 3241 3239 check_btree_paths_leaked(trans); 3242 3240 ··· 3256 3256 if (unlikely(trans->journal_replay_not_finished)) 3257 3257 bch2_journal_keys_put(c); 3258 3258 3259 + /* 3260 + * trans->ref protects trans->locking_wait.task, btree_paths arary; used 3261 + * by cycle detector 3262 + */ 3263 + closure_sync(&trans->ref); 3264 + trans->locking_wait.task = NULL; 3265 + 3259 3266 unsigned long *paths_allocated = trans->paths_allocated; 3260 3267 trans->paths_allocated = NULL; 3261 3268 trans->paths = NULL; ··· 3280 3273 trans = this_cpu_xchg(c->btree_trans_bufs->trans, trans); 3281 3274 3282 3275 if (trans) { 3283 - closure_sync(&trans->ref); 3284 - 3285 3276 seqmutex_lock(&c->btree_trans_lock); 3286 3277 list_del(&trans->list); 3287 3278 seqmutex_unlock(&c->btree_trans_lock);
+8 -8
fs/bcachefs/btree_types.h
··· 761 761 762 762 static inline bool btree_node_type_is_extents(enum btree_node_type type) 763 763 { 764 - const unsigned mask = 0 764 + const u64 mask = 0 765 765 #define x(name, nr, flags, ...) |((!!((flags) & BTREE_ID_EXTENTS)) << (nr + 1)) 766 766 BCH_BTREE_IDS() 767 767 #undef x 768 768 ; 769 769 770 - return (1U << type) & mask; 770 + return BIT_ULL(type) & mask; 771 771 } 772 772 773 773 static inline bool btree_id_is_extents(enum btree_id btree) ··· 777 777 778 778 static inline bool btree_type_has_snapshots(enum btree_id id) 779 779 { 780 - const unsigned mask = 0 780 + const u64 mask = 0 781 781 #define x(name, nr, flags, ...) |((!!((flags) & BTREE_ID_SNAPSHOTS)) << nr) 782 782 BCH_BTREE_IDS() 783 783 #undef x 784 784 ; 785 785 786 - return (1U << id) & mask; 786 + return BIT_ULL(id) & mask; 787 787 } 788 788 789 789 static inline bool btree_type_has_snapshot_field(enum btree_id id) 790 790 { 791 - const unsigned mask = 0 791 + const u64 mask = 0 792 792 #define x(name, nr, flags, ...) |((!!((flags) & (BTREE_ID_SNAPSHOT_FIELD|BTREE_ID_SNAPSHOTS))) << nr) 793 793 BCH_BTREE_IDS() 794 794 #undef x 795 795 ; 796 796 797 - return (1U << id) & mask; 797 + return BIT_ULL(id) & mask; 798 798 } 799 799 800 800 static inline bool btree_type_has_ptrs(enum btree_id id) 801 801 { 802 - const unsigned mask = 0 802 + const u64 mask = 0 803 803 #define x(name, nr, flags, ...) |((!!((flags) & BTREE_ID_DATA)) << nr) 804 804 BCH_BTREE_IDS() 805 805 #undef x 806 806 ; 807 807 808 - return (1U << id) & mask; 808 + return BIT_ULL(id) & mask; 809 809 } 810 810 811 811 struct btree_root {
+3
fs/bcachefs/errcode.h
··· 116 116 x(ENOENT, ENOENT_dev_idx_not_found) \ 117 117 x(ENOTEMPTY, ENOTEMPTY_dir_not_empty) \ 118 118 x(ENOTEMPTY, ENOTEMPTY_subvol_not_empty) \ 119 + x(EEXIST, EEXIST_str_hash_set) \ 120 + x(EEXIST, EEXIST_discard_in_flight_add) \ 121 + x(EEXIST, EEXIST_subvolume_create) \ 119 122 x(0, open_buckets_empty) \ 120 123 x(0, freelist_empty) \ 121 124 x(BCH_ERR_freelist_empty, no_buckets_found) \
+18 -1
fs/bcachefs/error.c
··· 15 15 switch (c->opts.errors) { 16 16 case BCH_ON_ERROR_continue: 17 17 return false; 18 + case BCH_ON_ERROR_fix_safe: 18 19 case BCH_ON_ERROR_ro: 19 20 if (bch2_fs_emergency_read_only(c)) 20 21 bch_err(c, "inconsistency detected - emergency read only at journal seq %llu", ··· 192 191 prt_str(out, "ing"); 193 192 } 194 193 194 + static const u8 fsck_flags_extra[] = { 195 + #define x(t, n, flags) [BCH_FSCK_ERR_##t] = flags, 196 + BCH_SB_ERRS() 197 + #undef x 198 + }; 199 + 195 200 int bch2_fsck_err(struct bch_fs *c, 196 201 enum bch_fsck_flags flags, 197 202 enum bch_sb_error_id err, ··· 209 202 struct printbuf buf = PRINTBUF, *out = &buf; 210 203 int ret = -BCH_ERR_fsck_ignore; 211 204 const char *action_orig = "fix?", *action = action_orig; 205 + 206 + if (!WARN_ON(err >= ARRAY_SIZE(fsck_flags_extra))) 207 + flags |= fsck_flags_extra[err]; 212 208 213 209 if ((flags & FSCK_CAN_FIX) && 214 210 test_bit(err, c->sb.errors_silent)) ··· 275 265 prt_printf(out, bch2_log_msg(c, "")); 276 266 #endif 277 267 278 - if (!test_bit(BCH_FS_fsck_running, &c->flags)) { 268 + if ((flags & FSCK_CAN_FIX) && 269 + (flags & FSCK_AUTOFIX) && 270 + (c->opts.errors == BCH_ON_ERROR_continue || 271 + c->opts.errors == BCH_ON_ERROR_fix_safe)) { 272 + prt_str(out, ", "); 273 + prt_actioning(out, action); 274 + ret = -BCH_ERR_fsck_fix; 275 + } else if (!test_bit(BCH_FS_fsck_running, &c->flags)) { 279 276 if (c->opts.errors != BCH_ON_ERROR_continue || 280 277 !(flags & (FSCK_CAN_FIX|FSCK_CAN_IGNORE))) { 281 278 prt_str(out, ", shutting down");
-7
fs/bcachefs/error.h
··· 108 108 char *last_msg; 109 109 }; 110 110 111 - enum bch_fsck_flags { 112 - FSCK_CAN_FIX = 1 << 0, 113 - FSCK_CAN_IGNORE = 1 << 1, 114 - FSCK_NEED_FSCK = 1 << 2, 115 - FSCK_NO_RATELIMIT = 1 << 3, 116 - }; 117 - 118 111 #define fsck_err_count(_c, _err) bch2_sb_err_count(_c, BCH_FSCK_ERR_##_err) 119 112 120 113 __printf(4, 5) __cold
+1 -1
fs/bcachefs/fs-ioctl.c
··· 373 373 } 374 374 375 375 if (dst_dentry->d_inode) { 376 - error = -EEXIST; 376 + error = -BCH_ERR_EEXIST_subvolume_create; 377 377 goto err3; 378 378 } 379 379
+14 -7
fs/bcachefs/fs.c
··· 188 188 BUG_ON(!old); 189 189 190 190 if (unlikely(old != inode)) { 191 + /* 192 + * bcachefs doesn't use I_NEW; we have no use for it since we 193 + * only insert fully created inodes in the inode hash table. But 194 + * discard_new_inode() expects it to be set... 195 + */ 196 + inode->v.i_flags |= I_NEW; 191 197 discard_new_inode(&inode->v); 192 198 inode = old; 193 199 } else { ··· 201 195 list_add(&inode->ei_vfs_inode_list, &c->vfs_inodes_list); 202 196 mutex_unlock(&c->vfs_inodes_lock); 203 197 /* 204 - * we really don't want insert_inode_locked2() to be setting 205 - * I_NEW... 198 + * Again, I_NEW makes no sense for bcachefs. This is only needed 199 + * for clearing I_NEW, but since the inode was already fully 200 + * created and initialized we didn't actually want 201 + * inode_insert5() to set it for us. 206 202 */ 207 203 unlock_new_inode(&inode->v); 208 204 } ··· 1165 1157 .read_iter = bch2_read_iter, 1166 1158 .write_iter = bch2_write_iter, 1167 1159 .mmap = bch2_mmap, 1160 + .get_unmapped_area = thp_get_unmapped_area, 1168 1161 .fsync = bch2_fsync, 1169 1162 .splice_read = filemap_splice_read, 1170 1163 .splice_write = iter_file_splice_write, ··· 1497 1488 bch2_iget5_set(&inode->v, &inum); 1498 1489 bch2_inode_update_after_write(trans, inode, bi, ~0); 1499 1490 1500 - if (BCH_SUBVOLUME_SNAP(subvol)) 1501 - set_bit(EI_INODE_SNAPSHOT, &inode->ei_flags); 1502 - else 1503 - clear_bit(EI_INODE_SNAPSHOT, &inode->ei_flags); 1504 - 1505 1491 inode->v.i_blocks = bi->bi_sectors; 1506 1492 inode->v.i_ino = bi->bi_inum; 1507 1493 inode->v.i_rdev = bi->bi_dev; ··· 1507 1503 inode->ei_quota_reserved = 0; 1508 1504 inode->ei_qid = bch_qid(bi); 1509 1505 inode->ei_subvol = inum.subvol; 1506 + 1507 + if (BCH_SUBVOLUME_SNAP(subvol)) 1508 + set_bit(EI_INODE_SNAPSHOT, &inode->ei_flags); 1510 1509 1511 1510 inode->v.i_mapping->a_ops = &bch_address_space_operations; 1512 1511
+3
fs/bcachefs/journal.c
··· 1167 1167 1168 1168 void bch2_fs_journal_stop(struct journal *j) 1169 1169 { 1170 + if (!test_bit(JOURNAL_running, &j->flags)) 1171 + return; 1172 + 1170 1173 bch2_journal_reclaim_stop(j); 1171 1174 bch2_journal_flush_all_pins(j); 1172 1175
+8 -5
fs/bcachefs/journal_io.c
··· 1967 1967 struct journal *j = container_of(w, struct journal, buf[w->idx]); 1968 1968 struct bch_fs *c = container_of(j, struct bch_fs, journal); 1969 1969 struct bch_replicas_padded replicas; 1970 - struct printbuf journal_debug_buf = PRINTBUF; 1971 1970 unsigned nr_rw_members = 0; 1972 1971 int ret; 1973 1972 ··· 2010 2011 } 2011 2012 2012 2013 if (ret) { 2013 - __bch2_journal_debug_to_text(&journal_debug_buf, j); 2014 + struct printbuf buf = PRINTBUF; 2015 + buf.atomic++; 2016 + 2017 + prt_printf(&buf, bch2_fmt(c, "Unable to allocate journal write: %s"), 2018 + bch2_err_str(ret)); 2019 + __bch2_journal_debug_to_text(&buf, j); 2014 2020 spin_unlock(&j->lock); 2015 - bch_err(c, "Unable to allocate journal write:\n%s", 2016 - journal_debug_buf.buf); 2017 - printbuf_exit(&journal_debug_buf); 2021 + bch2_print_string_as_lines(KERN_ERR, buf.buf); 2022 + printbuf_exit(&buf); 2018 2023 goto err; 2019 2024 } 2020 2025
-3
fs/bcachefs/lru.h
··· 2 2 #ifndef _BCACHEFS_LRU_H 3 3 #define _BCACHEFS_LRU_H 4 4 5 - #define LRU_TIME_BITS 48 6 - #define LRU_TIME_MAX ((1ULL << LRU_TIME_BITS) - 1) 7 - 8 5 static inline u64 lru_pos_id(struct bpos pos) 9 6 { 10 7 return pos.inode >> LRU_TIME_BITS;
+1 -1
fs/bcachefs/opts.h
··· 137 137 x(errors, u8, \ 138 138 OPT_FS|OPT_FORMAT|OPT_MOUNT|OPT_RUNTIME, \ 139 139 OPT_STR(bch2_error_actions), \ 140 - BCH_SB_ERROR_ACTION, BCH_ON_ERROR_ro, \ 140 + BCH_SB_ERROR_ACTION, BCH_ON_ERROR_fix_safe, \ 141 141 NULL, "Action to take on filesystem error") \ 142 142 x(metadata_replicas, u8, \ 143 143 OPT_FS|OPT_FORMAT|OPT_MOUNT|OPT_RUNTIME, \
+9 -3
fs/bcachefs/recovery.c
··· 326 326 case BCH_JSET_ENTRY_btree_root: { 327 327 struct btree_root *r; 328 328 329 + if (fsck_err_on(entry->btree_id >= BTREE_ID_NR_MAX, 330 + c, invalid_btree_id, 331 + "invalid btree id %u (max %u)", 332 + entry->btree_id, BTREE_ID_NR_MAX)) 333 + return 0; 334 + 329 335 while (entry->btree_id >= c->btree_roots_extra.nr + BTREE_ID_NR) { 330 336 ret = darray_push(&c->btree_roots_extra, (struct btree_root) { NULL }); 331 337 if (ret) ··· 421 415 atomic64_set(&c->io_clock[clock->rw].now, le64_to_cpu(clock->time)); 422 416 } 423 417 } 424 - 418 + fsck_err: 425 419 return ret; 426 420 } 427 421 ··· 664 658 if (check_version_upgrade(c)) 665 659 write_sb = true; 666 660 661 + c->recovery_passes_explicit |= bch2_recovery_passes_from_stable(le64_to_cpu(ext->recovery_passes_required[0])); 662 + 667 663 if (write_sb) 668 664 bch2_write_super(c); 669 - 670 - c->recovery_passes_explicit |= bch2_recovery_passes_from_stable(le64_to_cpu(ext->recovery_passes_required[0])); 671 665 mutex_unlock(&c->sb_lock); 672 666 673 667 if (c->opts.fsck && IS_ENABLED(CONFIG_BCACHEFS_DEBUG))
+1 -1
fs/bcachefs/sb-downgrade.c
··· 228 228 229 229 dst = (void *) &darray_top(table); 230 230 dst->version = cpu_to_le16(src->version); 231 - dst->recovery_passes[0] = cpu_to_le64(src->recovery_passes); 231 + dst->recovery_passes[0] = cpu_to_le64(bch2_recovery_passes_to_stable(src->recovery_passes)); 232 232 dst->recovery_passes[1] = 0; 233 233 dst->nr_errors = cpu_to_le16(src->nr_errors); 234 234 for (unsigned i = 0; i < src->nr_errors; i++)
+286 -273
fs/bcachefs/sb-errors_format.h
··· 2 2 #ifndef _BCACHEFS_SB_ERRORS_FORMAT_H 3 3 #define _BCACHEFS_SB_ERRORS_FORMAT_H 4 4 5 - #define BCH_SB_ERRS() \ 6 - x(clean_but_journal_not_empty, 0) \ 7 - x(dirty_but_no_journal_entries, 1) \ 8 - x(dirty_but_no_journal_entries_post_drop_nonflushes, 2) \ 9 - x(sb_clean_journal_seq_mismatch, 3) \ 10 - x(sb_clean_btree_root_mismatch, 4) \ 11 - x(sb_clean_missing, 5) \ 12 - x(jset_unsupported_version, 6) \ 13 - x(jset_unknown_csum, 7) \ 14 - x(jset_last_seq_newer_than_seq, 8) \ 15 - x(jset_past_bucket_end, 9) \ 16 - x(jset_seq_blacklisted, 10) \ 17 - x(journal_entries_missing, 11) \ 18 - x(journal_entry_replicas_not_marked, 12) \ 19 - x(journal_entry_past_jset_end, 13) \ 20 - x(journal_entry_replicas_data_mismatch, 14) \ 21 - x(journal_entry_bkey_u64s_0, 15) \ 22 - x(journal_entry_bkey_past_end, 16) \ 23 - x(journal_entry_bkey_bad_format, 17) \ 24 - x(journal_entry_bkey_invalid, 18) \ 25 - x(journal_entry_btree_root_bad_size, 19) \ 26 - x(journal_entry_blacklist_bad_size, 20) \ 27 - x(journal_entry_blacklist_v2_bad_size, 21) \ 28 - x(journal_entry_blacklist_v2_start_past_end, 22) \ 29 - x(journal_entry_usage_bad_size, 23) \ 30 - x(journal_entry_data_usage_bad_size, 24) \ 31 - x(journal_entry_clock_bad_size, 25) \ 32 - x(journal_entry_clock_bad_rw, 26) \ 33 - x(journal_entry_dev_usage_bad_size, 27) \ 34 - x(journal_entry_dev_usage_bad_dev, 28) \ 35 - x(journal_entry_dev_usage_bad_pad, 29) \ 36 - x(btree_node_unreadable, 30) \ 37 - x(btree_node_fault_injected, 31) \ 38 - x(btree_node_bad_magic, 32) \ 39 - x(btree_node_bad_seq, 33) \ 40 - x(btree_node_unsupported_version, 34) \ 41 - x(btree_node_bset_older_than_sb_min, 35) \ 42 - x(btree_node_bset_newer_than_sb, 36) \ 43 - x(btree_node_data_missing, 37) \ 44 - x(btree_node_bset_after_end, 38) \ 45 - x(btree_node_replicas_sectors_written_mismatch, 39) \ 46 - x(btree_node_replicas_data_mismatch, 40) \ 47 - x(bset_unknown_csum, 41) \ 48 - x(bset_bad_csum, 42) \ 49 - x(bset_past_end_of_btree_node, 43) \ 50 - x(bset_wrong_sector_offset, 44) \ 51 - x(bset_empty, 45) \ 52 - x(bset_bad_seq, 46) \ 53 - x(bset_blacklisted_journal_seq, 47) \ 54 - x(first_bset_blacklisted_journal_seq, 48) \ 55 - x(btree_node_bad_btree, 49) \ 56 - x(btree_node_bad_level, 50) \ 57 - x(btree_node_bad_min_key, 51) \ 58 - x(btree_node_bad_max_key, 52) \ 59 - x(btree_node_bad_format, 53) \ 60 - x(btree_node_bkey_past_bset_end, 54) \ 61 - x(btree_node_bkey_bad_format, 55) \ 62 - x(btree_node_bad_bkey, 56) \ 63 - x(btree_node_bkey_out_of_order, 57) \ 64 - x(btree_root_bkey_invalid, 58) \ 65 - x(btree_root_read_error, 59) \ 66 - x(btree_root_bad_min_key, 60) \ 67 - x(btree_root_bad_max_key, 61) \ 68 - x(btree_node_read_error, 62) \ 69 - x(btree_node_topology_bad_min_key, 63) \ 70 - x(btree_node_topology_bad_max_key, 64) \ 71 - x(btree_node_topology_overwritten_by_prev_node, 65) \ 72 - x(btree_node_topology_overwritten_by_next_node, 66) \ 73 - x(btree_node_topology_interior_node_empty, 67) \ 74 - x(fs_usage_hidden_wrong, 68) \ 75 - x(fs_usage_btree_wrong, 69) \ 76 - x(fs_usage_data_wrong, 70) \ 77 - x(fs_usage_cached_wrong, 71) \ 78 - x(fs_usage_reserved_wrong, 72) \ 79 - x(fs_usage_persistent_reserved_wrong, 73) \ 80 - x(fs_usage_nr_inodes_wrong, 74) \ 81 - x(fs_usage_replicas_wrong, 75) \ 82 - x(dev_usage_buckets_wrong, 76) \ 83 - x(dev_usage_sectors_wrong, 77) \ 84 - x(dev_usage_fragmented_wrong, 78) \ 85 - x(dev_usage_buckets_ec_wrong, 79) \ 86 - x(bkey_version_in_future, 80) \ 87 - x(bkey_u64s_too_small, 81) \ 88 - x(bkey_invalid_type_for_btree, 82) \ 89 - x(bkey_extent_size_zero, 83) \ 90 - x(bkey_extent_size_greater_than_offset, 84) \ 91 - x(bkey_size_nonzero, 85) \ 92 - x(bkey_snapshot_nonzero, 86) \ 93 - x(bkey_snapshot_zero, 87) \ 94 - x(bkey_at_pos_max, 88) \ 95 - x(bkey_before_start_of_btree_node, 89) \ 96 - x(bkey_after_end_of_btree_node, 90) \ 97 - x(bkey_val_size_nonzero, 91) \ 98 - x(bkey_val_size_too_small, 92) \ 99 - x(alloc_v1_val_size_bad, 93) \ 100 - x(alloc_v2_unpack_error, 94) \ 101 - x(alloc_v3_unpack_error, 95) \ 102 - x(alloc_v4_val_size_bad, 96) \ 103 - x(alloc_v4_backpointers_start_bad, 97) \ 104 - x(alloc_key_data_type_bad, 98) \ 105 - x(alloc_key_empty_but_have_data, 99) \ 106 - x(alloc_key_dirty_sectors_0, 100) \ 107 - x(alloc_key_data_type_inconsistency, 101) \ 108 - x(alloc_key_to_missing_dev_bucket, 102) \ 109 - x(alloc_key_cached_inconsistency, 103) \ 110 - x(alloc_key_cached_but_read_time_zero, 104) \ 111 - x(alloc_key_to_missing_lru_entry, 105) \ 112 - x(alloc_key_data_type_wrong, 106) \ 113 - x(alloc_key_gen_wrong, 107) \ 114 - x(alloc_key_dirty_sectors_wrong, 108) \ 115 - x(alloc_key_cached_sectors_wrong, 109) \ 116 - x(alloc_key_stripe_wrong, 110) \ 117 - x(alloc_key_stripe_redundancy_wrong, 111) \ 118 - x(bucket_sector_count_overflow, 112) \ 119 - x(bucket_metadata_type_mismatch, 113) \ 120 - x(need_discard_key_wrong, 114) \ 121 - x(freespace_key_wrong, 115) \ 122 - x(freespace_hole_missing, 116) \ 123 - x(bucket_gens_val_size_bad, 117) \ 124 - x(bucket_gens_key_wrong, 118) \ 125 - x(bucket_gens_hole_wrong, 119) \ 126 - x(bucket_gens_to_invalid_dev, 120) \ 127 - x(bucket_gens_to_invalid_buckets, 121) \ 128 - x(bucket_gens_nonzero_for_invalid_buckets, 122) \ 129 - x(need_discard_freespace_key_to_invalid_dev_bucket, 123) \ 130 - x(need_discard_freespace_key_bad, 124) \ 131 - x(backpointer_bucket_offset_wrong, 125) \ 132 - x(backpointer_to_missing_device, 126) \ 133 - x(backpointer_to_missing_alloc, 127) \ 134 - x(backpointer_to_missing_ptr, 128) \ 135 - x(lru_entry_at_time_0, 129) \ 136 - x(lru_entry_to_invalid_bucket, 130) \ 137 - x(lru_entry_bad, 131) \ 138 - x(btree_ptr_val_too_big, 132) \ 139 - x(btree_ptr_v2_val_too_big, 133) \ 140 - x(btree_ptr_has_non_ptr, 134) \ 141 - x(extent_ptrs_invalid_entry, 135) \ 142 - x(extent_ptrs_no_ptrs, 136) \ 143 - x(extent_ptrs_too_many_ptrs, 137) \ 144 - x(extent_ptrs_redundant_crc, 138) \ 145 - x(extent_ptrs_redundant_stripe, 139) \ 146 - x(extent_ptrs_unwritten, 140) \ 147 - x(extent_ptrs_written_and_unwritten, 141) \ 148 - x(ptr_to_invalid_device, 142) \ 149 - x(ptr_to_duplicate_device, 143) \ 150 - x(ptr_after_last_bucket, 144) \ 151 - x(ptr_before_first_bucket, 145) \ 152 - x(ptr_spans_multiple_buckets, 146) \ 153 - x(ptr_to_missing_backpointer, 147) \ 154 - x(ptr_to_missing_alloc_key, 148) \ 155 - x(ptr_to_missing_replicas_entry, 149) \ 156 - x(ptr_to_missing_stripe, 150) \ 157 - x(ptr_to_incorrect_stripe, 151) \ 158 - x(ptr_gen_newer_than_bucket_gen, 152) \ 159 - x(ptr_too_stale, 153) \ 160 - x(stale_dirty_ptr, 154) \ 161 - x(ptr_bucket_data_type_mismatch, 155) \ 162 - x(ptr_cached_and_erasure_coded, 156) \ 163 - x(ptr_crc_uncompressed_size_too_small, 157) \ 164 - x(ptr_crc_csum_type_unknown, 158) \ 165 - x(ptr_crc_compression_type_unknown, 159) \ 166 - x(ptr_crc_redundant, 160) \ 167 - x(ptr_crc_uncompressed_size_too_big, 161) \ 168 - x(ptr_crc_nonce_mismatch, 162) \ 169 - x(ptr_stripe_redundant, 163) \ 170 - x(reservation_key_nr_replicas_invalid, 164) \ 171 - x(reflink_v_refcount_wrong, 165) \ 172 - x(reflink_p_to_missing_reflink_v, 166) \ 173 - x(stripe_pos_bad, 167) \ 174 - x(stripe_val_size_bad, 168) \ 175 - x(stripe_sector_count_wrong, 169) \ 176 - x(snapshot_tree_pos_bad, 170) \ 177 - x(snapshot_tree_to_missing_snapshot, 171) \ 178 - x(snapshot_tree_to_missing_subvol, 172) \ 179 - x(snapshot_tree_to_wrong_subvol, 173) \ 180 - x(snapshot_tree_to_snapshot_subvol, 174) \ 181 - x(snapshot_pos_bad, 175) \ 182 - x(snapshot_parent_bad, 176) \ 183 - x(snapshot_children_not_normalized, 177) \ 184 - x(snapshot_child_duplicate, 178) \ 185 - x(snapshot_child_bad, 179) \ 186 - x(snapshot_skiplist_not_normalized, 180) \ 187 - x(snapshot_skiplist_bad, 181) \ 188 - x(snapshot_should_not_have_subvol, 182) \ 189 - x(snapshot_to_bad_snapshot_tree, 183) \ 190 - x(snapshot_bad_depth, 184) \ 191 - x(snapshot_bad_skiplist, 185) \ 192 - x(subvol_pos_bad, 186) \ 193 - x(subvol_not_master_and_not_snapshot, 187) \ 194 - x(subvol_to_missing_root, 188) \ 195 - x(subvol_root_wrong_bi_subvol, 189) \ 196 - x(bkey_in_missing_snapshot, 190) \ 197 - x(inode_pos_inode_nonzero, 191) \ 198 - x(inode_pos_blockdev_range, 192) \ 199 - x(inode_unpack_error, 193) \ 200 - x(inode_str_hash_invalid, 194) \ 201 - x(inode_v3_fields_start_bad, 195) \ 202 - x(inode_snapshot_mismatch, 196) \ 203 - x(inode_unlinked_but_clean, 197) \ 204 - x(inode_unlinked_but_nlink_nonzero, 198) \ 205 - x(inode_checksum_type_invalid, 199) \ 206 - x(inode_compression_type_invalid, 200) \ 207 - x(inode_subvol_root_but_not_dir, 201) \ 208 - x(inode_i_size_dirty_but_clean, 202) \ 209 - x(inode_i_sectors_dirty_but_clean, 203) \ 210 - x(inode_i_sectors_wrong, 204) \ 211 - x(inode_dir_wrong_nlink, 205) \ 212 - x(inode_dir_multiple_links, 206) \ 213 - x(inode_multiple_links_but_nlink_0, 207) \ 214 - x(inode_wrong_backpointer, 208) \ 215 - x(inode_wrong_nlink, 209) \ 216 - x(inode_unreachable, 210) \ 217 - x(deleted_inode_but_clean, 211) \ 218 - x(deleted_inode_missing, 212) \ 219 - x(deleted_inode_is_dir, 213) \ 220 - x(deleted_inode_not_unlinked, 214) \ 221 - x(extent_overlapping, 215) \ 222 - x(extent_in_missing_inode, 216) \ 223 - x(extent_in_non_reg_inode, 217) \ 224 - x(extent_past_end_of_inode, 218) \ 225 - x(dirent_empty_name, 219) \ 226 - x(dirent_val_too_big, 220) \ 227 - x(dirent_name_too_long, 221) \ 228 - x(dirent_name_embedded_nul, 222) \ 229 - x(dirent_name_dot_or_dotdot, 223) \ 230 - x(dirent_name_has_slash, 224) \ 231 - x(dirent_d_type_wrong, 225) \ 232 - x(inode_bi_parent_wrong, 226) \ 233 - x(dirent_in_missing_dir_inode, 227) \ 234 - x(dirent_in_non_dir_inode, 228) \ 235 - x(dirent_to_missing_inode, 229) \ 236 - x(dirent_to_missing_subvol, 230) \ 237 - x(dirent_to_itself, 231) \ 238 - x(quota_type_invalid, 232) \ 239 - x(xattr_val_size_too_small, 233) \ 240 - x(xattr_val_size_too_big, 234) \ 241 - x(xattr_invalid_type, 235) \ 242 - x(xattr_name_invalid_chars, 236) \ 243 - x(xattr_in_missing_inode, 237) \ 244 - x(root_subvol_missing, 238) \ 245 - x(root_dir_missing, 239) \ 246 - x(root_inode_not_dir, 240) \ 247 - x(dir_loop, 241) \ 248 - x(hash_table_key_duplicate, 242) \ 249 - x(hash_table_key_wrong_offset, 243) \ 250 - x(unlinked_inode_not_on_deleted_list, 244) \ 251 - x(reflink_p_front_pad_bad, 245) \ 252 - x(journal_entry_dup_same_device, 246) \ 253 - x(inode_bi_subvol_missing, 247) \ 254 - x(inode_bi_subvol_wrong, 248) \ 255 - x(inode_points_to_missing_dirent, 249) \ 256 - x(inode_points_to_wrong_dirent, 250) \ 257 - x(inode_bi_parent_nonzero, 251) \ 258 - x(dirent_to_missing_parent_subvol, 252) \ 259 - x(dirent_not_visible_in_parent_subvol, 253) \ 260 - x(subvol_fs_path_parent_wrong, 254) \ 261 - x(subvol_root_fs_path_parent_nonzero, 255) \ 262 - x(subvol_children_not_set, 256) \ 263 - x(subvol_children_bad, 257) \ 264 - x(subvol_loop, 258) \ 265 - x(subvol_unreachable, 259) \ 266 - x(btree_node_bkey_bad_u64s, 260) \ 267 - x(btree_node_topology_empty_interior_node, 261) \ 268 - x(btree_ptr_v2_min_key_bad, 262) \ 269 - x(btree_root_unreadable_and_scan_found_nothing, 263) \ 270 - x(snapshot_node_missing, 264) \ 271 - x(dup_backpointer_to_bad_csum_extent, 265) \ 272 - x(btree_bitmap_not_marked, 266) \ 273 - x(sb_clean_entry_overrun, 267) \ 274 - x(btree_ptr_v2_written_0, 268) \ 275 - x(subvol_snapshot_bad, 269) \ 276 - x(subvol_inode_bad, 270) 5 + enum bch_fsck_flags { 6 + FSCK_CAN_FIX = 1 << 0, 7 + FSCK_CAN_IGNORE = 1 << 1, 8 + FSCK_NEED_FSCK = 1 << 2, 9 + FSCK_NO_RATELIMIT = 1 << 3, 10 + FSCK_AUTOFIX = 1 << 4, 11 + }; 12 + 13 + #define BCH_SB_ERRS() \ 14 + x(clean_but_journal_not_empty, 0, 0) \ 15 + x(dirty_but_no_journal_entries, 1, 0) \ 16 + x(dirty_but_no_journal_entries_post_drop_nonflushes, 2, 0) \ 17 + x(sb_clean_journal_seq_mismatch, 3, 0) \ 18 + x(sb_clean_btree_root_mismatch, 4, 0) \ 19 + x(sb_clean_missing, 5, 0) \ 20 + x(jset_unsupported_version, 6, 0) \ 21 + x(jset_unknown_csum, 7, 0) \ 22 + x(jset_last_seq_newer_than_seq, 8, 0) \ 23 + x(jset_past_bucket_end, 9, 0) \ 24 + x(jset_seq_blacklisted, 10, 0) \ 25 + x(journal_entries_missing, 11, 0) \ 26 + x(journal_entry_replicas_not_marked, 12, 0) \ 27 + x(journal_entry_past_jset_end, 13, 0) \ 28 + x(journal_entry_replicas_data_mismatch, 14, 0) \ 29 + x(journal_entry_bkey_u64s_0, 15, 0) \ 30 + x(journal_entry_bkey_past_end, 16, 0) \ 31 + x(journal_entry_bkey_bad_format, 17, 0) \ 32 + x(journal_entry_bkey_invalid, 18, 0) \ 33 + x(journal_entry_btree_root_bad_size, 19, 0) \ 34 + x(journal_entry_blacklist_bad_size, 20, 0) \ 35 + x(journal_entry_blacklist_v2_bad_size, 21, 0) \ 36 + x(journal_entry_blacklist_v2_start_past_end, 22, 0) \ 37 + x(journal_entry_usage_bad_size, 23, 0) \ 38 + x(journal_entry_data_usage_bad_size, 24, 0) \ 39 + x(journal_entry_clock_bad_size, 25, 0) \ 40 + x(journal_entry_clock_bad_rw, 26, 0) \ 41 + x(journal_entry_dev_usage_bad_size, 27, 0) \ 42 + x(journal_entry_dev_usage_bad_dev, 28, 0) \ 43 + x(journal_entry_dev_usage_bad_pad, 29, 0) \ 44 + x(btree_node_unreadable, 30, 0) \ 45 + x(btree_node_fault_injected, 31, 0) \ 46 + x(btree_node_bad_magic, 32, 0) \ 47 + x(btree_node_bad_seq, 33, 0) \ 48 + x(btree_node_unsupported_version, 34, 0) \ 49 + x(btree_node_bset_older_than_sb_min, 35, 0) \ 50 + x(btree_node_bset_newer_than_sb, 36, 0) \ 51 + x(btree_node_data_missing, 37, 0) \ 52 + x(btree_node_bset_after_end, 38, 0) \ 53 + x(btree_node_replicas_sectors_written_mismatch, 39, 0) \ 54 + x(btree_node_replicas_data_mismatch, 40, 0) \ 55 + x(bset_unknown_csum, 41, 0) \ 56 + x(bset_bad_csum, 42, 0) \ 57 + x(bset_past_end_of_btree_node, 43, 0) \ 58 + x(bset_wrong_sector_offset, 44, 0) \ 59 + x(bset_empty, 45, 0) \ 60 + x(bset_bad_seq, 46, 0) \ 61 + x(bset_blacklisted_journal_seq, 47, 0) \ 62 + x(first_bset_blacklisted_journal_seq, 48, 0) \ 63 + x(btree_node_bad_btree, 49, 0) \ 64 + x(btree_node_bad_level, 50, 0) \ 65 + x(btree_node_bad_min_key, 51, 0) \ 66 + x(btree_node_bad_max_key, 52, 0) \ 67 + x(btree_node_bad_format, 53, 0) \ 68 + x(btree_node_bkey_past_bset_end, 54, 0) \ 69 + x(btree_node_bkey_bad_format, 55, 0) \ 70 + x(btree_node_bad_bkey, 56, 0) \ 71 + x(btree_node_bkey_out_of_order, 57, 0) \ 72 + x(btree_root_bkey_invalid, 58, 0) \ 73 + x(btree_root_read_error, 59, 0) \ 74 + x(btree_root_bad_min_key, 60, 0) \ 75 + x(btree_root_bad_max_key, 61, 0) \ 76 + x(btree_node_read_error, 62, 0) \ 77 + x(btree_node_topology_bad_min_key, 63, 0) \ 78 + x(btree_node_topology_bad_max_key, 64, 0) \ 79 + x(btree_node_topology_overwritten_by_prev_node, 65, 0) \ 80 + x(btree_node_topology_overwritten_by_next_node, 66, 0) \ 81 + x(btree_node_topology_interior_node_empty, 67, 0) \ 82 + x(fs_usage_hidden_wrong, 68, FSCK_AUTOFIX) \ 83 + x(fs_usage_btree_wrong, 69, FSCK_AUTOFIX) \ 84 + x(fs_usage_data_wrong, 70, FSCK_AUTOFIX) \ 85 + x(fs_usage_cached_wrong, 71, FSCK_AUTOFIX) \ 86 + x(fs_usage_reserved_wrong, 72, FSCK_AUTOFIX) \ 87 + x(fs_usage_persistent_reserved_wrong, 73, FSCK_AUTOFIX) \ 88 + x(fs_usage_nr_inodes_wrong, 74, FSCK_AUTOFIX) \ 89 + x(fs_usage_replicas_wrong, 75, FSCK_AUTOFIX) \ 90 + x(dev_usage_buckets_wrong, 76, FSCK_AUTOFIX) \ 91 + x(dev_usage_sectors_wrong, 77, FSCK_AUTOFIX) \ 92 + x(dev_usage_fragmented_wrong, 78, FSCK_AUTOFIX) \ 93 + x(dev_usage_buckets_ec_wrong, 79, FSCK_AUTOFIX) \ 94 + x(bkey_version_in_future, 80, 0) \ 95 + x(bkey_u64s_too_small, 81, 0) \ 96 + x(bkey_invalid_type_for_btree, 82, 0) \ 97 + x(bkey_extent_size_zero, 83, 0) \ 98 + x(bkey_extent_size_greater_than_offset, 84, 0) \ 99 + x(bkey_size_nonzero, 85, 0) \ 100 + x(bkey_snapshot_nonzero, 86, 0) \ 101 + x(bkey_snapshot_zero, 87, 0) \ 102 + x(bkey_at_pos_max, 88, 0) \ 103 + x(bkey_before_start_of_btree_node, 89, 0) \ 104 + x(bkey_after_end_of_btree_node, 90, 0) \ 105 + x(bkey_val_size_nonzero, 91, 0) \ 106 + x(bkey_val_size_too_small, 92, 0) \ 107 + x(alloc_v1_val_size_bad, 93, 0) \ 108 + x(alloc_v2_unpack_error, 94, 0) \ 109 + x(alloc_v3_unpack_error, 95, 0) \ 110 + x(alloc_v4_val_size_bad, 96, 0) \ 111 + x(alloc_v4_backpointers_start_bad, 97, 0) \ 112 + x(alloc_key_data_type_bad, 98, 0) \ 113 + x(alloc_key_empty_but_have_data, 99, 0) \ 114 + x(alloc_key_dirty_sectors_0, 100, 0) \ 115 + x(alloc_key_data_type_inconsistency, 101, 0) \ 116 + x(alloc_key_to_missing_dev_bucket, 102, 0) \ 117 + x(alloc_key_cached_inconsistency, 103, 0) \ 118 + x(alloc_key_cached_but_read_time_zero, 104, 0) \ 119 + x(alloc_key_to_missing_lru_entry, 105, 0) \ 120 + x(alloc_key_data_type_wrong, 106, FSCK_AUTOFIX) \ 121 + x(alloc_key_gen_wrong, 107, FSCK_AUTOFIX) \ 122 + x(alloc_key_dirty_sectors_wrong, 108, FSCK_AUTOFIX) \ 123 + x(alloc_key_cached_sectors_wrong, 109, FSCK_AUTOFIX) \ 124 + x(alloc_key_stripe_wrong, 110, FSCK_AUTOFIX) \ 125 + x(alloc_key_stripe_redundancy_wrong, 111, FSCK_AUTOFIX) \ 126 + x(bucket_sector_count_overflow, 112, 0) \ 127 + x(bucket_metadata_type_mismatch, 113, 0) \ 128 + x(need_discard_key_wrong, 114, 0) \ 129 + x(freespace_key_wrong, 115, 0) \ 130 + x(freespace_hole_missing, 116, 0) \ 131 + x(bucket_gens_val_size_bad, 117, 0) \ 132 + x(bucket_gens_key_wrong, 118, 0) \ 133 + x(bucket_gens_hole_wrong, 119, 0) \ 134 + x(bucket_gens_to_invalid_dev, 120, 0) \ 135 + x(bucket_gens_to_invalid_buckets, 121, 0) \ 136 + x(bucket_gens_nonzero_for_invalid_buckets, 122, 0) \ 137 + x(need_discard_freespace_key_to_invalid_dev_bucket, 123, 0) \ 138 + x(need_discard_freespace_key_bad, 124, 0) \ 139 + x(backpointer_bucket_offset_wrong, 125, 0) \ 140 + x(backpointer_to_missing_device, 126, 0) \ 141 + x(backpointer_to_missing_alloc, 127, 0) \ 142 + x(backpointer_to_missing_ptr, 128, 0) \ 143 + x(lru_entry_at_time_0, 129, 0) \ 144 + x(lru_entry_to_invalid_bucket, 130, 0) \ 145 + x(lru_entry_bad, 131, 0) \ 146 + x(btree_ptr_val_too_big, 132, 0) \ 147 + x(btree_ptr_v2_val_too_big, 133, 0) \ 148 + x(btree_ptr_has_non_ptr, 134, 0) \ 149 + x(extent_ptrs_invalid_entry, 135, 0) \ 150 + x(extent_ptrs_no_ptrs, 136, 0) \ 151 + x(extent_ptrs_too_many_ptrs, 137, 0) \ 152 + x(extent_ptrs_redundant_crc, 138, 0) \ 153 + x(extent_ptrs_redundant_stripe, 139, 0) \ 154 + x(extent_ptrs_unwritten, 140, 0) \ 155 + x(extent_ptrs_written_and_unwritten, 141, 0) \ 156 + x(ptr_to_invalid_device, 142, 0) \ 157 + x(ptr_to_duplicate_device, 143, 0) \ 158 + x(ptr_after_last_bucket, 144, 0) \ 159 + x(ptr_before_first_bucket, 145, 0) \ 160 + x(ptr_spans_multiple_buckets, 146, 0) \ 161 + x(ptr_to_missing_backpointer, 147, 0) \ 162 + x(ptr_to_missing_alloc_key, 148, 0) \ 163 + x(ptr_to_missing_replicas_entry, 149, 0) \ 164 + x(ptr_to_missing_stripe, 150, 0) \ 165 + x(ptr_to_incorrect_stripe, 151, 0) \ 166 + x(ptr_gen_newer_than_bucket_gen, 152, 0) \ 167 + x(ptr_too_stale, 153, 0) \ 168 + x(stale_dirty_ptr, 154, 0) \ 169 + x(ptr_bucket_data_type_mismatch, 155, 0) \ 170 + x(ptr_cached_and_erasure_coded, 156, 0) \ 171 + x(ptr_crc_uncompressed_size_too_small, 157, 0) \ 172 + x(ptr_crc_csum_type_unknown, 158, 0) \ 173 + x(ptr_crc_compression_type_unknown, 159, 0) \ 174 + x(ptr_crc_redundant, 160, 0) \ 175 + x(ptr_crc_uncompressed_size_too_big, 161, 0) \ 176 + x(ptr_crc_nonce_mismatch, 162, 0) \ 177 + x(ptr_stripe_redundant, 163, 0) \ 178 + x(reservation_key_nr_replicas_invalid, 164, 0) \ 179 + x(reflink_v_refcount_wrong, 165, 0) \ 180 + x(reflink_p_to_missing_reflink_v, 166, 0) \ 181 + x(stripe_pos_bad, 167, 0) \ 182 + x(stripe_val_size_bad, 168, 0) \ 183 + x(stripe_sector_count_wrong, 169, 0) \ 184 + x(snapshot_tree_pos_bad, 170, 0) \ 185 + x(snapshot_tree_to_missing_snapshot, 171, 0) \ 186 + x(snapshot_tree_to_missing_subvol, 172, 0) \ 187 + x(snapshot_tree_to_wrong_subvol, 173, 0) \ 188 + x(snapshot_tree_to_snapshot_subvol, 174, 0) \ 189 + x(snapshot_pos_bad, 175, 0) \ 190 + x(snapshot_parent_bad, 176, 0) \ 191 + x(snapshot_children_not_normalized, 177, 0) \ 192 + x(snapshot_child_duplicate, 178, 0) \ 193 + x(snapshot_child_bad, 179, 0) \ 194 + x(snapshot_skiplist_not_normalized, 180, 0) \ 195 + x(snapshot_skiplist_bad, 181, 0) \ 196 + x(snapshot_should_not_have_subvol, 182, 0) \ 197 + x(snapshot_to_bad_snapshot_tree, 183, 0) \ 198 + x(snapshot_bad_depth, 184, 0) \ 199 + x(snapshot_bad_skiplist, 185, 0) \ 200 + x(subvol_pos_bad, 186, 0) \ 201 + x(subvol_not_master_and_not_snapshot, 187, 0) \ 202 + x(subvol_to_missing_root, 188, 0) \ 203 + x(subvol_root_wrong_bi_subvol, 189, 0) \ 204 + x(bkey_in_missing_snapshot, 190, 0) \ 205 + x(inode_pos_inode_nonzero, 191, 0) \ 206 + x(inode_pos_blockdev_range, 192, 0) \ 207 + x(inode_unpack_error, 193, 0) \ 208 + x(inode_str_hash_invalid, 194, 0) \ 209 + x(inode_v3_fields_start_bad, 195, 0) \ 210 + x(inode_snapshot_mismatch, 196, 0) \ 211 + x(inode_unlinked_but_clean, 197, 0) \ 212 + x(inode_unlinked_but_nlink_nonzero, 198, 0) \ 213 + x(inode_checksum_type_invalid, 199, 0) \ 214 + x(inode_compression_type_invalid, 200, 0) \ 215 + x(inode_subvol_root_but_not_dir, 201, 0) \ 216 + x(inode_i_size_dirty_but_clean, 202, 0) \ 217 + x(inode_i_sectors_dirty_but_clean, 203, 0) \ 218 + x(inode_i_sectors_wrong, 204, 0) \ 219 + x(inode_dir_wrong_nlink, 205, 0) \ 220 + x(inode_dir_multiple_links, 206, 0) \ 221 + x(inode_multiple_links_but_nlink_0, 207, 0) \ 222 + x(inode_wrong_backpointer, 208, 0) \ 223 + x(inode_wrong_nlink, 209, 0) \ 224 + x(inode_unreachable, 210, 0) \ 225 + x(deleted_inode_but_clean, 211, 0) \ 226 + x(deleted_inode_missing, 212, 0) \ 227 + x(deleted_inode_is_dir, 213, 0) \ 228 + x(deleted_inode_not_unlinked, 214, 0) \ 229 + x(extent_overlapping, 215, 0) \ 230 + x(extent_in_missing_inode, 216, 0) \ 231 + x(extent_in_non_reg_inode, 217, 0) \ 232 + x(extent_past_end_of_inode, 218, 0) \ 233 + x(dirent_empty_name, 219, 0) \ 234 + x(dirent_val_too_big, 220, 0) \ 235 + x(dirent_name_too_long, 221, 0) \ 236 + x(dirent_name_embedded_nul, 222, 0) \ 237 + x(dirent_name_dot_or_dotdot, 223, 0) \ 238 + x(dirent_name_has_slash, 224, 0) \ 239 + x(dirent_d_type_wrong, 225, 0) \ 240 + x(inode_bi_parent_wrong, 226, 0) \ 241 + x(dirent_in_missing_dir_inode, 227, 0) \ 242 + x(dirent_in_non_dir_inode, 228, 0) \ 243 + x(dirent_to_missing_inode, 229, 0) \ 244 + x(dirent_to_missing_subvol, 230, 0) \ 245 + x(dirent_to_itself, 231, 0) \ 246 + x(quota_type_invalid, 232, 0) \ 247 + x(xattr_val_size_too_small, 233, 0) \ 248 + x(xattr_val_size_too_big, 234, 0) \ 249 + x(xattr_invalid_type, 235, 0) \ 250 + x(xattr_name_invalid_chars, 236, 0) \ 251 + x(xattr_in_missing_inode, 237, 0) \ 252 + x(root_subvol_missing, 238, 0) \ 253 + x(root_dir_missing, 239, 0) \ 254 + x(root_inode_not_dir, 240, 0) \ 255 + x(dir_loop, 241, 0) \ 256 + x(hash_table_key_duplicate, 242, 0) \ 257 + x(hash_table_key_wrong_offset, 243, 0) \ 258 + x(unlinked_inode_not_on_deleted_list, 244, 0) \ 259 + x(reflink_p_front_pad_bad, 245, 0) \ 260 + x(journal_entry_dup_same_device, 246, 0) \ 261 + x(inode_bi_subvol_missing, 247, 0) \ 262 + x(inode_bi_subvol_wrong, 248, 0) \ 263 + x(inode_points_to_missing_dirent, 249, 0) \ 264 + x(inode_points_to_wrong_dirent, 250, 0) \ 265 + x(inode_bi_parent_nonzero, 251, 0) \ 266 + x(dirent_to_missing_parent_subvol, 252, 0) \ 267 + x(dirent_not_visible_in_parent_subvol, 253, 0) \ 268 + x(subvol_fs_path_parent_wrong, 254, 0) \ 269 + x(subvol_root_fs_path_parent_nonzero, 255, 0) \ 270 + x(subvol_children_not_set, 256, 0) \ 271 + x(subvol_children_bad, 257, 0) \ 272 + x(subvol_loop, 258, 0) \ 273 + x(subvol_unreachable, 259, 0) \ 274 + x(btree_node_bkey_bad_u64s, 260, 0) \ 275 + x(btree_node_topology_empty_interior_node, 261, 0) \ 276 + x(btree_ptr_v2_min_key_bad, 262, 0) \ 277 + x(btree_root_unreadable_and_scan_found_nothing, 263, 0) \ 278 + x(snapshot_node_missing, 264, 0) \ 279 + x(dup_backpointer_to_bad_csum_extent, 265, 0) \ 280 + x(btree_bitmap_not_marked, 266, 0) \ 281 + x(sb_clean_entry_overrun, 267, 0) \ 282 + x(btree_ptr_v2_written_0, 268, 0) \ 283 + x(subvol_snapshot_bad, 269, 0) \ 284 + x(subvol_inode_bad, 270, 0) \ 285 + x(alloc_key_stripe_sectors_wrong, 271, 0) \ 286 + x(accounting_mismatch, 272, 0) \ 287 + x(accounting_replicas_not_marked, 273, 0) \ 288 + x(invalid_btree_id, 274, 0) \ 289 + x(alloc_key_io_time_bad, 275, 0) 277 290 278 291 enum bch_sb_error_id { 279 - #define x(t, n) BCH_FSCK_ERR_##t = n, 292 + #define x(t, n, ...) BCH_FSCK_ERR_##t = n, 280 293 BCH_SB_ERRS() 281 294 #undef x 282 295 BCH_SB_ERR_MAX
+2 -7
fs/bcachefs/snapshot.c
··· 1565 1565 if (!test_and_clear_bit(BCH_FS_need_delete_dead_snapshots, &c->flags)) 1566 1566 return 0; 1567 1567 1568 - if (!test_bit(BCH_FS_started, &c->flags)) { 1569 - ret = bch2_fs_read_write_early(c); 1570 - bch_err_msg(c, ret, "deleting dead snapshots: error going rw"); 1571 - if (ret) 1572 - return ret; 1573 - } 1574 - 1575 1568 trans = bch2_trans_get(c); 1576 1569 1577 1570 /* ··· 1679 1686 void bch2_delete_dead_snapshots_work(struct work_struct *work) 1680 1687 { 1681 1688 struct bch_fs *c = container_of(work, struct bch_fs, snapshot_delete_work); 1689 + 1690 + set_worker_desc("bcachefs-delete-dead-snapshots/%s", c->name); 1682 1691 1683 1692 bch2_delete_dead_snapshots(c); 1684 1693 bch2_write_ref_put(c, BCH_WRITE_REF_delete_dead_snapshots);
+1 -1
fs/bcachefs/str_hash.h
··· 300 300 if (!found && (flags & STR_HASH_must_replace)) { 301 301 ret = -BCH_ERR_ENOENT_str_hash_set_must_replace; 302 302 } else if (found && (flags & STR_HASH_must_create)) { 303 - ret = -EEXIST; 303 + ret = -BCH_ERR_EEXIST_str_hash_set; 304 304 } else { 305 305 if (!found && slot.path) 306 306 swap(iter, slot);
+4 -3
fs/bcachefs/super-io.c
··· 649 649 650 650 bytes = vstruct_bytes(sb->sb); 651 651 652 - if (bytes > 512ULL << min(BCH_SB_LAYOUT_SIZE_BITS_MAX, sb->sb->layout.sb_max_size_bits)) { 653 - prt_printf(err, "Invalid superblock: too big (got %zu bytes, layout max %lu)", 654 - bytes, 512UL << sb->sb->layout.sb_max_size_bits); 652 + u64 sb_size = 512ULL << min(BCH_SB_LAYOUT_SIZE_BITS_MAX, sb->sb->layout.sb_max_size_bits); 653 + if (bytes > sb_size) { 654 + prt_printf(err, "Invalid superblock: too big (got %zu bytes, layout max %llu)", 655 + bytes, sb_size); 655 656 return -BCH_ERR_invalid_sb_too_big; 656 657 } 657 658
+7 -6
fs/bcachefs/super.c
··· 912 912 bch2_io_clock_init(&c->io_clock[WRITE]) ?: 913 913 bch2_fs_journal_init(&c->journal) ?: 914 914 bch2_fs_replicas_init(c) ?: 915 + bch2_fs_btree_iter_init(c) ?: 915 916 bch2_fs_btree_cache_init(c) ?: 916 917 bch2_fs_btree_key_cache_init(&c->btree_key_cache) ?: 917 - bch2_fs_btree_iter_init(c) ?: 918 918 bch2_fs_btree_interior_update_init(c) ?: 919 919 bch2_fs_buckets_waiting_for_journal_init(c) ?: 920 920 bch2_fs_btree_write_buffer_init(c) ?: ··· 931 931 if (ret) 932 932 goto err; 933 933 934 - for (i = 0; i < c->sb.nr_devices; i++) 935 - if (bch2_member_exists(c->disk_sb.sb, i) && 936 - bch2_dev_alloc(c, i)) { 937 - ret = -EEXIST; 934 + for (i = 0; i < c->sb.nr_devices; i++) { 935 + if (!bch2_member_exists(c->disk_sb.sb, i)) 936 + continue; 937 + ret = bch2_dev_alloc(c, i); 938 + if (ret) 938 939 goto err; 939 - } 940 + } 940 941 941 942 bch2_journal_entry_res_resize(&c->journal, 942 943 &c->btree_root_journal_res,
+3 -1
fs/btrfs/bio.c
··· 741 741 ret = btrfs_bio_csum(bbio); 742 742 if (ret) 743 743 goto fail_put_bio; 744 - } else if (use_append) { 744 + } else if (use_append || 745 + (btrfs_is_zoned(fs_info) && inode && 746 + inode->flags & BTRFS_INODE_NODATASUM)) { 745 747 ret = btrfs_alloc_dummy_sum(bbio); 746 748 if (ret) 747 749 goto fail_put_bio;
+9 -2
fs/btrfs/block-group.c
··· 1785 1785 container_of(work, struct btrfs_fs_info, reclaim_bgs_work); 1786 1786 struct btrfs_block_group *bg; 1787 1787 struct btrfs_space_info *space_info; 1788 + LIST_HEAD(retry_list); 1788 1789 1789 1790 if (!test_bit(BTRFS_FS_OPEN, &fs_info->flags)) 1790 1791 return; ··· 1922 1921 } 1923 1922 1924 1923 next: 1925 - if (ret) 1926 - btrfs_mark_bg_to_reclaim(bg); 1924 + if (ret) { 1925 + /* Refcount held by the reclaim_bgs list after splice. */ 1926 + btrfs_get_block_group(bg); 1927 + list_add_tail(&bg->bg_list, &retry_list); 1928 + } 1927 1929 btrfs_put_block_group(bg); 1928 1930 1929 1931 mutex_unlock(&fs_info->reclaim_bgs_lock); ··· 1946 1942 spin_unlock(&fs_info->unused_bgs_lock); 1947 1943 mutex_unlock(&fs_info->reclaim_bgs_lock); 1948 1944 end: 1945 + spin_lock(&fs_info->unused_bgs_lock); 1946 + list_splice_tail(&retry_list, &fs_info->reclaim_bgs); 1947 + spin_unlock(&fs_info->unused_bgs_lock); 1949 1948 btrfs_exclop_finish(fs_info); 1950 1949 sb_end_write(fs_info->sb); 1951 1950 }
-2
fs/nfs/direct.c
··· 141 141 { 142 142 ssize_t ret; 143 143 144 - VM_BUG_ON(iov_iter_count(iter) != PAGE_SIZE); 145 - 146 144 if (iov_iter_rw(iter) == READ) 147 145 ret = nfs_file_direct_read(iocb, iter, true); 148 146 else
-2
fs/nfsd/netlink.c
··· 44 44 static const struct genl_split_ops nfsd_nl_ops[] = { 45 45 { 46 46 .cmd = NFSD_CMD_RPC_STATUS_GET, 47 - .start = nfsd_nl_rpc_status_get_start, 48 47 .dumpit = nfsd_nl_rpc_status_get_dumpit, 49 - .done = nfsd_nl_rpc_status_get_done, 50 48 .flags = GENL_CMD_CAP_DUMP, 51 49 }, 52 50 {
-3
fs/nfsd/netlink.h
··· 15 15 extern const struct nla_policy nfsd_sock_nl_policy[NFSD_A_SOCK_TRANSPORT_NAME + 1]; 16 16 extern const struct nla_policy nfsd_version_nl_policy[NFSD_A_VERSION_ENABLED + 1]; 17 17 18 - int nfsd_nl_rpc_status_get_start(struct netlink_callback *cb); 19 - int nfsd_nl_rpc_status_get_done(struct netlink_callback *cb); 20 - 21 18 int nfsd_nl_rpc_status_get_dumpit(struct sk_buff *skb, 22 19 struct netlink_callback *cb); 23 20 int nfsd_nl_threads_set_doit(struct sk_buff *skb, struct genl_info *info);
+11 -37
fs/nfsd/nfsctl.c
··· 1460 1460 1461 1461 unsigned int nfsd_net_id; 1462 1462 1463 - /** 1464 - * nfsd_nl_rpc_status_get_start - Prepare rpc_status_get dumpit 1465 - * @cb: netlink metadata and command arguments 1466 - * 1467 - * Return values: 1468 - * %0: The rpc_status_get command may proceed 1469 - * %-ENODEV: There is no NFSD running in this namespace 1470 - */ 1471 - int nfsd_nl_rpc_status_get_start(struct netlink_callback *cb) 1472 - { 1473 - struct nfsd_net *nn = net_generic(sock_net(cb->skb->sk), nfsd_net_id); 1474 - int ret = -ENODEV; 1475 - 1476 - mutex_lock(&nfsd_mutex); 1477 - if (nn->nfsd_serv) 1478 - ret = 0; 1479 - else 1480 - mutex_unlock(&nfsd_mutex); 1481 - 1482 - return ret; 1483 - } 1484 - 1485 1463 static int nfsd_genl_rpc_status_compose_msg(struct sk_buff *skb, 1486 1464 struct netlink_callback *cb, 1487 1465 struct nfsd_genl_rqstp *rqstp) ··· 1536 1558 int nfsd_nl_rpc_status_get_dumpit(struct sk_buff *skb, 1537 1559 struct netlink_callback *cb) 1538 1560 { 1539 - struct nfsd_net *nn = net_generic(sock_net(skb->sk), nfsd_net_id); 1540 1561 int i, ret, rqstp_index = 0; 1562 + struct nfsd_net *nn; 1563 + 1564 + mutex_lock(&nfsd_mutex); 1565 + 1566 + nn = net_generic(sock_net(skb->sk), nfsd_net_id); 1567 + if (!nn->nfsd_serv) { 1568 + ret = -ENODEV; 1569 + goto out_unlock; 1570 + } 1541 1571 1542 1572 rcu_read_lock(); 1543 1573 ··· 1622 1636 ret = skb->len; 1623 1637 out: 1624 1638 rcu_read_unlock(); 1625 - 1626 - return ret; 1627 - } 1628 - 1629 - /** 1630 - * nfsd_nl_rpc_status_get_done - rpc_status_get dumpit post-processing 1631 - * @cb: netlink metadata and command arguments 1632 - * 1633 - * Return values: 1634 - * %0: Success 1635 - */ 1636 - int nfsd_nl_rpc_status_get_done(struct netlink_callback *cb) 1637 - { 1639 + out_unlock: 1638 1640 mutex_unlock(&nfsd_mutex); 1639 1641 1640 - return 0; 1642 + return ret; 1641 1643 } 1642 1644 1643 1645 /**
+5
fs/ocfs2/aops.c
··· 2366 2366 } 2367 2367 2368 2368 list_for_each_entry(ue, &dwc->dw_zero_list, ue_node) { 2369 + ret = ocfs2_assure_trans_credits(handle, credits); 2370 + if (ret < 0) { 2371 + mlog_errno(ret); 2372 + break; 2373 + } 2369 2374 ret = ocfs2_mark_extent_written(inode, &et, handle, 2370 2375 ue->ue_cpos, 1, 2371 2376 ue->ue_phys,
+17
fs/ocfs2/journal.c
··· 446 446 } 447 447 448 448 /* 449 + * Make sure handle has at least 'nblocks' credits available. If it does not 450 + * have that many credits available, we will try to extend the handle to have 451 + * enough credits. If that fails, we will restart transaction to have enough 452 + * credits. Similar notes regarding data consistency and locking implications 453 + * as for ocfs2_extend_trans() apply here. 454 + */ 455 + int ocfs2_assure_trans_credits(handle_t *handle, int nblocks) 456 + { 457 + int old_nblks = jbd2_handle_buffer_credits(handle); 458 + 459 + trace_ocfs2_assure_trans_credits(old_nblks); 460 + if (old_nblks >= nblocks) 461 + return 0; 462 + return ocfs2_extend_trans(handle, nblocks - old_nblks); 463 + } 464 + 465 + /* 449 466 * If we have fewer than thresh credits, extend by OCFS2_MAX_TRANS_DATA. 450 467 * If that fails, restart the transaction & regain write access for the 451 468 * buffer head which is used for metadata modifications.
+2
fs/ocfs2/journal.h
··· 243 243 int ocfs2_commit_trans(struct ocfs2_super *osb, 244 244 handle_t *handle); 245 245 int ocfs2_extend_trans(handle_t *handle, int nblocks); 246 + int ocfs2_assure_trans_credits(handle_t *handle, 247 + int nblocks); 246 248 int ocfs2_allocate_extend_trans(handle_t *handle, 247 249 int thresh); 248 250
+2
fs/ocfs2/ocfs2_trace.h
··· 2577 2577 2578 2578 DEFINE_OCFS2_INT_INT_EVENT(ocfs2_extend_trans); 2579 2579 2580 + DEFINE_OCFS2_INT_EVENT(ocfs2_assure_trans_credits); 2581 + 2580 2582 DEFINE_OCFS2_INT_EVENT(ocfs2_extend_trans_restart); 2581 2583 2582 2584 DEFINE_OCFS2_INT_INT_EVENT(ocfs2_allocate_extend_trans);
+4 -4
fs/overlayfs/dir.c
··· 1314 1314 int flags = file->f_flags | OVL_OPEN_FLAGS; 1315 1315 int err; 1316 1316 1317 - err = ovl_copy_up(dentry->d_parent); 1318 - if (err) 1319 - return err; 1320 - 1321 1317 old_cred = ovl_override_creds(dentry->d_sb); 1322 1318 err = ovl_setup_cred_for_create(dentry, inode, mode, old_cred); 1323 1319 if (err) ··· 1355 1359 1356 1360 if (!OVL_FS(dentry->d_sb)->tmpfile) 1357 1361 return -EOPNOTSUPP; 1362 + 1363 + err = ovl_copy_up(dentry->d_parent); 1364 + if (err) 1365 + return err; 1358 1366 1359 1367 err = ovl_want_write(dentry); 1360 1368 if (err)
+5 -1
fs/overlayfs/export.c
··· 181 181 struct ovl_fs *ofs = OVL_FS(dentry->d_sb); 182 182 bool decodable = ofs->config.nfs_export; 183 183 184 + /* No upper layer? */ 185 + if (!ovl_upper_mnt(ofs)) 186 + return 1; 187 + 184 188 /* Lower file handle for non-upper non-decodable */ 185 189 if (!ovl_dentry_upper(dentry) && !decodable) 186 190 return 1; ··· 213 209 * ovl_connect_layer() will try to make origin's layer "connected" by 214 210 * copying up a "connectable" ancestor. 215 211 */ 216 - if (d_is_dir(dentry) && ovl_upper_mnt(ofs) && decodable) 212 + if (d_is_dir(dentry) && decodable) 217 213 return ovl_connect_layer(dentry); 218 214 219 215 /* Lower file handle for indexed and non-upper dir/non-dir */
+3
fs/proc/task_mmu.c
··· 707 707 #ifdef CONFIG_X86_USER_SHADOW_STACK 708 708 [ilog2(VM_SHADOW_STACK)] = "ss", 709 709 #endif 710 + #ifdef CONFIG_64BIT 711 + [ilog2(VM_SEALED)] = "sl", 712 + #endif 710 713 }; 711 714 size_t i; 712 715
+1 -1
fs/smb/client/cifsfs.c
··· 134 134 MODULE_PARM_DESC(enable_oplocks, "Enable or disable oplocks. Default: y/Y/1"); 135 135 136 136 module_param(enable_gcm_256, bool, 0644); 137 - MODULE_PARM_DESC(enable_gcm_256, "Enable requesting strongest (256 bit) GCM encryption. Default: n/N/0"); 137 + MODULE_PARM_DESC(enable_gcm_256, "Enable requesting strongest (256 bit) GCM encryption. Default: y/Y/0"); 138 138 139 139 module_param(require_gcm_256, bool, 0644); 140 140 MODULE_PARM_DESC(require_gcm_256, "Require strongest (256 bit) GCM encryption. Default: n/N/0");
+2 -1
fs/smb/client/cifsglob.h
··· 1494 1494 struct cifs_io_request { 1495 1495 struct netfs_io_request rreq; 1496 1496 struct cifsFileInfo *cfile; 1497 + struct TCP_Server_Info *server; 1498 + pid_t pid; 1497 1499 }; 1498 1500 1499 1501 /* asynchronous read support */ ··· 1506 1504 struct cifs_io_request *req; 1507 1505 }; 1508 1506 ssize_t got_bytes; 1509 - pid_t pid; 1510 1507 unsigned int xid; 1511 1508 int result; 1512 1509 bool have_xid;
+4 -4
fs/smb/client/cifssmb.c
··· 1345 1345 if (rc) 1346 1346 return rc; 1347 1347 1348 - smb->hdr.Pid = cpu_to_le16((__u16)rdata->pid); 1349 - smb->hdr.PidHigh = cpu_to_le16((__u16)(rdata->pid >> 16)); 1348 + smb->hdr.Pid = cpu_to_le16((__u16)rdata->req->pid); 1349 + smb->hdr.PidHigh = cpu_to_le16((__u16)(rdata->req->pid >> 16)); 1350 1350 1351 1351 smb->AndXCommand = 0xFF; /* none */ 1352 1352 smb->Fid = rdata->req->cfile->fid.netfid; ··· 1689 1689 if (rc) 1690 1690 goto async_writev_out; 1691 1691 1692 - smb->hdr.Pid = cpu_to_le16((__u16)wdata->pid); 1693 - smb->hdr.PidHigh = cpu_to_le16((__u16)(wdata->pid >> 16)); 1692 + smb->hdr.Pid = cpu_to_le16((__u16)wdata->req->pid); 1693 + smb->hdr.PidHigh = cpu_to_le16((__u16)(wdata->req->pid >> 16)); 1694 1694 1695 1695 smb->AndXCommand = 0xFF; /* none */ 1696 1696 smb->Fid = wdata->req->cfile->fid.netfid;
+6 -21
fs/smb/client/file.c
··· 134 134 static bool cifs_clamp_length(struct netfs_io_subrequest *subreq) 135 135 { 136 136 struct netfs_io_request *rreq = subreq->rreq; 137 - struct TCP_Server_Info *server; 138 137 struct cifs_io_subrequest *rdata = container_of(subreq, struct cifs_io_subrequest, subreq); 139 138 struct cifs_io_request *req = container_of(subreq->rreq, struct cifs_io_request, rreq); 139 + struct TCP_Server_Info *server = req->server; 140 140 struct cifs_sb_info *cifs_sb = CIFS_SB(rreq->inode->i_sb); 141 141 size_t rsize = 0; 142 142 int rc; 143 143 144 144 rdata->xid = get_xid(); 145 145 rdata->have_xid = true; 146 - 147 - server = cifs_pick_channel(tlink_tcon(req->cfile->tlink)->ses); 148 146 rdata->server = server; 149 147 150 148 if (cifs_sb->ctx->rsize == 0) ··· 177 179 struct netfs_io_request *rreq = subreq->rreq; 178 180 struct cifs_io_subrequest *rdata = container_of(subreq, struct cifs_io_subrequest, subreq); 179 181 struct cifs_io_request *req = container_of(subreq->rreq, struct cifs_io_request, rreq); 180 - struct cifs_sb_info *cifs_sb = CIFS_SB(rreq->inode->i_sb); 181 - pid_t pid; 182 182 int rc = 0; 183 - 184 - if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_RWPIDFORWARD) 185 - pid = req->cfile->pid; 186 - else 187 - pid = current->tgid; // Ummm... This may be a workqueue 188 183 189 184 cifs_dbg(FYI, "%s: op=%08x[%x] mapping=%p len=%zu/%zu\n", 190 185 __func__, rreq->debug_id, subreq->debug_index, rreq->mapping, ··· 192 201 } 193 202 194 203 __set_bit(NETFS_SREQ_CLEAR_TAIL, &subreq->flags); 195 - rdata->pid = pid; 196 204 197 - rc = adjust_credits(rdata->server, &rdata->credits, rdata->subreq.len); 198 - if (!rc) { 199 - if (rdata->req->cfile->invalidHandle) 200 - rc = -EAGAIN; 201 - else 202 - rc = rdata->server->ops->async_readv(rdata); 203 - } 204 - 205 + rc = rdata->server->ops->async_readv(rdata); 205 206 out: 206 207 if (rc) 207 208 netfs_subreq_terminated(subreq, rc, false); ··· 228 245 229 246 rreq->rsize = cifs_sb->ctx->rsize; 230 247 rreq->wsize = cifs_sb->ctx->wsize; 248 + req->pid = current->tgid; // Ummm... This may be a workqueue 231 249 232 250 if (file) { 233 251 open_file = file->private_data; 234 252 rreq->netfs_priv = file->private_data; 235 253 req->cfile = cifsFileInfo_get(open_file); 254 + req->server = cifs_pick_channel(tlink_tcon(req->cfile->tlink)->ses); 255 + if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_RWPIDFORWARD) 256 + req->pid = req->cfile->pid; 236 257 } else if (rreq->origin != NETFS_WRITEBACK) { 237 258 WARN_ON_ONCE(1); 238 259 return -EIO; ··· 3186 3199 static int cifs_swap_rw(struct kiocb *iocb, struct iov_iter *iter) 3187 3200 { 3188 3201 ssize_t ret; 3189 - 3190 - WARN_ON_ONCE(iov_iter_count(iter) != PAGE_SIZE); 3191 3202 3192 3203 if (iov_iter_rw(iter) == READ) 3193 3204 ret = netfs_unbuffered_read_iter_locked(iocb, iter);
+14 -5
fs/smb/client/smb2pdu.c
··· 4484 4484 return rc; 4485 4485 } 4486 4486 4487 + static void smb2_readv_worker(struct work_struct *work) 4488 + { 4489 + struct cifs_io_subrequest *rdata = 4490 + container_of(work, struct cifs_io_subrequest, subreq.work); 4491 + 4492 + netfs_subreq_terminated(&rdata->subreq, 4493 + (rdata->result == 0 || rdata->result == -EAGAIN) ? 4494 + rdata->got_bytes : rdata->result, true); 4495 + } 4496 + 4487 4497 static void 4488 4498 smb2_readv_callback(struct mid_q_entry *mid) 4489 4499 { ··· 4588 4578 rdata->result = 0; 4589 4579 } 4590 4580 rdata->credits.value = 0; 4591 - netfs_subreq_terminated(&rdata->subreq, 4592 - (rdata->result == 0 || rdata->result == -EAGAIN) ? 4593 - rdata->got_bytes : rdata->result, true); 4581 + INIT_WORK(&rdata->subreq.work, smb2_readv_worker); 4582 + queue_work(cifsiod_wq, &rdata->subreq.work); 4594 4583 release_mid(mid); 4595 4584 add_credits(server, &credits, 0); 4596 4585 } ··· 4621 4612 io_parms.length = rdata->subreq.len; 4622 4613 io_parms.persistent_fid = rdata->req->cfile->fid.persistent_fid; 4623 4614 io_parms.volatile_fid = rdata->req->cfile->fid.volatile_fid; 4624 - io_parms.pid = rdata->pid; 4615 + io_parms.pid = rdata->req->pid; 4625 4616 4626 4617 rc = smb2_new_read_req( 4627 4618 (void **) &buf, &total_len, &io_parms, rdata, 0, 0); ··· 4873 4864 .length = wdata->subreq.len, 4874 4865 .persistent_fid = wdata->req->cfile->fid.persistent_fid, 4875 4866 .volatile_fid = wdata->req->cfile->fid.volatile_fid, 4876 - .pid = wdata->pid, 4867 + .pid = wdata->req->pid, 4877 4868 }; 4878 4869 io_parms = &_io_parms; 4879 4870
+19 -4
fs/xfs/xfs_inode.c
··· 2548 2548 * This buffer may not have been correctly initialised as we 2549 2549 * didn't read it from disk. That's not important because we are 2550 2550 * only using to mark the buffer as stale in the log, and to 2551 - * attach stale cached inodes on it. That means it will never be 2552 - * dispatched for IO. If it is, we want to know about it, and we 2553 - * want it to fail. We can acheive this by adding a write 2554 - * verifier to the buffer. 2551 + * attach stale cached inodes on it. 2552 + * 2553 + * For the inode that triggered the cluster freeing, this 2554 + * attachment may occur in xfs_inode_item_precommit() after we 2555 + * have marked this buffer stale. If this buffer was not in 2556 + * memory before xfs_ifree_cluster() started, it will not be 2557 + * marked XBF_DONE and this will cause problems later in 2558 + * xfs_inode_item_precommit() when we trip over a (stale, !done) 2559 + * buffer to attached to the transaction. 2560 + * 2561 + * Hence we have to mark the buffer as XFS_DONE here. This is 2562 + * safe because we are also marking the buffer as XBF_STALE and 2563 + * XFS_BLI_STALE. That means it will never be dispatched for 2564 + * IO and it won't be unlocked until the cluster freeing has 2565 + * been committed to the journal and the buffer unpinned. If it 2566 + * is written, we want to know about it, and we want it to 2567 + * fail. We can acheive this by adding a write verifier to the 2568 + * buffer. 2555 2569 */ 2570 + bp->b_flags |= XBF_DONE; 2556 2571 bp->b_ops = &xfs_inode_buf_ops; 2557 2572 2558 2573 /*
+22 -2
include/linux/i2c.h
··· 960 960 #define builtin_i2c_driver(__i2c_driver) \ 961 961 builtin_driver(__i2c_driver, i2c_add_driver) 962 962 963 - #endif /* I2C */ 964 - 965 963 /* must call put_device() when done with returned i2c_client device */ 966 964 struct i2c_client *i2c_find_device_by_fwnode(struct fwnode_handle *fwnode); 967 965 ··· 968 970 969 971 /* must call i2c_put_adapter() when done with returned i2c_adapter device */ 970 972 struct i2c_adapter *i2c_get_adapter_by_fwnode(struct fwnode_handle *fwnode); 973 + 974 + #else /* I2C */ 975 + 976 + static inline struct i2c_client * 977 + i2c_find_device_by_fwnode(struct fwnode_handle *fwnode) 978 + { 979 + return NULL; 980 + } 981 + 982 + static inline struct i2c_adapter * 983 + i2c_find_adapter_by_fwnode(struct fwnode_handle *fwnode) 984 + { 985 + return NULL; 986 + } 987 + 988 + static inline struct i2c_adapter * 989 + i2c_get_adapter_by_fwnode(struct fwnode_handle *fwnode) 990 + { 991 + return NULL; 992 + } 993 + 994 + #endif /* !I2C */ 971 995 972 996 #if IS_ENABLED(CONFIG_OF) 973 997 /* must call put_device() when done with returned i2c_client device */
+5
include/linux/mm.h
··· 406 406 #define VM_ALLOW_ANY_UNCACHED VM_NONE 407 407 #endif 408 408 409 + #ifdef CONFIG_64BIT 410 + /* VM is sealed, in vm_flags */ 411 + #define VM_SEALED _BITUL(63) 412 + #endif 413 + 409 414 /* Bits set in the VMA until the stack is in its final location */ 410 415 #define VM_STACK_INCOMPLETE_SETUP (VM_RAND_READ | VM_SEQ_READ | VM_STACK_EARLY) 411 416
+4 -5
include/linux/mmzone.h
··· 654 654 }; 655 655 656 656 /* 657 - * One per migratetype for each PAGE_ALLOC_COSTLY_ORDER. One additional list 658 - * for THP which will usually be GFP_MOVABLE. Even if it is another type, 659 - * it should not contribute to serious fragmentation causing THP allocation 660 - * failures. 657 + * One per migratetype for each PAGE_ALLOC_COSTLY_ORDER. Two additional lists 658 + * are added for THP. One PCP list is used by GPF_MOVABLE, and the other PCP list 659 + * is used by GFP_UNMOVABLE and GFP_RECLAIMABLE. 661 660 */ 662 661 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 663 - #define NR_PCP_THP 1 662 + #define NR_PCP_THP 2 664 663 #else 665 664 #define NR_PCP_THP 0 666 665 #endif
+5
include/linux/numa.h
··· 15 15 #define NUMA_NO_NODE (-1) 16 16 #define NUMA_NO_MEMBLK (-1) 17 17 18 + static inline bool numa_valid_node(int nid) 19 + { 20 + return nid >= 0 && nid < MAX_NUMNODES; 21 + } 22 + 18 23 /* optionally keep NUMA memory info available post init */ 19 24 #ifdef CONFIG_NUMA_KEEP_MEMINFO 20 25 #define __initdata_or_meminfo
+12 -9
include/linux/page-flags.h
··· 944 944 * mistaken for a page type value. 945 945 */ 946 946 947 - #define PAGE_TYPE_BASE 0xf0000000 948 - /* Reserve 0x0000007f to catch underflows of _mapcount */ 949 - #define PAGE_MAPCOUNT_RESERVE -128 950 - #define PG_buddy 0x00000080 951 - #define PG_offline 0x00000100 952 - #define PG_table 0x00000200 953 - #define PG_guard 0x00000400 954 - #define PG_hugetlb 0x00000800 955 - #define PG_slab 0x00001000 947 + enum pagetype { 948 + PG_buddy = 0x00000080, 949 + PG_offline = 0x00000100, 950 + PG_table = 0x00000200, 951 + PG_guard = 0x00000400, 952 + PG_hugetlb = 0x00000800, 953 + PG_slab = 0x00001000, 954 + 955 + PAGE_TYPE_BASE = 0xf0000000, 956 + /* Reserve 0x0000007f to catch underflows of _mapcount */ 957 + PAGE_MAPCOUNT_RESERVE = -128, 958 + }; 956 959 957 960 #define PageType(page, flag) \ 958 961 ((page->page_type & (PAGE_TYPE_BASE | flag)) == PAGE_TYPE_BASE)
+3 -2
include/linux/spi/spi.h
··· 1085 1085 unsigned dummy_data:1; 1086 1086 unsigned cs_off:1; 1087 1087 unsigned cs_change:1; 1088 - unsigned tx_nbits:3; 1089 - unsigned rx_nbits:3; 1088 + unsigned tx_nbits:4; 1089 + unsigned rx_nbits:4; 1090 1090 unsigned timestamped:1; 1091 1091 #define SPI_NBITS_SINGLE 0x01 /* 1-bit transfer */ 1092 1092 #define SPI_NBITS_DUAL 0x02 /* 2-bit transfer */ 1093 1093 #define SPI_NBITS_QUAD 0x04 /* 4-bit transfer */ 1094 + #define SPI_NBITS_OCTAL 0x08 /* 8-bit transfer */ 1094 1095 u8 bits_per_word; 1095 1096 struct spi_delay delay; 1096 1097 struct spi_delay cs_change_delay;
+1 -1
include/linux/workqueue.h
··· 95 95 WORK_BUSY_RUNNING = 1 << 1, 96 96 97 97 /* maximum string length for set_worker_desc() */ 98 - WORKER_DESC_LEN = 24, 98 + WORKER_DESC_LEN = 32, 99 99 }; 100 100 101 101 /* Convenience constants - of type 'unsigned long', not 'enum'! */
+1 -1
include/net/inet_connection_sock.h
··· 263 263 struct sock *inet_csk_reqsk_queue_add(struct sock *sk, 264 264 struct request_sock *req, 265 265 struct sock *child); 266 - void inet_csk_reqsk_queue_hash_add(struct sock *sk, struct request_sock *req, 266 + bool inet_csk_reqsk_queue_hash_add(struct sock *sk, struct request_sock *req, 267 267 unsigned long timeout); 268 268 struct sock *inet_csk_complete_hashdance(struct sock *sk, struct sock *child, 269 269 struct request_sock *req,
+5
include/net/netfilter/nf_tables.h
··· 619 619 return (void *)set->data; 620 620 } 621 621 622 + static inline enum nft_data_types nft_set_datatype(const struct nft_set *set) 623 + { 624 + return set->dtype == NFT_DATA_VERDICT ? NFT_DATA_VERDICT : NFT_DATA_VALUE; 625 + } 626 + 622 627 static inline bool nft_set_gc_is_pending(const struct nft_set *s) 623 628 { 624 629 return refcount_read(&s->refs) != 1;
+3 -1
include/scsi/scsi_devinfo.h
··· 69 69 #define BLIST_RETRY_ITF ((__force blist_flags_t)(1ULL << 32)) 70 70 /* Always retry ABORTED_COMMAND with ASC 0xc1 */ 71 71 #define BLIST_RETRY_ASC_C1 ((__force blist_flags_t)(1ULL << 33)) 72 + /* Do not query the IO Advice Hints Grouping mode page */ 73 + #define BLIST_SKIP_IO_HINTS ((__force blist_flags_t)(1ULL << 34)) 72 74 73 - #define __BLIST_LAST_USED BLIST_RETRY_ASC_C1 75 + #define __BLIST_LAST_USED BLIST_SKIP_IO_HINTS 74 76 75 77 #define __BLIST_HIGH_UNUSED (~(__BLIST_LAST_USED | \ 76 78 (__force blist_flags_t) \
+1
include/sound/dmaengine_pcm.h
··· 36 36 int snd_dmaengine_pcm_open(struct snd_pcm_substream *substream, 37 37 struct dma_chan *chan); 38 38 int snd_dmaengine_pcm_close(struct snd_pcm_substream *substream); 39 + int snd_dmaengine_pcm_sync_stop(struct snd_pcm_substream *substream); 39 40 40 41 int snd_dmaengine_pcm_open_request_chan(struct snd_pcm_substream *substream, 41 42 dma_filter_fn filter_fn, void *filter_data);
+1 -1
include/trace/events/qdisc.h
··· 81 81 TP_ARGS(q), 82 82 83 83 TP_STRUCT__entry( 84 - __string( dev, qdisc_dev(q)->name ) 84 + __string( dev, qdisc_dev(q) ? qdisc_dev(q)->name : "(null)" ) 85 85 __string( kind, q->ops->id ) 86 86 __field( u32, parent ) 87 87 __field( u32, handle )
-1
io_uring/rsrc.c
··· 1068 1068 * branch doesn't expect non PAGE_SIZE'd chunks. 1069 1069 */ 1070 1070 iter->bvec = bvec; 1071 - iter->nr_segs = bvec->bv_len; 1072 1071 iter->count -= offset; 1073 1072 iter->iov_offset = offset; 1074 1073 } else {
+14 -2
kernel/bpf/arena.c
··· 212 212 struct vma_list { 213 213 struct vm_area_struct *vma; 214 214 struct list_head head; 215 + atomic_t mmap_count; 215 216 }; 216 217 217 218 static int remember_vma(struct bpf_arena *arena, struct vm_area_struct *vma) ··· 222 221 vml = kmalloc(sizeof(*vml), GFP_KERNEL); 223 222 if (!vml) 224 223 return -ENOMEM; 224 + atomic_set(&vml->mmap_count, 1); 225 225 vma->vm_private_data = vml; 226 226 vml->vma = vma; 227 227 list_add(&vml->head, &arena->vma_list); 228 228 return 0; 229 229 } 230 230 231 + static void arena_vm_open(struct vm_area_struct *vma) 232 + { 233 + struct vma_list *vml = vma->vm_private_data; 234 + 235 + atomic_inc(&vml->mmap_count); 236 + } 237 + 231 238 static void arena_vm_close(struct vm_area_struct *vma) 232 239 { 233 240 struct bpf_map *map = vma->vm_file->private_data; 234 241 struct bpf_arena *arena = container_of(map, struct bpf_arena, map); 235 - struct vma_list *vml; 242 + struct vma_list *vml = vma->vm_private_data; 236 243 244 + if (!atomic_dec_and_test(&vml->mmap_count)) 245 + return; 237 246 guard(mutex)(&arena->lock); 238 - vml = vma->vm_private_data; 247 + /* update link list under lock */ 239 248 list_del(&vml->head); 240 249 vma->vm_private_data = NULL; 241 250 kfree(vml); ··· 298 287 } 299 288 300 289 static const struct vm_operations_struct arena_vm_ops = { 290 + .open = arena_vm_open, 301 291 .close = arena_vm_close, 302 292 .fault = arena_vm_fault, 303 293 };
+25 -6
kernel/bpf/ringbuf.c
··· 51 51 * This prevents a user-space application from modifying the 52 52 * position and ruining in-kernel tracking. The permissions of the 53 53 * pages depend on who is producing samples: user-space or the 54 - * kernel. 54 + * kernel. Note that the pending counter is placed in the same 55 + * page as the producer, so that it shares the same cache line. 55 56 * 56 57 * Kernel-producer 57 58 * --------------- ··· 71 70 */ 72 71 unsigned long consumer_pos __aligned(PAGE_SIZE); 73 72 unsigned long producer_pos __aligned(PAGE_SIZE); 73 + unsigned long pending_pos; 74 74 char data[] __aligned(PAGE_SIZE); 75 75 }; 76 76 ··· 181 179 rb->mask = data_sz - 1; 182 180 rb->consumer_pos = 0; 183 181 rb->producer_pos = 0; 182 + rb->pending_pos = 0; 184 183 185 184 return rb; 186 185 } ··· 407 404 408 405 static void *__bpf_ringbuf_reserve(struct bpf_ringbuf *rb, u64 size) 409 406 { 410 - unsigned long cons_pos, prod_pos, new_prod_pos, flags; 411 - u32 len, pg_off; 407 + unsigned long cons_pos, prod_pos, new_prod_pos, pend_pos, flags; 412 408 struct bpf_ringbuf_hdr *hdr; 409 + u32 len, pg_off, tmp_size, hdr_len; 413 410 414 411 if (unlikely(size > RINGBUF_MAX_RECORD_SZ)) 415 412 return NULL; ··· 427 424 spin_lock_irqsave(&rb->spinlock, flags); 428 425 } 429 426 427 + pend_pos = rb->pending_pos; 430 428 prod_pos = rb->producer_pos; 431 429 new_prod_pos = prod_pos + len; 432 430 433 - /* check for out of ringbuf space by ensuring producer position 434 - * doesn't advance more than (ringbuf_size - 1) ahead 431 + while (pend_pos < prod_pos) { 432 + hdr = (void *)rb->data + (pend_pos & rb->mask); 433 + hdr_len = READ_ONCE(hdr->len); 434 + if (hdr_len & BPF_RINGBUF_BUSY_BIT) 435 + break; 436 + tmp_size = hdr_len & ~BPF_RINGBUF_DISCARD_BIT; 437 + tmp_size = round_up(tmp_size + BPF_RINGBUF_HDR_SZ, 8); 438 + pend_pos += tmp_size; 439 + } 440 + rb->pending_pos = pend_pos; 441 + 442 + /* check for out of ringbuf space: 443 + * - by ensuring producer position doesn't advance more than 444 + * (ringbuf_size - 1) ahead 445 + * - by ensuring oldest not yet committed record until newest 446 + * record does not span more than (ringbuf_size - 1) 435 447 */ 436 - if (new_prod_pos - cons_pos > rb->mask) { 448 + if (new_prod_pos - cons_pos > rb->mask || 449 + new_prod_pos - pend_pos > rb->mask) { 437 450 spin_unlock_irqrestore(&rb->spinlock, flags); 438 451 return NULL; 439 452 }
+58 -3
kernel/bpf/verifier.c
··· 6236 6236 } 6237 6237 reg->u32_min_value = 0; 6238 6238 reg->u32_max_value = U32_MAX; 6239 + reg->var_off = tnum_subreg(tnum_unknown); 6239 6240 } 6240 6241 6241 6242 static void coerce_subreg_to_size_sx(struct bpf_reg_state *reg, int size) ··· 6281 6280 reg->s32_max_value = s32_max; 6282 6281 reg->u32_min_value = (u32)s32_min; 6283 6282 reg->u32_max_value = (u32)s32_max; 6283 + reg->var_off = tnum_subreg(tnum_range(s32_min, s32_max)); 6284 6284 return; 6285 6285 } 6286 6286 ··· 12721 12719 return res < a; 12722 12720 } 12723 12721 12722 + static bool signed_add16_overflows(s16 a, s16 b) 12723 + { 12724 + /* Do the add in u16, where overflow is well-defined */ 12725 + s16 res = (s16)((u16)a + (u16)b); 12726 + 12727 + if (b < 0) 12728 + return res > a; 12729 + return res < a; 12730 + } 12731 + 12724 12732 static bool signed_sub_overflows(s64 a, s64 b) 12725 12733 { 12726 12734 /* Do the sub in u64, where overflow is well-defined */ ··· 17460 17448 goto skip_inf_loop_check; 17461 17449 } 17462 17450 if (is_may_goto_insn_at(env, insn_idx)) { 17463 - if (states_equal(env, &sl->state, cur, RANGE_WITHIN)) { 17451 + if (sl->state.may_goto_depth != cur->may_goto_depth && 17452 + states_equal(env, &sl->state, cur, RANGE_WITHIN)) { 17464 17453 update_loop_entry(cur, &sl->state); 17465 17454 goto hit; 17466 17455 } 17467 - goto skip_inf_loop_check; 17468 17456 } 17469 17457 if (calls_callback(env, insn_idx)) { 17470 17458 if (states_equal(env, &sl->state, cur, RANGE_WITHIN)) ··· 18742 18730 return new_prog; 18743 18731 } 18744 18732 18733 + /* 18734 + * For all jmp insns in a given 'prog' that point to 'tgt_idx' insn adjust the 18735 + * jump offset by 'delta'. 18736 + */ 18737 + static int adjust_jmp_off(struct bpf_prog *prog, u32 tgt_idx, u32 delta) 18738 + { 18739 + struct bpf_insn *insn = prog->insnsi; 18740 + u32 insn_cnt = prog->len, i; 18741 + 18742 + for (i = 0; i < insn_cnt; i++, insn++) { 18743 + u8 code = insn->code; 18744 + 18745 + if ((BPF_CLASS(code) != BPF_JMP && BPF_CLASS(code) != BPF_JMP32) || 18746 + BPF_OP(code) == BPF_CALL || BPF_OP(code) == BPF_EXIT) 18747 + continue; 18748 + 18749 + if (insn->code == (BPF_JMP32 | BPF_JA)) { 18750 + if (i + 1 + insn->imm != tgt_idx) 18751 + continue; 18752 + if (signed_add32_overflows(insn->imm, delta)) 18753 + return -ERANGE; 18754 + insn->imm += delta; 18755 + } else { 18756 + if (i + 1 + insn->off != tgt_idx) 18757 + continue; 18758 + if (signed_add16_overflows(insn->imm, delta)) 18759 + return -ERANGE; 18760 + insn->off += delta; 18761 + } 18762 + } 18763 + return 0; 18764 + } 18765 + 18745 18766 static int adjust_subprog_starts_after_remove(struct bpf_verifier_env *env, 18746 18767 u32 off, u32 cnt) 18747 18768 { ··· 20049 20004 20050 20005 stack_depth_extra = 8; 20051 20006 insn_buf[0] = BPF_LDX_MEM(BPF_DW, BPF_REG_AX, BPF_REG_10, stack_off); 20052 - insn_buf[1] = BPF_JMP_IMM(BPF_JEQ, BPF_REG_AX, 0, insn->off + 2); 20007 + if (insn->off >= 0) 20008 + insn_buf[1] = BPF_JMP_IMM(BPF_JEQ, BPF_REG_AX, 0, insn->off + 2); 20009 + else 20010 + insn_buf[1] = BPF_JMP_IMM(BPF_JEQ, BPF_REG_AX, 0, insn->off - 1); 20053 20011 insn_buf[2] = BPF_ALU64_IMM(BPF_SUB, BPF_REG_AX, 1); 20054 20012 insn_buf[3] = BPF_STX_MEM(BPF_DW, BPF_REG_10, BPF_REG_AX, stack_off); 20055 20013 cnt = 4; ··· 20594 20546 if (!new_prog) 20595 20547 return -ENOMEM; 20596 20548 env->prog = prog = new_prog; 20549 + /* 20550 + * If may_goto is a first insn of a prog there could be a jmp 20551 + * insn that points to it, hence adjust all such jmps to point 20552 + * to insn after BPF_ST that inits may_goto count. 20553 + * Adjustment will succeed because bpf_patch_insn_data() didn't fail. 20554 + */ 20555 + WARN_ON(adjust_jmp_off(env->prog, subprog_start, 1)); 20597 20556 } 20598 20557 20599 20558 /* Since poke tab is now finalized, publish aux to tracker. */
+34 -17
kernel/workqueue.c
··· 125 125 HIGHPRI_NICE_LEVEL = MIN_NICE, 126 126 127 127 WQ_NAME_LEN = 32, 128 + WORKER_ID_LEN = 10 + WQ_NAME_LEN, /* "kworker/R-" + WQ_NAME_LEN */ 128 129 }; 129 130 130 131 /* ··· 2743 2742 complete(detach_completion); 2744 2743 } 2745 2744 2745 + static int format_worker_id(char *buf, size_t size, struct worker *worker, 2746 + struct worker_pool *pool) 2747 + { 2748 + if (worker->rescue_wq) 2749 + return scnprintf(buf, size, "kworker/R-%s", 2750 + worker->rescue_wq->name); 2751 + 2752 + if (pool) { 2753 + if (pool->cpu >= 0) 2754 + return scnprintf(buf, size, "kworker/%d:%d%s", 2755 + pool->cpu, worker->id, 2756 + pool->attrs->nice < 0 ? "H" : ""); 2757 + else 2758 + return scnprintf(buf, size, "kworker/u%d:%d", 2759 + pool->id, worker->id); 2760 + } else { 2761 + return scnprintf(buf, size, "kworker/dying"); 2762 + } 2763 + } 2764 + 2746 2765 /** 2747 2766 * create_worker - create a new workqueue worker 2748 2767 * @pool: pool the new worker will belong to ··· 2779 2758 { 2780 2759 struct worker *worker; 2781 2760 int id; 2782 - char id_buf[23]; 2783 2761 2784 2762 /* ID is needed to determine kthread name */ 2785 2763 id = ida_alloc(&pool->worker_ida, GFP_KERNEL); ··· 2797 2777 worker->id = id; 2798 2778 2799 2779 if (!(pool->flags & POOL_BH)) { 2800 - if (pool->cpu >= 0) 2801 - snprintf(id_buf, sizeof(id_buf), "%d:%d%s", pool->cpu, id, 2802 - pool->attrs->nice < 0 ? "H" : ""); 2803 - else 2804 - snprintf(id_buf, sizeof(id_buf), "u%d:%d", pool->id, id); 2780 + char id_buf[WORKER_ID_LEN]; 2805 2781 2782 + format_worker_id(id_buf, sizeof(id_buf), worker, pool); 2806 2783 worker->task = kthread_create_on_node(worker_thread, worker, 2807 - pool->node, "kworker/%s", id_buf); 2784 + pool->node, "%s", id_buf); 2808 2785 if (IS_ERR(worker->task)) { 2809 2786 if (PTR_ERR(worker->task) == -EINTR) { 2810 - pr_err("workqueue: Interrupted when creating a worker thread \"kworker/%s\"\n", 2787 + pr_err("workqueue: Interrupted when creating a worker thread \"%s\"\n", 2811 2788 id_buf); 2812 2789 } else { 2813 2790 pr_err_once("workqueue: Failed to create a worker thread: %pe", ··· 3367 3350 raw_spin_unlock_irq(&pool->lock); 3368 3351 set_pf_worker(false); 3369 3352 3370 - set_task_comm(worker->task, "kworker/dying"); 3371 3353 ida_free(&pool->worker_ida, worker->id); 3372 3354 worker_detach_from_pool(worker); 3373 3355 WARN_ON_ONCE(!list_empty(&worker->entry)); ··· 5558 5542 static int init_rescuer(struct workqueue_struct *wq) 5559 5543 { 5560 5544 struct worker *rescuer; 5545 + char id_buf[WORKER_ID_LEN]; 5561 5546 int ret; 5562 5547 5563 5548 if (!(wq->flags & WQ_MEM_RECLAIM)) ··· 5572 5555 } 5573 5556 5574 5557 rescuer->rescue_wq = wq; 5575 - rescuer->task = kthread_create(rescuer_thread, rescuer, "kworker/R-%s", wq->name); 5558 + format_worker_id(id_buf, sizeof(id_buf), rescuer, NULL); 5559 + 5560 + rescuer->task = kthread_create(rescuer_thread, rescuer, "%s", id_buf); 5576 5561 if (IS_ERR(rescuer->task)) { 5577 5562 ret = PTR_ERR(rescuer->task); 5578 5563 pr_err("workqueue: Failed to create a rescuer kthread for wq \"%s\": %pe", ··· 6403 6384 /* used to show worker information through /proc/PID/{comm,stat,status} */ 6404 6385 void wq_worker_comm(char *buf, size_t size, struct task_struct *task) 6405 6386 { 6406 - int off; 6407 - 6408 - /* always show the actual comm */ 6409 - off = strscpy(buf, task->comm, size); 6410 - if (off < 0) 6411 - return; 6412 - 6413 6387 /* stabilize PF_WQ_WORKER and worker pool association */ 6414 6388 mutex_lock(&wq_pool_attach_mutex); 6415 6389 6416 6390 if (task->flags & PF_WQ_WORKER) { 6417 6391 struct worker *worker = kthread_data(task); 6418 6392 struct worker_pool *pool = worker->pool; 6393 + int off; 6394 + 6395 + off = format_worker_id(buf, size, worker, pool); 6419 6396 6420 6397 if (pool) { 6421 6398 raw_spin_lock_irq(&pool->lock); ··· 6430 6415 } 6431 6416 raw_spin_unlock_irq(&pool->lock); 6432 6417 } 6418 + } else { 6419 + strscpy(buf, task->comm, size); 6433 6420 } 6434 6421 6435 6422 mutex_unlock(&wq_pool_attach_mutex);
+8 -2
lib/closure.c
··· 17 17 { 18 18 int r = flags & CLOSURE_REMAINING_MASK; 19 19 20 - BUG_ON(flags & CLOSURE_GUARD_MASK); 21 - BUG_ON(!r && (flags & ~CLOSURE_DESTRUCTOR)); 20 + if (WARN(flags & CLOSURE_GUARD_MASK, 21 + "closure has guard bits set: %x (%u)", 22 + flags & CLOSURE_GUARD_MASK, (unsigned) __fls(r))) 23 + r &= ~CLOSURE_GUARD_MASK; 22 24 23 25 if (!r) { 24 26 smp_acquire__after_ctrl_dep(); 27 + 28 + WARN(flags & ~CLOSURE_DESTRUCTOR, 29 + "closure ref hit 0 with incorrect flags set: %x (%u)", 30 + flags & ~CLOSURE_DESTRUCTOR, (unsigned) __fls(flags)); 25 31 26 32 cl->closure_get_happened = false; 27 33
+9 -2
mm/compaction.c
··· 79 79 #define COMPACTION_HPAGE_ORDER (PMD_SHIFT - PAGE_SHIFT) 80 80 #endif 81 81 82 + static struct page *mark_allocated_noprof(struct page *page, unsigned int order, gfp_t gfp_flags) 83 + { 84 + post_alloc_hook(page, order, __GFP_MOVABLE); 85 + return page; 86 + } 87 + #define mark_allocated(...) alloc_hooks(mark_allocated_noprof(__VA_ARGS__)) 88 + 82 89 static void split_map_pages(struct list_head *freepages) 83 90 { 84 91 unsigned int i, order; ··· 100 93 101 94 nr_pages = 1 << order; 102 95 103 - post_alloc_hook(page, order, __GFP_MOVABLE); 96 + mark_allocated(page, order, __GFP_MOVABLE); 104 97 if (order) 105 98 split_page(page, order); 106 99 ··· 129 122 * Convert free pages into post allocation pages, so 130 123 * that we can free them via __free_page. 131 124 */ 132 - post_alloc_hook(page, order, __GFP_MOVABLE); 125 + mark_allocated(page, order, __GFP_MOVABLE); 133 126 __free_pages(page, order); 134 127 if (pfn > high_pfn) 135 128 high_pfn = pfn;
-5
mm/internal.h
··· 1435 1435 int priority); 1436 1436 1437 1437 #ifdef CONFIG_64BIT 1438 - /* VM is sealed, in vm_flags */ 1439 - #define VM_SEALED _BITUL(63) 1440 - #endif 1441 - 1442 - #ifdef CONFIG_64BIT 1443 1438 static inline int can_do_mseal(unsigned long flags) 1444 1439 { 1445 1440 if (flags)
+1 -1
mm/kasan/common.c
··· 532 532 return; 533 533 534 534 /* Unpoison the object and save alloc info for non-kmalloc() allocations. */ 535 - unpoison_slab_object(slab->slab_cache, ptr, size, flags); 535 + unpoison_slab_object(slab->slab_cache, ptr, flags, false); 536 536 537 537 /* Poison the redzone and save alloc info for kmalloc() allocations. */ 538 538 if (is_kmalloc_cache(slab->slab_cache))
+7 -21
mm/memblock.c
··· 754 754 755 755 /* calculate lose page */ 756 756 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, &nid) { 757 - if (nid == NUMA_NO_NODE) 757 + if (!numa_valid_node(nid)) 758 758 nr_pages += end_pfn - start_pfn; 759 759 } 760 760 ··· 1061 1061 return false; 1062 1062 1063 1063 /* only memory regions are associated with nodes, check it */ 1064 - if (nid != NUMA_NO_NODE && nid != m_nid) 1064 + if (numa_valid_node(nid) && nid != m_nid) 1065 1065 return true; 1066 1066 1067 1067 /* skip hotpluggable memory regions if needed */ ··· 1117 1117 { 1118 1118 int idx_a = *idx & 0xffffffff; 1119 1119 int idx_b = *idx >> 32; 1120 - 1121 - if (WARN_ONCE(nid == MAX_NUMNODES, 1122 - "Usage of MAX_NUMNODES is deprecated. Use NUMA_NO_NODE instead\n")) 1123 - nid = NUMA_NO_NODE; 1124 1120 1125 1121 for (; idx_a < type_a->cnt; idx_a++) { 1126 1122 struct memblock_region *m = &type_a->regions[idx_a]; ··· 1211 1215 int idx_a = *idx & 0xffffffff; 1212 1216 int idx_b = *idx >> 32; 1213 1217 1214 - if (WARN_ONCE(nid == MAX_NUMNODES, "Usage of MAX_NUMNODES is deprecated. Use NUMA_NO_NODE instead\n")) 1215 - nid = NUMA_NO_NODE; 1216 - 1217 1218 if (*idx == (u64)ULLONG_MAX) { 1218 1219 idx_a = type_a->cnt - 1; 1219 1220 if (type_b != NULL) ··· 1296 1303 1297 1304 if (PFN_UP(r->base) >= PFN_DOWN(r->base + r->size)) 1298 1305 continue; 1299 - if (nid == MAX_NUMNODES || nid == r_nid) 1306 + if (!numa_valid_node(nid) || nid == r_nid) 1300 1307 break; 1301 1308 } 1302 1309 if (*idx >= type->cnt) { ··· 1331 1338 #ifdef CONFIG_NUMA 1332 1339 int start_rgn, end_rgn; 1333 1340 int i, ret; 1334 - 1335 - if (WARN_ONCE(nid == MAX_NUMNODES, 1336 - "Usage of MAX_NUMNODES is deprecated. Use NUMA_NO_NODE instead\n")) 1337 - nid = NUMA_NO_NODE; 1338 1341 1339 1342 ret = memblock_isolate_range(type, base, size, &start_rgn, &end_rgn); 1340 1343 if (ret) ··· 1441 1452 enum memblock_flags flags = choose_memblock_flags(); 1442 1453 phys_addr_t found; 1443 1454 1444 - if (WARN_ONCE(nid == MAX_NUMNODES, "Usage of MAX_NUMNODES is deprecated. Use NUMA_NO_NODE instead\n")) 1445 - nid = NUMA_NO_NODE; 1446 - 1447 1455 if (!align) { 1448 1456 /* Can't use WARNs this early in boot on powerpc */ 1449 1457 dump_stack(); ··· 1453 1467 if (found && !memblock_reserve(found, size)) 1454 1468 goto done; 1455 1469 1456 - if (nid != NUMA_NO_NODE && !exact_nid) { 1470 + if (numa_valid_node(nid) && !exact_nid) { 1457 1471 found = memblock_find_in_range_node(size, align, start, 1458 1472 end, NUMA_NO_NODE, 1459 1473 flags); ··· 1973 1987 end = base + size - 1; 1974 1988 flags = rgn->flags; 1975 1989 #ifdef CONFIG_NUMA 1976 - if (memblock_get_region_node(rgn) != MAX_NUMNODES) 1990 + if (numa_valid_node(memblock_get_region_node(rgn))) 1977 1991 snprintf(nid_buf, sizeof(nid_buf), " on node %d", 1978 1992 memblock_get_region_node(rgn)); 1979 1993 #endif ··· 2167 2181 start = region->base; 2168 2182 end = start + region->size; 2169 2183 2170 - if (nid == NUMA_NO_NODE || nid >= MAX_NUMNODES) 2184 + if (!numa_valid_node(nid)) 2171 2185 nid = early_pfn_to_nid(PFN_DOWN(start)); 2172 2186 2173 2187 reserve_bootmem_region(start, end, nid); ··· 2258 2272 2259 2273 seq_printf(m, "%4d: ", i); 2260 2274 seq_printf(m, "%pa..%pa ", &reg->base, &end); 2261 - if (nid != MAX_NUMNODES) 2275 + if (numa_valid_node(nid)) 2262 2276 seq_printf(m, "%4d ", nid); 2263 2277 else 2264 2278 seq_printf(m, "%4c ", 'x');
+2 -1
mm/memory.c
··· 4608 4608 if (!thp_vma_suitable_order(vma, haddr, PMD_ORDER)) 4609 4609 return ret; 4610 4610 4611 - if (page != &folio->page || folio_order(folio) != HPAGE_PMD_ORDER) 4611 + if (folio_order(folio) != HPAGE_PMD_ORDER) 4612 4612 return ret; 4613 + page = &folio->page; 4613 4614 4614 4615 /* 4615 4616 * Just backoff if any subpage of a THP is corrupted otherwise
+5
mm/migrate.c
··· 1659 1659 * migrate_pages() may report success with (split but 1660 1660 * unmigrated) pages still on its fromlist; whereas it 1661 1661 * always reports success when its fromlist is empty. 1662 + * stats->nr_thp_failed should be increased too, 1663 + * otherwise stats inconsistency will happen when 1664 + * migrate_pages_batch is called via migrate_pages() 1665 + * with MIGRATE_SYNC and MIGRATE_ASYNC. 1662 1666 * 1663 1667 * Only check it without removing it from the list. 1664 1668 * Since the folio can be on deferred_split_scan() ··· 1679 1675 !list_empty(&folio->_deferred_list)) { 1680 1676 if (try_split_folio(folio, split_folios) == 0) { 1681 1677 nr_failed++; 1678 + stats->nr_thp_failed += is_thp; 1682 1679 stats->nr_thp_split += is_thp; 1683 1680 stats->nr_split++; 1684 1681 continue;
+7 -2
mm/page_alloc.c
··· 504 504 505 505 static inline unsigned int order_to_pindex(int migratetype, int order) 506 506 { 507 + bool __maybe_unused movable; 508 + 507 509 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 508 510 if (order > PAGE_ALLOC_COSTLY_ORDER) { 509 511 VM_BUG_ON(order != HPAGE_PMD_ORDER); 510 - return NR_LOWORDER_PCP_LISTS; 512 + 513 + movable = migratetype == MIGRATE_MOVABLE; 514 + 515 + return NR_LOWORDER_PCP_LISTS + movable; 511 516 } 512 517 #else 513 518 VM_BUG_ON(order > PAGE_ALLOC_COSTLY_ORDER); ··· 526 521 int order = pindex / MIGRATE_PCPTYPES; 527 522 528 523 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 529 - if (pindex == NR_LOWORDER_PCP_LISTS) 524 + if (pindex >= NR_LOWORDER_PCP_LISTS) 530 525 order = HPAGE_PMD_ORDER; 531 526 #else 532 527 VM_BUG_ON(order > PAGE_ALLOC_COSTLY_ORDER);
+5 -4
mm/slub.c
··· 3902 3902 unsigned int orig_size) 3903 3903 { 3904 3904 unsigned int zero_size = s->object_size; 3905 - struct slabobj_ext *obj_exts; 3906 3905 bool kasan_init = init; 3907 3906 size_t i; 3908 3907 gfp_t init_flags = flags & gfp_allowed_mask; ··· 3944 3945 kmemleak_alloc_recursive(p[i], s->object_size, 1, 3945 3946 s->flags, init_flags); 3946 3947 kmsan_slab_alloc(s, p[i], init_flags); 3947 - if (need_slab_obj_ext()) { 3948 - obj_exts = prepare_slab_obj_exts_hook(s, flags, p[i]); 3949 3948 #ifdef CONFIG_MEM_ALLOC_PROFILING 3949 + if (need_slab_obj_ext()) { 3950 + struct slabobj_ext *obj_exts; 3951 + 3952 + obj_exts = prepare_slab_obj_exts_hook(s, flags, p[i]); 3950 3953 /* 3951 3954 * Currently obj_exts is used only for allocation profiling. 3952 3955 * If other users appear then mem_alloc_profiling_enabled() ··· 3956 3955 */ 3957 3956 if (likely(obj_exts)) 3958 3957 alloc_tag_add(&obj_exts->ref, current->alloc_tag, s->size); 3959 - #endif 3960 3958 } 3959 + #endif 3961 3960 } 3962 3961 3963 3962 return memcg_slab_post_alloc_hook(s, lru, flags, size, p);
+15 -6
mm/vmalloc.c
··· 2498 2498 struct list_head free_list; 2499 2499 struct rcu_head rcu_head; 2500 2500 struct list_head purge; 2501 + unsigned int cpu; 2501 2502 }; 2502 2503 2503 2504 /* Queue of free and dirty vmap blocks, for allocation and flushing purposes */ ··· 2626 2625 free_vmap_area(va); 2627 2626 return ERR_PTR(err); 2628 2627 } 2629 - 2630 - vbq = raw_cpu_ptr(&vmap_block_queue); 2628 + /* 2629 + * list_add_tail_rcu could happened in another core 2630 + * rather than vb->cpu due to task migration, which 2631 + * is safe as list_add_tail_rcu will ensure the list's 2632 + * integrity together with list_for_each_rcu from read 2633 + * side. 2634 + */ 2635 + vb->cpu = raw_smp_processor_id(); 2636 + vbq = per_cpu_ptr(&vmap_block_queue, vb->cpu); 2631 2637 spin_lock(&vbq->lock); 2632 2638 list_add_tail_rcu(&vb->free_list, &vbq->free); 2633 2639 spin_unlock(&vbq->lock); ··· 2662 2654 } 2663 2655 2664 2656 static bool purge_fragmented_block(struct vmap_block *vb, 2665 - struct vmap_block_queue *vbq, struct list_head *purge_list, 2666 - bool force_purge) 2657 + struct list_head *purge_list, bool force_purge) 2667 2658 { 2659 + struct vmap_block_queue *vbq = &per_cpu(vmap_block_queue, vb->cpu); 2660 + 2668 2661 if (vb->free + vb->dirty != VMAP_BBMAP_BITS || 2669 2662 vb->dirty == VMAP_BBMAP_BITS) 2670 2663 return false; ··· 2713 2704 continue; 2714 2705 2715 2706 spin_lock(&vb->lock); 2716 - purge_fragmented_block(vb, vbq, &purge, true); 2707 + purge_fragmented_block(vb, &purge, true); 2717 2708 spin_unlock(&vb->lock); 2718 2709 } 2719 2710 rcu_read_unlock(); ··· 2850 2841 * not purgeable, check whether there is dirty 2851 2842 * space to be flushed. 2852 2843 */ 2853 - if (!purge_fragmented_block(vb, vbq, &purge_list, false) && 2844 + if (!purge_fragmented_block(vb, &purge_list, false) && 2854 2845 vb->dirty_max && vb->dirty != VMAP_BBMAP_BITS) { 2855 2846 unsigned long va_start = vb->va->va_start; 2856 2847 unsigned long s, e;
+27
net/batman-adv/originator.c
··· 12 12 #include <linux/errno.h> 13 13 #include <linux/etherdevice.h> 14 14 #include <linux/gfp.h> 15 + #include <linux/if_vlan.h> 15 16 #include <linux/jiffies.h> 16 17 #include <linux/kref.h> 17 18 #include <linux/list.h> ··· 133 132 } 134 133 135 134 /** 135 + * batadv_vlan_id_valid() - check if vlan id is in valid batman-adv encoding 136 + * @vid: the VLAN identifier 137 + * 138 + * Return: true when either no vlan is set or if VLAN is in correct range, 139 + * false otherwise 140 + */ 141 + static bool batadv_vlan_id_valid(unsigned short vid) 142 + { 143 + unsigned short non_vlan = vid & ~(BATADV_VLAN_HAS_TAG | VLAN_VID_MASK); 144 + 145 + if (vid == 0) 146 + return true; 147 + 148 + if (!(vid & BATADV_VLAN_HAS_TAG)) 149 + return false; 150 + 151 + if (non_vlan) 152 + return false; 153 + 154 + return true; 155 + } 156 + 157 + /** 136 158 * batadv_orig_node_vlan_new() - search and possibly create an orig_node_vlan 137 159 * object 138 160 * @orig_node: the originator serving the VLAN ··· 172 148 unsigned short vid) 173 149 { 174 150 struct batadv_orig_node_vlan *vlan; 151 + 152 + if (!batadv_vlan_id_valid(vid)) 153 + return NULL; 175 154 176 155 spin_lock_bh(&orig_node->vlan_list_lock); 177 156
+44 -3
net/batman-adv/translation-table.c
··· 209 209 } 210 210 211 211 /** 212 + * batadv_tt_local_entry_free_rcu() - free the tt_local_entry 213 + * @rcu: rcu pointer of the tt_local_entry 214 + */ 215 + static void batadv_tt_local_entry_free_rcu(struct rcu_head *rcu) 216 + { 217 + struct batadv_tt_local_entry *tt_local_entry; 218 + 219 + tt_local_entry = container_of(rcu, struct batadv_tt_local_entry, 220 + common.rcu); 221 + 222 + kmem_cache_free(batadv_tl_cache, tt_local_entry); 223 + } 224 + 225 + /** 212 226 * batadv_tt_local_entry_release() - release tt_local_entry from lists and queue 213 227 * for free after rcu grace period 214 228 * @ref: kref pointer of the nc_node ··· 236 222 237 223 batadv_softif_vlan_put(tt_local_entry->vlan); 238 224 239 - kfree_rcu(tt_local_entry, common.rcu); 225 + call_rcu(&tt_local_entry->common.rcu, batadv_tt_local_entry_free_rcu); 240 226 } 241 227 242 228 /** ··· 255 241 } 256 242 257 243 /** 244 + * batadv_tt_global_entry_free_rcu() - free the tt_global_entry 245 + * @rcu: rcu pointer of the tt_global_entry 246 + */ 247 + static void batadv_tt_global_entry_free_rcu(struct rcu_head *rcu) 248 + { 249 + struct batadv_tt_global_entry *tt_global_entry; 250 + 251 + tt_global_entry = container_of(rcu, struct batadv_tt_global_entry, 252 + common.rcu); 253 + 254 + kmem_cache_free(batadv_tg_cache, tt_global_entry); 255 + } 256 + 257 + /** 258 258 * batadv_tt_global_entry_release() - release tt_global_entry from lists and 259 259 * queue for free after rcu grace period 260 260 * @ref: kref pointer of the nc_node ··· 282 254 283 255 batadv_tt_global_del_orig_list(tt_global_entry); 284 256 285 - kfree_rcu(tt_global_entry, common.rcu); 257 + call_rcu(&tt_global_entry->common.rcu, batadv_tt_global_entry_free_rcu); 286 258 } 287 259 288 260 /** ··· 408 380 } 409 381 410 382 /** 383 + * batadv_tt_orig_list_entry_free_rcu() - free the orig_entry 384 + * @rcu: rcu pointer of the orig_entry 385 + */ 386 + static void batadv_tt_orig_list_entry_free_rcu(struct rcu_head *rcu) 387 + { 388 + struct batadv_tt_orig_list_entry *orig_entry; 389 + 390 + orig_entry = container_of(rcu, struct batadv_tt_orig_list_entry, rcu); 391 + 392 + kmem_cache_free(batadv_tt_orig_cache, orig_entry); 393 + } 394 + 395 + /** 411 396 * batadv_tt_orig_list_entry_release() - release tt orig entry from lists and 412 397 * queue for free after rcu grace period 413 398 * @ref: kref pointer of the tt orig entry ··· 433 392 refcount); 434 393 435 394 batadv_orig_node_put(orig_entry->orig_node); 436 - kfree_rcu(orig_entry, rcu); 395 + call_rcu(&orig_entry->rcu, batadv_tt_orig_list_entry_free_rcu); 437 396 } 438 397 439 398 /**
+1 -5
net/can/j1939/main.c
··· 30 30 /* CAN_HDR: #bytes before can_frame data part */ 31 31 #define J1939_CAN_HDR (offsetof(struct can_frame, data)) 32 32 33 - /* CAN_FTR: #bytes beyond data part */ 34 - #define J1939_CAN_FTR (sizeof(struct can_frame) - J1939_CAN_HDR - \ 35 - sizeof(((struct can_frame *)0)->data)) 36 - 37 33 /* lowest layer */ 38 34 static void j1939_can_recv(struct sk_buff *iskb, void *data) 39 35 { ··· 338 342 memset(cf, 0, J1939_CAN_HDR); 339 343 340 344 /* make it a full can frame again */ 341 - skb_put(skb, J1939_CAN_FTR + (8 - dlc)); 345 + skb_put_zero(skb, 8 - dlc); 342 346 343 347 canid = CAN_EFF_FLAG | 344 348 (skcb->priority << 26) |
+19 -2
net/can/j1939/transport.c
··· 1593 1593 struct j1939_sk_buff_cb skcb = *j1939_skb_to_cb(skb); 1594 1594 struct j1939_session *session; 1595 1595 const u8 *dat; 1596 + int len, ret; 1596 1597 pgn_t pgn; 1597 - int len; 1598 1598 1599 1599 netdev_dbg(priv->ndev, "%s\n", __func__); 1600 1600 ··· 1653 1653 session->tskey = priv->rx_tskey++; 1654 1654 j1939_sk_errqueue(session, J1939_ERRQUEUE_RX_RTS); 1655 1655 1656 - WARN_ON_ONCE(j1939_session_activate(session)); 1656 + ret = j1939_session_activate(session); 1657 + if (ret) { 1658 + /* Entering this scope indicates an issue with the J1939 bus. 1659 + * Possible scenarios include: 1660 + * - A time lapse occurred, and a new session was initiated 1661 + * due to another packet being sent correctly. This could 1662 + * have been caused by too long interrupt, debugger, or being 1663 + * out-scheduled by another task. 1664 + * - The bus is receiving numerous erroneous packets, either 1665 + * from a malfunctioning device or during a test scenario. 1666 + */ 1667 + netdev_alert(priv->ndev, "%s: 0x%p: concurrent session with same addr (%02x %02x) is already active.\n", 1668 + __func__, session, skcb.addr.sa, skcb.addr.da); 1669 + j1939_session_put(session); 1670 + return NULL; 1671 + } 1657 1672 1658 1673 return session; 1659 1674 } ··· 1696 1681 1697 1682 j1939_session_timers_cancel(session); 1698 1683 j1939_session_cancel(session, J1939_XTP_ABORT_BUSY); 1684 + if (session->transmission) 1685 + j1939_session_deactivate_activate_next(session); 1699 1686 1700 1687 return -EBUSY; 1701 1688 }
+6 -6
net/core/dev.c
··· 1228 1228 1229 1229 memcpy(oldname, dev->name, IFNAMSIZ); 1230 1230 1231 - write_seqlock(&netdev_rename_lock); 1231 + write_seqlock_bh(&netdev_rename_lock); 1232 1232 err = dev_get_valid_name(net, dev, newname); 1233 - write_sequnlock(&netdev_rename_lock); 1233 + write_sequnlock_bh(&netdev_rename_lock); 1234 1234 1235 1235 if (err < 0) { 1236 1236 up_write(&devnet_rename_sem); ··· 1271 1271 if (err >= 0) { 1272 1272 err = ret; 1273 1273 down_write(&devnet_rename_sem); 1274 - write_seqlock(&netdev_rename_lock); 1274 + write_seqlock_bh(&netdev_rename_lock); 1275 1275 memcpy(dev->name, oldname, IFNAMSIZ); 1276 - write_sequnlock(&netdev_rename_lock); 1276 + write_sequnlock_bh(&netdev_rename_lock); 1277 1277 memcpy(oldname, newname, IFNAMSIZ); 1278 1278 WRITE_ONCE(dev->name_assign_type, old_assign_type); 1279 1279 old_assign_type = NET_NAME_RENAMED; ··· 11520 11520 11521 11521 if (new_name[0]) { 11522 11522 /* Rename the netdev to prepared name */ 11523 - write_seqlock(&netdev_rename_lock); 11523 + write_seqlock_bh(&netdev_rename_lock); 11524 11524 strscpy(dev->name, new_name, IFNAMSIZ); 11525 - write_sequnlock(&netdev_rename_lock); 11525 + write_sequnlock_bh(&netdev_rename_lock); 11526 11526 } 11527 11527 11528 11528 /* Fixup kobjects */
+1 -3
net/core/xdp.c
··· 295 295 mutex_lock(&mem_id_lock); 296 296 ret = __mem_id_init_hash_table(); 297 297 mutex_unlock(&mem_id_lock); 298 - if (ret < 0) { 299 - WARN_ON(1); 298 + if (ret < 0) 300 299 return ERR_PTR(ret); 301 - } 302 300 } 303 301 304 302 xdp_alloc = kzalloc(sizeof(*xdp_alloc), gfp);
+5 -2
net/dccp/ipv4.c
··· 657 657 if (dccp_v4_send_response(sk, req)) 658 658 goto drop_and_free; 659 659 660 - inet_csk_reqsk_queue_hash_add(sk, req, DCCP_TIMEOUT_INIT); 661 - reqsk_put(req); 660 + if (unlikely(!inet_csk_reqsk_queue_hash_add(sk, req, DCCP_TIMEOUT_INIT))) 661 + reqsk_free(req); 662 + else 663 + reqsk_put(req); 664 + 662 665 return 0; 663 666 664 667 drop_and_free:
+5 -2
net/dccp/ipv6.c
··· 400 400 if (dccp_v6_send_response(sk, req)) 401 401 goto drop_and_free; 402 402 403 - inet_csk_reqsk_queue_hash_add(sk, req, DCCP_TIMEOUT_INIT); 404 - reqsk_put(req); 403 + if (unlikely(!inet_csk_reqsk_queue_hash_add(sk, req, DCCP_TIMEOUT_INIT))) 404 + reqsk_free(req); 405 + else 406 + reqsk_put(req); 407 + 405 408 return 0; 406 409 407 410 drop_and_free:
+13 -4
net/ipv4/inet_connection_sock.c
··· 1180 1180 inet_csk_reqsk_queue_drop_and_put(oreq->rsk_listener, oreq); 1181 1181 } 1182 1182 1183 - static void reqsk_queue_hash_req(struct request_sock *req, 1183 + static bool reqsk_queue_hash_req(struct request_sock *req, 1184 1184 unsigned long timeout) 1185 1185 { 1186 + bool found_dup_sk = false; 1187 + 1188 + if (!inet_ehash_insert(req_to_sk(req), NULL, &found_dup_sk)) 1189 + return false; 1190 + 1191 + /* The timer needs to be setup after a successful insertion. */ 1186 1192 timer_setup(&req->rsk_timer, reqsk_timer_handler, TIMER_PINNED); 1187 1193 mod_timer(&req->rsk_timer, jiffies + timeout); 1188 1194 1189 - inet_ehash_insert(req_to_sk(req), NULL, NULL); 1190 1195 /* before letting lookups find us, make sure all req fields 1191 1196 * are committed to memory and refcnt initialized. 1192 1197 */ 1193 1198 smp_wmb(); 1194 1199 refcount_set(&req->rsk_refcnt, 2 + 1); 1200 + return true; 1195 1201 } 1196 1202 1197 - void inet_csk_reqsk_queue_hash_add(struct sock *sk, struct request_sock *req, 1203 + bool inet_csk_reqsk_queue_hash_add(struct sock *sk, struct request_sock *req, 1198 1204 unsigned long timeout) 1199 1205 { 1200 - reqsk_queue_hash_req(req, timeout); 1206 + if (!reqsk_queue_hash_req(req, timeout)) 1207 + return false; 1208 + 1201 1209 inet_csk_reqsk_queue_added(sk); 1210 + return true; 1202 1211 } 1203 1212 EXPORT_SYMBOL_GPL(inet_csk_reqsk_queue_hash_add); 1204 1213
+33 -12
net/ipv4/tcp_input.c
··· 2782 2782 NET_INC_STATS(sock_net(sk), LINUX_MIB_TCPMTUPSUCCESS); 2783 2783 } 2784 2784 2785 + /* Sometimes we deduce that packets have been dropped due to reasons other than 2786 + * congestion, like path MTU reductions or failed client TFO attempts. In these 2787 + * cases we call this function to retransmit as many packets as cwnd allows, 2788 + * without reducing cwnd. Given that retransmits will set retrans_stamp to a 2789 + * non-zero value (and may do so in a later calling context due to TSQ), we 2790 + * also enter CA_Loss so that we track when all retransmitted packets are ACKed 2791 + * and clear retrans_stamp when that happens (to ensure later recurring RTOs 2792 + * are using the correct retrans_stamp and don't declare ETIMEDOUT 2793 + * prematurely). 2794 + */ 2795 + static void tcp_non_congestion_loss_retransmit(struct sock *sk) 2796 + { 2797 + const struct inet_connection_sock *icsk = inet_csk(sk); 2798 + struct tcp_sock *tp = tcp_sk(sk); 2799 + 2800 + if (icsk->icsk_ca_state != TCP_CA_Loss) { 2801 + tp->high_seq = tp->snd_nxt; 2802 + tp->snd_ssthresh = tcp_current_ssthresh(sk); 2803 + tp->prior_ssthresh = 0; 2804 + tp->undo_marker = 0; 2805 + tcp_set_ca_state(sk, TCP_CA_Loss); 2806 + } 2807 + tcp_xmit_retransmit_queue(sk); 2808 + } 2809 + 2785 2810 /* Do a simple retransmit without using the backoff mechanisms in 2786 2811 * tcp_timer. This is used for path mtu discovery. 2787 2812 * The socket is already locked here. 2788 2813 */ 2789 2814 void tcp_simple_retransmit(struct sock *sk) 2790 2815 { 2791 - const struct inet_connection_sock *icsk = inet_csk(sk); 2792 2816 struct tcp_sock *tp = tcp_sk(sk); 2793 2817 struct sk_buff *skb; 2794 2818 int mss; ··· 2852 2828 * in network, but units changed and effective 2853 2829 * cwnd/ssthresh really reduced now. 2854 2830 */ 2855 - if (icsk->icsk_ca_state != TCP_CA_Loss) { 2856 - tp->high_seq = tp->snd_nxt; 2857 - tp->snd_ssthresh = tcp_current_ssthresh(sk); 2858 - tp->prior_ssthresh = 0; 2859 - tp->undo_marker = 0; 2860 - tcp_set_ca_state(sk, TCP_CA_Loss); 2861 - } 2862 - tcp_xmit_retransmit_queue(sk); 2831 + tcp_non_congestion_loss_retransmit(sk); 2863 2832 } 2864 2833 EXPORT_SYMBOL(tcp_simple_retransmit); 2865 2834 ··· 6321 6304 tp->fastopen_client_fail = TFO_DATA_NOT_ACKED; 6322 6305 skb_rbtree_walk_from(data) 6323 6306 tcp_mark_skb_lost(sk, data); 6324 - tcp_xmit_retransmit_queue(sk); 6325 - tp->retrans_stamp = 0; 6307 + tcp_non_congestion_loss_retransmit(sk); 6326 6308 NET_INC_STATS(sock_net(sk), 6327 6309 LINUX_MIB_TCPFASTOPENACTIVEFAIL); 6328 6310 return true; ··· 7257 7241 tcp_rsk(req)->tfo_listener = false; 7258 7242 if (!want_cookie) { 7259 7243 req->timeout = tcp_timeout_init((struct sock *)req); 7260 - inet_csk_reqsk_queue_hash_add(sk, req, req->timeout); 7244 + if (unlikely(!inet_csk_reqsk_queue_hash_add(sk, req, 7245 + req->timeout))) { 7246 + reqsk_free(req); 7247 + return 0; 7248 + } 7249 + 7261 7250 } 7262 7251 af_ops->send_synack(sk, dst, &fl, req, &foc, 7263 7252 !want_cookie ? TCP_SYNACK_NORMAL :
+1
net/mac80211/main.c
··· 424 424 BSS_CHANGED_ERP_SLOT; 425 425 } 426 426 427 + /* context: requires softirqs disabled */ 427 428 void ieee80211_handle_queued_frames(struct ieee80211_local *local) 428 429 { 429 430 struct sk_buff *skb;
+2
net/mac80211/util.c
··· 1567 1567 1568 1568 void ieee80211_stop_device(struct ieee80211_local *local) 1569 1569 { 1570 + local_bh_disable(); 1570 1571 ieee80211_handle_queued_frames(local); 1572 + local_bh_enable(); 1571 1573 1572 1574 ieee80211_led_radio(local, false); 1573 1575 ieee80211_mod_tpt_led_trig(local, 0, IEEE80211_TPT_LEDTRIG_FL_RADIO);
+3
net/netfilter/nf_hooks_lwtunnel.c
··· 117 117 { 118 118 unregister_pernet_subsys(&nf_lwtunnel_net_ops); 119 119 } 120 + #else 121 + int __init netfilter_lwtunnel_init(void) { return 0; } 122 + void netfilter_lwtunnel_fini(void) {} 120 123 #endif /* CONFIG_SYSCTL */
+4 -4
net/netfilter/nf_tables_api.c
··· 5740 5740 5741 5741 if (nft_set_ext_exists(ext, NFT_SET_EXT_DATA) && 5742 5742 nft_data_dump(skb, NFTA_SET_ELEM_DATA, nft_set_ext_data(ext), 5743 - set->dtype == NFT_DATA_VERDICT ? NFT_DATA_VERDICT : NFT_DATA_VALUE, 5744 - set->dlen) < 0) 5743 + nft_set_datatype(set), set->dlen) < 0) 5745 5744 goto nla_put_failure; 5746 5745 5747 5746 if (nft_set_ext_exists(ext, NFT_SET_EXT_EXPRESSIONS) && ··· 11072 11073 11073 11074 return 0; 11074 11075 default: 11076 + if (type != NFT_DATA_VALUE) 11077 + return -EINVAL; 11078 + 11075 11079 if (reg < NFT_REG_1 * NFT_REG_SIZE / NFT_REG32_SIZE) 11076 11080 return -EINVAL; 11077 11081 if (len == 0) ··· 11083 11081 sizeof_field(struct nft_regs, data)) 11084 11082 return -ERANGE; 11085 11083 11086 - if (data != NULL && type != NFT_DATA_VALUE) 11087 - return -EINVAL; 11088 11084 return 0; 11089 11085 } 11090 11086 }
+2 -1
net/netfilter/nft_lookup.c
··· 132 132 return -EINVAL; 133 133 134 134 err = nft_parse_register_store(ctx, tb[NFTA_LOOKUP_DREG], 135 - &priv->dreg, NULL, set->dtype, 135 + &priv->dreg, NULL, 136 + nft_set_datatype(set), 136 137 set->dlen); 137 138 if (err < 0) 138 139 return err;
+6 -1
net/openvswitch/conntrack.c
··· 168 168 static void ovs_ct_get_labels(const struct nf_conn *ct, 169 169 struct ovs_key_ct_labels *labels) 170 170 { 171 - struct nf_conn_labels *cl = ct ? nf_ct_labels_find(ct) : NULL; 171 + struct nf_conn_labels *cl = NULL; 172 172 173 + if (ct) { 174 + if (ct->master && !nf_ct_is_confirmed(ct)) 175 + ct = ct->master; 176 + cl = nf_ct_labels_find(ct); 177 + } 173 178 if (cl) 174 179 memcpy(labels, cl->bits, OVS_CT_LABELS_LEN); 175 180 else
+5 -3
net/sunrpc/svc_xprt.c
··· 1421 1421 1422 1422 dprintk("svc_pool_stats_start, *pidx=%u\n", pidx); 1423 1423 1424 + if (!si->serv) 1425 + return NULL; 1426 + 1424 1427 mutex_lock(si->mutex); 1425 1428 1426 1429 if (!pidx) 1427 1430 return SEQ_START_TOKEN; 1428 - if (!si->serv) 1429 - return NULL; 1430 1431 return pidx > si->serv->sv_nrpools ? NULL 1431 1432 : &si->serv->sv_pools[pidx - 1]; 1432 1433 } ··· 1459 1458 { 1460 1459 struct svc_info *si = m->private; 1461 1460 1462 - mutex_unlock(si->mutex); 1461 + if (si->serv) 1462 + mutex_unlock(si->mutex); 1463 1463 } 1464 1464 1465 1465 static int svc_pool_stats_show(struct seq_file *m, void *p)
+31 -6
net/unix/af_unix.c
··· 2667 2667 { 2668 2668 struct unix_sock *u = unix_sk(sk); 2669 2669 2670 - if (!unix_skb_len(skb) && !(flags & MSG_PEEK)) { 2671 - skb_unlink(skb, &sk->sk_receive_queue); 2672 - consume_skb(skb); 2673 - skb = NULL; 2670 + if (!unix_skb_len(skb)) { 2671 + struct sk_buff *unlinked_skb = NULL; 2672 + 2673 + spin_lock(&sk->sk_receive_queue.lock); 2674 + 2675 + if (copied && (!u->oob_skb || skb == u->oob_skb)) { 2676 + skb = NULL; 2677 + } else if (flags & MSG_PEEK) { 2678 + skb = skb_peek_next(skb, &sk->sk_receive_queue); 2679 + } else { 2680 + unlinked_skb = skb; 2681 + skb = skb_peek_next(skb, &sk->sk_receive_queue); 2682 + __skb_unlink(unlinked_skb, &sk->sk_receive_queue); 2683 + } 2684 + 2685 + spin_unlock(&sk->sk_receive_queue.lock); 2686 + 2687 + consume_skb(unlinked_skb); 2674 2688 } else { 2675 2689 struct sk_buff *unlinked_skb = NULL; 2676 2690 ··· 3144 3130 #if IS_ENABLED(CONFIG_AF_UNIX_OOB) 3145 3131 case SIOCATMARK: 3146 3132 { 3133 + struct unix_sock *u = unix_sk(sk); 3147 3134 struct sk_buff *skb; 3148 3135 int answ = 0; 3149 3136 3137 + mutex_lock(&u->iolock); 3138 + 3150 3139 skb = skb_peek(&sk->sk_receive_queue); 3151 - if (skb && skb == READ_ONCE(unix_sk(sk)->oob_skb)) 3152 - answ = 1; 3140 + if (skb) { 3141 + struct sk_buff *oob_skb = READ_ONCE(u->oob_skb); 3142 + 3143 + if (skb == oob_skb || 3144 + (!oob_skb && !unix_skb_len(skb))) 3145 + answ = 1; 3146 + } 3147 + 3148 + mutex_unlock(&u->iolock); 3149 + 3153 3150 err = put_user(answ, (int __user *)arg); 3154 3151 } 3155 3152 break;
+5 -1
net/wireless/nl80211.c
··· 468 468 .max = 0xffff, 469 469 }; 470 470 471 + static const struct netlink_range_validation q_range = { 472 + .max = INT_MAX, 473 + }; 474 + 471 475 static const struct nla_policy nl80211_policy[NUM_NL80211_ATTR] = { 472 476 [0] = { .strict_start_type = NL80211_ATTR_HE_OBSS_PD }, 473 477 [NL80211_ATTR_WIPHY] = { .type = NLA_U32 }, ··· 758 754 759 755 [NL80211_ATTR_TXQ_LIMIT] = { .type = NLA_U32 }, 760 756 [NL80211_ATTR_TXQ_MEMORY_LIMIT] = { .type = NLA_U32 }, 761 - [NL80211_ATTR_TXQ_QUANTUM] = { .type = NLA_U32 }, 757 + [NL80211_ATTR_TXQ_QUANTUM] = NLA_POLICY_FULL_RANGE(NLA_U32, &q_range), 762 758 [NL80211_ATTR_HE_CAPABILITY] = 763 759 NLA_POLICY_VALIDATE_FN(NLA_BINARY, validate_he_capa, 764 760 NL80211_HE_MAX_CAPABILITY_LEN),
+5 -2
rust/kernel/alloc/vec_ext.rs
··· 4 4 5 5 use super::{AllocError, Flags}; 6 6 use alloc::vec::Vec; 7 - use core::ptr; 8 7 9 8 /// Extensions to [`Vec`]. 10 9 pub trait VecExt<T>: Sized { ··· 140 141 // `krealloc_aligned`. A `Vec<T>`'s `ptr` value is not guaranteed to be NULL and might be 141 142 // dangling after being created with `Vec::new`. Instead, we can rely on `Vec<T>`'s capacity 142 143 // to be zero if no memory has been allocated yet. 143 - let ptr = if cap == 0 { ptr::null_mut() } else { old_ptr }; 144 + let ptr = if cap == 0 { 145 + core::ptr::null_mut() 146 + } else { 147 + old_ptr 148 + }; 144 149 145 150 // SAFETY: `ptr` is valid because it's either NULL or comes from a previous call to 146 151 // `krealloc_aligned`. We also verified that the type is not a ZST.
+22
sound/core/pcm_dmaengine.c
··· 349 349 } 350 350 EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_open_request_chan); 351 351 352 + int snd_dmaengine_pcm_sync_stop(struct snd_pcm_substream *substream) 353 + { 354 + struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream); 355 + 356 + dmaengine_synchronize(prtd->dma_chan); 357 + 358 + return 0; 359 + } 360 + EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_sync_stop); 361 + 352 362 /** 353 363 * snd_dmaengine_pcm_close - Close a dmaengine based PCM substream 354 364 * @substream: PCM substream ··· 368 358 int snd_dmaengine_pcm_close(struct snd_pcm_substream *substream) 369 359 { 370 360 struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream); 361 + struct dma_tx_state state; 362 + enum dma_status status; 363 + 364 + status = dmaengine_tx_status(prtd->dma_chan, prtd->cookie, &state); 365 + if (status == DMA_PAUSED) 366 + dmaengine_terminate_async(prtd->dma_chan); 371 367 372 368 dmaengine_synchronize(prtd->dma_chan); 373 369 kfree(prtd); ··· 394 378 int snd_dmaengine_pcm_close_release_chan(struct snd_pcm_substream *substream) 395 379 { 396 380 struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream); 381 + struct dma_tx_state state; 382 + enum dma_status status; 383 + 384 + status = dmaengine_tx_status(prtd->dma_chan, prtd->cookie, &state); 385 + if (status == DMA_PAUSED) 386 + dmaengine_terminate_async(prtd->dma_chan); 397 387 398 388 dmaengine_synchronize(prtd->dma_chan); 399 389 dma_release_channel(prtd->dma_chan);
+2
sound/core/pcm_native.c
··· 1775 1775 snd_pcm_state_t state) 1776 1776 { 1777 1777 struct snd_pcm_runtime *runtime = substream->runtime; 1778 + if (runtime->state != SNDRV_PCM_STATE_SUSPENDED) 1779 + return -EBADFD; 1778 1780 if (!(runtime->info & SNDRV_PCM_INFO_RESUME)) 1779 1781 return -ENOSYS; 1780 1782 runtime->trigger_master = substream;
+6 -4
sound/core/seq/seq_ump_convert.c
··· 791 791 792 792 /* set up the MIDI2 RPN/NRPN packet data from the parsed info */ 793 793 static void fill_rpn(struct snd_seq_ump_midi2_bank *cc, 794 - union snd_ump_midi2_msg *data) 794 + union snd_ump_midi2_msg *data, 795 + unsigned char channel) 795 796 { 796 797 if (cc->rpn_set) { 797 798 data->rpn.status = UMP_MSG_STATUS_RPN; ··· 809 808 } 810 809 data->rpn.data = upscale_14_to_32bit((cc->cc_data_msb << 7) | 811 810 cc->cc_data_lsb); 811 + data->rpn.channel = channel; 812 812 cc->cc_data_msb = cc->cc_data_lsb = 0; 813 813 } 814 814 ··· 857 855 cc->cc_data_lsb = val; 858 856 if (!(cc->rpn_set || cc->nrpn_set)) 859 857 return 0; // skip 860 - fill_rpn(cc, data); 858 + fill_rpn(cc, data, channel); 861 859 return 1; 862 860 } 863 861 ··· 959 957 cc->cc_data_lsb = lsb; 960 958 if (!(cc->rpn_set || cc->nrpn_set)) 961 959 return 0; // skip 962 - fill_rpn(cc, data); 960 + fill_rpn(cc, data, channel); 963 961 return 1; 964 962 } 965 963 ··· 1020 1018 union snd_ump_midi2_msg *data, 1021 1019 unsigned char status) 1022 1020 { 1023 - return system_1p_ev_to_ump_midi1(event, dest_port, 1021 + return system_2p_ev_to_ump_midi1(event, dest_port, 1024 1022 (union snd_ump_midi1_msg *)data, 1025 1023 status); 1026 1024 }
+2 -2
sound/pci/hda/Kconfig
··· 162 162 depends on ACPI || COMPILE_TEST 163 163 depends on SND_SOC 164 164 select FW_CS_DSP 165 - select SERIAL_MULTI_INSTANTIATE 165 + imply SERIAL_MULTI_INSTANTIATE 166 166 select SND_HDA_GENERIC 167 167 select SND_SOC_CS35L56_SHARED 168 168 select SND_HDA_SCODEC_CS35L56 ··· 179 179 depends on ACPI || COMPILE_TEST 180 180 depends on SND_SOC 181 181 select FW_CS_DSP 182 - select SERIAL_MULTI_INSTANTIATE 182 + imply SERIAL_MULTI_INSTANTIATE 183 183 select SND_HDA_GENERIC 184 184 select SND_SOC_CS35L56_SHARED 185 185 select SND_HDA_SCODEC_CS35L56
+25 -1
sound/pci/hda/patch_realtek.c
··· 7525 7525 ALC287_FIXUP_LENOVO_THKPAD_WH_ALC1318, 7526 7526 ALC256_FIXUP_CHROME_BOOK, 7527 7527 ALC287_FIXUP_LENOVO_14ARP8_LEGION_IAH7, 7528 + ALC287_FIXUP_LENOVO_SSID_17AA3820, 7528 7529 }; 7529 7530 7530 7531 /* A special fixup for Lenovo C940 and Yoga Duet 7; ··· 7594 7593 id = ALC287_FIXUP_TAS2781_I2C; /* Legion Pro 7 16ARX8H */ 7595 7594 else 7596 7595 id = ALC287_FIXUP_CS35L41_I2C_2; /* Legion 7i 16IAX7 */ 7596 + __snd_hda_apply_fixup(codec, id, action, 0); 7597 + } 7598 + 7599 + /* Yet more conflicting PCI SSID (17aa:3820) on two Lenovo models */ 7600 + static void alc287_fixup_lenovo_ssid_17aa3820(struct hda_codec *codec, 7601 + const struct hda_fixup *fix, 7602 + int action) 7603 + { 7604 + int id; 7605 + 7606 + if (codec->core.subsystem_id == 0x17aa3820) 7607 + id = ALC269_FIXUP_ASPIRE_HEADSET_MIC; /* IdeaPad 330-17IKB 81DM */ 7608 + else /* 0x17aa3802 */ 7609 + id = ALC287_FIXUP_YOGA7_14ITL_SPEAKERS; /* "Yoga Duet 7 13ITL6 */ 7597 7610 __snd_hda_apply_fixup(codec, id, action, 0); 7598 7611 } 7599 7612 ··· 9847 9832 .chained = true, 9848 9833 .chain_id = ALC225_FIXUP_HEADSET_JACK 9849 9834 }, 9835 + [ALC287_FIXUP_LENOVO_SSID_17AA3820] = { 9836 + .type = HDA_FIXUP_FUNC, 9837 + .v.func = alc287_fixup_lenovo_ssid_17aa3820, 9838 + }, 9850 9839 }; 9851 9840 9852 9841 static const struct snd_pci_quirk alc269_fixup_tbl[] = { ··· 10088 10069 SND_PCI_QUIRK(0x103c, 0x8788, "HP OMEN 15", ALC285_FIXUP_HP_MUTE_LED), 10089 10070 SND_PCI_QUIRK(0x103c, 0x87b7, "HP Laptop 14-fq0xxx", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2), 10090 10071 SND_PCI_QUIRK(0x103c, 0x87c8, "HP", ALC287_FIXUP_HP_GPIO_LED), 10072 + SND_PCI_QUIRK(0x103c, 0x87d3, "HP Laptop 15-gw0xxx", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2), 10091 10073 SND_PCI_QUIRK(0x103c, 0x87e5, "HP ProBook 440 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED), 10092 10074 SND_PCI_QUIRK(0x103c, 0x87e7, "HP ProBook 450 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED), 10093 10075 SND_PCI_QUIRK(0x103c, 0x87f1, "HP ProBook 630 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED), ··· 10242 10222 SND_PCI_QUIRK(0x103c, 0x8c7c, "HP ProBook 445 G11", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), 10243 10223 SND_PCI_QUIRK(0x103c, 0x8c7d, "HP ProBook 465 G11", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), 10244 10224 SND_PCI_QUIRK(0x103c, 0x8c7e, "HP ProBook 465 G11", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), 10225 + SND_PCI_QUIRK(0x103c, 0x8c7f, "HP EliteBook 645 G11", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), 10226 + SND_PCI_QUIRK(0x103c, 0x8c80, "HP EliteBook 645 G11", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), 10227 + SND_PCI_QUIRK(0x103c, 0x8c81, "HP EliteBook 665 G11", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), 10245 10228 SND_PCI_QUIRK(0x103c, 0x8c89, "HP ProBook 460 G11", ALC236_FIXUP_HP_GPIO_LED), 10246 10229 SND_PCI_QUIRK(0x103c, 0x8c8a, "HP EliteBook 630", ALC236_FIXUP_HP_GPIO_LED), 10247 10230 SND_PCI_QUIRK(0x103c, 0x8c8c, "HP EliteBook 660", ALC236_FIXUP_HP_GPIO_LED), ··· 10553 10530 SND_PCI_QUIRK(0x17aa, 0x3813, "Legion 7i 15IMHG05", ALC287_FIXUP_LEGION_15IMHG05_SPEAKERS), 10554 10531 SND_PCI_QUIRK(0x17aa, 0x3818, "Lenovo C940 / Yoga Duet 7", ALC298_FIXUP_LENOVO_C940_DUET7), 10555 10532 SND_PCI_QUIRK(0x17aa, 0x3819, "Lenovo 13s Gen2 ITL", ALC287_FIXUP_13S_GEN2_SPEAKERS), 10556 - SND_PCI_QUIRK(0x17aa, 0x3820, "IdeaPad 330-17IKB 81DM", ALC269_FIXUP_ASPIRE_HEADSET_MIC), 10533 + SND_PCI_QUIRK(0x17aa, 0x3820, "IdeaPad 330 / Yoga Duet 7", ALC287_FIXUP_LENOVO_SSID_17AA3820), 10557 10534 SND_PCI_QUIRK(0x17aa, 0x3824, "Legion Y9000X 2020", ALC285_FIXUP_LEGION_Y9000X_SPEAKERS), 10558 10535 SND_PCI_QUIRK(0x17aa, 0x3827, "Ideapad S740", ALC285_FIXUP_IDEAPAD_S740_COEF), 10559 10536 SND_PCI_QUIRK(0x17aa, 0x3834, "Lenovo IdeaPad Slim 9i 14ITL5", ALC287_FIXUP_YOGA7_14ITL_SPEAKERS), ··· 10578 10555 SND_PCI_QUIRK(0x17aa, 0x3882, "Lenovo Yoga Pro 7 14APH8", ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK_PIN), 10579 10556 SND_PCI_QUIRK(0x17aa, 0x3884, "Y780 YG DUAL", ALC287_FIXUP_TAS2781_I2C), 10580 10557 SND_PCI_QUIRK(0x17aa, 0x3886, "Y780 VECO DUAL", ALC287_FIXUP_TAS2781_I2C), 10558 + SND_PCI_QUIRK(0x17aa, 0x3891, "Lenovo Yoga Pro 7 14AHP9", ALC287_FIXUP_YOGA9_14IAP7_BASS_SPK_PIN), 10581 10559 SND_PCI_QUIRK(0x17aa, 0x38a7, "Y780P AMD YG dual", ALC287_FIXUP_TAS2781_I2C), 10582 10560 SND_PCI_QUIRK(0x17aa, 0x38a8, "Y780P AMD VECO dual", ALC287_FIXUP_TAS2781_I2C), 10583 10561 SND_PCI_QUIRK(0x17aa, 0x38a9, "Thinkbook 16P", ALC287_FIXUP_MG_RTKC_CSAMP_CS35L41_I2C_THINKPAD),
-8
sound/soc/amd/acp/acp-i2s.c
··· 588 588 { 589 589 struct device *dev = dai->component->dev; 590 590 struct acp_dev_data *adata = dev_get_drvdata(dev); 591 - struct acp_resource *rsrc = adata->rsrc; 592 - unsigned int val; 593 591 594 592 if (!adata->acp_base) { 595 593 dev_err(dev, "I2S base is NULL\n"); 596 - return -EINVAL; 597 - } 598 - 599 - val = readl(adata->acp_base + rsrc->i2s_pin_cfg_offset); 600 - if (val != rsrc->i2s_mode) { 601 - dev_err(dev, "I2S Mode not supported val %x\n", val); 602 594 return -EINVAL; 603 595 } 604 596
+7 -5
sound/soc/amd/acp/acp-pci.c
··· 100 100 ret = -EINVAL; 101 101 goto release_regions; 102 102 } 103 + chip->flag = flag; 103 104 dmic_dev = platform_device_register_data(dev, "dmic-codec", PLATFORM_DEVID_NONE, NULL, 0); 104 105 if (IS_ERR(dmic_dev)) { 105 106 dev_err(dev, "failed to create DMIC device\n"); ··· 140 139 } 141 140 } 142 141 143 - chip->flag = flag; 144 142 memset(&pdevinfo, 0, sizeof(pdevinfo)); 145 143 146 144 pdevinfo.name = chip->name; ··· 199 199 ret = acp_init(chip); 200 200 if (ret) 201 201 dev_err(dev, "ACP init failed\n"); 202 - child = chip->chip_pdev->dev; 203 - adata = dev_get_drvdata(&child); 204 - if (adata) 205 - acp_enable_interrupts(adata); 202 + if (chip->chip_pdev) { 203 + child = chip->chip_pdev->dev; 204 + adata = dev_get_drvdata(&child); 205 + if (adata) 206 + acp_enable_interrupts(adata); 207 + } 206 208 return ret; 207 209 } 208 210
+7
sound/soc/amd/yc/acp6x-mach.c
··· 283 283 DMI_MATCH(DMI_PRODUCT_NAME, "M5402RA"), 284 284 } 285 285 }, 286 + { 287 + .driver_data = &acp6x_card, 288 + .matches = { 289 + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK COMPUTER INC."), 290 + DMI_MATCH(DMI_PRODUCT_NAME, "M5602RA"), 291 + } 292 + }, 286 293 { 287 294 .driver_data = &acp6x_card, 288 295 .matches = {
+5 -2
sound/soc/atmel/atmel-classd.c
··· 473 473 if (!dai_link) 474 474 return -ENOMEM; 475 475 476 - comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL); 476 + comp = devm_kzalloc(dev, 2 * sizeof(*comp), GFP_KERNEL); 477 477 if (!comp) 478 478 return -ENOMEM; 479 479 480 - dai_link->cpus = comp; 480 + dai_link->cpus = &comp[0]; 481 481 dai_link->codecs = &snd_soc_dummy_dlc; 482 + dai_link->platforms = &comp[1]; 482 483 483 484 dai_link->num_cpus = 1; 484 485 dai_link->num_codecs = 1; 486 + dai_link->num_platforms = 1; 485 487 486 488 dai_link->name = "CLASSD"; 487 489 dai_link->stream_name = "CLASSD PCM"; 488 490 dai_link->cpus->dai_name = dev_name(dev); 491 + dai_link->platforms->name = dev_name(dev); 489 492 490 493 card->dai_link = dai_link; 491 494 card->num_links = 1;
+4
sound/soc/codecs/cs35l56-shared.c
··· 215 215 REG_SEQ0(CS35L56_ASP1_FRAME_CONTROL5, 0x00020100), 216 216 REG_SEQ0(CS35L56_ASP1_DATA_CONTROL1, 0x00000018), 217 217 REG_SEQ0(CS35L56_ASP1_DATA_CONTROL5, 0x00000018), 218 + REG_SEQ0(CS35L56_ASP1TX1_INPUT, 0x00000000), 219 + REG_SEQ0(CS35L56_ASP1TX2_INPUT, 0x00000000), 220 + REG_SEQ0(CS35L56_ASP1TX3_INPUT, 0x00000000), 221 + REG_SEQ0(CS35L56_ASP1TX4_INPUT, 0x00000000), 218 222 }; 219 223 220 224 /*
+2 -2
sound/soc/codecs/cs42l43-jack.c
··· 121 121 priv->buttons[3] = 735; 122 122 } 123 123 124 - ret = cs42l43_find_index(priv, "cirrus,detect-us", 1000, &priv->detect_us, 124 + ret = cs42l43_find_index(priv, "cirrus,detect-us", 50000, &priv->detect_us, 125 125 cs42l43_accdet_us, ARRAY_SIZE(cs42l43_accdet_us)); 126 126 if (ret < 0) 127 127 goto error; ··· 433 433 434 434 // Wait for 2 full cycles of comb filter to ensure good reading 435 435 queue_delayed_work(system_wq, &priv->button_press_work, 436 - msecs_to_jiffies(10)); 436 + msecs_to_jiffies(20)); 437 437 438 438 return IRQ_HANDLED; 439 439 }
+6 -2
sound/soc/codecs/es8326.c
··· 857 857 * set auto-check mode, then restart jack_detect_work after 400ms. 858 858 * Don't report jack status. 859 859 */ 860 - regmap_write(es8326->regmap, ES8326_INT_SOURCE, 861 - (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON)); 860 + regmap_write(es8326->regmap, ES8326_INT_SOURCE, 0x00); 862 861 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01); 862 + regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x10, 0x00); 863 863 es8326_enable_micbias(es8326->component); 864 864 usleep_range(50000, 70000); 865 865 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00); 866 + regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x10, 0x10); 867 + usleep_range(50000, 70000); 868 + regmap_write(es8326->regmap, ES8326_INT_SOURCE, 869 + (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON)); 866 870 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f); 867 871 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x08); 868 872 queue_delayed_work(system_wq, &es8326->jack_detect_work,
+18 -6
sound/soc/codecs/rt5645.c
··· 81 81 static const struct reg_sequence rt5650_init_list[] = { 82 82 {0xf6, 0x0100}, 83 83 {RT5645_PWR_ANLG1, 0x02}, 84 - {RT5645_IL_CMD3, 0x0018}, 84 + {RT5645_IL_CMD3, 0x6728}, 85 85 }; 86 86 87 87 static const struct reg_default rt5645_reg[] = { ··· 3130 3130 bool enable) 3131 3131 { 3132 3132 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 3133 + int ret; 3133 3134 3134 3135 if (enable) { 3135 3136 snd_soc_dapm_force_enable_pin(dapm, "ADC L power"); 3136 3137 snd_soc_dapm_force_enable_pin(dapm, "ADC R power"); 3137 3138 snd_soc_dapm_sync(dapm); 3138 3139 3140 + snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 3141 + RT5645_EN_4BTN_IL_MASK | RT5645_RST_4BTN_IL_MASK, 3142 + RT5645_EN_4BTN_IL_EN | RT5645_RST_4BTN_IL_RST); 3143 + usleep_range(10000, 15000); 3144 + snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 3145 + RT5645_EN_4BTN_IL_MASK | RT5645_RST_4BTN_IL_MASK, 3146 + RT5645_EN_4BTN_IL_EN | RT5645_RST_4BTN_IL_NORM); 3147 + msleep(50); 3148 + ret = snd_soc_component_read(component, RT5645_INT_IRQ_ST); 3149 + pr_debug("%s read %x = %x\n", __func__, RT5645_INT_IRQ_ST, 3150 + snd_soc_component_read(component, RT5645_INT_IRQ_ST)); 3151 + snd_soc_component_write(component, RT5645_INT_IRQ_ST, ret); 3152 + ret = snd_soc_component_read(component, RT5650_4BTN_IL_CMD1); 3153 + pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1, 3154 + snd_soc_component_read(component, RT5650_4BTN_IL_CMD1)); 3155 + snd_soc_component_write(component, RT5650_4BTN_IL_CMD1, ret); 3139 3156 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD1, 0x3, 0x3); 3140 3157 snd_soc_component_update_bits(component, 3141 3158 RT5645_INT_IRQ_ST, 0x8, 0x8); 3142 - snd_soc_component_update_bits(component, 3143 - RT5650_4BTN_IL_CMD2, 0x8000, 0x8000); 3144 - snd_soc_component_read(component, RT5650_4BTN_IL_CMD1); 3145 - pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1, 3146 - snd_soc_component_read(component, RT5650_4BTN_IL_CMD1)); 3147 3159 } else { 3148 3160 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 0x8000, 0x0); 3149 3161 snd_soc_component_update_bits(component, RT5645_INT_IRQ_ST, 0x8, 0x0);
+6
sound/soc/codecs/rt5645.h
··· 2011 2011 #define RT5645_ZCD_HP_DIS (0x0 << 15) 2012 2012 #define RT5645_ZCD_HP_EN (0x1 << 15) 2013 2013 2014 + /* Buttons Inline Command Function 2 (0xe0) */ 2015 + #define RT5645_EN_4BTN_IL_MASK (0x1 << 15) 2016 + #define RT5645_EN_4BTN_IL_EN (0x1 << 15) 2017 + #define RT5645_RST_4BTN_IL_MASK (0x1 << 14) 2018 + #define RT5645_RST_4BTN_IL_RST (0x0 << 14) 2019 + #define RT5645_RST_4BTN_IL_NORM (0x1 << 14) 2014 2020 2015 2021 /* Codec Private Register definition */ 2016 2022 /* DAC ADC Digital Volume (0x00) */
+3 -1
sound/soc/codecs/rt722-sdca-sdw.c
··· 68 68 case 0x200007f: 69 69 case 0x2000082 ... 0x200008e: 70 70 case 0x2000090 ... 0x2000094: 71 + case 0x3110000: 71 72 case 0x5300000 ... 0x5300002: 72 73 case 0x5400002: 73 74 case 0x5600000 ... 0x5600007: ··· 126 125 case 0x2000067: 127 126 case 0x2000084: 128 127 case 0x2000086: 128 + case 0x3110000: 129 129 return true; 130 130 default: 131 131 return false; ··· 352 350 353 351 if (status->sdca_cascade && !rt722->disable_irq) 354 352 mod_delayed_work(system_power_efficient_wq, 355 - &rt722->jack_detect_work, msecs_to_jiffies(30)); 353 + &rt722->jack_detect_work, msecs_to_jiffies(280)); 356 354 357 355 mutex_unlock(&rt722->disable_irq_lock); 358 356
+2 -1
sound/soc/fsl/fsl-asoc-card.c
··· 559 559 if (!priv) 560 560 return -ENOMEM; 561 561 562 + priv->pdev = pdev; 563 + 562 564 cpu_np = of_parse_phandle(np, "audio-cpu", 0); 563 565 /* Give a chance to old DT binding */ 564 566 if (!cpu_np) ··· 789 787 } 790 788 791 789 /* Initialize sound card */ 792 - priv->pdev = pdev; 793 790 priv->card.dev = &pdev->dev; 794 791 priv->card.owner = THIS_MODULE; 795 792 ret = snd_soc_of_parse_card_name(&priv->card, "model");
+1
sound/soc/fsl/imx-pcm-dma.c
··· 50 50 } 51 51 EXPORT_SYMBOL_GPL(imx_pcm_dma_init); 52 52 53 + MODULE_DESCRIPTION("Freescale i.MX PCM DMA interface"); 53 54 MODULE_LICENSE("GPL");
+15 -4
sound/soc/intel/avs/topology.c
··· 1545 1545 { 1546 1546 struct snd_soc_acpi_mach *mach = dev_get_platdata(comp->card->dev); 1547 1547 size_t len = SNDRV_CTL_ELEM_ID_NAME_MAXLEN; 1548 - char buf[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 1549 1548 int ssp_port, tdm_slot; 1549 + char *buf; 1550 1550 1551 1551 /* See parse_link_formatted_string() for dynamic naming when(s). */ 1552 1552 if (!avs_mach_singular_ssp(mach)) ··· 1557 1557 return 0; 1558 1558 tdm_slot = avs_mach_ssp_tdm(mach, ssp_port); 1559 1559 1560 + buf = devm_kzalloc(comp->card->dev, len, GFP_KERNEL); 1561 + if (!buf) 1562 + return -ENOMEM; 1560 1563 avs_ssp_sprint(buf, len, route->source, ssp_port, tdm_slot); 1561 - strscpy((char *)route->source, buf, len); 1564 + route->source = buf; 1565 + 1566 + buf = devm_kzalloc(comp->card->dev, len, GFP_KERNEL); 1567 + if (!buf) 1568 + return -ENOMEM; 1562 1569 avs_ssp_sprint(buf, len, route->sink, ssp_port, tdm_slot); 1563 - strscpy((char *)route->sink, buf, len); 1570 + route->sink = buf; 1571 + 1564 1572 if (route->control) { 1573 + buf = devm_kzalloc(comp->card->dev, len, GFP_KERNEL); 1574 + if (!buf) 1575 + return -ENOMEM; 1565 1576 avs_ssp_sprint(buf, len, route->control, ssp_port, tdm_slot); 1566 - strscpy((char *)route->control, buf, len); 1577 + route->control = buf; 1567 1578 } 1568 1579 1569 1580 return 0;
+11
sound/soc/intel/boards/bytcr_rt5640.c
··· 613 613 { 614 614 .matches = { 615 615 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ARCHOS"), 616 + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "ARCHOS 101 CESIUM"), 617 + }, 618 + .driver_data = (void *)(BYTCR_INPUT_DEFAULTS | 619 + BYT_RT5640_JD_NOT_INV | 620 + BYT_RT5640_DIFF_MIC | 621 + BYT_RT5640_SSP0_AIF1 | 622 + BYT_RT5640_MCLK_EN), 623 + }, 624 + { 625 + .matches = { 626 + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ARCHOS"), 616 627 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "ARCHOS 140 CESIUM"), 617 628 }, 618 629 .driver_data = (void *)(BYT_RT5640_IN1_MAP |
+1 -1
sound/soc/intel/common/soc-acpi-intel-mtl-match.c
··· 293 293 .adr = 0x000130025D131801, 294 294 .num_endpoints = 1, 295 295 .endpoints = &single_endpoint, 296 - .name_prefix = "rt1318" 296 + .name_prefix = "rt1318-1" 297 297 } 298 298 }; 299 299
+5 -5
sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c
··· 31 31 32 32 static struct snd_soc_jack_pin mt8183_da7219_max98357_jack_pins[] = { 33 33 { 34 - .pin = "Headphone", 34 + .pin = "Headphones", 35 35 .mask = SND_JACK_HEADPHONE, 36 36 }, 37 37 { ··· 626 626 }; 627 627 628 628 static const struct snd_kcontrol_new mt8183_da7219_max98357_snd_controls[] = { 629 - SOC_DAPM_PIN_SWITCH("Headphone"), 629 + SOC_DAPM_PIN_SWITCH("Headphones"), 630 630 SOC_DAPM_PIN_SWITCH("Headset Mic"), 631 631 SOC_DAPM_PIN_SWITCH("Speakers"), 632 632 SOC_DAPM_PIN_SWITCH("Line Out"), ··· 634 634 635 635 static const 636 636 struct snd_soc_dapm_widget mt8183_da7219_max98357_dapm_widgets[] = { 637 - SND_SOC_DAPM_HP("Headphone", NULL), 637 + SND_SOC_DAPM_HP("Headphones", NULL), 638 638 SND_SOC_DAPM_MIC("Headset Mic", NULL), 639 639 SND_SOC_DAPM_SPK("Speakers", NULL), 640 640 SND_SOC_DAPM_SPK("Line Out", NULL), ··· 680 680 }; 681 681 682 682 static const struct snd_kcontrol_new mt8183_da7219_rt1015_snd_controls[] = { 683 - SOC_DAPM_PIN_SWITCH("Headphone"), 683 + SOC_DAPM_PIN_SWITCH("Headphones"), 684 684 SOC_DAPM_PIN_SWITCH("Headset Mic"), 685 685 SOC_DAPM_PIN_SWITCH("Left Spk"), 686 686 SOC_DAPM_PIN_SWITCH("Right Spk"), ··· 689 689 690 690 static const 691 691 struct snd_soc_dapm_widget mt8183_da7219_rt1015_dapm_widgets[] = { 692 - SND_SOC_DAPM_HP("Headphone", NULL), 692 + SND_SOC_DAPM_HP("Headphones", NULL), 693 693 SND_SOC_DAPM_MIC("Headset Mic", NULL), 694 694 SND_SOC_DAPM_SPK("Left Spk", NULL), 695 695 SND_SOC_DAPM_SPK("Right Spk", NULL),
+1
sound/soc/mediatek/mt8195/mt8195-mt6359.c
··· 827 827 828 828 SND_SOC_DAILINK_DEFS(ETDM1_OUT_BE, 829 829 DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_OUT")), 830 + DAILINK_COMP_ARRAY(COMP_EMPTY()), 830 831 DAILINK_COMP_ARRAY(COMP_EMPTY())); 831 832 832 833 SND_SOC_DAILINK_DEFS(ETDM2_OUT_BE,
+1
sound/soc/mxs/mxs-pcm.c
··· 43 43 } 44 44 EXPORT_SYMBOL_GPL(mxs_pcm_platform_register); 45 45 46 + MODULE_DESCRIPTION("MXS ASoC PCM driver"); 46 47 MODULE_LICENSE("GPL");
+20 -12
sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
··· 141 141 struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev); 142 142 int rc; 143 143 144 - if (!dai_data->is_port_started[dai->id]) 145 - return; 146 - rc = q6apm_graph_stop(dai_data->graph[dai->id]); 147 - if (rc < 0) 148 - dev_err(dai->dev, "fail to close APM port (%d)\n", rc); 144 + if (dai_data->is_port_started[dai->id]) { 145 + rc = q6apm_graph_stop(dai_data->graph[dai->id]); 146 + dai_data->is_port_started[dai->id] = false; 147 + if (rc < 0) 148 + dev_err(dai->dev, "fail to close APM port (%d)\n", rc); 149 + } 149 150 150 - q6apm_graph_close(dai_data->graph[dai->id]); 151 - dai_data->is_port_started[dai->id] = false; 151 + if (dai_data->graph[dai->id]) { 152 + q6apm_graph_close(dai_data->graph[dai->id]); 153 + dai_data->graph[dai->id] = NULL; 154 + } 152 155 } 153 156 154 157 static int q6apm_lpass_dai_prepare(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) ··· 166 163 q6apm_graph_stop(dai_data->graph[dai->id]); 167 164 dai_data->is_port_started[dai->id] = false; 168 165 169 - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 166 + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 170 167 q6apm_graph_close(dai_data->graph[dai->id]); 168 + dai_data->graph[dai->id] = NULL; 169 + } 171 170 } 172 171 173 172 /** ··· 188 183 189 184 cfg->direction = substream->stream; 190 185 rc = q6apm_graph_media_format_pcm(dai_data->graph[dai->id], cfg); 191 - 192 186 if (rc) { 193 187 dev_err(dai->dev, "Failed to set media format %d\n", rc); 194 - return rc; 188 + goto err; 195 189 } 196 190 197 191 rc = q6apm_graph_prepare(dai_data->graph[dai->id]); 198 192 if (rc) { 199 193 dev_err(dai->dev, "Failed to prepare Graph %d\n", rc); 200 - return rc; 194 + goto err; 201 195 } 202 196 203 197 rc = q6apm_graph_start(dai_data->graph[dai->id]); 204 198 if (rc < 0) { 205 199 dev_err(dai->dev, "fail to start APM port %x\n", dai->id); 206 - return rc; 200 + goto err; 207 201 } 208 202 dai_data->is_port_started[dai->id] = true; 209 203 210 204 return 0; 205 + err: 206 + q6apm_graph_close(dai_data->graph[dai->id]); 207 + dai_data->graph[dai->id] = NULL; 208 + return rc; 211 209 } 212 210 213 211 static int q6apm_lpass_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
+1
sound/soc/qcom/sdw.c
··· 160 160 return 0; 161 161 } 162 162 EXPORT_SYMBOL_GPL(qcom_snd_sdw_hw_free); 163 + MODULE_DESCRIPTION("Qualcomm ASoC SoundWire helper functions"); 163 164 MODULE_LICENSE("GPL");
+11 -2
sound/soc/rockchip/rockchip_i2s_tdm.c
··· 655 655 int err; 656 656 657 657 if (i2s_tdm->is_master_mode) { 658 - struct clk *mclk = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? 659 - i2s_tdm->mclk_tx : i2s_tdm->mclk_rx; 658 + struct clk *mclk; 659 + 660 + if (i2s_tdm->clk_trcm == TRCM_TX) { 661 + mclk = i2s_tdm->mclk_tx; 662 + } else if (i2s_tdm->clk_trcm == TRCM_RX) { 663 + mclk = i2s_tdm->mclk_rx; 664 + } else if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 665 + mclk = i2s_tdm->mclk_tx; 666 + } else { 667 + mclk = i2s_tdm->mclk_rx; 668 + } 660 669 661 670 err = clk_set_rate(mclk, DEFAULT_MCLK_FS * params_rate(params)); 662 671 if (err)
+8
sound/soc/soc-generic-dmaengine-pcm.c
··· 318 318 return 0; 319 319 } 320 320 321 + static int dmaengine_pcm_sync_stop(struct snd_soc_component *component, 322 + struct snd_pcm_substream *substream) 323 + { 324 + return snd_dmaengine_pcm_sync_stop(substream); 325 + } 326 + 321 327 static const struct snd_soc_component_driver dmaengine_pcm_component = { 322 328 .name = SND_DMAENGINE_PCM_DRV_NAME, 323 329 .probe_order = SND_SOC_COMP_ORDER_LATE, ··· 333 327 .trigger = dmaengine_pcm_trigger, 334 328 .pointer = dmaengine_pcm_pointer, 335 329 .pcm_construct = dmaengine_pcm_new, 330 + .sync_stop = dmaengine_pcm_sync_stop, 336 331 }; 337 332 338 333 static const struct snd_soc_component_driver dmaengine_pcm_component_process = { ··· 346 339 .pointer = dmaengine_pcm_pointer, 347 340 .copy = dmaengine_copy, 348 341 .pcm_construct = dmaengine_pcm_new, 342 + .sync_stop = dmaengine_pcm_sync_stop, 349 343 }; 350 344 351 345 static const char * const dmaengine_pcm_dma_channel_names[] = {
+17 -20
sound/soc/soc-topology.c
··· 1021 1021 struct snd_soc_tplg_hdr *hdr) 1022 1022 { 1023 1023 struct snd_soc_dapm_context *dapm = &tplg->comp->dapm; 1024 + const size_t maxlen = SNDRV_CTL_ELEM_ID_NAME_MAXLEN; 1024 1025 struct snd_soc_tplg_dapm_graph_elem *elem; 1025 1026 struct snd_soc_dapm_route *route; 1026 1027 int count, i; ··· 1045 1044 tplg->pos += sizeof(struct snd_soc_tplg_dapm_graph_elem); 1046 1045 1047 1046 /* validate routes */ 1048 - if (strnlen(elem->source, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) == 1049 - SNDRV_CTL_ELEM_ID_NAME_MAXLEN) { 1050 - ret = -EINVAL; 1051 - break; 1052 - } 1053 - if (strnlen(elem->sink, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) == 1054 - SNDRV_CTL_ELEM_ID_NAME_MAXLEN) { 1055 - ret = -EINVAL; 1056 - break; 1057 - } 1058 - if (strnlen(elem->control, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) == 1059 - SNDRV_CTL_ELEM_ID_NAME_MAXLEN) { 1047 + if ((strnlen(elem->source, maxlen) == maxlen) || 1048 + (strnlen(elem->sink, maxlen) == maxlen) || 1049 + (strnlen(elem->control, maxlen) == maxlen)) { 1060 1050 ret = -EINVAL; 1061 1051 break; 1062 1052 } 1063 1053 1064 - route->source = elem->source; 1065 - route->sink = elem->sink; 1054 + route->source = devm_kstrdup(tplg->dev, elem->source, GFP_KERNEL); 1055 + route->sink = devm_kstrdup(tplg->dev, elem->sink, GFP_KERNEL); 1056 + if (!route->source || !route->sink) { 1057 + ret = -ENOMEM; 1058 + break; 1059 + } 1066 1060 1067 - /* set to NULL atm for tplg users */ 1068 - route->connected = NULL; 1069 - if (strnlen(elem->control, SNDRV_CTL_ELEM_ID_NAME_MAXLEN) == 0) 1070 - route->control = NULL; 1071 - else 1072 - route->control = elem->control; 1061 + if (strnlen(elem->control, maxlen) != 0) { 1062 + route->control = devm_kstrdup(tplg->dev, elem->control, GFP_KERNEL); 1063 + if (!route->control) { 1064 + ret = -ENOMEM; 1065 + break; 1066 + } 1067 + } 1073 1068 1074 1069 /* add route dobj to dobj_list */ 1075 1070 route->dobj.type = SND_SOC_DOBJ_GRAPH;
+4 -2
sound/soc/sof/intel/hda-dai.c
··· 379 379 380 380 sdev = widget_to_sdev(w); 381 381 if (sdev->dspless_mode_selected) 382 - goto skip_tlv; 382 + return 0; 383 383 384 384 /* get stream_id */ 385 385 hext_stream = ops->get_hext_stream(sdev, cpu_dai, substream); ··· 423 423 dma_config->dma_stream_channel_map.device_count = 1; 424 424 dma_config->dma_priv_config_size = 0; 425 425 426 - skip_tlv: 427 426 return 0; 428 427 } 429 428 ··· 523 524 __func__, ret); 524 525 return ret; 525 526 } 527 + 528 + if (sdev->dspless_mode_selected) 529 + return 0; 526 530 527 531 ipc4_copier = widget_to_copier(w); 528 532 dma_config_tlv = &ipc4_copier->dma_config_tlv[cpu_dai_id];
+1 -1
sound/soc/sof/sof-audio.c
··· 485 485 if (ret < 0) { 486 486 /* unprepare the source widget */ 487 487 if (widget_ops[widget->id].ipc_unprepare && 488 - swidget && swidget->prepared) { 488 + swidget && swidget->prepared && swidget->use_count == 0) { 489 489 widget_ops[widget->id].ipc_unprepare(swidget); 490 490 swidget->prepared = false; 491 491 }
+7 -2
sound/soc/ti/davinci-mcasp.c
··· 1472 1472 { 1473 1473 struct snd_interval *period_size = hw_param_interval(params, 1474 1474 SNDRV_PCM_HW_PARAM_PERIOD_SIZE); 1475 + u8 numevt = *((u8 *)rule->private); 1475 1476 struct snd_interval frames; 1476 1477 1477 1478 snd_interval_any(&frames); 1478 - frames.min = 64; 1479 + frames.min = numevt; 1479 1480 frames.integer = 1; 1480 1481 1481 1482 return snd_interval_refine(period_size, &frames); ··· 1491 1490 u32 max_channels = 0; 1492 1491 int i, dir, ret; 1493 1492 int tdm_slots = mcasp->tdm_slots; 1493 + u8 *numevt; 1494 1494 1495 1495 /* Do not allow more then one stream per direction */ 1496 1496 if (mcasp->substreams[substream->stream]) ··· 1591 1589 return ret; 1592 1590 } 1593 1591 1592 + numevt = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? 1593 + &mcasp->txnumevt : 1594 + &mcasp->rxnumevt; 1594 1595 snd_pcm_hw_rule_add(substream->runtime, 0, 1595 1596 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 1596 - davinci_mcasp_hw_rule_min_periodsize, NULL, 1597 + davinci_mcasp_hw_rule_min_periodsize, numevt, 1597 1598 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, -1); 1598 1599 1599 1600 return 0;
+1 -5
sound/soc/ti/omap-hdmi.c
··· 354 354 if (!card) 355 355 return -ENOMEM; 356 356 357 - card->name = devm_kasprintf(dev, GFP_KERNEL, 358 - "HDMI %s", dev_name(ad->dssdev)); 359 - if (!card->name) 360 - return -ENOMEM; 361 - 357 + card->name = "HDMI"; 362 358 card->owner = THIS_MODULE; 363 359 card->dai_link = 364 360 devm_kzalloc(dev, sizeof(*(card->dai_link)), GFP_KERNEL);
+1 -1
tools/testing/selftests/bpf/Makefile
··· 457 457 LSKELS := fentry_test.c fexit_test.c fexit_sleep.c atomics.c \ 458 458 trace_printk.c trace_vprintk.c map_ptr_kern.c \ 459 459 core_kern.c core_kern_overflow.c test_ringbuf.c \ 460 - test_ringbuf_n.c test_ringbuf_map_key.c 460 + test_ringbuf_n.c test_ringbuf_map_key.c test_ringbuf_write.c 461 461 462 462 # Generate both light skeleton and libbpf skeleton for these 463 463 LSKELS_EXTRA := test_ksyms_module.c test_ksyms_weak.c kfunc_call_test.c \
+56
tools/testing/selftests/bpf/prog_tests/ringbuf.c
··· 12 12 #include <sys/sysinfo.h> 13 13 #include <linux/perf_event.h> 14 14 #include <linux/ring_buffer.h> 15 + 15 16 #include "test_ringbuf.lskel.h" 16 17 #include "test_ringbuf_n.lskel.h" 17 18 #include "test_ringbuf_map_key.lskel.h" 19 + #include "test_ringbuf_write.lskel.h" 18 20 19 21 #define EDONE 7777 20 22 ··· 84 82 long timeout = (long)input; 85 83 86 84 return (void *)(long)ring_buffer__poll(ringbuf, timeout); 85 + } 86 + 87 + static void ringbuf_write_subtest(void) 88 + { 89 + struct test_ringbuf_write_lskel *skel; 90 + int page_size = getpagesize(); 91 + size_t *mmap_ptr; 92 + int err, rb_fd; 93 + 94 + skel = test_ringbuf_write_lskel__open(); 95 + if (!ASSERT_OK_PTR(skel, "skel_open")) 96 + return; 97 + 98 + skel->maps.ringbuf.max_entries = 0x4000; 99 + 100 + err = test_ringbuf_write_lskel__load(skel); 101 + if (!ASSERT_OK(err, "skel_load")) 102 + goto cleanup; 103 + 104 + rb_fd = skel->maps.ringbuf.map_fd; 105 + 106 + mmap_ptr = mmap(NULL, page_size, PROT_READ | PROT_WRITE, MAP_SHARED, rb_fd, 0); 107 + if (!ASSERT_OK_PTR(mmap_ptr, "rw_cons_pos")) 108 + goto cleanup; 109 + *mmap_ptr = 0x3000; 110 + ASSERT_OK(munmap(mmap_ptr, page_size), "unmap_rw"); 111 + 112 + skel->bss->pid = getpid(); 113 + 114 + ringbuf = ring_buffer__new(rb_fd, process_sample, NULL, NULL); 115 + if (!ASSERT_OK_PTR(ringbuf, "ringbuf_new")) 116 + goto cleanup; 117 + 118 + err = test_ringbuf_write_lskel__attach(skel); 119 + if (!ASSERT_OK(err, "skel_attach")) 120 + goto cleanup_ringbuf; 121 + 122 + skel->bss->discarded = 0; 123 + skel->bss->passed = 0; 124 + 125 + /* trigger exactly two samples */ 126 + syscall(__NR_getpgid); 127 + syscall(__NR_getpgid); 128 + 129 + ASSERT_EQ(skel->bss->discarded, 2, "discarded"); 130 + ASSERT_EQ(skel->bss->passed, 0, "passed"); 131 + 132 + test_ringbuf_write_lskel__detach(skel); 133 + cleanup_ringbuf: 134 + ring_buffer__free(ringbuf); 135 + cleanup: 136 + test_ringbuf_write_lskel__destroy(skel); 87 137 } 88 138 89 139 static void ringbuf_subtest(void) ··· 505 451 ringbuf_n_subtest(); 506 452 if (test__start_subtest("ringbuf_map_key")) 507 453 ringbuf_map_key_subtest(); 454 + if (test__start_subtest("ringbuf_write")) 455 + ringbuf_write_subtest(); 508 456 }
+46
tools/testing/selftests/bpf/progs/test_ringbuf_write.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + 3 + #include <linux/bpf.h> 4 + #include <bpf/bpf_helpers.h> 5 + #include "bpf_misc.h" 6 + 7 + char _license[] SEC("license") = "GPL"; 8 + 9 + struct { 10 + __uint(type, BPF_MAP_TYPE_RINGBUF); 11 + } ringbuf SEC(".maps"); 12 + 13 + /* inputs */ 14 + int pid = 0; 15 + 16 + /* outputs */ 17 + long passed = 0; 18 + long discarded = 0; 19 + 20 + SEC("fentry/" SYS_PREFIX "sys_getpgid") 21 + int test_ringbuf_write(void *ctx) 22 + { 23 + int *foo, cur_pid = bpf_get_current_pid_tgid() >> 32; 24 + void *sample1, *sample2; 25 + 26 + if (cur_pid != pid) 27 + return 0; 28 + 29 + sample1 = bpf_ringbuf_reserve(&ringbuf, 0x3000, 0); 30 + if (!sample1) 31 + return 0; 32 + /* first one can pass */ 33 + sample2 = bpf_ringbuf_reserve(&ringbuf, 0x3000, 0); 34 + if (!sample2) { 35 + bpf_ringbuf_discard(sample1, 0); 36 + __sync_fetch_and_add(&discarded, 1); 37 + return 0; 38 + } 39 + /* second one must not */ 40 + __sync_fetch_and_add(&passed, 1); 41 + foo = sample2 + 4084; 42 + *foo = 256; 43 + bpf_ringbuf_discard(sample1, 0); 44 + bpf_ringbuf_discard(sample2, 0); 45 + return 0; 46 + }
+146
tools/testing/selftests/bpf/progs/verifier_iterating_callbacks.c
··· 274 274 ); 275 275 } 276 276 277 + int tmp_var; 278 + SEC("socket") 279 + __failure __msg("infinite loop detected at insn 2") 280 + __naked void jgt_imm64_and_may_goto(void) 281 + { 282 + asm volatile (" \ 283 + r0 = %[tmp_var] ll; \ 284 + l0_%=: .byte 0xe5; /* may_goto */ \ 285 + .byte 0; /* regs */ \ 286 + .short -3; /* off -3 */ \ 287 + .long 0; /* imm */ \ 288 + if r0 > 10 goto l0_%=; \ 289 + r0 = 0; \ 290 + exit; \ 291 + " :: __imm_addr(tmp_var) 292 + : __clobber_all); 293 + } 294 + 295 + SEC("socket") 296 + __failure __msg("infinite loop detected at insn 1") 297 + __naked void may_goto_self(void) 298 + { 299 + asm volatile (" \ 300 + r0 = *(u32 *)(r10 - 4); \ 301 + l0_%=: .byte 0xe5; /* may_goto */ \ 302 + .byte 0; /* regs */ \ 303 + .short -1; /* off -1 */ \ 304 + .long 0; /* imm */ \ 305 + if r0 > 10 goto l0_%=; \ 306 + r0 = 0; \ 307 + exit; \ 308 + " ::: __clobber_all); 309 + } 310 + 311 + SEC("socket") 312 + __success __retval(0) 313 + __naked void may_goto_neg_off(void) 314 + { 315 + asm volatile (" \ 316 + r0 = *(u32 *)(r10 - 4); \ 317 + goto l0_%=; \ 318 + goto l1_%=; \ 319 + l0_%=: .byte 0xe5; /* may_goto */ \ 320 + .byte 0; /* regs */ \ 321 + .short -2; /* off -2 */ \ 322 + .long 0; /* imm */ \ 323 + if r0 > 10 goto l0_%=; \ 324 + l1_%=: r0 = 0; \ 325 + exit; \ 326 + " ::: __clobber_all); 327 + } 328 + 277 329 SEC("tc") 278 330 __failure 279 331 __flag(BPF_F_TEST_STATE_FREQ) ··· 357 305 : "r1" 358 306 ); 359 307 return 0; 308 + } 309 + 310 + SEC("socket") 311 + __success __retval(0) 312 + __naked void ja_and_may_goto(void) 313 + { 314 + asm volatile (" \ 315 + l0_%=: .byte 0xe5; /* may_goto */ \ 316 + .byte 0; /* regs */ \ 317 + .short 1; /* off 1 */ \ 318 + .long 0; /* imm */ \ 319 + goto l0_%=; \ 320 + r0 = 0; \ 321 + exit; \ 322 + " ::: __clobber_common); 323 + } 324 + 325 + SEC("socket") 326 + __success __retval(0) 327 + __naked void ja_and_may_goto2(void) 328 + { 329 + asm volatile (" \ 330 + l0_%=: r0 = 0; \ 331 + .byte 0xe5; /* may_goto */ \ 332 + .byte 0; /* regs */ \ 333 + .short 1; /* off 1 */ \ 334 + .long 0; /* imm */ \ 335 + goto l0_%=; \ 336 + r0 = 0; \ 337 + exit; \ 338 + " ::: __clobber_common); 339 + } 340 + 341 + SEC("socket") 342 + __success __retval(0) 343 + __naked void jlt_and_may_goto(void) 344 + { 345 + asm volatile (" \ 346 + l0_%=: call %[bpf_jiffies64]; \ 347 + .byte 0xe5; /* may_goto */ \ 348 + .byte 0; /* regs */ \ 349 + .short 1; /* off 1 */ \ 350 + .long 0; /* imm */ \ 351 + if r0 < 10 goto l0_%=; \ 352 + r0 = 0; \ 353 + exit; \ 354 + " :: __imm(bpf_jiffies64) 355 + : __clobber_all); 356 + } 357 + 358 + #if (defined(__TARGET_ARCH_arm64) || defined(__TARGET_ARCH_x86) || \ 359 + (defined(__TARGET_ARCH_riscv) && __riscv_xlen == 64) || \ 360 + defined(__TARGET_ARCH_arm) || defined(__TARGET_ARCH_s390) || \ 361 + defined(__TARGET_ARCH_loongarch)) && \ 362 + __clang_major__ >= 18 363 + SEC("socket") 364 + __success __retval(0) 365 + __naked void gotol_and_may_goto(void) 366 + { 367 + asm volatile (" \ 368 + l0_%=: r0 = 0; \ 369 + .byte 0xe5; /* may_goto */ \ 370 + .byte 0; /* regs */ \ 371 + .short 1; /* off 1 */ \ 372 + .long 0; /* imm */ \ 373 + gotol l0_%=; \ 374 + r0 = 0; \ 375 + exit; \ 376 + " ::: __clobber_common); 377 + } 378 + #endif 379 + 380 + SEC("socket") 381 + __success __retval(0) 382 + __naked void ja_and_may_goto_subprog(void) 383 + { 384 + asm volatile (" \ 385 + call subprog_with_may_goto; \ 386 + exit; \ 387 + " ::: __clobber_all); 388 + } 389 + 390 + static __naked __noinline __used 391 + void subprog_with_may_goto(void) 392 + { 393 + asm volatile (" \ 394 + l0_%=: .byte 0xe5; /* may_goto */ \ 395 + .byte 0; /* regs */ \ 396 + .short 1; /* off 1 */ \ 397 + .long 0; /* imm */ \ 398 + goto l0_%=; \ 399 + r0 = 0; \ 400 + exit; \ 401 + " ::: __clobber_all); 360 402 } 361 403 362 404 #define ARR_SZ 1000000
+63
tools/testing/selftests/bpf/progs/verifier_movsx.c
··· 224 224 : __clobber_all); 225 225 } 226 226 227 + SEC("socket") 228 + __description("MOV32SX, S8, var_off u32_max") 229 + __failure __msg("infinite loop detected") 230 + __failure_unpriv __msg_unpriv("back-edge from insn 2 to 0") 231 + __naked void mov64sx_s32_varoff_1(void) 232 + { 233 + asm volatile (" \ 234 + l0_%=: \ 235 + r3 = *(u8 *)(r10 -387); \ 236 + w7 = (s8)w3; \ 237 + if w7 >= 0x2533823b goto l0_%=; \ 238 + w0 = 0; \ 239 + exit; \ 240 + " : 241 + : 242 + : __clobber_all); 243 + } 244 + 245 + SEC("socket") 246 + __description("MOV32SX, S8, var_off not u32_max, positive after s8 extension") 247 + __success __retval(0) 248 + __failure_unpriv __msg_unpriv("frame pointer is read only") 249 + __naked void mov64sx_s32_varoff_2(void) 250 + { 251 + asm volatile (" \ 252 + call %[bpf_get_prandom_u32]; \ 253 + r3 = r0; \ 254 + r3 &= 0xf; \ 255 + w7 = (s8)w3; \ 256 + if w7 s>= 16 goto l0_%=; \ 257 + w0 = 0; \ 258 + exit; \ 259 + l0_%=: \ 260 + r10 = 1; \ 261 + exit; \ 262 + " : 263 + : __imm(bpf_get_prandom_u32) 264 + : __clobber_all); 265 + } 266 + 267 + SEC("socket") 268 + __description("MOV32SX, S8, var_off not u32_max, negative after s8 extension") 269 + __success __retval(0) 270 + __failure_unpriv __msg_unpriv("frame pointer is read only") 271 + __naked void mov64sx_s32_varoff_3(void) 272 + { 273 + asm volatile (" \ 274 + call %[bpf_get_prandom_u32]; \ 275 + r3 = r0; \ 276 + r3 &= 0xf; \ 277 + r3 |= 0x80; \ 278 + w7 = (s8)w3; \ 279 + if w7 s>= -5 goto l0_%=; \ 280 + w0 = 0; \ 281 + exit; \ 282 + l0_%=: \ 283 + r10 = 1; \ 284 + exit; \ 285 + " : 286 + : __imm(bpf_get_prandom_u32) 287 + : __clobber_all); 288 + } 289 + 227 290 #else 228 291 229 292 SEC("socket")
+1
tools/testing/selftests/kvm/include/x86_64/processor.h
··· 277 277 #define X86_PROPERTY_MAX_EXT_LEAF KVM_X86_CPU_PROPERTY(0x80000000, 0, EAX, 0, 31) 278 278 #define X86_PROPERTY_MAX_PHY_ADDR KVM_X86_CPU_PROPERTY(0x80000008, 0, EAX, 0, 7) 279 279 #define X86_PROPERTY_MAX_VIRT_ADDR KVM_X86_CPU_PROPERTY(0x80000008, 0, EAX, 8, 15) 280 + #define X86_PROPERTY_GUEST_MAX_PHY_ADDR KVM_X86_CPU_PROPERTY(0x80000008, 0, EAX, 16, 23) 280 281 #define X86_PROPERTY_SEV_C_BIT KVM_X86_CPU_PROPERTY(0x8000001F, 0, EBX, 0, 5) 281 282 #define X86_PROPERTY_PHYS_ADDR_REDUCTION KVM_X86_CPU_PROPERTY(0x8000001F, 0, EBX, 6, 11) 282 283
+1
tools/testing/selftests/kvm/lib/riscv/ucall.c
··· 9 9 10 10 #include "kvm_util.h" 11 11 #include "processor.h" 12 + #include "sbi.h" 12 13 13 14 void *ucall_arch_get_ucall(struct kvm_vcpu *vcpu) 14 15 {
+13 -2
tools/testing/selftests/kvm/lib/x86_64/processor.c
··· 1247 1247 { 1248 1248 const unsigned long num_ht_pages = 12 << (30 - vm->page_shift); /* 12 GiB */ 1249 1249 unsigned long ht_gfn, max_gfn, max_pfn; 1250 - uint8_t maxphyaddr; 1250 + uint8_t maxphyaddr, guest_maxphyaddr; 1251 1251 1252 - max_gfn = (1ULL << (vm->pa_bits - vm->page_shift)) - 1; 1252 + /* 1253 + * Use "guest MAXPHYADDR" from KVM if it's available. Guest MAXPHYADDR 1254 + * enumerates the max _mappable_ GPA, which can be less than the raw 1255 + * MAXPHYADDR, e.g. if MAXPHYADDR=52, KVM is using TDP, and the CPU 1256 + * doesn't support 5-level TDP. 1257 + */ 1258 + guest_maxphyaddr = kvm_cpu_property(X86_PROPERTY_GUEST_MAX_PHY_ADDR); 1259 + guest_maxphyaddr = guest_maxphyaddr ?: vm->pa_bits; 1260 + TEST_ASSERT(guest_maxphyaddr <= vm->pa_bits, 1261 + "Guest MAXPHYADDR should never be greater than raw MAXPHYADDR"); 1262 + 1263 + max_gfn = (1ULL << (guest_maxphyaddr - vm->page_shift)) - 1; 1253 1264 1254 1265 /* Avoid reserved HyperTransport region on AMD processors. */ 1255 1266 if (!host_cpu_is_amd)
+1
tools/testing/selftests/kvm/riscv/ebreak_test.c
··· 6 6 * 7 7 */ 8 8 #include "kvm_util.h" 9 + #include "ucall_common.h" 9 10 10 11 #define LABEL_ADDRESS(v) ((uint64_t)&(v)) 11 12
+1
tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
··· 15 15 #include "processor.h" 16 16 #include "sbi.h" 17 17 #include "arch_timer.h" 18 + #include "ucall_common.h" 18 19 19 20 /* Maximum counters(firmware + hardware) */ 20 21 #define RISCV_MAX_PMU_COUNTERS 64
+2 -2
tools/testing/selftests/kvm/x86_64/sev_init2_tests.c
··· 105 105 int i; 106 106 107 107 for (i = 0; i < 64; i++) { 108 - if (!(supported_features & (1u << i))) 108 + if (!(supported_features & BIT_ULL(i))) 109 109 test_init2_invalid(vm_type, 110 110 &(struct kvm_sev_init){ .vmsa_features = BIT_ULL(i) }, 111 111 "unknown feature"); 112 - else if (KNOWN_FEATURES & (1u << i)) 112 + else if (KNOWN_FEATURES & BIT_ULL(i)) 113 113 test_init2(vm_type, 114 114 &(struct kvm_sev_init){ .vmsa_features = BIT_ULL(i) }); 115 115 }
+24 -18
tools/testing/selftests/mm/ksm_functional_tests.c
··· 656 656 munmap(map, size); 657 657 } 658 658 659 - int main(int argc, char **argv) 659 + static void init_global_file_handles(void) 660 660 { 661 - unsigned int tests = 8; 662 - int err; 663 - 664 - if (argc > 1 && !strcmp(argv[1], FORK_EXEC_CHILD_PRG_NAME)) { 665 - exit(test_child_ksm()); 666 - } 667 - 668 - #ifdef __NR_userfaultfd 669 - tests++; 670 - #endif 671 - 672 - ksft_print_header(); 673 - ksft_set_plan(tests); 674 - 675 - pagesize = getpagesize(); 676 - 677 661 mem_fd = open("/proc/self/mem", O_RDWR); 678 662 if (mem_fd < 0) 679 663 ksft_exit_fail_msg("opening /proc/self/mem failed\n"); ··· 672 688 ksft_exit_skip("open(\"/proc/self/pagemap\") failed\n"); 673 689 proc_self_ksm_stat_fd = open("/proc/self/ksm_stat", O_RDONLY); 674 690 proc_self_ksm_merging_pages_fd = open("/proc/self/ksm_merging_pages", 675 - O_RDONLY); 691 + O_RDONLY); 676 692 ksm_use_zero_pages_fd = open("/sys/kernel/mm/ksm/use_zero_pages", O_RDWR); 693 + } 694 + 695 + int main(int argc, char **argv) 696 + { 697 + unsigned int tests = 8; 698 + int err; 699 + 700 + if (argc > 1 && !strcmp(argv[1], FORK_EXEC_CHILD_PRG_NAME)) { 701 + init_global_file_handles(); 702 + exit(test_child_ksm()); 703 + } 704 + 705 + #ifdef __NR_userfaultfd 706 + tests++; 707 + #endif 708 + 709 + ksft_print_header(); 710 + ksft_set_plan(tests); 711 + 712 + pagesize = getpagesize(); 713 + 714 + init_global_file_handles(); 677 715 678 716 test_unmerge(); 679 717 test_unmerge_zero_pages();
-1
tools/testing/selftests/net/.gitignore
··· 43 43 tcp_fastopen_backup_key 44 44 tcp_inq 45 45 tcp_mmap 46 - test_unix_oob 47 46 timestamping 48 47 tls 49 48 toeplitz
+1 -1
tools/testing/selftests/net/af_unix/Makefile
··· 1 1 CFLAGS += $(KHDR_INCLUDES) 2 - TEST_GEN_PROGS := diag_uid test_unix_oob unix_connect scm_pidfd scm_rights 2 + TEST_GEN_PROGS := diag_uid msg_oob scm_pidfd scm_rights unix_connect 3 3 4 4 include ../../lib.mk
+3
tools/testing/selftests/net/af_unix/config
··· 1 + CONFIG_UNIX=y 2 + CONFIG_AF_UNIX_OOB=y 3 + CONFIG_UNIX_DIAG=m
+734
tools/testing/selftests/net/af_unix/msg_oob.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* Copyright Amazon.com Inc. or its affiliates. */ 3 + 4 + #include <fcntl.h> 5 + #include <string.h> 6 + #include <unistd.h> 7 + 8 + #include <netinet/in.h> 9 + #include <sys/epoll.h> 10 + #include <sys/ioctl.h> 11 + #include <sys/signalfd.h> 12 + #include <sys/socket.h> 13 + 14 + #include "../../kselftest_harness.h" 15 + 16 + #define BUF_SZ 32 17 + 18 + FIXTURE(msg_oob) 19 + { 20 + int fd[4]; /* 0: AF_UNIX sender 21 + * 1: AF_UNIX receiver 22 + * 2: TCP sender 23 + * 3: TCP receiver 24 + */ 25 + int signal_fd; 26 + int epoll_fd[2]; /* 0: AF_UNIX receiver 27 + * 1: TCP receiver 28 + */ 29 + bool tcp_compliant; 30 + }; 31 + 32 + FIXTURE_VARIANT(msg_oob) 33 + { 34 + bool peek; 35 + }; 36 + 37 + FIXTURE_VARIANT_ADD(msg_oob, no_peek) 38 + { 39 + .peek = false, 40 + }; 41 + 42 + FIXTURE_VARIANT_ADD(msg_oob, peek) 43 + { 44 + .peek = true 45 + }; 46 + 47 + static void create_unix_socketpair(struct __test_metadata *_metadata, 48 + FIXTURE_DATA(msg_oob) *self) 49 + { 50 + int ret; 51 + 52 + ret = socketpair(AF_UNIX, SOCK_STREAM | SOCK_NONBLOCK, 0, self->fd); 53 + ASSERT_EQ(ret, 0); 54 + } 55 + 56 + static void create_tcp_socketpair(struct __test_metadata *_metadata, 57 + FIXTURE_DATA(msg_oob) *self) 58 + { 59 + struct sockaddr_in addr; 60 + socklen_t addrlen; 61 + int listen_fd; 62 + int ret; 63 + 64 + listen_fd = socket(AF_INET, SOCK_STREAM, 0); 65 + ASSERT_GE(listen_fd, 0); 66 + 67 + ret = listen(listen_fd, -1); 68 + ASSERT_EQ(ret, 0); 69 + 70 + addrlen = sizeof(addr); 71 + ret = getsockname(listen_fd, (struct sockaddr *)&addr, &addrlen); 72 + ASSERT_EQ(ret, 0); 73 + 74 + self->fd[2] = socket(AF_INET, SOCK_STREAM, 0); 75 + ASSERT_GE(self->fd[2], 0); 76 + 77 + ret = connect(self->fd[2], (struct sockaddr *)&addr, addrlen); 78 + ASSERT_EQ(ret, 0); 79 + 80 + self->fd[3] = accept(listen_fd, (struct sockaddr *)&addr, &addrlen); 81 + ASSERT_GE(self->fd[3], 0); 82 + 83 + ret = fcntl(self->fd[3], F_SETFL, O_NONBLOCK); 84 + ASSERT_EQ(ret, 0); 85 + } 86 + 87 + static void setup_sigurg(struct __test_metadata *_metadata, 88 + FIXTURE_DATA(msg_oob) *self) 89 + { 90 + struct signalfd_siginfo siginfo; 91 + int pid = getpid(); 92 + sigset_t mask; 93 + int i, ret; 94 + 95 + for (i = 0; i < 2; i++) { 96 + ret = ioctl(self->fd[i * 2 + 1], FIOSETOWN, &pid); 97 + ASSERT_EQ(ret, 0); 98 + } 99 + 100 + ret = sigemptyset(&mask); 101 + ASSERT_EQ(ret, 0); 102 + 103 + ret = sigaddset(&mask, SIGURG); 104 + ASSERT_EQ(ret, 0); 105 + 106 + ret = sigprocmask(SIG_BLOCK, &mask, NULL); 107 + ASSERT_EQ(ret, 0); 108 + 109 + self->signal_fd = signalfd(-1, &mask, SFD_NONBLOCK); 110 + ASSERT_GE(self->signal_fd, 0); 111 + 112 + ret = read(self->signal_fd, &siginfo, sizeof(siginfo)); 113 + ASSERT_EQ(ret, -1); 114 + } 115 + 116 + static void setup_epollpri(struct __test_metadata *_metadata, 117 + FIXTURE_DATA(msg_oob) *self) 118 + { 119 + struct epoll_event event = { 120 + .events = EPOLLPRI, 121 + }; 122 + int i; 123 + 124 + for (i = 0; i < 2; i++) { 125 + int ret; 126 + 127 + self->epoll_fd[i] = epoll_create1(0); 128 + ASSERT_GE(self->epoll_fd[i], 0); 129 + 130 + ret = epoll_ctl(self->epoll_fd[i], EPOLL_CTL_ADD, self->fd[i * 2 + 1], &event); 131 + ASSERT_EQ(ret, 0); 132 + } 133 + } 134 + 135 + static void close_sockets(FIXTURE_DATA(msg_oob) *self) 136 + { 137 + int i; 138 + 139 + for (i = 0; i < 4; i++) 140 + close(self->fd[i]); 141 + } 142 + 143 + FIXTURE_SETUP(msg_oob) 144 + { 145 + create_unix_socketpair(_metadata, self); 146 + create_tcp_socketpair(_metadata, self); 147 + 148 + setup_sigurg(_metadata, self); 149 + setup_epollpri(_metadata, self); 150 + 151 + self->tcp_compliant = true; 152 + } 153 + 154 + FIXTURE_TEARDOWN(msg_oob) 155 + { 156 + close_sockets(self); 157 + } 158 + 159 + static void __epollpair(struct __test_metadata *_metadata, 160 + FIXTURE_DATA(msg_oob) *self, 161 + bool oob_remaining) 162 + { 163 + struct epoll_event event[2] = {}; 164 + int i, ret[2]; 165 + 166 + for (i = 0; i < 2; i++) 167 + ret[i] = epoll_wait(self->epoll_fd[i], &event[i], 1, 0); 168 + 169 + ASSERT_EQ(ret[0], oob_remaining); 170 + 171 + if (self->tcp_compliant) 172 + ASSERT_EQ(ret[0], ret[1]); 173 + 174 + if (oob_remaining) { 175 + ASSERT_EQ(event[0].events, EPOLLPRI); 176 + 177 + if (self->tcp_compliant) 178 + ASSERT_EQ(event[0].events, event[1].events); 179 + } 180 + } 181 + 182 + static void __sendpair(struct __test_metadata *_metadata, 183 + FIXTURE_DATA(msg_oob) *self, 184 + const void *buf, size_t len, int flags) 185 + { 186 + int i, ret[2]; 187 + 188 + for (i = 0; i < 2; i++) { 189 + struct signalfd_siginfo siginfo = {}; 190 + int bytes; 191 + 192 + ret[i] = send(self->fd[i * 2], buf, len, flags); 193 + 194 + bytes = read(self->signal_fd, &siginfo, sizeof(siginfo)); 195 + 196 + if (flags & MSG_OOB) { 197 + ASSERT_EQ(bytes, sizeof(siginfo)); 198 + ASSERT_EQ(siginfo.ssi_signo, SIGURG); 199 + 200 + bytes = read(self->signal_fd, &siginfo, sizeof(siginfo)); 201 + } 202 + 203 + ASSERT_EQ(bytes, -1); 204 + } 205 + 206 + ASSERT_EQ(ret[0], len); 207 + ASSERT_EQ(ret[0], ret[1]); 208 + } 209 + 210 + static void __recvpair(struct __test_metadata *_metadata, 211 + FIXTURE_DATA(msg_oob) *self, 212 + const void *expected_buf, int expected_len, 213 + int buf_len, int flags) 214 + { 215 + int i, ret[2], recv_errno[2], expected_errno = 0; 216 + char recv_buf[2][BUF_SZ] = {}; 217 + bool printed = false; 218 + 219 + ASSERT_GE(BUF_SZ, buf_len); 220 + 221 + errno = 0; 222 + 223 + for (i = 0; i < 2; i++) { 224 + ret[i] = recv(self->fd[i * 2 + 1], recv_buf[i], buf_len, flags); 225 + recv_errno[i] = errno; 226 + } 227 + 228 + if (expected_len < 0) { 229 + expected_errno = -expected_len; 230 + expected_len = -1; 231 + } 232 + 233 + if (ret[0] != expected_len || recv_errno[0] != expected_errno) { 234 + TH_LOG("AF_UNIX :%s", ret[0] < 0 ? strerror(recv_errno[0]) : recv_buf[0]); 235 + TH_LOG("Expected:%s", expected_errno ? strerror(expected_errno) : expected_buf); 236 + 237 + ASSERT_EQ(ret[0], expected_len); 238 + ASSERT_EQ(recv_errno[0], expected_errno); 239 + } 240 + 241 + if (ret[0] != ret[1] || recv_errno[0] != recv_errno[1]) { 242 + TH_LOG("AF_UNIX :%s", ret[0] < 0 ? strerror(recv_errno[0]) : recv_buf[0]); 243 + TH_LOG("TCP :%s", ret[1] < 0 ? strerror(recv_errno[1]) : recv_buf[1]); 244 + 245 + printed = true; 246 + 247 + if (self->tcp_compliant) { 248 + ASSERT_EQ(ret[0], ret[1]); 249 + ASSERT_EQ(recv_errno[0], recv_errno[1]); 250 + } 251 + } 252 + 253 + if (expected_len >= 0) { 254 + int cmp; 255 + 256 + cmp = strncmp(expected_buf, recv_buf[0], expected_len); 257 + if (cmp) { 258 + TH_LOG("AF_UNIX :%s", ret[0] < 0 ? strerror(recv_errno[0]) : recv_buf[0]); 259 + TH_LOG("Expected:%s", expected_errno ? strerror(expected_errno) : expected_buf); 260 + 261 + ASSERT_EQ(cmp, 0); 262 + } 263 + 264 + cmp = strncmp(recv_buf[0], recv_buf[1], expected_len); 265 + if (cmp) { 266 + if (!printed) { 267 + TH_LOG("AF_UNIX :%s", ret[0] < 0 ? strerror(recv_errno[0]) : recv_buf[0]); 268 + TH_LOG("TCP :%s", ret[1] < 0 ? strerror(recv_errno[1]) : recv_buf[1]); 269 + } 270 + 271 + if (self->tcp_compliant) 272 + ASSERT_EQ(cmp, 0); 273 + } 274 + } 275 + } 276 + 277 + static void __setinlinepair(struct __test_metadata *_metadata, 278 + FIXTURE_DATA(msg_oob) *self) 279 + { 280 + int i, oob_inline = 1; 281 + 282 + for (i = 0; i < 2; i++) { 283 + int ret; 284 + 285 + ret = setsockopt(self->fd[i * 2 + 1], SOL_SOCKET, SO_OOBINLINE, 286 + &oob_inline, sizeof(oob_inline)); 287 + ASSERT_EQ(ret, 0); 288 + } 289 + } 290 + 291 + static void __siocatmarkpair(struct __test_metadata *_metadata, 292 + FIXTURE_DATA(msg_oob) *self, 293 + bool oob_head) 294 + { 295 + int answ[2] = {}; 296 + int i; 297 + 298 + for (i = 0; i < 2; i++) { 299 + int ret; 300 + 301 + ret = ioctl(self->fd[i * 2 + 1], SIOCATMARK, &answ[i]); 302 + ASSERT_EQ(ret, 0); 303 + } 304 + 305 + ASSERT_EQ(answ[0], oob_head); 306 + 307 + if (self->tcp_compliant) 308 + ASSERT_EQ(answ[0], answ[1]); 309 + } 310 + 311 + #define sendpair(buf, len, flags) \ 312 + __sendpair(_metadata, self, buf, len, flags) 313 + 314 + #define recvpair(expected_buf, expected_len, buf_len, flags) \ 315 + do { \ 316 + if (variant->peek) \ 317 + __recvpair(_metadata, self, \ 318 + expected_buf, expected_len, \ 319 + buf_len, (flags) | MSG_PEEK); \ 320 + __recvpair(_metadata, self, \ 321 + expected_buf, expected_len, buf_len, flags); \ 322 + } while (0) 323 + 324 + #define epollpair(oob_remaining) \ 325 + __epollpair(_metadata, self, oob_remaining) 326 + 327 + #define siocatmarkpair(oob_head) \ 328 + __siocatmarkpair(_metadata, self, oob_head) 329 + 330 + #define setinlinepair() \ 331 + __setinlinepair(_metadata, self) 332 + 333 + #define tcp_incompliant \ 334 + for (self->tcp_compliant = false; \ 335 + self->tcp_compliant == false; \ 336 + self->tcp_compliant = true) 337 + 338 + TEST_F(msg_oob, non_oob) 339 + { 340 + sendpair("x", 1, 0); 341 + epollpair(false); 342 + siocatmarkpair(false); 343 + 344 + recvpair("", -EINVAL, 1, MSG_OOB); 345 + epollpair(false); 346 + siocatmarkpair(false); 347 + } 348 + 349 + TEST_F(msg_oob, oob) 350 + { 351 + sendpair("x", 1, MSG_OOB); 352 + epollpair(true); 353 + siocatmarkpair(true); 354 + 355 + recvpair("x", 1, 1, MSG_OOB); 356 + epollpair(false); 357 + siocatmarkpair(true); 358 + } 359 + 360 + TEST_F(msg_oob, oob_drop) 361 + { 362 + sendpair("x", 1, MSG_OOB); 363 + epollpair(true); 364 + siocatmarkpair(true); 365 + 366 + recvpair("", -EAGAIN, 1, 0); /* Drop OOB. */ 367 + epollpair(false); 368 + siocatmarkpair(false); 369 + 370 + recvpair("", -EINVAL, 1, MSG_OOB); 371 + epollpair(false); 372 + siocatmarkpair(false); 373 + } 374 + 375 + TEST_F(msg_oob, oob_ahead) 376 + { 377 + sendpair("hello", 5, MSG_OOB); 378 + epollpair(true); 379 + siocatmarkpair(false); 380 + 381 + recvpair("o", 1, 1, MSG_OOB); 382 + epollpair(false); 383 + siocatmarkpair(false); 384 + 385 + recvpair("hell", 4, 4, 0); 386 + epollpair(false); 387 + siocatmarkpair(true); 388 + } 389 + 390 + TEST_F(msg_oob, oob_break) 391 + { 392 + sendpair("hello", 5, MSG_OOB); 393 + epollpair(true); 394 + siocatmarkpair(false); 395 + 396 + recvpair("hell", 4, 5, 0); /* Break at OOB even with enough buffer. */ 397 + epollpair(true); 398 + siocatmarkpair(true); 399 + 400 + recvpair("o", 1, 1, MSG_OOB); 401 + epollpair(false); 402 + siocatmarkpair(true); 403 + 404 + recvpair("", -EAGAIN, 1, 0); 405 + siocatmarkpair(false); 406 + } 407 + 408 + TEST_F(msg_oob, oob_ahead_break) 409 + { 410 + sendpair("hello", 5, MSG_OOB); 411 + epollpair(true); 412 + siocatmarkpair(false); 413 + 414 + sendpair("world", 5, 0); 415 + epollpair(true); 416 + siocatmarkpair(false); 417 + 418 + recvpair("o", 1, 1, MSG_OOB); 419 + epollpair(false); 420 + siocatmarkpair(false); 421 + 422 + recvpair("hell", 4, 9, 0); /* Break at OOB even after it's recv()ed. */ 423 + epollpair(false); 424 + siocatmarkpair(true); 425 + 426 + recvpair("world", 5, 5, 0); 427 + epollpair(false); 428 + siocatmarkpair(false); 429 + } 430 + 431 + TEST_F(msg_oob, oob_break_drop) 432 + { 433 + sendpair("hello", 5, MSG_OOB); 434 + epollpair(true); 435 + siocatmarkpair(false); 436 + 437 + sendpair("world", 5, 0); 438 + epollpair(true); 439 + siocatmarkpair(false); 440 + 441 + recvpair("hell", 4, 10, 0); /* Break at OOB even with enough buffer. */ 442 + epollpair(true); 443 + siocatmarkpair(true); 444 + 445 + recvpair("world", 5, 10, 0); /* Drop OOB and recv() the next skb. */ 446 + epollpair(false); 447 + siocatmarkpair(false); 448 + 449 + recvpair("", -EINVAL, 1, MSG_OOB); 450 + epollpair(false); 451 + siocatmarkpair(false); 452 + } 453 + 454 + TEST_F(msg_oob, ex_oob_break) 455 + { 456 + sendpair("hello", 5, MSG_OOB); 457 + epollpair(true); 458 + siocatmarkpair(false); 459 + 460 + sendpair("wor", 3, MSG_OOB); 461 + epollpair(true); 462 + siocatmarkpair(false); 463 + 464 + sendpair("ld", 2, 0); 465 + epollpair(true); 466 + siocatmarkpair(false); 467 + 468 + recvpair("hellowo", 7, 10, 0); /* Break at OOB but not at ex-OOB. */ 469 + epollpair(true); 470 + siocatmarkpair(true); 471 + 472 + recvpair("r", 1, 1, MSG_OOB); 473 + epollpair(false); 474 + siocatmarkpair(true); 475 + 476 + recvpair("ld", 2, 2, 0); 477 + epollpair(false); 478 + siocatmarkpair(false); 479 + } 480 + 481 + TEST_F(msg_oob, ex_oob_drop) 482 + { 483 + sendpair("x", 1, MSG_OOB); 484 + epollpair(true); 485 + siocatmarkpair(true); 486 + 487 + sendpair("y", 1, MSG_OOB); /* TCP drops "x" at this moment. */ 488 + epollpair(true); 489 + 490 + tcp_incompliant { 491 + siocatmarkpair(false); 492 + 493 + recvpair("x", 1, 1, 0); /* TCP drops "y" by passing through it. */ 494 + epollpair(true); 495 + siocatmarkpair(true); 496 + 497 + recvpair("y", 1, 1, MSG_OOB); /* TCP returns -EINVAL. */ 498 + epollpair(false); 499 + siocatmarkpair(true); 500 + } 501 + } 502 + 503 + TEST_F(msg_oob, ex_oob_drop_2) 504 + { 505 + sendpair("x", 1, MSG_OOB); 506 + epollpair(true); 507 + siocatmarkpair(true); 508 + 509 + sendpair("y", 1, MSG_OOB); /* TCP drops "x" at this moment. */ 510 + epollpair(true); 511 + 512 + tcp_incompliant { 513 + siocatmarkpair(false); 514 + } 515 + 516 + recvpair("y", 1, 1, MSG_OOB); 517 + epollpair(false); 518 + 519 + tcp_incompliant { 520 + siocatmarkpair(false); 521 + 522 + recvpair("x", 1, 1, 0); /* TCP returns -EAGAIN. */ 523 + epollpair(false); 524 + siocatmarkpair(true); 525 + } 526 + } 527 + 528 + TEST_F(msg_oob, ex_oob_ahead_break) 529 + { 530 + sendpair("hello", 5, MSG_OOB); 531 + epollpair(true); 532 + siocatmarkpair(false); 533 + 534 + sendpair("wor", 3, MSG_OOB); 535 + epollpair(true); 536 + siocatmarkpair(false); 537 + 538 + recvpair("r", 1, 1, MSG_OOB); 539 + epollpair(false); 540 + siocatmarkpair(false); 541 + 542 + sendpair("ld", 2, MSG_OOB); 543 + epollpair(true); 544 + siocatmarkpair(false); 545 + 546 + tcp_incompliant { 547 + recvpair("hellowol", 8, 10, 0); /* TCP recv()s "helloworl", why "r" ?? */ 548 + } 549 + 550 + epollpair(true); 551 + siocatmarkpair(true); 552 + 553 + recvpair("d", 1, 1, MSG_OOB); 554 + epollpair(false); 555 + siocatmarkpair(true); 556 + } 557 + 558 + TEST_F(msg_oob, ex_oob_siocatmark) 559 + { 560 + sendpair("hello", 5, MSG_OOB); 561 + epollpair(true); 562 + siocatmarkpair(false); 563 + 564 + recvpair("o", 1, 1, MSG_OOB); 565 + epollpair(false); 566 + siocatmarkpair(false); 567 + 568 + sendpair("world", 5, MSG_OOB); 569 + epollpair(true); 570 + siocatmarkpair(false); 571 + 572 + recvpair("hell", 4, 4, 0); /* Intentionally stop at ex-OOB. */ 573 + epollpair(true); 574 + siocatmarkpair(false); 575 + } 576 + 577 + TEST_F(msg_oob, inline_oob) 578 + { 579 + setinlinepair(); 580 + 581 + sendpair("x", 1, MSG_OOB); 582 + epollpair(true); 583 + siocatmarkpair(true); 584 + 585 + recvpair("", -EINVAL, 1, MSG_OOB); 586 + epollpair(true); 587 + siocatmarkpair(true); 588 + 589 + recvpair("x", 1, 1, 0); 590 + epollpair(false); 591 + siocatmarkpair(false); 592 + } 593 + 594 + TEST_F(msg_oob, inline_oob_break) 595 + { 596 + setinlinepair(); 597 + 598 + sendpair("hello", 5, MSG_OOB); 599 + epollpair(true); 600 + siocatmarkpair(false); 601 + 602 + recvpair("", -EINVAL, 1, MSG_OOB); 603 + epollpair(true); 604 + siocatmarkpair(false); 605 + 606 + recvpair("hell", 4, 5, 0); /* Break at OOB but not at ex-OOB. */ 607 + epollpair(true); 608 + siocatmarkpair(true); 609 + 610 + recvpair("o", 1, 1, 0); 611 + epollpair(false); 612 + siocatmarkpair(false); 613 + } 614 + 615 + TEST_F(msg_oob, inline_oob_ahead_break) 616 + { 617 + sendpair("hello", 5, MSG_OOB); 618 + epollpair(true); 619 + siocatmarkpair(false); 620 + 621 + sendpair("world", 5, 0); 622 + epollpair(true); 623 + siocatmarkpair(false); 624 + 625 + recvpair("o", 1, 1, MSG_OOB); 626 + epollpair(false); 627 + siocatmarkpair(false); 628 + 629 + setinlinepair(); 630 + 631 + recvpair("hell", 4, 9, 0); /* Break at OOB even with enough buffer. */ 632 + epollpair(false); 633 + siocatmarkpair(true); 634 + 635 + tcp_incompliant { 636 + recvpair("world", 5, 6, 0); /* TCP recv()s "oworld", ... "o" ??? */ 637 + } 638 + 639 + epollpair(false); 640 + siocatmarkpair(false); 641 + } 642 + 643 + TEST_F(msg_oob, inline_ex_oob_break) 644 + { 645 + sendpair("hello", 5, MSG_OOB); 646 + epollpair(true); 647 + siocatmarkpair(false); 648 + 649 + sendpair("wor", 3, MSG_OOB); 650 + epollpair(true); 651 + siocatmarkpair(false); 652 + 653 + sendpair("ld", 2, 0); 654 + epollpair(true); 655 + siocatmarkpair(false); 656 + 657 + setinlinepair(); 658 + 659 + recvpair("hellowo", 7, 10, 0); /* Break at OOB but not at ex-OOB. */ 660 + epollpair(true); 661 + siocatmarkpair(true); 662 + 663 + recvpair("rld", 3, 3, 0); 664 + epollpair(false); 665 + siocatmarkpair(false); 666 + } 667 + 668 + TEST_F(msg_oob, inline_ex_oob_no_drop) 669 + { 670 + sendpair("x", 1, MSG_OOB); 671 + epollpair(true); 672 + siocatmarkpair(true); 673 + 674 + setinlinepair(); 675 + 676 + sendpair("y", 1, MSG_OOB); /* TCP does NOT drops "x" at this moment. */ 677 + epollpair(true); 678 + siocatmarkpair(false); 679 + 680 + recvpair("x", 1, 1, 0); 681 + epollpair(true); 682 + siocatmarkpair(true); 683 + 684 + recvpair("y", 1, 1, 0); 685 + epollpair(false); 686 + siocatmarkpair(false); 687 + } 688 + 689 + TEST_F(msg_oob, inline_ex_oob_drop) 690 + { 691 + sendpair("x", 1, MSG_OOB); 692 + epollpair(true); 693 + siocatmarkpair(true); 694 + 695 + sendpair("y", 1, MSG_OOB); /* TCP drops "x" at this moment. */ 696 + epollpair(true); 697 + 698 + setinlinepair(); 699 + 700 + tcp_incompliant { 701 + siocatmarkpair(false); 702 + 703 + recvpair("x", 1, 1, 0); /* TCP recv()s "y". */ 704 + epollpair(true); 705 + siocatmarkpair(true); 706 + 707 + recvpair("y", 1, 1, 0); /* TCP returns -EAGAIN. */ 708 + epollpair(false); 709 + siocatmarkpair(false); 710 + } 711 + } 712 + 713 + TEST_F(msg_oob, inline_ex_oob_siocatmark) 714 + { 715 + sendpair("hello", 5, MSG_OOB); 716 + epollpair(true); 717 + siocatmarkpair(false); 718 + 719 + recvpair("o", 1, 1, MSG_OOB); 720 + epollpair(false); 721 + siocatmarkpair(false); 722 + 723 + setinlinepair(); 724 + 725 + sendpair("world", 5, MSG_OOB); 726 + epollpair(true); 727 + siocatmarkpair(false); 728 + 729 + recvpair("hell", 4, 4, 0); /* Intentionally stop at ex-OOB. */ 730 + epollpair(true); 731 + siocatmarkpair(false); 732 + } 733 + 734 + TEST_HARNESS_MAIN
-436
tools/testing/selftests/net/af_unix/test_unix_oob.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-or-later 2 - #include <stdio.h> 3 - #include <stdlib.h> 4 - #include <sys/socket.h> 5 - #include <arpa/inet.h> 6 - #include <unistd.h> 7 - #include <string.h> 8 - #include <fcntl.h> 9 - #include <sys/ioctl.h> 10 - #include <errno.h> 11 - #include <netinet/tcp.h> 12 - #include <sys/un.h> 13 - #include <sys/signal.h> 14 - #include <sys/poll.h> 15 - 16 - static int pipefd[2]; 17 - static int signal_recvd; 18 - static pid_t producer_id; 19 - static char sock_name[32]; 20 - 21 - static void sig_hand(int sn, siginfo_t *si, void *p) 22 - { 23 - signal_recvd = sn; 24 - } 25 - 26 - static int set_sig_handler(int signal) 27 - { 28 - struct sigaction sa; 29 - 30 - sa.sa_sigaction = sig_hand; 31 - sigemptyset(&sa.sa_mask); 32 - sa.sa_flags = SA_SIGINFO | SA_RESTART; 33 - 34 - return sigaction(signal, &sa, NULL); 35 - } 36 - 37 - static void set_filemode(int fd, int set) 38 - { 39 - int flags = fcntl(fd, F_GETFL, 0); 40 - 41 - if (set) 42 - flags &= ~O_NONBLOCK; 43 - else 44 - flags |= O_NONBLOCK; 45 - fcntl(fd, F_SETFL, flags); 46 - } 47 - 48 - static void signal_producer(int fd) 49 - { 50 - char cmd; 51 - 52 - cmd = 'S'; 53 - write(fd, &cmd, sizeof(cmd)); 54 - } 55 - 56 - static void wait_for_signal(int fd) 57 - { 58 - char buf[5]; 59 - 60 - read(fd, buf, 5); 61 - } 62 - 63 - static void die(int status) 64 - { 65 - fflush(NULL); 66 - unlink(sock_name); 67 - kill(producer_id, SIGTERM); 68 - exit(status); 69 - } 70 - 71 - int is_sioctatmark(int fd) 72 - { 73 - int ans = -1; 74 - 75 - if (ioctl(fd, SIOCATMARK, &ans, sizeof(ans)) < 0) { 76 - #ifdef DEBUG 77 - perror("SIOCATMARK Failed"); 78 - #endif 79 - } 80 - return ans; 81 - } 82 - 83 - void read_oob(int fd, char *c) 84 - { 85 - 86 - *c = ' '; 87 - if (recv(fd, c, sizeof(*c), MSG_OOB) < 0) { 88 - #ifdef DEBUG 89 - perror("Reading MSG_OOB Failed"); 90 - #endif 91 - } 92 - } 93 - 94 - int read_data(int pfd, char *buf, int size) 95 - { 96 - int len = 0; 97 - 98 - memset(buf, size, '0'); 99 - len = read(pfd, buf, size); 100 - #ifdef DEBUG 101 - if (len < 0) 102 - perror("read failed"); 103 - #endif 104 - return len; 105 - } 106 - 107 - static void wait_for_data(int pfd, int event) 108 - { 109 - struct pollfd pfds[1]; 110 - 111 - pfds[0].fd = pfd; 112 - pfds[0].events = event; 113 - poll(pfds, 1, -1); 114 - } 115 - 116 - void producer(struct sockaddr_un *consumer_addr) 117 - { 118 - int cfd; 119 - char buf[64]; 120 - int i; 121 - 122 - memset(buf, 'x', sizeof(buf)); 123 - cfd = socket(AF_UNIX, SOCK_STREAM, 0); 124 - 125 - wait_for_signal(pipefd[0]); 126 - if (connect(cfd, (struct sockaddr *)consumer_addr, 127 - sizeof(*consumer_addr)) != 0) { 128 - perror("Connect failed"); 129 - kill(0, SIGTERM); 130 - exit(1); 131 - } 132 - 133 - for (i = 0; i < 2; i++) { 134 - /* Test 1: Test for SIGURG and OOB */ 135 - wait_for_signal(pipefd[0]); 136 - memset(buf, 'x', sizeof(buf)); 137 - buf[63] = '@'; 138 - send(cfd, buf, sizeof(buf), MSG_OOB); 139 - 140 - wait_for_signal(pipefd[0]); 141 - 142 - /* Test 2: Test for OOB being overwitten */ 143 - memset(buf, 'x', sizeof(buf)); 144 - buf[63] = '%'; 145 - send(cfd, buf, sizeof(buf), MSG_OOB); 146 - 147 - memset(buf, 'x', sizeof(buf)); 148 - buf[63] = '#'; 149 - send(cfd, buf, sizeof(buf), MSG_OOB); 150 - 151 - wait_for_signal(pipefd[0]); 152 - 153 - /* Test 3: Test for SIOCATMARK */ 154 - memset(buf, 'x', sizeof(buf)); 155 - buf[63] = '@'; 156 - send(cfd, buf, sizeof(buf), MSG_OOB); 157 - 158 - memset(buf, 'x', sizeof(buf)); 159 - buf[63] = '%'; 160 - send(cfd, buf, sizeof(buf), MSG_OOB); 161 - 162 - memset(buf, 'x', sizeof(buf)); 163 - send(cfd, buf, sizeof(buf), 0); 164 - 165 - wait_for_signal(pipefd[0]); 166 - 167 - /* Test 4: Test for 1byte OOB msg */ 168 - memset(buf, 'x', sizeof(buf)); 169 - buf[0] = '@'; 170 - send(cfd, buf, 1, MSG_OOB); 171 - } 172 - } 173 - 174 - int 175 - main(int argc, char **argv) 176 - { 177 - int lfd, pfd; 178 - struct sockaddr_un consumer_addr, paddr; 179 - socklen_t len = sizeof(consumer_addr); 180 - char buf[1024]; 181 - int on = 0; 182 - char oob; 183 - int atmark; 184 - 185 - lfd = socket(AF_UNIX, SOCK_STREAM, 0); 186 - memset(&consumer_addr, 0, sizeof(consumer_addr)); 187 - consumer_addr.sun_family = AF_UNIX; 188 - sprintf(sock_name, "unix_oob_%d", getpid()); 189 - unlink(sock_name); 190 - strcpy(consumer_addr.sun_path, sock_name); 191 - 192 - if ((bind(lfd, (struct sockaddr *)&consumer_addr, 193 - sizeof(consumer_addr))) != 0) { 194 - perror("socket bind failed"); 195 - exit(1); 196 - } 197 - 198 - pipe(pipefd); 199 - 200 - listen(lfd, 1); 201 - 202 - producer_id = fork(); 203 - if (producer_id == 0) { 204 - producer(&consumer_addr); 205 - exit(0); 206 - } 207 - 208 - set_sig_handler(SIGURG); 209 - signal_producer(pipefd[1]); 210 - 211 - pfd = accept(lfd, (struct sockaddr *) &paddr, &len); 212 - fcntl(pfd, F_SETOWN, getpid()); 213 - 214 - signal_recvd = 0; 215 - signal_producer(pipefd[1]); 216 - 217 - /* Test 1: 218 - * veriyf that SIGURG is 219 - * delivered, 63 bytes are 220 - * read, oob is '@', and POLLPRI works. 221 - */ 222 - wait_for_data(pfd, POLLPRI); 223 - read_oob(pfd, &oob); 224 - len = read_data(pfd, buf, 1024); 225 - if (!signal_recvd || len != 63 || oob != '@') { 226 - fprintf(stderr, "Test 1 failed sigurg %d len %d %c\n", 227 - signal_recvd, len, oob); 228 - die(1); 229 - } 230 - 231 - signal_recvd = 0; 232 - signal_producer(pipefd[1]); 233 - 234 - /* Test 2: 235 - * Verify that the first OOB is over written by 236 - * the 2nd one and the first OOB is returned as 237 - * part of the read, and sigurg is received. 238 - */ 239 - wait_for_data(pfd, POLLIN | POLLPRI); 240 - len = 0; 241 - while (len < 70) 242 - len = recv(pfd, buf, 1024, MSG_PEEK); 243 - len = read_data(pfd, buf, 1024); 244 - read_oob(pfd, &oob); 245 - if (!signal_recvd || len != 127 || oob != '#') { 246 - fprintf(stderr, "Test 2 failed, sigurg %d len %d OOB %c\n", 247 - signal_recvd, len, oob); 248 - die(1); 249 - } 250 - 251 - signal_recvd = 0; 252 - signal_producer(pipefd[1]); 253 - 254 - /* Test 3: 255 - * verify that 2nd oob over writes 256 - * the first one and read breaks at 257 - * oob boundary returning 127 bytes 258 - * and sigurg is received and atmark 259 - * is set. 260 - * oob is '%' and second read returns 261 - * 64 bytes. 262 - */ 263 - len = 0; 264 - wait_for_data(pfd, POLLIN | POLLPRI); 265 - while (len < 150) 266 - len = recv(pfd, buf, 1024, MSG_PEEK); 267 - len = read_data(pfd, buf, 1024); 268 - atmark = is_sioctatmark(pfd); 269 - read_oob(pfd, &oob); 270 - 271 - if (!signal_recvd || len != 127 || oob != '%' || atmark != 1) { 272 - fprintf(stderr, 273 - "Test 3 failed, sigurg %d len %d OOB %c atmark %d\n", 274 - signal_recvd, len, oob, atmark); 275 - die(1); 276 - } 277 - 278 - signal_recvd = 0; 279 - 280 - len = read_data(pfd, buf, 1024); 281 - if (len != 64) { 282 - fprintf(stderr, "Test 3.1 failed, sigurg %d len %d OOB %c\n", 283 - signal_recvd, len, oob); 284 - die(1); 285 - } 286 - 287 - signal_recvd = 0; 288 - signal_producer(pipefd[1]); 289 - 290 - /* Test 4: 291 - * verify that a single byte 292 - * oob message is delivered. 293 - * set non blocking mode and 294 - * check proper error is 295 - * returned and sigurg is 296 - * received and correct 297 - * oob is read. 298 - */ 299 - 300 - set_filemode(pfd, 0); 301 - 302 - wait_for_data(pfd, POLLIN | POLLPRI); 303 - len = read_data(pfd, buf, 1024); 304 - if ((len == -1) && (errno == 11)) 305 - len = 0; 306 - 307 - read_oob(pfd, &oob); 308 - 309 - if (!signal_recvd || len != 0 || oob != '@') { 310 - fprintf(stderr, "Test 4 failed, sigurg %d len %d OOB %c\n", 311 - signal_recvd, len, oob); 312 - die(1); 313 - } 314 - 315 - set_filemode(pfd, 1); 316 - 317 - /* Inline Testing */ 318 - 319 - on = 1; 320 - if (setsockopt(pfd, SOL_SOCKET, SO_OOBINLINE, &on, sizeof(on))) { 321 - perror("SO_OOBINLINE"); 322 - die(1); 323 - } 324 - 325 - signal_recvd = 0; 326 - signal_producer(pipefd[1]); 327 - 328 - /* Test 1 -- Inline: 329 - * Check that SIGURG is 330 - * delivered and 63 bytes are 331 - * read and oob is '@' 332 - */ 333 - 334 - wait_for_data(pfd, POLLIN | POLLPRI); 335 - len = read_data(pfd, buf, 1024); 336 - 337 - if (!signal_recvd || len != 63) { 338 - fprintf(stderr, "Test 1 Inline failed, sigurg %d len %d\n", 339 - signal_recvd, len); 340 - die(1); 341 - } 342 - 343 - len = read_data(pfd, buf, 1024); 344 - 345 - if (len != 1) { 346 - fprintf(stderr, 347 - "Test 1.1 Inline failed, sigurg %d len %d oob %c\n", 348 - signal_recvd, len, oob); 349 - die(1); 350 - } 351 - 352 - signal_recvd = 0; 353 - signal_producer(pipefd[1]); 354 - 355 - /* Test 2 -- Inline: 356 - * Verify that the first OOB is over written by 357 - * the 2nd one and read breaks correctly on 358 - * 2nd OOB boundary with the first OOB returned as 359 - * part of the read, and sigurg is delivered and 360 - * siocatmark returns true. 361 - * next read returns one byte, the oob byte 362 - * and siocatmark returns false. 363 - */ 364 - len = 0; 365 - wait_for_data(pfd, POLLIN | POLLPRI); 366 - while (len < 70) 367 - len = recv(pfd, buf, 1024, MSG_PEEK); 368 - len = read_data(pfd, buf, 1024); 369 - atmark = is_sioctatmark(pfd); 370 - if (len != 127 || atmark != 1 || !signal_recvd) { 371 - fprintf(stderr, "Test 2 Inline failed, len %d atmark %d\n", 372 - len, atmark); 373 - die(1); 374 - } 375 - 376 - len = read_data(pfd, buf, 1024); 377 - atmark = is_sioctatmark(pfd); 378 - if (len != 1 || buf[0] != '#' || atmark == 1) { 379 - fprintf(stderr, "Test 2.1 Inline failed, len %d data %c atmark %d\n", 380 - len, buf[0], atmark); 381 - die(1); 382 - } 383 - 384 - signal_recvd = 0; 385 - signal_producer(pipefd[1]); 386 - 387 - /* Test 3 -- Inline: 388 - * verify that 2nd oob over writes 389 - * the first one and read breaks at 390 - * oob boundary returning 127 bytes 391 - * and sigurg is received and siocatmark 392 - * is true after the read. 393 - * subsequent read returns 65 bytes 394 - * because of oob which should be '%'. 395 - */ 396 - len = 0; 397 - wait_for_data(pfd, POLLIN | POLLPRI); 398 - while (len < 126) 399 - len = recv(pfd, buf, 1024, MSG_PEEK); 400 - len = read_data(pfd, buf, 1024); 401 - atmark = is_sioctatmark(pfd); 402 - if (!signal_recvd || len != 127 || !atmark) { 403 - fprintf(stderr, 404 - "Test 3 Inline failed, sigurg %d len %d data %c\n", 405 - signal_recvd, len, buf[0]); 406 - die(1); 407 - } 408 - 409 - len = read_data(pfd, buf, 1024); 410 - atmark = is_sioctatmark(pfd); 411 - if (len != 65 || buf[0] != '%' || atmark != 0) { 412 - fprintf(stderr, 413 - "Test 3.1 Inline failed, len %d oob %c atmark %d\n", 414 - len, buf[0], atmark); 415 - die(1); 416 - } 417 - 418 - signal_recvd = 0; 419 - signal_producer(pipefd[1]); 420 - 421 - /* Test 4 -- Inline: 422 - * verify that a single 423 - * byte oob message is delivered 424 - * and read returns one byte, the oob 425 - * byte and sigurg is received 426 - */ 427 - wait_for_data(pfd, POLLIN | POLLPRI); 428 - len = read_data(pfd, buf, 1024); 429 - if (!signal_recvd || len != 1 || buf[0] != '@') { 430 - fprintf(stderr, 431 - "Test 4 Inline failed, signal %d len %d data %c\n", 432 - signal_recvd, len, buf[0]); 433 - die(1); 434 - } 435 - die(0); 436 - }
+3
virt/kvm/dirty_ring.c
··· 55 55 struct kvm_memory_slot *memslot; 56 56 int as_id, id; 57 57 58 + if (!mask) 59 + return; 60 + 58 61 as_id = slot >> 16; 59 62 id = (u16)slot; 60 63
+3 -2
virt/kvm/guest_memfd.c
··· 510 510 } 511 511 512 512 if (folio_test_hwpoison(folio)) { 513 + folio_unlock(folio); 514 + folio_put(folio); 513 515 r = -EHWPOISON; 514 - goto out_unlock; 516 + goto out_fput; 515 517 } 516 518 517 519 page = folio_file_page(folio, index); ··· 524 522 525 523 r = 0; 526 524 527 - out_unlock: 528 525 folio_unlock(folio); 529 526 out_fput: 530 527 fput(file);
+10 -9
virt/kvm/kvm_main.c
··· 651 651 range->on_lock(kvm); 652 652 653 653 if (IS_KVM_NULL_FN(range->handler)) 654 - break; 654 + goto mmu_unlock; 655 655 } 656 656 r.ret |= range->handler(kvm, &gfn_range); 657 657 } ··· 660 660 if (range->flush_on_ret && r.ret) 661 661 kvm_flush_remote_tlbs(kvm); 662 662 663 + mmu_unlock: 663 664 if (r.found_memslot) 664 665 KVM_MMU_UNLOCK(kvm); 665 666 ··· 4026 4025 { 4027 4026 struct kvm *kvm = me->kvm; 4028 4027 struct kvm_vcpu *vcpu; 4029 - int last_boosted_vcpu = me->kvm->last_boosted_vcpu; 4028 + int last_boosted_vcpu; 4030 4029 unsigned long i; 4031 4030 int yielded = 0; 4032 4031 int try = 3; 4033 4032 int pass; 4034 4033 4034 + last_boosted_vcpu = READ_ONCE(kvm->last_boosted_vcpu); 4035 4035 kvm_vcpu_set_in_spin_loop(me, true); 4036 4036 /* 4037 4037 * We boost the priority of a VCPU that is runnable but not ··· 4070 4068 4071 4069 yielded = kvm_vcpu_yield_to(vcpu); 4072 4070 if (yielded > 0) { 4073 - kvm->last_boosted_vcpu = i; 4071 + WRITE_ONCE(kvm->last_boosted_vcpu, i); 4074 4072 break; 4075 4073 } else if (yielded < 0) { 4076 4074 try--; ··· 4429 4427 struct kvm_regs *kvm_regs; 4430 4428 4431 4429 r = -ENOMEM; 4432 - kvm_regs = kzalloc(sizeof(struct kvm_regs), GFP_KERNEL_ACCOUNT); 4430 + kvm_regs = kzalloc(sizeof(struct kvm_regs), GFP_KERNEL); 4433 4431 if (!kvm_regs) 4434 4432 goto out; 4435 4433 r = kvm_arch_vcpu_ioctl_get_regs(vcpu, kvm_regs); ··· 4456 4454 break; 4457 4455 } 4458 4456 case KVM_GET_SREGS: { 4459 - kvm_sregs = kzalloc(sizeof(struct kvm_sregs), 4460 - GFP_KERNEL_ACCOUNT); 4457 + kvm_sregs = kzalloc(sizeof(struct kvm_sregs), GFP_KERNEL); 4461 4458 r = -ENOMEM; 4462 4459 if (!kvm_sregs) 4463 4460 goto out; ··· 4548 4547 break; 4549 4548 } 4550 4549 case KVM_GET_FPU: { 4551 - fpu = kzalloc(sizeof(struct kvm_fpu), GFP_KERNEL_ACCOUNT); 4550 + fpu = kzalloc(sizeof(struct kvm_fpu), GFP_KERNEL); 4552 4551 r = -ENOMEM; 4553 4552 if (!fpu) 4554 4553 goto out; ··· 6211 6210 active = kvm_active_vms; 6212 6211 mutex_unlock(&kvm_lock); 6213 6212 6214 - env = kzalloc(sizeof(*env), GFP_KERNEL_ACCOUNT); 6213 + env = kzalloc(sizeof(*env), GFP_KERNEL); 6215 6214 if (!env) 6216 6215 return; 6217 6216 ··· 6227 6226 add_uevent_var(env, "PID=%d", kvm->userspace_pid); 6228 6227 6229 6228 if (!IS_ERR(kvm->debugfs_dentry)) { 6230 - char *tmp, *p = kmalloc(PATH_MAX, GFP_KERNEL_ACCOUNT); 6229 + char *tmp, *p = kmalloc(PATH_MAX, GFP_KERNEL); 6231 6230 6232 6231 if (p) { 6233 6232 tmp = dentry_path_raw(kvm->debugfs_dentry, p, PATH_MAX);