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MIPS: asm: futex: Set the appropriate ISA level for MIPS R6
MIPS R6 changed the opcodes for LL/SC instructions so we need to set
the appropriate ISA level.
Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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arch/mips/include/asm/futex.h
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arch/mips/include/asm/futex.h
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" .set arch=r4000 \n" \
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" .set "MIPS_ISA_ARCH_LEVEL" \n" \
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"1: "user_ll("%1", "%4")" # __futex_atomic_op\n" \
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" .set mips0 \n" \
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" " insn " \n" \
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" .set arch=r4000 \n" \
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" .set "MIPS_ISA_ARCH_LEVEL" \n" \
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"2: "user_sc("$1", "%2")" \n" \
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" beqz $1, 1b \n" \
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__WEAK_LLSC_MB \
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"# futex_atomic_cmpxchg_inatomic \n"
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" .set push \n"
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" .set noat \n"
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" .set arch=r4000 \n"
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" .set "MIPS_ISA_ARCH_LEVEL" \n"
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"1: "user_ll("%1", "%3")" \n"
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" bne %1, %z4, 3f \n"
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" .set mips0 \n"
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" move $1, %z5 \n"
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" .set arch=r4000 \n"
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" .set "MIPS_ISA_ARCH_LEVEL" \n"
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"2: "user_sc("$1", "%2")" \n"
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" beqz $1, 1b \n"
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__WEAK_LLSC_MB