Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

Pull "Allwinner H3/H5 changes for 4.17" from Maxime Ripard:

Here is our usual bunch of changes to the common DTSI shared between arm
and arm64, and their associated device trees.

Even though the diffstat is quite big, it's been mostly just cleanups. The
big feature is that the HDMI is now suported on H3 and H5 boards.

* tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus
ARM: dts: sun8i-h3: Add Mali node
ARM64: dts: sun50i: h5: Enable HDMI output on H5 boards
ARM: dts: sun8i: h3: Enable HDMI output on H3 boards
ARM: dts: sunxi: h3/h5: Add HDMI pipeline
ARM: dts: sun8i: h2-plus: remove unnecessary mmc1_pins node
ARM: dts: sunxi: h3-h5: rename mmc0_pins_a and mmc1_pins_a
ARM: dts: sunxi: h3-h5: Move pinctrl of mmc1 from dts to dtsi
ARM: dts: sunxi: h3-h5: Move pinctrl of mmc0 from dts to dtsi
ARM: dts: sunxi: h3-h5: remove mmc0 card detection pin from pinctrl
ARM: dts: sun8i: h2+: add support for Banana Pi M2 Zero board
ARM: dts: sunxi: Switch MMC nodes away from cd-inverted property
ARM: dts: nanopi-neo-air: Add WiFi / eMMC

+794 -242
+1
Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
··· 10 10 * And, optionally, one of the vendor specific compatible: 11 11 + allwinner,sun4i-a10-mali 12 12 + allwinner,sun7i-a20-mali 13 + + allwinner,sun8i-h3-mali 13 14 + allwinner,sun50i-h5-mali 14 15 + amlogic,meson-gxbb-mali 15 16 + amlogic,meson-gxl-mali
+1
arch/arm/boot/dts/Makefile
··· 993 993 sun8i-a83t-cubietruck-plus.dtb \ 994 994 sun8i-a83t-tbs-a711.dtb \ 995 995 sun8i-h2-plus-orangepi-r1.dtb \ 996 + sun8i-h2-plus-bananapi-m2-zero.dtb \ 996 997 sun8i-h2-plus-orangepi-zero.dtb \ 997 998 sun8i-h3-bananapi-m2-plus.dtb \ 998 999 sun8i-h3-beelink-x2.dtb \
+1 -2
arch/arm/boot/dts/sun4i-a10-a1000.dts
··· 164 164 &mmc0 { 165 165 vmmc-supply = <&reg_vcc3v3>; 166 166 bus-width = <4>; 167 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 168 - cd-inverted; 167 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 169 168 status = "okay"; 170 169 }; 171 170
+1 -2
arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
··· 106 106 &mmc0 { 107 107 vmmc-supply = <&reg_vcc3v3>; 108 108 bus-width = <4>; 109 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 110 - cd-inverted; 109 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 111 110 status = "okay"; 112 111 }; 113 112
+1 -2
arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts
··· 123 123 &mmc0 { 124 124 vmmc-supply = <&reg_vcc3v3>; 125 125 bus-width = <4>; 126 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 127 - cd-inverted; 126 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 128 127 status = "okay"; 129 128 }; 130 129
+1 -2
arch/arm/boot/dts/sun4i-a10-cubieboard.dts
··· 162 162 &mmc0 { 163 163 vmmc-supply = <&reg_vcc3v3>; 164 164 bus-width = <4>; 165 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 166 - cd-inverted; 165 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 167 166 status = "okay"; 168 167 }; 169 168
+1 -2
arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
··· 150 150 &mmc0 { 151 151 vmmc-supply = <&reg_vcc3v3>; 152 152 bus-width = <4>; 153 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 154 - cd-inverted; 153 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 155 154 status = "okay"; 156 155 }; 157 156
+1 -2
arch/arm/boot/dts/sun4i-a10-gemei-g9.dts
··· 141 141 &mmc0 { 142 142 vmmc-supply = <&reg_vcc3v3>; 143 143 bus-width = <4>; 144 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH01 */ 145 - cd-inverted; 144 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH01 */ 146 145 status = "okay"; 147 146 }; 148 147
+1 -2
arch/arm/boot/dts/sun4i-a10-hackberry.dts
··· 106 106 &mmc0 { 107 107 vmmc-supply = <&reg_vcc3v3>; 108 108 bus-width = <4>; 109 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 110 - cd-inverted; 109 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 111 110 status = "okay"; 112 111 }; 113 112
+1 -2
arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts
··· 78 78 &mmc0 { 79 79 vmmc-supply = <&reg_vcc3v3>; 80 80 bus-width = <4>; 81 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 82 - cd-inverted; 81 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 83 82 status = "okay"; 84 83 }; 85 84
+1 -2
arch/arm/boot/dts/sun4i-a10-inet1.dts
··· 152 152 &mmc0 { 153 153 vmmc-supply = <&reg_vcc3v3>; 154 154 bus-width = <4>; 155 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 156 - cd-inverted; 155 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 157 156 status = "okay"; 158 157 }; 159 158
+1 -2
arch/arm/boot/dts/sun4i-a10-inet97fv2.dts
··· 142 142 &mmc0 { 143 143 vmmc-supply = <&reg_vcc3v3>; 144 144 bus-width = <4>; 145 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 146 - cd-inverted; 145 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 147 146 status = "okay"; 148 147 }; 149 148
+1 -2
arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts
··· 300 300 &mmc0 { 301 301 vmmc-supply = <&reg_vcc3v3>; 302 302 bus-width = <4>; 303 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 304 - cd-inverted; 303 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 305 304 status = "okay"; 306 305 }; 307 306
+1 -2
arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts
··· 106 106 pinctrl-0 = <&mmc0_pins>; 107 107 vmmc-supply = <&reg_vcc3v3>; 108 108 bus-width = <4>; 109 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 110 - cd-inverted; 109 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 111 110 status = "okay"; 112 111 }; 113 112
+1 -2
arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
··· 133 133 &mmc0 { 134 134 vmmc-supply = <&reg_vcc3v3>; 135 135 bus-width = <4>; 136 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 137 - cd-inverted; 136 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 138 137 status = "okay"; 139 138 }; 140 139
+1 -2
arch/arm/boot/dts/sun4i-a10-marsboard.dts
··· 132 132 &mmc0 { 133 133 vmmc-supply = <&reg_vcc3v3>; 134 134 bus-width = <4>; 135 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 136 - cd-inverted; 135 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 137 136 status = "okay"; 138 137 }; 139 138
+1 -2
arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
··· 96 96 &mmc0 { 97 97 vmmc-supply = <&reg_vcc3v3>; 98 98 bus-width = <4>; 99 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 100 - cd-inverted; 99 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 101 100 status = "okay"; 102 101 }; 103 102
+1 -2
arch/arm/boot/dts/sun4i-a10-mk802.dts
··· 98 98 &mmc0 { 99 99 vmmc-supply = <&reg_vcc3v3>; 100 100 bus-width = <4>; 101 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 102 - cd-inverted; 101 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 103 102 status = "okay"; 104 103 }; 105 104
+1 -2
arch/arm/boot/dts/sun4i-a10-mk802ii.dts
··· 82 82 &mmc0 { 83 83 vmmc-supply = <&reg_vcc3v3>; 84 84 bus-width = <4>; 85 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 86 - cd-inverted; 85 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 87 86 status = "okay"; 88 87 }; 89 88
+1 -2
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
··· 164 164 &mmc0 { 165 165 vmmc-supply = <&reg_vcc3v3>; 166 166 bus-width = <4>; 167 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 168 - cd-inverted; 167 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 169 168 status = "okay"; 170 169 }; 171 170
+1 -2
arch/arm/boot/dts/sun4i-a10-pcduino.dts
··· 140 140 &mmc0 { 141 141 vmmc-supply = <&reg_vcc3v3>; 142 142 bus-width = <4>; 143 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 144 - cd-inverted; 143 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 145 144 status = "okay"; 146 145 }; 147 146
+1 -2
arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
··· 138 138 &mmc0 { 139 139 vmmc-supply = <&reg_vcc3v3>; 140 140 bus-width = <4>; 141 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 142 - cd-inverted; 141 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 143 142 status = "okay"; 144 143 }; 145 144
+1 -2
arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
··· 93 93 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_t003>; 94 94 vmmc-supply = <&reg_vcc3v3>; 95 95 bus-width = <4>; 96 - cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ 97 - cd-inverted; 96 + cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ 98 97 status = "okay"; 99 98 }; 100 99
+1 -2
arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
··· 104 104 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_t004>; 105 105 vmmc-supply = <&reg_vcc3v3>; 106 106 bus-width = <4>; 107 - cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ 108 - cd-inverted; 107 + cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ 109 108 status = "okay"; 110 109 }; 111 110
+1 -2
arch/arm/boot/dts/sun5i-a10s-mk802.dts
··· 92 92 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_mk802>; 93 93 vmmc-supply = <&reg_vcc3v3>; 94 94 bus-width = <4>; 95 - cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ 96 - cd-inverted; 95 + cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ 97 96 status = "okay"; 98 97 }; 99 98
+2 -4
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
··· 201 201 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino_micro>; 202 202 vmmc-supply = <&reg_vcc3v3>; 203 203 bus-width = <4>; 204 - cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ 205 - cd-inverted; 204 + cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ 206 205 status = "okay"; 207 206 }; 208 207 ··· 210 211 pinctrl-0 = <&mmc1_pins_a>, <&mmc1_cd_pin_olinuxino_micro>; 211 212 vmmc-supply = <&reg_vcc3v3>; 212 213 bus-width = <4>; 213 - cd-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */ 214 - cd-inverted; 214 + cd-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; /* PG13 */ 215 215 status = "okay"; 216 216 }; 217 217
+1 -2
arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
··· 80 80 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_r7>; 81 81 vmmc-supply = <&reg_vcc3v3>; 82 82 bus-width = <4>; 83 - cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ 84 - cd-inverted; 83 + cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ 85 84 status = "okay"; 86 85 }; 87 86
+1 -2
arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
··· 130 130 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_wobo_i5>; 131 131 vmmc-supply = <&reg_vcc3v3>; 132 132 bus-width = <4>; 133 - cd-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ 134 - cd-inverted; 133 + cd-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 */ 135 134 status = "okay"; 136 135 }; 137 136
+1 -2
arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts
··· 125 125 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_d709>; 126 126 vmmc-supply = <&reg_vcc3v3>; 127 127 bus-width = <4>; 128 - cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ 129 - cd-inverted; 128 + cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ 130 129 status = "okay"; 131 130 }; 132 131
+1 -2
arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
··· 120 120 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_h702>; 121 121 vmmc-supply = <&reg_vcc3v3>; 122 122 bus-width = <4>; 123 - cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ 124 - cd-inverted; 123 + cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ 125 124 status = "okay"; 126 125 }; 127 126
+1 -2
arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
··· 99 99 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxinom>; 100 100 vmmc-supply = <&reg_vcc3v3>; 101 101 bus-width = <4>; 102 - cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ 103 - cd-inverted; 102 + cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ 104 103 status = "okay"; 105 104 }; 106 105
+1 -2
arch/arm/boot/dts/sun5i-a13-olinuxino.dts
··· 194 194 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>; 195 195 vmmc-supply = <&reg_vcc3v3>; 196 196 bus-width = <4>; 197 - cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ 198 - cd-inverted; 197 + cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ 199 198 status = "okay"; 200 199 }; 201 200
+1 -2
arch/arm/boot/dts/sun5i-gr8-evb.dts
··· 236 236 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_gr8_evb>; 237 237 vmmc-supply = <&reg_vcc3v3>; 238 238 bus-width = <4>; 239 - cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ 240 - cd-inverted; 239 + cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ 241 240 status = "okay"; 242 241 }; 243 242
+1 -2
arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
··· 127 127 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 128 128 vmmc-supply = <&reg_vcc3v0>; 129 129 bus-width = <4>; 130 - cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ 131 - cd-inverted; 130 + cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ 132 131 status = "okay"; 133 132 }; 134 133
+1 -2
arch/arm/boot/dts/sun6i-a31-colombus.dts
··· 117 117 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_colombus>; 118 118 vmmc-supply = <&reg_vcc3v0>; 119 119 bus-width = <4>; 120 - cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ 121 - cd-inverted; 120 + cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */ 122 121 status = "okay"; 123 122 }; 124 123
+1 -2
arch/arm/boot/dts/sun6i-a31-hummingbird.dts
··· 218 218 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_hummingbird>; 219 219 vmmc-supply = <&reg_dcdc1>; 220 220 bus-width = <4>; 221 - cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ 222 - cd-inverted; 221 + cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */ 223 222 status = "okay"; 224 223 }; 225 224
+1 -2
arch/arm/boot/dts/sun6i-a31-i7.dts
··· 149 149 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_i7>; 150 150 vmmc-supply = <&reg_vcc3v3>; 151 151 bus-width = <4>; 152 - cd-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ 153 - cd-inverted; 152 + cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */ 154 153 status = "okay"; 155 154 }; 156 155
+1 -2
arch/arm/boot/dts/sun6i-a31-m9.dts
··· 107 107 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>; 108 108 vmmc-supply = <&reg_dcdc1>; 109 109 bus-width = <4>; 110 - cd-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ 111 - cd-inverted; 110 + cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */ 112 111 status = "okay"; 113 112 }; 114 113
+1 -2
arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
··· 107 107 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>; 108 108 vmmc-supply = <&reg_dcdc1>; 109 109 bus-width = <4>; 110 - cd-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ 111 - cd-inverted; 110 + cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */ 112 111 status = "okay"; 113 112 }; 114 113
+1 -2
arch/arm/boot/dts/sun6i-a31s-primo81.dts
··· 151 151 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_primo81>; 152 152 vmmc-supply = <&reg_dcdc1>; 153 153 bus-width = <4>; 154 - cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ 155 - cd-inverted; 154 + cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */ 156 155 status = "okay"; 157 156 }; 158 157
+1 -2
arch/arm/boot/dts/sun6i-a31s-sina31s.dts
··· 167 167 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina31s>; 168 168 vmmc-supply = <&reg_dcdc1>; 169 169 bus-width = <4>; 170 - cd-gpios = <&pio 0 4 GPIO_ACTIVE_HIGH>; /* PA4 */ 171 - cd-inverted; 170 + cd-gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */ 172 171 status = "okay"; 173 172 }; 174 173
+1 -2
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
··· 120 120 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bpi_m2>; 121 121 vmmc-supply = <&reg_vcc3v0>; 122 122 bus-width = <4>; 123 - cd-gpios = <&pio 0 4 GPIO_ACTIVE_HIGH>; /* PA4 */ 124 - cd-inverted; 123 + cd-gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */ 125 124 status = "okay"; 126 125 }; 127 126
+1 -2
arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
··· 102 102 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bs1078v2>; 103 103 vmmc-supply = <&reg_vcc3v0>; 104 104 bus-width = <4>; 105 - cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ 106 - cd-inverted; 105 + cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */ 107 106 status = "okay"; 108 107 }; 109 108
+1 -2
arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi
··· 69 69 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_e708_q1>; 70 70 vmmc-supply = <&reg_dcdc1>; 71 71 bus-width = <4>; 72 - cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ 73 - cd-inverted; 72 + cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */ 74 73 status = "okay"; 75 74 }; 76 75
+1 -2
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
··· 184 184 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bpi_m1p>; 185 185 vmmc-supply = <&reg_vcc3v3>; 186 186 bus-width = <4>; 187 - cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ 188 - cd-inverted; 187 + cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */ 189 188 status = "okay"; 190 189 }; 191 190
+1 -2
arch/arm/boot/dts/sun7i-a20-bananapi.dts
··· 184 184 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bananapi>; 185 185 vmmc-supply = <&reg_vcc3v3>; 186 186 bus-width = <4>; 187 - cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ 188 - cd-inverted; 187 + cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */ 189 188 status = "okay"; 190 189 }; 191 190
+1 -2
arch/arm/boot/dts/sun7i-a20-bananapro.dts
··· 158 158 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bananapro>; 159 159 vmmc-supply = <&reg_vcc3v3>; 160 160 bus-width = <4>; 161 - cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ 162 - cd-inverted; 161 + cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */ 163 162 status = "okay"; 164 163 }; 165 164
+1 -2
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
··· 165 165 pinctrl-0 = <&mmc0_pins_a>; 166 166 vmmc-supply = <&reg_vcc3v3>; 167 167 bus-width = <4>; 168 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 169 - cd-inverted; 168 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 170 169 status = "okay"; 171 170 }; 172 171
+1 -2
arch/arm/boot/dts/sun7i-a20-cubietruck.dts
··· 206 206 pinctrl-0 = <&mmc0_pins_a>; 207 207 vmmc-supply = <&reg_vcc3v3>; 208 208 bus-width = <4>; 209 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 210 - cd-inverted; 209 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 211 210 status = "okay"; 212 211 }; 213 212
+1 -2
arch/arm/boot/dts/sun7i-a20-hummingbird.dts
··· 163 163 pinctrl-0 = <&mmc0_pins_a>; 164 164 vmmc-supply = <&reg_vcc3v0>; 165 165 bus-width = <4>; 166 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 167 - cd-inverted; 166 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 168 167 status = "okay"; 169 168 }; 170 169
+1 -2
arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
··· 160 160 pinctrl-0 = <&mmc0_pins_a>; 161 161 vmmc-supply = <&reg_vcc3v3>; 162 162 bus-width = <4>; 163 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 164 - cd-inverted; 163 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 165 164 status = "okay"; 166 165 }; 167 166
+1 -2
arch/arm/boot/dts/sun7i-a20-icnova-swac.dts
··· 107 107 pinctrl-0 = <&mmc0_pins_a>; 108 108 vmmc-supply = <&reg_vcc3v3>; 109 109 bus-width = <4>; 110 - cd-gpios = <&pio 8 5 GPIO_ACTIVE_HIGH>; /* PI5 */ 111 - cd-inverted; 110 + cd-gpios = <&pio 8 5 GPIO_ACTIVE_LOW>; /* PI5 */ 112 111 status = "okay"; 113 112 }; 114 113
+1 -2
arch/arm/boot/dts/sun7i-a20-itead-ibox.dts
··· 124 124 pinctrl-0 = <&mmc0_pins_a>; 125 125 vmmc-supply = <&reg_vcc3v3>; 126 126 bus-width = <4>; 127 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 128 - cd-inverted; 127 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 129 128 status = "okay"; 130 129 }; 131 130
+1 -2
arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
··· 227 227 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_lamobo_r1>; 228 228 vmmc-supply = <&reg_vcc3v3>; 229 229 bus-width = <4>; 230 - cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ 231 - cd-inverted; 230 + cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */ 232 231 status = "okay"; 233 232 }; 234 233
+1 -2
arch/arm/boot/dts/sun7i-a20-m3.dts
··· 120 120 pinctrl-0 = <&mmc0_pins_a>; 121 121 vmmc-supply = <&reg_vcc3v3>; 122 122 bus-width = <4>; 123 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 124 - cd-inverted; 123 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 125 124 status = "okay"; 126 125 }; 127 126
+1 -2
arch/arm/boot/dts/sun7i-a20-mk808c.dts
··· 137 137 pinctrl-0 = <&mmc0_pins_a>; 138 138 vmmc-supply = <&reg_vcc3v0>; 139 139 bus-width = <4>; 140 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 141 - cd-inverted; 140 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 142 141 status = "okay"; 143 142 }; 144 143
+2 -4
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
··· 215 215 pinctrl-0 = <&mmc0_pins_a>; 216 216 vmmc-supply = <&reg_vcc3v3>; 217 217 bus-width = <4>; 218 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 219 - cd-inverted; 218 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 220 219 status = "okay"; 221 220 }; 222 221 ··· 224 225 pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_olimex_som_evb>; 225 226 vmmc-supply = <&reg_vcc3v3>; 226 227 bus-width = <4>; 227 - cd-gpios = <&pio 7 0 GPIO_ACTIVE_HIGH>; /* PH0 */ 228 - cd-inverted; 228 + cd-gpios = <&pio 7 0 GPIO_ACTIVE_LOW>; /* PH0 */ 229 229 status = "okay"; 230 230 }; 231 231
+1 -2
arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
··· 158 158 pinctrl-0 = <&mmc0_pins_a>; 159 159 vmmc-supply = <&reg_vcc3v3>; 160 160 bus-width = <4>; 161 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 162 - cd-inverted; 161 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 163 162 status = "okay"; 164 163 }; 165 164
+1 -2
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
··· 159 159 pinctrl-0 = <&mmc0_pins_a>; 160 160 vmmc-supply = <&reg_vcc3v3>; 161 161 bus-width = <4>; 162 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 163 - cd-inverted; 162 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 164 163 status = "okay"; 165 164 }; 166 165
+2 -4
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
··· 226 226 pinctrl-0 = <&mmc0_pins_a>; 227 227 vmmc-supply = <&reg_vcc3v3>; 228 228 bus-width = <4>; 229 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 230 - cd-inverted; 229 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 231 230 status = "okay"; 232 231 }; 233 232 ··· 235 236 pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_olinuxinom>; 236 237 vmmc-supply = <&reg_vcc3v3>; 237 238 bus-width = <4>; 238 - cd-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ 239 - cd-inverted; 239 + cd-gpios = <&pio 7 11 GPIO_ACTIVE_LOW>; /* PH11 */ 240 240 status = "okay"; 241 241 }; 242 242
+2 -4
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
··· 169 169 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_orangepi>; 170 170 vmmc-supply = <&reg_vcc3v3>; 171 171 bus-width = <4>; 172 - cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ 173 - cd-inverted; 172 + cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */ 174 173 status = "okay"; 175 174 }; 176 175 ··· 178 179 pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_orangepi>; 179 180 vmmc-supply = <&reg_vcc3v3>; 180 181 bus-width = <4>; 181 - cd-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ 182 - cd-inverted; 182 + cd-gpios = <&pio 7 11 GPIO_ACTIVE_LOW>; /* PH11 */ 183 183 status = "okay"; 184 184 }; 185 185
+1 -2
arch/arm/boot/dts/sun7i-a20-orangepi.dts
··· 135 135 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_orangepi>; 136 136 vmmc-supply = <&reg_vcc3v3>; 137 137 bus-width = <4>; 138 - cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ 139 - cd-inverted; 138 + cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */ 140 139 status = "okay"; 141 140 }; 142 141
+1 -2
arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts
··· 158 158 pinctrl-0 = <&mmc0_pins_a>; 159 159 vmmc-supply = <&reg_vcc3v3>; 160 160 bus-width = <4>; 161 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 162 - cd-inverted; 161 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 163 162 status = "okay"; 164 163 }; 165 164
+1 -2
arch/arm/boot/dts/sun7i-a20-pcduino3.dts
··· 159 159 pinctrl-0 = <&mmc0_pins_a>; 160 160 vmmc-supply = <&reg_vcc3v3>; 161 161 bus-width = <4>; 162 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 163 - cd-inverted; 162 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 164 163 status = "okay"; 165 164 }; 166 165
+1 -2
arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts
··· 154 154 pinctrl-0 = <&mmc0_pins_a>; 155 155 vmmc-supply = <&reg_vcc3v3>; 156 156 bus-width = <4>; 157 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 158 - cd-inverted; 157 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 159 158 status = "okay"; 160 159 }; 161 160
+1 -2
arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts
··· 123 123 pinctrl-0 = <&mmc0_pins_a>; 124 124 vmmc-supply = <&reg_vcc3v3>; 125 125 bus-width = <4>; 126 - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ 127 - cd-inverted; 126 + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ 128 127 status = "okay"; 129 128 }; 130 129
+1 -2
arch/arm/boot/dts/sun8i-a23-evb.dts
··· 107 107 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_evb>; 108 108 vmmc-supply = <&reg_vcc3v0>; 109 109 bus-width = <4>; 110 - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ 111 - cd-inverted; 110 + cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */ 112 111 status = "okay"; 113 112 }; 114 113
+1 -2
arch/arm/boot/dts/sun8i-a33-olinuxino.dts
··· 86 86 pinctrl-0 = <&mmc0_pins_a>; 87 87 vmmc-supply = <&reg_dcdc1>; 88 88 bus-width = <4>; 89 - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ 90 - cd-inverted; 89 + cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */ 91 90 status = "okay"; 92 91 }; 93 92
+1 -2
arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
··· 144 144 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina33>; 145 145 vmmc-supply = <&reg_dcdc1>; 146 146 bus-width = <4>; 147 - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ 148 - cd-inverted; 147 + cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */ 149 148 status = "okay"; 150 149 }; 151 150
+1 -2
arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
··· 87 87 pinctrl-names = "default"; 88 88 pinctrl-0 = <&mmc0_pins>; 89 89 vmmc-supply = <&reg_dcdc1>; 90 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 90 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 91 91 bus-width = <4>; 92 - cd-inverted; 93 92 status = "okay"; 94 93 }; 95 94
+1 -2
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
··· 151 151 pinctrl-0 = <&mmc0_pins>; 152 152 vmmc-supply = <&reg_dcdc1>; 153 153 bus-width = <4>; 154 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 155 - cd-inverted; 154 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 156 155 status = "okay"; 157 156 }; 158 157
+1 -2
arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
··· 176 176 pinctrl-0 = <&mmc0_pins>; 177 177 vmmc-supply = <&reg_dcdc1>; 178 178 bus-width = <4>; 179 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 180 - cd-inverted; 179 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 181 180 status = "okay"; 182 181 }; 183 182
+121
arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> 4 + * 5 + * Based on sun8i-h3-bananapi-m2-plus.dts, which is: 6 + * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org> 7 + */ 8 + 9 + /dts-v1/; 10 + #include "sun8i-h3.dtsi" 11 + #include "sunxi-common-regulators.dtsi" 12 + 13 + #include <dt-bindings/gpio/gpio.h> 14 + #include <dt-bindings/input/input.h> 15 + 16 + / { 17 + model = "Banana Pi BPI-M2-Zero"; 18 + compatible = "sinovoip,bpi-m2-zero", "allwinner,sun8i-h2-plus"; 19 + 20 + aliases { 21 + serial0 = &uart0; 22 + serial1 = &uart1; 23 + }; 24 + 25 + chosen { 26 + stdout-path = "serial0:115200n8"; 27 + }; 28 + 29 + leds { 30 + compatible = "gpio-leds"; 31 + pinctrl-names = "default"; 32 + 33 + pwr_led { 34 + label = "bananapi-m2-zero:red:pwr"; 35 + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ 36 + default-state = "on"; 37 + }; 38 + }; 39 + 40 + gpio_keys { 41 + compatible = "gpio-keys"; 42 + pinctrl-names = "default"; 43 + 44 + sw4 { 45 + label = "power"; 46 + linux,code = <BTN_0>; 47 + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; 48 + }; 49 + }; 50 + 51 + wifi_pwrseq: wifi_pwrseq { 52 + compatible = "mmc-pwrseq-simple"; 53 + pinctrl-names = "default"; 54 + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ 55 + }; 56 + }; 57 + 58 + &ehci0 { 59 + status = "okay"; 60 + }; 61 + 62 + &mmc0 { 63 + vmmc-supply = <&reg_vcc3v3>; 64 + bus-width = <4>; 65 + /* 66 + * On the production batch of this board the card detect GPIO is 67 + * high active (card inserted), although on the early samples it's 68 + * low active. 69 + */ 70 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 71 + status = "okay"; 72 + }; 73 + 74 + &mmc1 { 75 + vmmc-supply = <&reg_vcc3v3>; 76 + vqmmc-supply = <&reg_vcc3v3>; 77 + mmc-pwrseq = <&wifi_pwrseq>; 78 + bus-width = <4>; 79 + non-removable; 80 + status = "okay"; 81 + 82 + brcmf: wifi@1 { 83 + reg = <1>; 84 + compatible = "brcm,bcm4329-fmac"; 85 + interrupt-parent = <&pio>; 86 + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ 87 + interrupt-names = "host-wake"; 88 + }; 89 + }; 90 + 91 + &ohci0 { 92 + status = "okay"; 93 + }; 94 + 95 + &uart0 { 96 + pinctrl-names = "default"; 97 + pinctrl-0 = <&uart0_pins_a>; 98 + status = "okay"; 99 + }; 100 + 101 + &uart1 { 102 + pinctrl-names = "default"; 103 + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; 104 + status = "okay"; 105 + }; 106 + 107 + &usb_otg { 108 + dr_mode = "otg"; 109 + status = "okay"; 110 + }; 111 + 112 + &usbphy { 113 + usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ 114 + /* 115 + * There're two micro-USB connectors, one is power-only and another is 116 + * OTG. The Vbus of these two connectors are connected together, so 117 + * the external USB device will be powered just by the power input 118 + * from the power-only USB port. 119 + */ 120 + status = "okay"; 121 + };
+1 -10
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
··· 112 112 }; 113 113 114 114 &mmc0 { 115 - pinctrl-names = "default"; 116 - pinctrl-0 = <&mmc0_pins_a>; 117 115 vmmc-supply = <&reg_vcc3v3>; 118 116 bus-width = <4>; 119 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 120 - cd-inverted; 117 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 121 118 status = "okay"; 122 119 }; 123 120 124 121 &mmc1 { 125 - pinctrl-names = "default"; 126 - pinctrl-0 = <&mmc1_pins_a>; 127 122 vmmc-supply = <&reg_vcc_wifi>; 128 123 mmc-pwrseq = <&wifi_pwrseq>; 129 124 bus-width = <4>; ··· 132 137 xr819: sdio_wifi@1 { 133 138 reg = <1>; 134 139 }; 135 - }; 136 - 137 - &mmc1_pins_a { 138 - bias-pull-up; 139 140 }; 140 141 141 142 &ohci0 {
+26 -6
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
··· 61 61 stdout-path = "serial0:115200n8"; 62 62 }; 63 63 64 + connector { 65 + compatible = "hdmi-connector"; 66 + type = "a"; 67 + 68 + port { 69 + hdmi_con_in: endpoint { 70 + remote-endpoint = <&hdmi_out_con>; 71 + }; 72 + }; 73 + }; 74 + 64 75 leds { 65 76 compatible = "gpio-leds"; 66 77 pinctrl-names = "default"; ··· 111 100 }; 112 101 }; 113 102 103 + &de { 104 + status = "okay"; 105 + }; 106 + 114 107 &ehci0 { 115 108 status = "okay"; 116 109 }; ··· 144 129 }; 145 130 }; 146 131 132 + &hdmi { 133 + status = "okay"; 134 + }; 135 + 136 + &hdmi_out { 137 + hdmi_out_con: endpoint { 138 + remote-endpoint = <&hdmi_con_in>; 139 + }; 140 + }; 141 + 147 142 &ir { 148 143 pinctrl-names = "default"; 149 144 pinctrl-0 = <&ir_pins_a>; ··· 161 136 }; 162 137 163 138 &mmc0 { 164 - pinctrl-names = "default"; 165 - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 166 139 vmmc-supply = <&reg_vcc3v3>; 167 140 bus-width = <4>; 168 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 169 - cd-inverted; 141 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 170 142 status = "okay"; 171 143 }; 172 144 173 145 &mmc1 { 174 - pinctrl-names = "default"; 175 - pinctrl-0 = <&mmc1_pins_a>; 176 146 vmmc-supply = <&reg_vcc3v3>; 177 147 vqmmc-supply = <&reg_vcc3v3>; 178 148 mmc-pwrseq = <&wifi_pwrseq>;
+26 -4
arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
··· 23 23 stdout-path = "serial0:115200n8"; 24 24 }; 25 25 26 + connector { 27 + compatible = "hdmi-connector"; 28 + type = "a"; 29 + 30 + port { 31 + hdmi_con_in: endpoint { 32 + remote-endpoint = <&hdmi_out_con>; 33 + }; 34 + }; 35 + }; 36 + 26 37 leds { 27 38 compatible = "gpio-leds"; 28 39 ··· 131 120 status = "okay"; 132 121 }; 133 122 123 + &de { 124 + status = "okay"; 125 + }; 126 + 134 127 &ehci0 { 135 128 status = "okay"; 136 129 }; ··· 158 143 status = "okay"; 159 144 }; 160 145 146 + &hdmi { 147 + status = "okay"; 148 + }; 149 + 150 + &hdmi_out { 151 + hdmi_out_con: endpoint { 152 + remote-endpoint = <&hdmi_con_in>; 153 + }; 154 + }; 155 + 161 156 &ir { 162 157 pinctrl-names = "default"; 163 158 pinctrl-0 = <&ir_pins_a>; ··· 175 150 }; 176 151 177 152 &mmc0 { 178 - pinctrl-names = "default"; 179 - pinctrl-0 = <&mmc0_pins_a>; 180 153 vmmc-supply = <&reg_vcc_io>; 181 154 bus-width = <4>; 182 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 183 - cd-inverted; 155 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 184 156 status = "okay"; 185 157 }; 186 158
-2
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
··· 101 101 }; 102 102 103 103 &mmc1 { 104 - pinctrl-names = "default"; 105 - pinctrl-0 = <&mmc1_pins_a>; 106 104 vmmc-supply = <&reg_vcc3v3>; 107 105 vqmmc-supply = <&reg_vcc3v3>; 108 106 mmc-pwrseq = <&wifi_pwrseq>;
+25
arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
··· 49 49 aliases { 50 50 ethernet0 = &emac; 51 51 }; 52 + 53 + connector { 54 + compatible = "hdmi-connector"; 55 + type = "a"; 56 + 57 + port { 58 + hdmi_con_in: endpoint { 59 + remote-endpoint = <&hdmi_out_con>; 60 + }; 61 + }; 62 + }; 63 + }; 64 + 65 + &de { 66 + status = "okay"; 52 67 }; 53 68 54 69 &ehci1 { ··· 79 64 phy-mode = "mii"; 80 65 allwinner,leds-active-low; 81 66 status = "okay"; 67 + }; 68 + 69 + &hdmi { 70 + status = "okay"; 71 + }; 72 + 73 + &hdmi_out { 74 + hdmi_out_con: endpoint { 75 + remote-endpoint = <&hdmi_con_in>; 76 + }; 82 77 }; 83 78 84 79 &ir {
+23 -4
arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
··· 72 72 gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */ 73 73 }; 74 74 }; 75 + 76 + wifi_pwrseq: wifi_pwrseq { 77 + compatible = "mmc-pwrseq-simple"; 78 + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ 79 + }; 75 80 }; 76 81 77 82 &mmc0 { 78 - pinctrl-names = "default"; 79 - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 80 83 vmmc-supply = <&reg_vcc3v3>; 81 84 bus-width = <4>; 82 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 83 - cd-inverted; 85 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 84 86 status = "okay"; 87 + }; 88 + 89 + &mmc1 { 90 + vmmc-supply = <&reg_vcc3v3>; 91 + vqmmc-supply = <&reg_vcc3v3>; 92 + mmc-pwrseq = <&wifi_pwrseq>; 93 + bus-width = <4>; 94 + non-removable; 95 + status = "okay"; 96 + 97 + brcmf: bcrmf@1 { 98 + reg = <1>; 99 + compatible = "brcm,bcm4329-fmac"; 100 + interrupt-parent = <&pio>; 101 + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ 102 + interrupt-names = "host-wake"; 103 + }; 85 104 }; 86 105 87 106 &uart0 {
+1 -4
arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
··· 95 95 96 96 &mmc0 { 97 97 bus-width = <4>; 98 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; 99 - cd-inverted; 100 - pinctrl-names = "default"; 101 - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 98 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; 102 99 status = "okay"; 103 100 vmmc-supply = <&reg_vcc3v3>; 104 101 };
+26 -6
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
··· 62 62 stdout-path = "serial0:115200n8"; 63 63 }; 64 64 65 + connector { 66 + compatible = "hdmi-connector"; 67 + type = "a"; 68 + 69 + port { 70 + hdmi_con_in: endpoint { 71 + remote-endpoint = <&hdmi_out_con>; 72 + }; 73 + }; 74 + }; 75 + 65 76 leds { 66 77 compatible = "gpio-leds"; 67 78 pinctrl-names = "default"; ··· 125 114 status = "okay"; 126 115 }; 127 116 117 + &de { 118 + status = "okay"; 119 + }; 120 + 128 121 &ehci1 { 129 122 status = "okay"; 130 123 }; ··· 140 125 status = "okay"; 141 126 }; 142 127 128 + &hdmi { 129 + status = "okay"; 130 + }; 131 + 132 + &hdmi_out { 133 + hdmi_out_con: endpoint { 134 + remote-endpoint = <&hdmi_con_in>; 135 + }; 136 + }; 137 + 143 138 &ir { 144 139 pinctrl-names = "default"; 145 140 pinctrl-0 = <&ir_pins_a>; ··· 157 132 }; 158 133 159 134 &mmc0 { 160 - pinctrl-names = "default"; 161 - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 162 135 vmmc-supply = <&reg_vcc3v3>; 163 136 bus-width = <4>; 164 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 165 - cd-inverted; 137 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 166 138 status = "okay"; 167 139 }; 168 140 169 141 &mmc1 { 170 - pinctrl-names = "default"; 171 - pinctrl-0 = <&mmc1_pins_a>; 172 142 vmmc-supply = <&reg_vcc3v3>; 173 143 mmc-pwrseq = <&wifi_pwrseq>; 174 144 bus-width = <4>;
+26 -6
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
··· 61 61 stdout-path = "serial0:115200n8"; 62 62 }; 63 63 64 + connector { 65 + compatible = "hdmi-connector"; 66 + type = "a"; 67 + 68 + port { 69 + hdmi_con_in: endpoint { 70 + remote-endpoint = <&hdmi_out_con>; 71 + }; 72 + }; 73 + }; 74 + 64 75 leds { 65 76 compatible = "gpio-leds"; 66 77 pinctrl-names = "default"; ··· 102 91 }; 103 92 }; 104 93 94 + &de { 95 + status = "okay"; 96 + }; 97 + 105 98 &ehci1 { 106 99 status = "okay"; 107 100 }; 108 101 109 102 &ehci2 { 110 103 status = "okay"; 104 + }; 105 + 106 + &hdmi { 107 + status = "okay"; 108 + }; 109 + 110 + &hdmi_out { 111 + hdmi_out_con: endpoint { 112 + remote-endpoint = <&hdmi_con_in>; 113 + }; 111 114 }; 112 115 113 116 &ir { ··· 131 106 }; 132 107 133 108 &mmc0 { 134 - pinctrl-names = "default"; 135 - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 136 109 vmmc-supply = <&reg_vcc3v3>; 137 110 bus-width = <4>; 138 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 139 - cd-inverted; 111 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 140 112 status = "okay"; 141 113 }; 142 114 143 115 &mmc1 { 144 - pinctrl-names = "default"; 145 - pinctrl-0 = <&mmc1_pins_a>; 146 116 vmmc-supply = <&reg_vcc3v3>; 147 117 bus-width = <4>; 148 118 non-removable;
+25 -4
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
··· 60 60 stdout-path = "serial0:115200n8"; 61 61 }; 62 62 63 + connector { 64 + compatible = "hdmi-connector"; 65 + type = "a"; 66 + 67 + port { 68 + hdmi_con_in: endpoint { 69 + remote-endpoint = <&hdmi_out_con>; 70 + }; 71 + }; 72 + }; 73 + 63 74 leds { 64 75 compatible = "gpio-leds"; 65 76 pinctrl-names = "default"; ··· 101 90 }; 102 91 }; 103 92 93 + &de { 94 + status = "okay"; 95 + }; 96 + 104 97 &ehci0 { 105 98 status = "okay"; 106 99 }; ··· 117 102 phy-handle = <&int_mii_phy>; 118 103 phy-mode = "mii"; 119 104 allwinner,leds-active-low; 105 + }; 106 + 107 + &hdmi { 120 108 status = "okay"; 121 109 }; 122 110 111 + &hdmi_out { 112 + hdmi_out_con: endpoint { 113 + remote-endpoint = <&hdmi_con_in>; 114 + }; 115 + }; 116 + 123 117 &mmc0 { 124 - pinctrl-names = "default"; 125 - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 126 118 vmmc-supply = <&reg_vcc3v3>; 127 119 bus-width = <4>; 128 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 129 - cd-inverted; 120 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 130 121 status = "okay"; 131 122 }; 132 123
-2
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
··· 59 59 }; 60 60 61 61 &mmc1 { 62 - pinctrl-names = "default"; 63 - pinctrl-0 = <&mmc1_pins_a>; 64 62 vmmc-supply = <&reg_vcc3v3>; 65 63 bus-width = <4>; 66 64 non-removable;
+26 -4
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
··· 60 60 stdout-path = "serial0:115200n8"; 61 61 }; 62 62 63 + connector { 64 + compatible = "hdmi-connector"; 65 + type = "a"; 66 + 67 + port { 68 + hdmi_con_in: endpoint { 69 + remote-endpoint = <&hdmi_out_con>; 70 + }; 71 + }; 72 + }; 73 + 63 74 leds { 64 75 compatible = "gpio-leds"; 65 76 pinctrl-names = "default"; ··· 109 98 status = "okay"; 110 99 }; 111 100 101 + &de { 102 + status = "okay"; 103 + }; 104 + 112 105 &ehci0 { 113 106 status = "okay"; 114 107 }; ··· 136 121 status = "okay"; 137 122 }; 138 123 124 + &hdmi { 125 + status = "okay"; 126 + }; 127 + 128 + &hdmi_out { 129 + hdmi_out_con: endpoint { 130 + remote-endpoint = <&hdmi_con_in>; 131 + }; 132 + }; 133 + 139 134 &ir { 140 135 pinctrl-names = "default"; 141 136 pinctrl-0 = <&ir_pins_a>; ··· 153 128 }; 154 129 155 130 &mmc0 { 156 - pinctrl-names = "default"; 157 - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 158 131 vmmc-supply = <&reg_vcc3v3>; 159 132 bus-width = <4>; 160 - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ 161 - cd-inverted; 133 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 162 134 status = "okay"; 163 135 }; 164 136
+27
arch/arm/boot/dts/sun8i-h3.dtsi
··· 79 79 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 80 80 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 81 81 }; 82 + 83 + soc { 84 + mali: gpu@1c40000 { 85 + compatible = "allwinner,sun8i-h3-mali", "arm,mali-400"; 86 + reg = <0x01c40000 0x10000>; 87 + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 88 + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 89 + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 90 + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 91 + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 92 + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 93 + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 94 + interrupt-names = "gp", 95 + "gpmmu", 96 + "pp0", 97 + "ppmmu0", 98 + "pp1", 99 + "ppmmu1", 100 + "pmu"; 101 + clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; 102 + clock-names = "bus", "core"; 103 + resets = <&ccu RST_BUS_GPU>; 104 + 105 + assigned-clocks = <&ccu CLK_GPU>; 106 + assigned-clock-rates = <384000000>; 107 + }; 108 + }; 82 109 }; 83 110 84 111 &ccu {
+1 -2
arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts
··· 150 150 pinctrl-0 = <&mmc0_pins_a>; 151 151 vmmc-supply = <&reg_dcdc1>; 152 152 bus-width = <4>; 153 - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ 154 - cd-inverted; 153 + cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */ 155 154 status = "okay"; 156 155 }; 157 156
+1 -2
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
··· 164 164 &mmc0 { 165 165 vmmc-supply = <&reg_dcdc1>; 166 166 bus-width = <4>; 167 - cd-gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; /* PH13 */ 168 - cd-inverted; 167 + cd-gpios = <&pio 7 13 GPIO_ACTIVE_LOW>; /* PH13 */ 169 168 status = "okay"; 170 169 }; 171 170
+1 -2
arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
··· 85 85 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; 86 86 vmmc-supply = <&reg_dcdc1>; 87 87 bus-width = <4>; 88 - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ 89 - cd-inverted; 88 + cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */ 90 89 status = "okay"; 91 90 }; 92 91
+1 -2
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
··· 150 150 &mmc0 { 151 151 vmmc-supply = <&reg_dcdc1>; 152 152 bus-width = <4>; 153 - cd-gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; /* PH13 */ 154 - cd-inverted; 153 + cd-gpios = <&pio 7 13 GPIO_ACTIVE_LOW>; /* PH13 */ 155 154 status = "okay"; 156 155 }; 157 156
+1 -2
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
··· 144 144 pinctrl-0 = <&mmc0_pins>; 145 145 vmmc-supply = <&reg_dcdc1>; 146 146 bus-width = <4>; 147 - cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH18 */ 148 - cd-inverted; 147 + cd-gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; /* PH18 */ 149 148 status = "okay"; 150 149 }; 151 150
+1 -2
arch/arm/boot/dts/sun9i-a80-optimus.dts
··· 125 125 pinctrl-0 = <&mmc0_pins>; 126 126 vmmc-supply = <&reg_dcdc1>; 127 127 bus-width = <4>; 128 - cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */ 129 - cd-inverted; 128 + cd-gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; /* PH8 */ 130 129 status = "okay"; 131 130 }; 132 131
+114 -8
arch/arm/boot/dts/sunxi-h3-h5.dtsi
··· 105 105 }; 106 106 }; 107 107 108 + de: display-engine { 109 + compatible = "allwinner,sun8i-h3-display-engine"; 110 + allwinner,pipelines = <&mixer0>; 111 + status = "disabled"; 112 + }; 113 + 108 114 soc { 109 115 compatible = "simple-bus"; 110 116 #address-cells = <1>; ··· 129 123 #reset-cells = <1>; 130 124 }; 131 125 126 + mixer0: mixer@1100000 { 127 + compatible = "allwinner,sun8i-h3-de2-mixer-0"; 128 + reg = <0x01100000 0x100000>; 129 + clocks = <&display_clocks CLK_BUS_MIXER0>, 130 + <&display_clocks CLK_MIXER0>; 131 + clock-names = "bus", 132 + "mod"; 133 + resets = <&display_clocks RST_MIXER0>; 134 + 135 + ports { 136 + #address-cells = <1>; 137 + #size-cells = <0>; 138 + 139 + mixer0_out: port@1 { 140 + reg = <1>; 141 + 142 + mixer0_out_tcon0: endpoint { 143 + remote-endpoint = <&tcon0_in_mixer0>; 144 + }; 145 + }; 146 + }; 147 + }; 148 + 132 149 syscon: syscon@1c00000 { 133 150 compatible = "allwinner,sun8i-h3-system-controller", 134 151 "syscon"; ··· 167 138 #dma-cells = <1>; 168 139 }; 169 140 141 + tcon0: lcd-controller@1c0c000 { 142 + compatible = "allwinner,sun8i-h3-tcon-tv", 143 + "allwinner,sun8i-a83t-tcon-tv"; 144 + reg = <0x01c0c000 0x1000>; 145 + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 146 + clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; 147 + clock-names = "ahb", "tcon-ch1"; 148 + resets = <&ccu RST_BUS_TCON0>; 149 + reset-names = "lcd"; 150 + 151 + ports { 152 + #address-cells = <1>; 153 + #size-cells = <0>; 154 + 155 + tcon0_in: port@0 { 156 + reg = <0>; 157 + 158 + tcon0_in_mixer0: endpoint { 159 + remote-endpoint = <&mixer0_out_tcon0>; 160 + }; 161 + }; 162 + 163 + tcon0_out: port@1 { 164 + #address-cells = <1>; 165 + #size-cells = <0>; 166 + reg = <1>; 167 + 168 + tcon0_out_hdmi: endpoint@1 { 169 + reg = <1>; 170 + remote-endpoint = <&hdmi_in_tcon0>; 171 + }; 172 + }; 173 + }; 174 + }; 175 + 170 176 mmc0: mmc@1c0f000 { 171 177 /* compatible and clocks are in per SoC .dtsi file */ 172 178 reg = <0x01c0f000 0x1000>; 179 + pinctrl-names = "default"; 180 + pinctrl-0 = <&mmc0_pins>; 173 181 resets = <&ccu RST_BUS_MMC0>; 174 182 reset-names = "ahb"; 175 183 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; ··· 218 152 mmc1: mmc@1c10000 { 219 153 /* compatible and clocks are in per SoC .dtsi file */ 220 154 reg = <0x01c10000 0x1000>; 155 + pinctrl-names = "default"; 156 + pinctrl-0 = <&mmc1_pins>; 221 157 resets = <&ccu RST_BUS_MMC1>; 222 158 reset-names = "ahb"; 223 159 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; ··· 416 348 function = "i2c2"; 417 349 }; 418 350 419 - mmc0_pins_a: mmc0 { 351 + mmc0_pins: mmc0 { 420 352 pins = "PF0", "PF1", "PF2", "PF3", 421 353 "PF4", "PF5"; 422 354 function = "mmc0"; ··· 424 356 bias-pull-up; 425 357 }; 426 358 427 - mmc0_cd_pin: mmc0_cd_pin { 428 - pins = "PF6"; 429 - function = "gpio_in"; 430 - bias-pull-up; 431 - }; 432 - 433 - mmc1_pins_a: mmc1 { 359 + mmc1_pins: mmc1 { 434 360 pins = "PG0", "PG1", "PG2", "PG3", 435 361 "PG4", "PG5"; 436 362 function = "mmc1"; ··· 744 682 interrupt-controller; 745 683 #interrupt-cells = <3>; 746 684 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 685 + }; 686 + 687 + hdmi: hdmi@1ee0000 { 688 + compatible = "allwinner,sun8i-h3-dw-hdmi", 689 + "allwinner,sun8i-a83t-dw-hdmi"; 690 + reg = <0x01ee0000 0x10000>; 691 + reg-io-width = <1>; 692 + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 693 + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, 694 + <&ccu CLK_HDMI>; 695 + clock-names = "iahb", "isfr", "tmds"; 696 + resets = <&ccu RST_BUS_HDMI1>; 697 + reset-names = "ctrl"; 698 + phys = <&hdmi_phy>; 699 + phy-names = "hdmi-phy"; 700 + status = "disabled"; 701 + 702 + ports { 703 + #address-cells = <1>; 704 + #size-cells = <0>; 705 + 706 + hdmi_in: port@0 { 707 + reg = <0>; 708 + 709 + hdmi_in_tcon0: endpoint { 710 + remote-endpoint = <&tcon0_out_hdmi>; 711 + }; 712 + }; 713 + 714 + hdmi_out: port@1 { 715 + reg = <1>; 716 + }; 717 + }; 718 + }; 719 + 720 + hdmi_phy: hdmi-phy@1ef0000 { 721 + compatible = "allwinner,sun8i-h3-hdmi-phy"; 722 + reg = <0x01ef0000 0x10000>; 723 + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, 724 + <&ccu 6>; 725 + clock-names = "bus", "mod", "pll-0"; 726 + resets = <&ccu RST_BUS_HDMI0>; 727 + reset-names = "phy"; 728 + #phy-cells = <0>; 747 729 }; 748 730 749 731 rtc: rtc@1f00000 {
+1
arch/arm64/boot/dts/allwinner/Makefile
··· 8 8 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb 9 9 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb 10 10 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb 11 + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb 11 12 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb 12 13 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb 13 14 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
-4
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
··· 151 151 }; 152 152 153 153 &mmc0 { 154 - pinctrl-names = "default"; 155 - pinctrl-0 = <&mmc0_pins_a>; 156 154 vmmc-supply = <&reg_vcc3v3>; 157 155 bus-width = <4>; 158 156 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ··· 158 160 }; 159 161 160 162 &mmc1 { 161 - pinctrl-names = "default"; 162 - pinctrl-0 = <&mmc1_pins_a>; 163 163 vmmc-supply = <&reg_vcc3v3>; 164 164 vqmmc-supply = <&reg_vcc3v3>; 165 165 mmc-pwrseq = <&wifi_pwrseq>;
-2
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
··· 126 126 }; 127 127 128 128 &mmc0 { 129 - pinctrl-names = "default"; 130 - pinctrl-0 = <&mmc0_pins_a>; 131 129 vmmc-supply = <&reg_vcc3v3>; 132 130 bus-width = <4>; 133 131 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+25 -2
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
··· 67 67 stdout-path = "serial0:115200n8"; 68 68 }; 69 69 70 + connector { 71 + compatible = "hdmi-connector"; 72 + type = "a"; 73 + 74 + port { 75 + hdmi_con_in: endpoint { 76 + remote-endpoint = <&hdmi_out_con>; 77 + }; 78 + }; 79 + }; 80 + 70 81 leds { 71 82 compatible = "gpio-leds"; 72 83 ··· 132 121 status = "okay"; 133 122 }; 134 123 124 + &de { 125 + status = "okay"; 126 + }; 127 + 135 128 &ehci0 { 136 129 status = "okay"; 137 130 }; ··· 168 153 }; 169 154 }; 170 155 156 + &hdmi { 157 + status = "okay"; 158 + }; 159 + 160 + &hdmi_out { 161 + hdmi_out_con: endpoint { 162 + remote-endpoint = <&hdmi_con_in>; 163 + }; 164 + }; 165 + 171 166 &ir { 172 167 pinctrl-names = "default"; 173 168 pinctrl-0 = <&ir_pins_a>; ··· 185 160 }; 186 161 187 162 &mmc0 { 188 - pinctrl-names = "default"; 189 - pinctrl-0 = <&mmc0_pins_a>; 190 163 vmmc-supply = <&reg_vcc3v3>; 191 164 bus-width = <4>; 192 165 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+25 -4
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
··· 62 62 stdout-path = "serial0:115200n8"; 63 63 }; 64 64 65 + connector { 66 + compatible = "hdmi-connector"; 67 + type = "a"; 68 + 69 + port { 70 + hdmi_con_in: endpoint { 71 + remote-endpoint = <&hdmi_out_con>; 72 + }; 73 + }; 74 + }; 75 + 65 76 leds { 66 77 compatible = "gpio-leds"; 67 78 ··· 139 128 status = "okay"; 140 129 }; 141 130 131 + &de { 132 + status = "okay"; 133 + }; 134 + 142 135 &ehci0 { 143 136 status = "okay"; 144 137 }; ··· 175 160 }; 176 161 }; 177 162 163 + &hdmi { 164 + status = "okay"; 165 + }; 166 + 167 + &hdmi_out { 168 + hdmi_out_con: endpoint { 169 + remote-endpoint = <&hdmi_con_in>; 170 + }; 171 + }; 172 + 178 173 &ir { 179 174 pinctrl-names = "default"; 180 175 pinctrl-0 = <&ir_pins_a>; ··· 192 167 }; 193 168 194 169 &mmc0 { 195 - pinctrl-names = "default"; 196 - pinctrl-0 = <&mmc0_pins_a>; 197 170 vmmc-supply = <&reg_vcc3v3>; 198 171 bus-width = <4>; 199 172 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ··· 199 176 }; 200 177 201 178 &mmc1 { 202 - pinctrl-names = "default"; 203 - pinctrl-0 = <&mmc1_pins_a>; 204 179 vmmc-supply = <&reg_vcc3v3>; 205 180 mmc-pwrseq = <&wifi_pwrseq>; 206 181 bus-width = <4>;
+143
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
··· 1 + /* 2 + * Copyright (C) 2016 ARM Ltd. 3 + * Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de> 4 + * 5 + * SPDX-License-Identifier: (GPL-2.0+ OR X11) 6 + */ 7 + 8 + /dts-v1/; 9 + #include "sun50i-h5.dtsi" 10 + 11 + #include <dt-bindings/gpio/gpio.h> 12 + #include <dt-bindings/input/input.h> 13 + #include <dt-bindings/pinctrl/sun4i-a10.h> 14 + 15 + / { 16 + model = "Xunlong Orange Pi Zero Plus"; 17 + compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5"; 18 + 19 + reg_vcc3v3: vcc3v3 { 20 + compatible = "regulator-fixed"; 21 + regulator-name = "vcc3v3"; 22 + regulator-min-microvolt = <3300000>; 23 + regulator-max-microvolt = <3300000>; 24 + }; 25 + 26 + aliases { 27 + ethernet0 = &emac; 28 + ethernet1 = &rtl8189ftv; 29 + serial0 = &uart0; 30 + }; 31 + 32 + chosen { 33 + stdout-path = "serial0:115200n8"; 34 + }; 35 + 36 + leds { 37 + compatible = "gpio-leds"; 38 + 39 + pwr { 40 + label = "orangepi:green:pwr"; 41 + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */ 42 + default-state = "on"; 43 + }; 44 + 45 + status { 46 + label = "orangepi:red:status"; 47 + gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */ 48 + }; 49 + }; 50 + 51 + reg_gmac_3v3: gmac-3v3 { 52 + compatible = "regulator-fixed"; 53 + regulator-name = "gmac-3v3"; 54 + regulator-min-microvolt = <3300000>; 55 + regulator-max-microvolt = <3300000>; 56 + startup-delay-us = <100000>; 57 + enable-active-high; 58 + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ 59 + }; 60 + }; 61 + 62 + &ehci0 { 63 + status = "okay"; 64 + }; 65 + 66 + &ehci1 { 67 + status = "okay"; 68 + }; 69 + 70 + &emac { 71 + pinctrl-names = "default"; 72 + pinctrl-0 = <&emac_rgmii_pins>; 73 + phy-supply = <&reg_gmac_3v3>; 74 + phy-handle = <&ext_rgmii_phy>; 75 + phy-mode = "rgmii"; 76 + status = "okay"; 77 + }; 78 + 79 + &external_mdio { 80 + ext_rgmii_phy: ethernet-phy@1 { 81 + compatible = "ethernet-phy-ieee802.3-c22"; 82 + reg = <1>; 83 + }; 84 + }; 85 + 86 + &mmc0 { 87 + vmmc-supply = <&reg_vcc3v3>; 88 + bus-width = <4>; 89 + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 90 + status = "okay"; 91 + }; 92 + 93 + &mmc1 { 94 + vmmc-supply = <&reg_vcc3v3>; 95 + bus-width = <4>; 96 + non-removable; 97 + status = "okay"; 98 + 99 + /* 100 + * Explicitly define the sdio device, so that we can add an ethernet 101 + * alias for it (which e.g. makes u-boot set a mac-address). 102 + */ 103 + rtl8189ftv: sdio_wifi@1 { 104 + reg = <1>; 105 + }; 106 + }; 107 + 108 + &spi0 { 109 + status = "okay"; 110 + 111 + flash@0 { 112 + #address-cells = <1>; 113 + #size-cells = <1>; 114 + compatible = "mxicy,mx25l1606e", "winbond,w25q128"; 115 + reg = <0>; 116 + spi-max-frequency = <40000000>; 117 + }; 118 + }; 119 + 120 + &ohci0 { 121 + status = "okay"; 122 + }; 123 + 124 + &ohci1 { 125 + status = "okay"; 126 + }; 127 + 128 + &uart0 { 129 + pinctrl-names = "default"; 130 + pinctrl-0 = <&uart0_pins_a>; 131 + status = "okay"; 132 + }; 133 + 134 + &usb_otg { 135 + dr_mode = "peripheral"; 136 + status = "okay"; 137 + }; 138 + 139 + &usbphy { 140 + /* USB Type-A ports' VBUS is always on */ 141 + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ 142 + status = "okay"; 143 + };
+25 -4
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
··· 58 58 stdout-path = "serial0:115200n8"; 59 59 }; 60 60 61 + connector { 62 + compatible = "hdmi-connector"; 63 + type = "a"; 64 + 65 + port { 66 + hdmi_con_in: endpoint { 67 + remote-endpoint = <&hdmi_out_con>; 68 + }; 69 + }; 70 + }; 71 + 61 72 reg_vcc3v3: vcc3v3 { 62 73 compatible = "regulator-fixed"; 63 74 regulator-name = "vcc3v3"; ··· 84 73 }; 85 74 }; 86 75 76 + &de { 77 + status = "okay"; 78 + }; 79 + 80 + &hdmi { 81 + status = "okay"; 82 + }; 83 + 84 + &hdmi_out { 85 + hdmi_out_con: endpoint { 86 + remote-endpoint = <&hdmi_con_in>; 87 + }; 88 + }; 89 + 87 90 &mmc0 { 88 - pinctrl-names = "default"; 89 - pinctrl-0 = <&mmc0_pins_a>; 90 91 vmmc-supply = <&reg_vcc3v3>; 91 92 bus-width = <4>; 92 93 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; ··· 106 83 }; 107 84 108 85 &mmc1 { 109 - pinctrl-names = "default"; 110 - pinctrl-0 = <&mmc1_pins_a>; 111 86 vmmc-supply = <&reg_vcc3v3>; 112 87 vqmmc-supply = <&reg_vcc3v3>; 113 88 mmc-pwrseq = <&wifi_pwrseq>;