Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'omap-for-v3.8/cleanup-headers-iommu' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/omap

+279 -291
-2
arch/arm/mach-omap2/Makefile
··· 184 184 obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o 185 185 mailbox_mach-objs := mailbox.o 186 186 187 - obj-$(CONFIG_OMAP_IOMMU) += iommu2.o 188 - 189 187 iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o 190 188 obj-y += $(iommu-m) $(iommu-y) 191 189
+1 -1
arch/arm/mach-omap2/devices.c
··· 127 127 128 128 #if defined(CONFIG_IOMMU_API) 129 129 130 - #include <plat/iommu.h> 130 + #include <linux/platform_data/iommu-omap.h> 131 131 132 132 static struct resource omap3isp_resources[] = { 133 133 {
+10 -1
arch/arm/mach-omap2/iommu2.c drivers/iommu/omap-iommu2.c
··· 13 13 14 14 #include <linux/err.h> 15 15 #include <linux/device.h> 16 + #include <linux/io.h> 16 17 #include <linux/jiffies.h> 17 18 #include <linux/module.h> 19 + #include <linux/omap-iommu.h> 18 20 #include <linux/slab.h> 19 21 #include <linux/stringify.h> 22 + #include <linux/platform_data/iommu-omap.h> 20 23 21 - #include <plat/iommu.h> 24 + #include "omap-iommu.h" 22 25 23 26 /* 24 27 * omap2 architecture specific register bit definitions ··· 68 65 ((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 : \ 69 66 ((pgsz) == MMU_CAM_PGSZ_4K) ? 0xfffff000 : 0) 70 67 68 + /* IOMMU errors */ 69 + #define OMAP_IOMMU_ERR_TLB_MISS (1 << 0) 70 + #define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1) 71 + #define OMAP_IOMMU_ERR_EMU_MISS (1 << 2) 72 + #define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3) 73 + #define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4) 71 74 72 75 static void __iommu_set_twl(struct omap_iommu *obj, bool on) 73 76 {
+1 -1
arch/arm/mach-omap2/omap-iommu.c
··· 13 13 #include <linux/module.h> 14 14 #include <linux/platform_device.h> 15 15 16 - #include <plat/iommu.h> 16 + #include <linux/platform_data/iommu-omap.h> 17 17 18 18 #include "soc.h" 19 19 #include "common.h"
+1 -1
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
··· 26 26 #include <plat/mmc.h> 27 27 #include <linux/platform_data/asoc-ti-mcbsp.h> 28 28 #include <linux/platform_data/spi-omap2-mcspi.h> 29 + #include <linux/platform_data/iommu-omap.h> 29 30 #include <plat/dmtimer.h> 30 - #include <plat/iommu.h> 31 31 32 32 #include "am35xx.h" 33 33
+1 -1
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
··· 28 28 #include <plat/dma.h> 29 29 #include <linux/platform_data/spi-omap2-mcspi.h> 30 30 #include <linux/platform_data/asoc-ti-mcbsp.h> 31 + #include <linux/platform_data/iommu-omap.h> 31 32 #include <plat/mmc.h> 32 33 #include <plat/dmtimer.h> 33 34 #include <plat/common.h> 34 - #include <plat/iommu.h> 35 35 36 36 #include "omap_hwmod_common_data.h" 37 37 #include "cm1_44xx.h"
+70 -63
arch/arm/plat-omap/include/plat/iommu.h drivers/iommu/omap-iommu.h
··· 10 10 * published by the Free Software Foundation. 11 11 */ 12 12 13 - #ifndef __MACH_IOMMU_H 14 - #define __MACH_IOMMU_H 13 + #if defined(CONFIG_ARCH_OMAP1) 14 + #error "iommu for this processor not implemented yet" 15 + #endif 15 16 16 17 struct iotlb_entry { 17 18 u32 da; ··· 72 71 }; 73 72 }; 74 73 75 - struct iotlb_lock { 76 - short base; 77 - short vict; 78 - }; 79 - 80 74 /* architecture specific functions */ 81 75 struct iommu_functions { 82 76 unsigned long version; ··· 99 103 ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len); 100 104 }; 101 105 102 - /** 103 - * struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod 104 - * @da_start: device address where the va space starts. 105 - * @da_end: device address where the va space ends. 106 - * @nr_tlb_entries: number of entries supported by the translation 107 - * look-aside buffer (TLB). 108 - */ 109 - struct omap_mmu_dev_attr { 110 - u32 da_start; 111 - u32 da_end; 112 - int nr_tlb_entries; 113 - }; 114 - 115 - struct iommu_platform_data { 116 - const char *name; 117 - const char *clk_name; 118 - const int nr_tlb_entries; 119 - u32 da_start; 120 - u32 da_end; 121 - }; 122 - 123 - /** 124 - * struct iommu_arch_data - omap iommu private data 125 - * @name: name of the iommu device 126 - * @iommu_dev: handle of the iommu device 127 - * 128 - * This is an omap iommu private data object, which binds an iommu user 129 - * to its iommu device. This object should be placed at the iommu user's 130 - * dev_archdata so generic IOMMU API can be used without having to 131 - * utilize omap-specific plumbing anymore. 132 - */ 133 - struct omap_iommu_arch_data { 134 - const char *name; 135 - struct omap_iommu *iommu_dev; 136 - }; 137 - 138 106 #ifdef CONFIG_IOMMU_API 139 107 /** 140 108 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device ··· 112 152 } 113 153 #endif 114 154 115 - /* IOMMU errors */ 116 - #define OMAP_IOMMU_ERR_TLB_MISS (1 << 0) 117 - #define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1) 118 - #define OMAP_IOMMU_ERR_EMU_MISS (1 << 2) 119 - #define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3) 120 - #define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4) 155 + /* 156 + * MMU Register offsets 157 + */ 158 + #define MMU_REVISION 0x00 159 + #define MMU_SYSCONFIG 0x10 160 + #define MMU_SYSSTATUS 0x14 161 + #define MMU_IRQSTATUS 0x18 162 + #define MMU_IRQENABLE 0x1c 163 + #define MMU_WALKING_ST 0x40 164 + #define MMU_CNTL 0x44 165 + #define MMU_FAULT_AD 0x48 166 + #define MMU_TTB 0x4c 167 + #define MMU_LOCK 0x50 168 + #define MMU_LD_TLB 0x54 169 + #define MMU_CAM 0x58 170 + #define MMU_RAM 0x5c 171 + #define MMU_GFLUSH 0x60 172 + #define MMU_FLUSH_ENTRY 0x64 173 + #define MMU_READ_CAM 0x68 174 + #define MMU_READ_RAM 0x6c 175 + #define MMU_EMU_FAULT_AD 0x70 121 176 122 - #if defined(CONFIG_ARCH_OMAP1) 123 - #error "iommu for this processor not implemented yet" 124 - #else 125 - #include <plat/iommu2.h> 126 - #endif 177 + #define MMU_REG_SIZE 256 178 + 179 + /* 180 + * MMU Register bit definitions 181 + */ 182 + #define MMU_CAM_VATAG_SHIFT 12 183 + #define MMU_CAM_VATAG_MASK \ 184 + ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT) 185 + #define MMU_CAM_P (1 << 3) 186 + #define MMU_CAM_V (1 << 2) 187 + #define MMU_CAM_PGSZ_MASK 3 188 + #define MMU_CAM_PGSZ_1M (0 << 0) 189 + #define MMU_CAM_PGSZ_64K (1 << 0) 190 + #define MMU_CAM_PGSZ_4K (2 << 0) 191 + #define MMU_CAM_PGSZ_16M (3 << 0) 192 + 193 + #define MMU_RAM_PADDR_SHIFT 12 194 + #define MMU_RAM_PADDR_MASK \ 195 + ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT) 196 + 197 + #define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT) 198 + #define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT) 199 + 200 + #define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT) 201 + #define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT) 202 + #define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT) 203 + #define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT) 204 + #define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT) 205 + #define MMU_RAM_MIXED_SHIFT 6 206 + #define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT) 207 + #define MMU_RAM_MIXED MMU_RAM_MIXED_MASK 127 208 128 209 /* 129 210 * utilities for super page(16MB, 1MB, 64KB and 4KB) ··· 200 199 extern int 201 200 omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e); 202 201 203 - extern int omap_iommu_set_isr(const char *name, 204 - int (*isr)(struct omap_iommu *obj, u32 da, u32 iommu_errs, 205 - void *priv), 206 - void *isr_priv); 207 - 208 202 extern void omap_iommu_save_ctx(struct device *dev); 209 203 extern void omap_iommu_restore_ctx(struct device *dev); 210 204 211 - extern int omap_install_iommu_arch(const struct iommu_functions *ops); 212 - extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops); 213 - 214 205 extern int omap_foreach_iommu_device(void *data, 215 206 int (*fn)(struct device *, void *)); 207 + 208 + extern int omap_install_iommu_arch(const struct iommu_functions *ops); 209 + extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops); 216 210 217 211 extern ssize_t 218 212 omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len); 219 213 extern size_t 220 214 omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len); 221 215 222 - #endif /* __MACH_IOMMU_H */ 216 + /* 217 + * register accessors 218 + */ 219 + static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs) 220 + { 221 + return __raw_readl(obj->regbase + offs); 222 + } 223 + 224 + static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs) 225 + { 226 + __raw_writel(val, obj->regbase + offs); 227 + }
-96
arch/arm/plat-omap/include/plat/iommu2.h
··· 1 - /* 2 - * omap iommu: omap2 architecture specific definitions 3 - * 4 - * Copyright (C) 2008-2009 Nokia Corporation 5 - * 6 - * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> 7 - * 8 - * This program is free software; you can redistribute it and/or modify 9 - * it under the terms of the GNU General Public License version 2 as 10 - * published by the Free Software Foundation. 11 - */ 12 - 13 - #ifndef __MACH_IOMMU2_H 14 - #define __MACH_IOMMU2_H 15 - 16 - #include <linux/io.h> 17 - 18 - /* 19 - * MMU Register offsets 20 - */ 21 - #define MMU_REVISION 0x00 22 - #define MMU_SYSCONFIG 0x10 23 - #define MMU_SYSSTATUS 0x14 24 - #define MMU_IRQSTATUS 0x18 25 - #define MMU_IRQENABLE 0x1c 26 - #define MMU_WALKING_ST 0x40 27 - #define MMU_CNTL 0x44 28 - #define MMU_FAULT_AD 0x48 29 - #define MMU_TTB 0x4c 30 - #define MMU_LOCK 0x50 31 - #define MMU_LD_TLB 0x54 32 - #define MMU_CAM 0x58 33 - #define MMU_RAM 0x5c 34 - #define MMU_GFLUSH 0x60 35 - #define MMU_FLUSH_ENTRY 0x64 36 - #define MMU_READ_CAM 0x68 37 - #define MMU_READ_RAM 0x6c 38 - #define MMU_EMU_FAULT_AD 0x70 39 - 40 - #define MMU_REG_SIZE 256 41 - 42 - /* 43 - * MMU Register bit definitions 44 - */ 45 - #define MMU_LOCK_BASE_SHIFT 10 46 - #define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT) 47 - #define MMU_LOCK_BASE(x) \ 48 - ((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT) 49 - 50 - #define MMU_LOCK_VICT_SHIFT 4 51 - #define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT) 52 - #define MMU_LOCK_VICT(x) \ 53 - ((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT) 54 - 55 - #define MMU_CAM_VATAG_SHIFT 12 56 - #define MMU_CAM_VATAG_MASK \ 57 - ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT) 58 - #define MMU_CAM_P (1 << 3) 59 - #define MMU_CAM_V (1 << 2) 60 - #define MMU_CAM_PGSZ_MASK 3 61 - #define MMU_CAM_PGSZ_1M (0 << 0) 62 - #define MMU_CAM_PGSZ_64K (1 << 0) 63 - #define MMU_CAM_PGSZ_4K (2 << 0) 64 - #define MMU_CAM_PGSZ_16M (3 << 0) 65 - 66 - #define MMU_RAM_PADDR_SHIFT 12 67 - #define MMU_RAM_PADDR_MASK \ 68 - ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT) 69 - #define MMU_RAM_ENDIAN_SHIFT 9 70 - #define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT) 71 - #define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT) 72 - #define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT) 73 - #define MMU_RAM_ELSZ_SHIFT 7 74 - #define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT) 75 - #define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT) 76 - #define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT) 77 - #define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT) 78 - #define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT) 79 - #define MMU_RAM_MIXED_SHIFT 6 80 - #define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT) 81 - #define MMU_RAM_MIXED MMU_RAM_MIXED_MASK 82 - 83 - /* 84 - * register accessors 85 - */ 86 - static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs) 87 - { 88 - return __raw_readl(obj->regbase + offs); 89 - } 90 - 91 - static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs) 92 - { 93 - __raw_writel(val, obj->regbase + offs); 94 - } 95 - 96 - #endif /* __MACH_IOMMU2_H */
-22
arch/arm/plat-omap/include/plat/iopgtable.h drivers/iommu/omap-iopgtable.h
··· 10 10 * published by the Free Software Foundation. 11 11 */ 12 12 13 - #ifndef __PLAT_OMAP_IOMMU_H 14 - #define __PLAT_OMAP_IOMMU_H 15 - 16 13 /* 17 14 * "L2 table" address mask and size definitions. 18 15 */ ··· 94 97 #define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1)) 95 98 #define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da)) 96 99 97 - static inline u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, 98 - u32 flags) 99 - { 100 - memset(e, 0, sizeof(*e)); 101 - 102 - e->da = da; 103 - e->pa = pa; 104 - e->valid = 1; 105 - /* FIXME: add OMAP1 support */ 106 - e->pgsz = flags & MMU_CAM_PGSZ_MASK; 107 - e->endian = flags & MMU_RAM_ENDIAN_MASK; 108 - e->elsz = flags & MMU_RAM_ELSZ_MASK; 109 - e->mixed = flags & MMU_RAM_MIXED_MASK; 110 - 111 - return iopgsz_to_bytes(e->pgsz); 112 - } 113 - 114 100 #define to_iommu(dev) \ 115 101 (struct omap_iommu *)platform_get_drvdata(to_platform_device(dev)) 116 - 117 - #endif /* __PLAT_OMAP_IOMMU_H */
-89
arch/arm/plat-omap/include/plat/iovmm.h
··· 1 - /* 2 - * omap iommu: simple virtual address space management 3 - * 4 - * Copyright (C) 2008-2009 Nokia Corporation 5 - * 6 - * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> 7 - * 8 - * This program is free software; you can redistribute it and/or modify 9 - * it under the terms of the GNU General Public License version 2 as 10 - * published by the Free Software Foundation. 11 - */ 12 - 13 - #ifndef __IOMMU_MMAP_H 14 - #define __IOMMU_MMAP_H 15 - 16 - #include <linux/iommu.h> 17 - 18 - struct iovm_struct { 19 - struct omap_iommu *iommu; /* iommu object which this belongs to */ 20 - u32 da_start; /* area definition */ 21 - u32 da_end; 22 - u32 flags; /* IOVMF_: see below */ 23 - struct list_head list; /* linked in ascending order */ 24 - const struct sg_table *sgt; /* keep 'page' <-> 'da' mapping */ 25 - void *va; /* mpu side mapped address */ 26 - }; 27 - 28 - /* 29 - * IOVMF_FLAGS: attribute for iommu virtual memory area(iovma) 30 - * 31 - * lower 16 bit is used for h/w and upper 16 bit is for s/w. 32 - */ 33 - #define IOVMF_SW_SHIFT 16 34 - 35 - /* 36 - * iovma: h/w flags derived from cam and ram attribute 37 - */ 38 - #define IOVMF_CAM_MASK (~((1 << 10) - 1)) 39 - #define IOVMF_RAM_MASK (~IOVMF_CAM_MASK) 40 - 41 - #define IOVMF_PGSZ_MASK (3 << 0) 42 - #define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M 43 - #define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K 44 - #define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K 45 - #define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M 46 - 47 - #define IOVMF_ENDIAN_MASK (1 << 9) 48 - #define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG 49 - #define IOVMF_ENDIAN_LITTLE MMU_RAM_ENDIAN_LITTLE 50 - 51 - #define IOVMF_ELSZ_MASK (3 << 7) 52 - #define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8 53 - #define IOVMF_ELSZ_16 MMU_RAM_ELSZ_16 54 - #define IOVMF_ELSZ_32 MMU_RAM_ELSZ_32 55 - #define IOVMF_ELSZ_NONE MMU_RAM_ELSZ_NONE 56 - 57 - #define IOVMF_MIXED_MASK (1 << 6) 58 - #define IOVMF_MIXED MMU_RAM_MIXED 59 - 60 - /* 61 - * iovma: s/w flags, used for mapping and umapping internally. 62 - */ 63 - #define IOVMF_MMIO (1 << IOVMF_SW_SHIFT) 64 - #define IOVMF_ALLOC (2 << IOVMF_SW_SHIFT) 65 - #define IOVMF_ALLOC_MASK (3 << IOVMF_SW_SHIFT) 66 - 67 - /* "superpages" is supported just with physically linear pages */ 68 - #define IOVMF_DISCONT (1 << (2 + IOVMF_SW_SHIFT)) 69 - #define IOVMF_LINEAR (2 << (2 + IOVMF_SW_SHIFT)) 70 - #define IOVMF_LINEAR_MASK (3 << (2 + IOVMF_SW_SHIFT)) 71 - 72 - #define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT)) 73 - 74 - 75 - extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da); 76 - extern u32 77 - omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da, 78 - const struct sg_table *sgt, u32 flags); 79 - extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain, 80 - struct device *dev, u32 da); 81 - extern u32 82 - omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev, 83 - u32 da, size_t bytes, u32 flags); 84 - extern void 85 - omap_iommu_vfree(struct iommu_domain *domain, struct device *dev, 86 - const u32 da); 87 - extern void *omap_da_to_va(struct device *dev, u32 da); 88 - 89 - #endif /* __IOMMU_MMAP_H */
+1
drivers/iommu/Makefile
··· 7 7 obj-$(CONFIG_INTEL_IOMMU) += iova.o intel-iommu.o 8 8 obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o 9 9 obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o 10 + obj-$(CONFIG_OMAP_IOMMU) += omap-iommu2.o 10 11 obj-$(CONFIG_OMAP_IOVMM) += omap-iovmm.o 11 12 obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o 12 13 obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o
+4 -4
drivers/iommu/omap-iommu-debug.c
··· 18 18 #include <linux/uaccess.h> 19 19 #include <linux/platform_device.h> 20 20 #include <linux/debugfs.h> 21 + #include <linux/omap-iommu.h> 22 + #include <linux/platform_data/iommu-omap.h> 21 23 22 - #include <plat/iommu.h> 23 - #include <plat/iovmm.h> 24 - 25 - #include <plat/iopgtable.h> 24 + #include "omap-iopgtable.h" 25 + #include "omap-iommu.h" 26 26 27 27 #define MAXCOLUMN 100 /* for short messages */ 28 28
+37 -2
drivers/iommu/omap-iommu.c
··· 19 19 #include <linux/clk.h> 20 20 #include <linux/platform_device.h> 21 21 #include <linux/iommu.h> 22 + #include <linux/omap-iommu.h> 22 23 #include <linux/mutex.h> 23 24 #include <linux/spinlock.h> 25 + #include <linux/io.h> 24 26 25 27 #include <asm/cacheflush.h> 26 28 27 - #include <plat/iommu.h> 29 + #include <linux/platform_data/iommu-omap.h> 28 30 29 - #include <plat/iopgtable.h> 31 + #include "omap-iopgtable.h" 32 + #include "omap-iommu.h" 30 33 31 34 #define for_each_iotlb_cr(obj, n, __i, cr) \ 32 35 for (__i = 0; \ ··· 52 49 struct omap_iommu *iommu_dev; 53 50 struct device *dev; 54 51 spinlock_t lock; 52 + }; 53 + 54 + #define MMU_LOCK_BASE_SHIFT 10 55 + #define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT) 56 + #define MMU_LOCK_BASE(x) \ 57 + ((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT) 58 + 59 + #define MMU_LOCK_VICT_SHIFT 4 60 + #define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT) 61 + #define MMU_LOCK_VICT(x) \ 62 + ((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT) 63 + 64 + struct iotlb_lock { 65 + short base; 66 + short vict; 55 67 }; 56 68 57 69 /* accommodate the difference between omap1 and omap2/3 */ ··· 1031 1013 static void iopte_cachep_ctor(void *iopte) 1032 1014 { 1033 1015 clean_dcache_area(iopte, IOPTE_TABLE_SIZE); 1016 + } 1017 + 1018 + static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, 1019 + u32 flags) 1020 + { 1021 + memset(e, 0, sizeof(*e)); 1022 + 1023 + e->da = da; 1024 + e->pa = pa; 1025 + e->valid = 1; 1026 + /* FIXME: add OMAP1 support */ 1027 + e->pgsz = flags & MMU_CAM_PGSZ_MASK; 1028 + e->endian = flags & MMU_RAM_ENDIAN_MASK; 1029 + e->elsz = flags & MMU_RAM_ELSZ_MASK; 1030 + e->mixed = flags & MMU_RAM_MIXED_MASK; 1031 + 1032 + return iopgsz_to_bytes(e->pgsz); 1034 1033 } 1035 1034 1036 1035 static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
+47 -3
drivers/iommu/omap-iovmm.c
··· 17 17 #include <linux/device.h> 18 18 #include <linux/scatterlist.h> 19 19 #include <linux/iommu.h> 20 + #include <linux/omap-iommu.h> 21 + #include <linux/platform_data/iommu-omap.h> 20 22 21 23 #include <asm/cacheflush.h> 22 24 #include <asm/mach/map.h> 23 25 24 - #include <plat/iommu.h> 25 - #include <plat/iovmm.h> 26 + #include "omap-iopgtable.h" 27 + #include "omap-iommu.h" 26 28 27 - #include <plat/iopgtable.h> 29 + /* 30 + * IOVMF_FLAGS: attribute for iommu virtual memory area(iovma) 31 + * 32 + * lower 16 bit is used for h/w and upper 16 bit is for s/w. 33 + */ 34 + #define IOVMF_SW_SHIFT 16 35 + 36 + /* 37 + * iovma: h/w flags derived from cam and ram attribute 38 + */ 39 + #define IOVMF_CAM_MASK (~((1 << 10) - 1)) 40 + #define IOVMF_RAM_MASK (~IOVMF_CAM_MASK) 41 + 42 + #define IOVMF_PGSZ_MASK (3 << 0) 43 + #define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M 44 + #define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K 45 + #define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K 46 + #define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M 47 + 48 + #define IOVMF_ENDIAN_MASK (1 << 9) 49 + #define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG 50 + 51 + #define IOVMF_ELSZ_MASK (3 << 7) 52 + #define IOVMF_ELSZ_16 MMU_RAM_ELSZ_16 53 + #define IOVMF_ELSZ_32 MMU_RAM_ELSZ_32 54 + #define IOVMF_ELSZ_NONE MMU_RAM_ELSZ_NONE 55 + 56 + #define IOVMF_MIXED_MASK (1 << 6) 57 + #define IOVMF_MIXED MMU_RAM_MIXED 58 + 59 + /* 60 + * iovma: s/w flags, used for mapping and umapping internally. 61 + */ 62 + #define IOVMF_MMIO (1 << IOVMF_SW_SHIFT) 63 + #define IOVMF_ALLOC (2 << IOVMF_SW_SHIFT) 64 + #define IOVMF_ALLOC_MASK (3 << IOVMF_SW_SHIFT) 65 + 66 + /* "superpages" is supported just with physically linear pages */ 67 + #define IOVMF_DISCONT (1 << (2 + IOVMF_SW_SHIFT)) 68 + #define IOVMF_LINEAR (2 << (2 + IOVMF_SW_SHIFT)) 69 + #define IOVMF_LINEAR_MASK (3 << (2 + IOVMF_SW_SHIFT)) 70 + 71 + #define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT)) 28 72 29 73 static struct kmem_cache *iovm_area_cachep; 30 74
+1
drivers/media/platform/omap3isp/isp.c
··· 61 61 #include <linux/i2c.h> 62 62 #include <linux/interrupt.h> 63 63 #include <linux/module.h> 64 + #include <linux/omap-iommu.h> 64 65 #include <linux/platform_device.h> 65 66 #include <linux/regulator/consumer.h> 66 67 #include <linux/slab.h>
+1 -3
drivers/media/platform/omap3isp/isp.h
··· 31 31 #include <media/v4l2-device.h> 32 32 #include <linux/device.h> 33 33 #include <linux/io.h> 34 + #include <linux/iommu.h> 34 35 #include <linux/platform_device.h> 35 36 #include <linux/wait.h> 36 - #include <linux/iommu.h> 37 - #include <plat/iommu.h> 38 - #include <plat/iovmm.h> 39 37 40 38 #include "ispstat.h" 41 39 #include "ispccdc.h"
+1
drivers/media/platform/omap3isp/ispccdc.c
··· 30 30 #include <linux/device.h> 31 31 #include <linux/dma-mapping.h> 32 32 #include <linux/mm.h> 33 + #include <linux/omap-iommu.h> 33 34 #include <linux/sched.h> 34 35 #include <linux/slab.h> 35 36 #include <media/v4l2-event.h>
+1
drivers/media/platform/omap3isp/ispstat.c
··· 26 26 */ 27 27 28 28 #include <linux/dma-mapping.h> 29 + #include <linux/omap-iommu.h> 29 30 #include <linux/slab.h> 30 31 #include <linux/uaccess.h> 31 32
+1 -2
drivers/media/platform/omap3isp/ispvideo.c
··· 27 27 #include <linux/clk.h> 28 28 #include <linux/mm.h> 29 29 #include <linux/module.h> 30 + #include <linux/omap-iommu.h> 30 31 #include <linux/pagemap.h> 31 32 #include <linux/scatterlist.h> 32 33 #include <linux/sched.h> ··· 35 34 #include <linux/vmalloc.h> 36 35 #include <media/v4l2-dev.h> 37 36 #include <media/v4l2-ioctl.h> 38 - #include <plat/iommu.h> 39 - #include <plat/iovmm.h> 40 37 #include <plat/omap-pm.h> 41 38 42 39 #include "ispvideo.h"
+52
include/linux/omap-iommu.h
··· 1 + /* 2 + * omap iommu: simple virtual address space management 3 + * 4 + * Copyright (C) 2008-2009 Nokia Corporation 5 + * 6 + * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify 9 + * it under the terms of the GNU General Public License version 2 as 10 + * published by the Free Software Foundation. 11 + */ 12 + 13 + #ifndef _INTEL_IOMMU_H_ 14 + #define _INTEL_IOMMU_H_ 15 + 16 + struct iovm_struct { 17 + struct omap_iommu *iommu; /* iommu object which this belongs to */ 18 + u32 da_start; /* area definition */ 19 + u32 da_end; 20 + u32 flags; /* IOVMF_: see below */ 21 + struct list_head list; /* linked in ascending order */ 22 + const struct sg_table *sgt; /* keep 'page' <-> 'da' mapping */ 23 + void *va; /* mpu side mapped address */ 24 + }; 25 + 26 + #define MMU_RAM_ENDIAN_SHIFT 9 27 + #define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT) 28 + #define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT) 29 + #define IOVMF_ENDIAN_LITTLE MMU_RAM_ENDIAN_LITTLE 30 + #define MMU_RAM_ELSZ_SHIFT 7 31 + #define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8 32 + 33 + struct iommu_domain; 34 + 35 + extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da); 36 + extern u32 37 + omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da, 38 + const struct sg_table *sgt, u32 flags); 39 + extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain, 40 + struct device *dev, u32 da); 41 + extern u32 42 + omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev, 43 + u32 da, size_t bytes, u32 flags); 44 + extern void 45 + omap_iommu_vfree(struct iommu_domain *domain, struct device *dev, 46 + const u32 da); 47 + extern void *omap_da_to_va(struct device *dev, u32 da); 48 + 49 + extern void omap_iommu_save_ctx(struct device *dev); 50 + extern void omap_iommu_restore_ctx(struct device *dev); 51 + 52 + #endif
+49
include/linux/platform_data/iommu-omap.h
··· 1 + /* 2 + * omap iommu: main structures 3 + * 4 + * Copyright (C) 2008-2009 Nokia Corporation 5 + * 6 + * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify 9 + * it under the terms of the GNU General Public License version 2 as 10 + * published by the Free Software Foundation. 11 + */ 12 + 13 + #define MMU_REG_SIZE 256 14 + 15 + /** 16 + * struct iommu_arch_data - omap iommu private data 17 + * @name: name of the iommu device 18 + * @iommu_dev: handle of the iommu device 19 + * 20 + * This is an omap iommu private data object, which binds an iommu user 21 + * to its iommu device. This object should be placed at the iommu user's 22 + * dev_archdata so generic IOMMU API can be used without having to 23 + * utilize omap-specific plumbing anymore. 24 + */ 25 + struct omap_iommu_arch_data { 26 + const char *name; 27 + struct omap_iommu *iommu_dev; 28 + }; 29 + 30 + /** 31 + * struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod 32 + * @da_start: device address where the va space starts. 33 + * @da_end: device address where the va space ends. 34 + * @nr_tlb_entries: number of entries supported by the translation 35 + * look-aside buffer (TLB). 36 + */ 37 + struct omap_mmu_dev_attr { 38 + u32 da_start; 39 + u32 da_end; 40 + int nr_tlb_entries; 41 + }; 42 + 43 + struct iommu_platform_data { 44 + const char *name; 45 + const char *clk_name; 46 + const int nr_tlb_entries; 47 + u32 da_start; 48 + u32 da_end; 49 + };