···11+Motorola CPCAP on key22+33+This module is part of the CPCAP. For more details about the whole44+chip see Documentation/devicetree/bindings/mfd/motorola-cpcap.txt.55+66+This module provides a simple power button event via an Interrupt.77+88+Required properties:99+- compatible: should be one of the following1010+ - "motorola,cpcap-pwrbutton"1111+- interrupts: irq specifier for CPCAP's ON IRQ1212+1313+Example:1414+1515+&cpcap {1616+ cpcap_pwrbutton: pwrbutton {1717+ compatible = "motorola,cpcap-pwrbutton";1818+ interrupts = <23 IRQ_TYPE_NONE>;1919+ };2020+};
+13-14
drivers/iio/adc/Kconfig
···229229 To compile this driver as a module, choose M here: the module will be230230 called exynos_adc.231231232232+config MXS_LRADC_ADC233233+ tristate "Freescale i.MX23/i.MX28 LRADC ADC"234234+ depends on MFD_MXS_LRADC235235+ select IIO_BUFFER236236+ select IIO_TRIGGERED_BUFFER237237+ help238238+ Say yes here to build support for the ADC functions of the239239+ i.MX23/i.MX28 LRADC. This includes general-purpose ADC readings,240240+ battery voltage measurement, and die temperature measurement.241241+242242+ This driver can also be built as a module. If so, the module will be243243+ called mxs-lradc-adc.244244+232245config FSL_MX25_ADC233246 tristate "Freescale MX25 ADC driver"234247 depends on MFD_MX25_TSADC···423410424411 To compile this driver as a module, choose M here: the425412 module will be called meson_saradc.426426-427427-config MXS_LRADC428428- tristate "Freescale i.MX23/i.MX28 LRADC"429429- depends on (ARCH_MXS || COMPILE_TEST) && HAS_IOMEM430430- depends on INPUT431431- select STMP_DEVICE432432- select IIO_BUFFER433433- select IIO_TRIGGERED_BUFFER434434- help435435- Say yes here to build support for i.MX23/i.MX28 LRADC convertor436436- built into these chips.437437-438438- To compile this driver as a module, choose M here: the439439- module will be called mxs-lradc.440413441414config NAU7802442415 tristate "Nuvoton NAU7802 ADC driver"
···11+/*22+ * Freescale MXS LRADC ADC driver33+ *44+ * Copyright (c) 2012 DENX Software Engineering, GmbH.55+ * Copyright (c) 2017 Ksenija Stanojevic <ksenija.stanojevic@gmail.com>66+ *77+ * Authors:88+ * Marek Vasut <marex@denx.de>99+ * Ksenija Stanojevic <ksenija.stanojevic@gmail.com>1010+ *1111+ * This program is free software; you can redistribute it and/or modify1212+ * it under the terms of the GNU General Public License as published by1313+ * the Free Software Foundation; either version 2 of the License, or1414+ * (at your option) any later version.1515+ *1616+ * This program is distributed in the hope that it will be useful,1717+ * but WITHOUT ANY WARRANTY; without even the implied warranty of1818+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the1919+ * GNU General Public License for more details.2020+ */2121+2222+#include <linux/completion.h>2323+#include <linux/device.h>2424+#include <linux/err.h>2525+#include <linux/interrupt.h>2626+#include <linux/mfd/core.h>2727+#include <linux/mfd/mxs-lradc.h>2828+#include <linux/module.h>2929+#include <linux/of_irq.h>3030+#include <linux/platform_device.h>3131+#include <linux/sysfs.h>3232+3333+#include <linux/iio/buffer.h>3434+#include <linux/iio/iio.h>3535+#include <linux/iio/trigger.h>3636+#include <linux/iio/trigger_consumer.h>3737+#include <linux/iio/triggered_buffer.h>3838+#include <linux/iio/sysfs.h>3939+4040+/*4141+ * Make this runtime configurable if necessary. Currently, if the buffered mode4242+ * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before4343+ * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000)4444+ * seconds. The result is that the samples arrive every 500mS.4545+ */4646+#define LRADC_DELAY_TIMER_PER 2004747+#define LRADC_DELAY_TIMER_LOOP 54848+4949+#define VREF_MV_BASE 18505050+5151+const char *mx23_lradc_adc_irq_names[] = {5252+ "mxs-lradc-channel0",5353+ "mxs-lradc-channel1",5454+ "mxs-lradc-channel2",5555+ "mxs-lradc-channel3",5656+ "mxs-lradc-channel4",5757+ "mxs-lradc-channel5",5858+};5959+6060+const char *mx28_lradc_adc_irq_names[] = {6161+ "mxs-lradc-thresh0",6262+ "mxs-lradc-thresh1",6363+ "mxs-lradc-channel0",6464+ "mxs-lradc-channel1",6565+ "mxs-lradc-channel2",6666+ "mxs-lradc-channel3",6767+ "mxs-lradc-channel4",6868+ "mxs-lradc-channel5",6969+ "mxs-lradc-button0",7070+ "mxs-lradc-button1",7171+};7272+7373+static const u32 mxs_lradc_adc_vref_mv[][LRADC_MAX_TOTAL_CHANS] = {7474+ [IMX23_LRADC] = {7575+ VREF_MV_BASE, /* CH0 */7676+ VREF_MV_BASE, /* CH1 */7777+ VREF_MV_BASE, /* CH2 */7878+ VREF_MV_BASE, /* CH3 */7979+ VREF_MV_BASE, /* CH4 */8080+ VREF_MV_BASE, /* CH5 */8181+ VREF_MV_BASE * 2, /* CH6 VDDIO */8282+ VREF_MV_BASE * 4, /* CH7 VBATT */8383+ VREF_MV_BASE, /* CH8 Temp sense 0 */8484+ VREF_MV_BASE, /* CH9 Temp sense 1 */8585+ VREF_MV_BASE, /* CH10 */8686+ VREF_MV_BASE, /* CH11 */8787+ VREF_MV_BASE, /* CH12 USB_DP */8888+ VREF_MV_BASE, /* CH13 USB_DN */8989+ VREF_MV_BASE, /* CH14 VBG */9090+ VREF_MV_BASE * 4, /* CH15 VDD5V */9191+ },9292+ [IMX28_LRADC] = {9393+ VREF_MV_BASE, /* CH0 */9494+ VREF_MV_BASE, /* CH1 */9595+ VREF_MV_BASE, /* CH2 */9696+ VREF_MV_BASE, /* CH3 */9797+ VREF_MV_BASE, /* CH4 */9898+ VREF_MV_BASE, /* CH5 */9999+ VREF_MV_BASE, /* CH6 */100100+ VREF_MV_BASE * 4, /* CH7 VBATT */101101+ VREF_MV_BASE, /* CH8 Temp sense 0 */102102+ VREF_MV_BASE, /* CH9 Temp sense 1 */103103+ VREF_MV_BASE * 2, /* CH10 VDDIO */104104+ VREF_MV_BASE, /* CH11 VTH */105105+ VREF_MV_BASE * 2, /* CH12 VDDA */106106+ VREF_MV_BASE, /* CH13 VDDD */107107+ VREF_MV_BASE, /* CH14 VBG */108108+ VREF_MV_BASE * 4, /* CH15 VDD5V */109109+ },110110+};111111+112112+enum mxs_lradc_divbytwo {113113+ MXS_LRADC_DIV_DISABLED = 0,114114+ MXS_LRADC_DIV_ENABLED,115115+};116116+117117+struct mxs_lradc_scale {118118+ unsigned int integer;119119+ unsigned int nano;120120+};121121+122122+struct mxs_lradc_adc {123123+ struct mxs_lradc *lradc;124124+ struct device *dev;125125+126126+ void __iomem *base;127127+ u32 buffer[10];128128+ struct iio_trigger *trig;129129+ struct completion completion;130130+ spinlock_t lock;131131+132132+ const u32 *vref_mv;133133+ struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];134134+ unsigned long is_divided;135135+};136136+137137+138138+/* Raw I/O operations */139139+static int mxs_lradc_adc_read_single(struct iio_dev *iio_dev, int chan,140140+ int *val)141141+{142142+ struct mxs_lradc_adc *adc = iio_priv(iio_dev);143143+ struct mxs_lradc *lradc = adc->lradc;144144+ int ret;145145+146146+ /*147147+ * See if there is no buffered operation in progress. If there is simply148148+ * bail out. This can be improved to support both buffered and raw IO at149149+ * the same time, yet the code becomes horribly complicated. Therefore I150150+ * applied KISS principle here.151151+ */152152+ ret = iio_device_claim_direct_mode(iio_dev);153153+ if (ret)154154+ return ret;155155+156156+ reinit_completion(&adc->completion);157157+158158+ /*159159+ * No buffered operation in progress, map the channel and trigger it.160160+ * Virtual channel 0 is always used here as the others are always not161161+ * used if doing raw sampling.162162+ */163163+ if (lradc->soc == IMX28_LRADC)164164+ writel(LRADC_CTRL1_LRADC_IRQ_EN(0),165165+ adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);166166+ writel(0x1, adc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);167167+168168+ /* Enable / disable the divider per requirement */169169+ if (test_bit(chan, &adc->is_divided))170170+ writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,171171+ adc->base + LRADC_CTRL2 + STMP_OFFSET_REG_SET);172172+ else173173+ writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,174174+ adc->base + LRADC_CTRL2 + STMP_OFFSET_REG_CLR);175175+176176+ /* Clean the slot's previous content, then set new one. */177177+ writel(LRADC_CTRL4_LRADCSELECT_MASK(0),178178+ adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);179179+ writel(chan, adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);180180+181181+ writel(0, adc->base + LRADC_CH(0));182182+183183+ /* Enable the IRQ and start sampling the channel. */184184+ writel(LRADC_CTRL1_LRADC_IRQ_EN(0),185185+ adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);186186+ writel(BIT(0), adc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);187187+188188+ /* Wait for completion on the channel, 1 second max. */189189+ ret = wait_for_completion_killable_timeout(&adc->completion, HZ);190190+ if (!ret)191191+ ret = -ETIMEDOUT;192192+ if (ret < 0)193193+ goto err;194194+195195+ /* Read the data. */196196+ *val = readl(adc->base + LRADC_CH(0)) & LRADC_CH_VALUE_MASK;197197+ ret = IIO_VAL_INT;198198+199199+err:200200+ writel(LRADC_CTRL1_LRADC_IRQ_EN(0),201201+ adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);202202+203203+ iio_device_release_direct_mode(iio_dev);204204+205205+ return ret;206206+}207207+208208+static int mxs_lradc_adc_read_temp(struct iio_dev *iio_dev, int *val)209209+{210210+ int ret, min, max;211211+212212+ ret = mxs_lradc_adc_read_single(iio_dev, 8, &min);213213+ if (ret != IIO_VAL_INT)214214+ return ret;215215+216216+ ret = mxs_lradc_adc_read_single(iio_dev, 9, &max);217217+ if (ret != IIO_VAL_INT)218218+ return ret;219219+220220+ *val = max - min;221221+222222+ return IIO_VAL_INT;223223+}224224+225225+static int mxs_lradc_adc_read_raw(struct iio_dev *iio_dev,226226+ const struct iio_chan_spec *chan,227227+ int *val, int *val2, long m)228228+{229229+ struct mxs_lradc_adc *adc = iio_priv(iio_dev);230230+231231+ switch (m) {232232+ case IIO_CHAN_INFO_RAW:233233+ if (chan->type == IIO_TEMP)234234+ return mxs_lradc_adc_read_temp(iio_dev, val);235235+236236+ return mxs_lradc_adc_read_single(iio_dev, chan->channel, val);237237+238238+ case IIO_CHAN_INFO_SCALE:239239+ if (chan->type == IIO_TEMP) {240240+ /*241241+ * From the datasheet, we have to multiply by 1.012 and242242+ * divide by 4243243+ */244244+ *val = 0;245245+ *val2 = 253000;246246+ return IIO_VAL_INT_PLUS_MICRO;247247+ }248248+249249+ *val = adc->vref_mv[chan->channel];250250+ *val2 = chan->scan_type.realbits -251251+ test_bit(chan->channel, &adc->is_divided);252252+ return IIO_VAL_FRACTIONAL_LOG2;253253+254254+ case IIO_CHAN_INFO_OFFSET:255255+ if (chan->type == IIO_TEMP) {256256+ /*257257+ * The calculated value from the ADC is in Kelvin, we258258+ * want Celsius for hwmon so the offset is -273.15259259+ * The offset is applied before scaling so it is260260+ * actually -213.15 * 4 / 1.012 = -1079.644268261261+ */262262+ *val = -1079;263263+ *val2 = 644268;264264+265265+ return IIO_VAL_INT_PLUS_MICRO;266266+ }267267+268268+ return -EINVAL;269269+270270+ default:271271+ break;272272+ }273273+274274+ return -EINVAL;275275+}276276+277277+static int mxs_lradc_adc_write_raw(struct iio_dev *iio_dev,278278+ const struct iio_chan_spec *chan,279279+ int val, int val2, long m)280280+{281281+ struct mxs_lradc_adc *adc = iio_priv(iio_dev);282282+ struct mxs_lradc_scale *scale_avail =283283+ adc->scale_avail[chan->channel];284284+ int ret;285285+286286+ ret = iio_device_claim_direct_mode(iio_dev);287287+ if (ret)288288+ return ret;289289+290290+ switch (m) {291291+ case IIO_CHAN_INFO_SCALE:292292+ ret = -EINVAL;293293+ if (val == scale_avail[MXS_LRADC_DIV_DISABLED].integer &&294294+ val2 == scale_avail[MXS_LRADC_DIV_DISABLED].nano) {295295+ /* divider by two disabled */296296+ clear_bit(chan->channel, &adc->is_divided);297297+ ret = 0;298298+ } else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer &&299299+ val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {300300+ /* divider by two enabled */301301+ set_bit(chan->channel, &adc->is_divided);302302+ ret = 0;303303+ }304304+305305+ break;306306+ default:307307+ ret = -EINVAL;308308+ break;309309+ }310310+311311+ iio_device_release_direct_mode(iio_dev);312312+313313+ return ret;314314+}315315+316316+static int mxs_lradc_adc_write_raw_get_fmt(struct iio_dev *iio_dev,317317+ const struct iio_chan_spec *chan,318318+ long m)319319+{320320+ return IIO_VAL_INT_PLUS_NANO;321321+}322322+323323+static ssize_t mxs_lradc_adc_show_scale_avail(struct device *dev,324324+ struct device_attribute *attr,325325+ char *buf)326326+{327327+ struct iio_dev *iio = dev_to_iio_dev(dev);328328+ struct mxs_lradc_adc *adc = iio_priv(iio);329329+ struct iio_dev_attr *iio_attr = to_iio_dev_attr(attr);330330+ int i, ch, len = 0;331331+332332+ ch = iio_attr->address;333333+ for (i = 0; i < ARRAY_SIZE(adc->scale_avail[ch]); i++)334334+ len += sprintf(buf + len, "%u.%09u ",335335+ adc->scale_avail[ch][i].integer,336336+ adc->scale_avail[ch][i].nano);337337+338338+ len += sprintf(buf + len, "\n");339339+340340+ return len;341341+}342342+343343+#define SHOW_SCALE_AVAILABLE_ATTR(ch)\344344+ IIO_DEVICE_ATTR(in_voltage##ch##_scale_available, 0444,\345345+ mxs_lradc_adc_show_scale_avail, NULL, ch)346346+347347+SHOW_SCALE_AVAILABLE_ATTR(0);348348+SHOW_SCALE_AVAILABLE_ATTR(1);349349+SHOW_SCALE_AVAILABLE_ATTR(2);350350+SHOW_SCALE_AVAILABLE_ATTR(3);351351+SHOW_SCALE_AVAILABLE_ATTR(4);352352+SHOW_SCALE_AVAILABLE_ATTR(5);353353+SHOW_SCALE_AVAILABLE_ATTR(6);354354+SHOW_SCALE_AVAILABLE_ATTR(7);355355+SHOW_SCALE_AVAILABLE_ATTR(10);356356+SHOW_SCALE_AVAILABLE_ATTR(11);357357+SHOW_SCALE_AVAILABLE_ATTR(12);358358+SHOW_SCALE_AVAILABLE_ATTR(13);359359+SHOW_SCALE_AVAILABLE_ATTR(14);360360+SHOW_SCALE_AVAILABLE_ATTR(15);361361+362362+static struct attribute *mxs_lradc_adc_attributes[] = {363363+ &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,364364+ &iio_dev_attr_in_voltage1_scale_available.dev_attr.attr,365365+ &iio_dev_attr_in_voltage2_scale_available.dev_attr.attr,366366+ &iio_dev_attr_in_voltage3_scale_available.dev_attr.attr,367367+ &iio_dev_attr_in_voltage4_scale_available.dev_attr.attr,368368+ &iio_dev_attr_in_voltage5_scale_available.dev_attr.attr,369369+ &iio_dev_attr_in_voltage6_scale_available.dev_attr.attr,370370+ &iio_dev_attr_in_voltage7_scale_available.dev_attr.attr,371371+ &iio_dev_attr_in_voltage10_scale_available.dev_attr.attr,372372+ &iio_dev_attr_in_voltage11_scale_available.dev_attr.attr,373373+ &iio_dev_attr_in_voltage12_scale_available.dev_attr.attr,374374+ &iio_dev_attr_in_voltage13_scale_available.dev_attr.attr,375375+ &iio_dev_attr_in_voltage14_scale_available.dev_attr.attr,376376+ &iio_dev_attr_in_voltage15_scale_available.dev_attr.attr,377377+ NULL378378+};379379+380380+static const struct attribute_group mxs_lradc_adc_attribute_group = {381381+ .attrs = mxs_lradc_adc_attributes,382382+};383383+384384+static const struct iio_info mxs_lradc_adc_iio_info = {385385+ .driver_module = THIS_MODULE,386386+ .read_raw = mxs_lradc_adc_read_raw,387387+ .write_raw = mxs_lradc_adc_write_raw,388388+ .write_raw_get_fmt = mxs_lradc_adc_write_raw_get_fmt,389389+ .attrs = &mxs_lradc_adc_attribute_group,390390+};391391+392392+/* IRQ Handling */393393+static irqreturn_t mxs_lradc_adc_handle_irq(int irq, void *data)394394+{395395+ struct iio_dev *iio = data;396396+ struct mxs_lradc_adc *adc = iio_priv(iio);397397+ struct mxs_lradc *lradc = adc->lradc;398398+ unsigned long reg = readl(adc->base + LRADC_CTRL1);399399+ unsigned long flags;400400+401401+ if (!(reg & mxs_lradc_irq_mask(lradc)))402402+ return IRQ_NONE;403403+404404+ if (iio_buffer_enabled(iio)) {405405+ if (reg & lradc->buffer_vchans) {406406+ spin_lock_irqsave(&adc->lock, flags);407407+ iio_trigger_poll(iio->trig);408408+ spin_unlock_irqrestore(&adc->lock, flags);409409+ }410410+ } else if (reg & LRADC_CTRL1_LRADC_IRQ(0)) {411411+ complete(&adc->completion);412412+ }413413+414414+ writel(reg & mxs_lradc_irq_mask(lradc),415415+ adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);416416+417417+ return IRQ_HANDLED;418418+}419419+420420+421421+/* Trigger handling */422422+static irqreturn_t mxs_lradc_adc_trigger_handler(int irq, void *p)423423+{424424+ struct iio_poll_func *pf = p;425425+ struct iio_dev *iio = pf->indio_dev;426426+ struct mxs_lradc_adc *adc = iio_priv(iio);427427+ const u32 chan_value = LRADC_CH_ACCUMULATE |428428+ ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);429429+ unsigned int i, j = 0;430430+431431+ for_each_set_bit(i, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {432432+ adc->buffer[j] = readl(adc->base + LRADC_CH(j));433433+ writel(chan_value, adc->base + LRADC_CH(j));434434+ adc->buffer[j] &= LRADC_CH_VALUE_MASK;435435+ adc->buffer[j] /= LRADC_DELAY_TIMER_LOOP;436436+ j++;437437+ }438438+439439+ iio_push_to_buffers_with_timestamp(iio, adc->buffer, pf->timestamp);440440+441441+ iio_trigger_notify_done(iio->trig);442442+443443+ return IRQ_HANDLED;444444+}445445+446446+static int mxs_lradc_adc_configure_trigger(struct iio_trigger *trig, bool state)447447+{448448+ struct iio_dev *iio = iio_trigger_get_drvdata(trig);449449+ struct mxs_lradc_adc *adc = iio_priv(iio);450450+ const u32 st = state ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR;451451+452452+ writel(LRADC_DELAY_KICK, adc->base + (LRADC_DELAY(0) + st));453453+454454+ return 0;455455+}456456+457457+static const struct iio_trigger_ops mxs_lradc_adc_trigger_ops = {458458+ .owner = THIS_MODULE,459459+ .set_trigger_state = &mxs_lradc_adc_configure_trigger,460460+};461461+462462+static int mxs_lradc_adc_trigger_init(struct iio_dev *iio)463463+{464464+ int ret;465465+ struct iio_trigger *trig;466466+ struct mxs_lradc_adc *adc = iio_priv(iio);467467+468468+ trig = devm_iio_trigger_alloc(&iio->dev, "%s-dev%i", iio->name,469469+ iio->id);470470+471471+ trig->dev.parent = adc->dev;472472+ iio_trigger_set_drvdata(trig, iio);473473+ trig->ops = &mxs_lradc_adc_trigger_ops;474474+475475+ ret = iio_trigger_register(trig);476476+ if (ret)477477+ return ret;478478+479479+ adc->trig = trig;480480+481481+ return 0;482482+}483483+484484+static void mxs_lradc_adc_trigger_remove(struct iio_dev *iio)485485+{486486+ struct mxs_lradc_adc *adc = iio_priv(iio);487487+488488+ iio_trigger_unregister(adc->trig);489489+}490490+491491+static int mxs_lradc_adc_buffer_preenable(struct iio_dev *iio)492492+{493493+ struct mxs_lradc_adc *adc = iio_priv(iio);494494+ struct mxs_lradc *lradc = adc->lradc;495495+ int chan, ofs = 0;496496+ unsigned long enable = 0;497497+ u32 ctrl4_set = 0;498498+ u32 ctrl4_clr = 0;499499+ u32 ctrl1_irq = 0;500500+ const u32 chan_value = LRADC_CH_ACCUMULATE |501501+ ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);502502+503503+ if (lradc->soc == IMX28_LRADC)504504+ writel(lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,505505+ adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);506506+ writel(lradc->buffer_vchans,507507+ adc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);508508+509509+ for_each_set_bit(chan, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {510510+ ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs);511511+ ctrl4_clr |= LRADC_CTRL4_LRADCSELECT_MASK(ofs);512512+ ctrl1_irq |= LRADC_CTRL1_LRADC_IRQ_EN(ofs);513513+ writel(chan_value, adc->base + LRADC_CH(ofs));514514+ bitmap_set(&enable, ofs, 1);515515+ ofs++;516516+ }517517+518518+ writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK,519519+ adc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_CLR);520520+ writel(ctrl4_clr, adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);521521+ writel(ctrl4_set, adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);522522+ writel(ctrl1_irq, adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);523523+ writel(enable << LRADC_DELAY_TRIGGER_LRADCS_OFFSET,524524+ adc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_SET);525525+526526+ return 0;527527+}528528+529529+static int mxs_lradc_adc_buffer_postdisable(struct iio_dev *iio)530530+{531531+ struct mxs_lradc_adc *adc = iio_priv(iio);532532+ struct mxs_lradc *lradc = adc->lradc;533533+534534+ writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK,535535+ adc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_CLR);536536+537537+ writel(lradc->buffer_vchans,538538+ adc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);539539+ if (lradc->soc == IMX28_LRADC)540540+ writel(lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,541541+ adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);542542+543543+ return 0;544544+}545545+546546+static bool mxs_lradc_adc_validate_scan_mask(struct iio_dev *iio,547547+ const unsigned long *mask)548548+{549549+ struct mxs_lradc_adc *adc = iio_priv(iio);550550+ struct mxs_lradc *lradc = adc->lradc;551551+ const int map_chans = bitmap_weight(mask, LRADC_MAX_TOTAL_CHANS);552552+ int rsvd_chans = 0;553553+ unsigned long rsvd_mask = 0;554554+555555+ if (lradc->use_touchbutton)556556+ rsvd_mask |= CHAN_MASK_TOUCHBUTTON;557557+ if (lradc->touchscreen_wire == MXS_LRADC_TOUCHSCREEN_4WIRE)558558+ rsvd_mask |= CHAN_MASK_TOUCHSCREEN_4WIRE;559559+ if (lradc->touchscreen_wire == MXS_LRADC_TOUCHSCREEN_5WIRE)560560+ rsvd_mask |= CHAN_MASK_TOUCHSCREEN_5WIRE;561561+562562+ if (lradc->use_touchbutton)563563+ rsvd_chans++;564564+ if (lradc->touchscreen_wire)565565+ rsvd_chans += 2;566566+567567+ /* Test for attempts to map channels with special mode of operation. */568568+ if (bitmap_intersects(mask, &rsvd_mask, LRADC_MAX_TOTAL_CHANS))569569+ return false;570570+571571+ /* Test for attempts to map more channels then available slots. */572572+ if (map_chans + rsvd_chans > LRADC_MAX_MAPPED_CHANS)573573+ return false;574574+575575+ return true;576576+}577577+578578+static const struct iio_buffer_setup_ops mxs_lradc_adc_buffer_ops = {579579+ .preenable = &mxs_lradc_adc_buffer_preenable,580580+ .postenable = &iio_triggered_buffer_postenable,581581+ .predisable = &iio_triggered_buffer_predisable,582582+ .postdisable = &mxs_lradc_adc_buffer_postdisable,583583+ .validate_scan_mask = &mxs_lradc_adc_validate_scan_mask,584584+};585585+586586+/* Driver initialization */587587+#define MXS_ADC_CHAN(idx, chan_type, name) { \588588+ .type = (chan_type), \589589+ .indexed = 1, \590590+ .scan_index = (idx), \591591+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \592592+ BIT(IIO_CHAN_INFO_SCALE), \593593+ .channel = (idx), \594594+ .address = (idx), \595595+ .scan_type = { \596596+ .sign = 'u', \597597+ .realbits = LRADC_RESOLUTION, \598598+ .storagebits = 32, \599599+ }, \600600+ .datasheet_name = (name), \601601+}602602+603603+static const struct iio_chan_spec mx23_lradc_chan_spec[] = {604604+ MXS_ADC_CHAN(0, IIO_VOLTAGE, "LRADC0"),605605+ MXS_ADC_CHAN(1, IIO_VOLTAGE, "LRADC1"),606606+ MXS_ADC_CHAN(2, IIO_VOLTAGE, "LRADC2"),607607+ MXS_ADC_CHAN(3, IIO_VOLTAGE, "LRADC3"),608608+ MXS_ADC_CHAN(4, IIO_VOLTAGE, "LRADC4"),609609+ MXS_ADC_CHAN(5, IIO_VOLTAGE, "LRADC5"),610610+ MXS_ADC_CHAN(6, IIO_VOLTAGE, "VDDIO"),611611+ MXS_ADC_CHAN(7, IIO_VOLTAGE, "VBATT"),612612+ /* Combined Temperature sensors */613613+ {614614+ .type = IIO_TEMP,615615+ .indexed = 1,616616+ .scan_index = 8,617617+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |618618+ BIT(IIO_CHAN_INFO_OFFSET) |619619+ BIT(IIO_CHAN_INFO_SCALE),620620+ .channel = 8,621621+ .scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,},622622+ .datasheet_name = "TEMP_DIE",623623+ },624624+ /* Hidden channel to keep indexes */625625+ {626626+ .type = IIO_TEMP,627627+ .indexed = 1,628628+ .scan_index = -1,629629+ .channel = 9,630630+ },631631+ MXS_ADC_CHAN(10, IIO_VOLTAGE, NULL),632632+ MXS_ADC_CHAN(11, IIO_VOLTAGE, NULL),633633+ MXS_ADC_CHAN(12, IIO_VOLTAGE, "USB_DP"),634634+ MXS_ADC_CHAN(13, IIO_VOLTAGE, "USB_DN"),635635+ MXS_ADC_CHAN(14, IIO_VOLTAGE, "VBG"),636636+ MXS_ADC_CHAN(15, IIO_VOLTAGE, "VDD5V"),637637+};638638+639639+static const struct iio_chan_spec mx28_lradc_chan_spec[] = {640640+ MXS_ADC_CHAN(0, IIO_VOLTAGE, "LRADC0"),641641+ MXS_ADC_CHAN(1, IIO_VOLTAGE, "LRADC1"),642642+ MXS_ADC_CHAN(2, IIO_VOLTAGE, "LRADC2"),643643+ MXS_ADC_CHAN(3, IIO_VOLTAGE, "LRADC3"),644644+ MXS_ADC_CHAN(4, IIO_VOLTAGE, "LRADC4"),645645+ MXS_ADC_CHAN(5, IIO_VOLTAGE, "LRADC5"),646646+ MXS_ADC_CHAN(6, IIO_VOLTAGE, "LRADC6"),647647+ MXS_ADC_CHAN(7, IIO_VOLTAGE, "VBATT"),648648+ /* Combined Temperature sensors */649649+ {650650+ .type = IIO_TEMP,651651+ .indexed = 1,652652+ .scan_index = 8,653653+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |654654+ BIT(IIO_CHAN_INFO_OFFSET) |655655+ BIT(IIO_CHAN_INFO_SCALE),656656+ .channel = 8,657657+ .scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,},658658+ .datasheet_name = "TEMP_DIE",659659+ },660660+ /* Hidden channel to keep indexes */661661+ {662662+ .type = IIO_TEMP,663663+ .indexed = 1,664664+ .scan_index = -1,665665+ .channel = 9,666666+ },667667+ MXS_ADC_CHAN(10, IIO_VOLTAGE, "VDDIO"),668668+ MXS_ADC_CHAN(11, IIO_VOLTAGE, "VTH"),669669+ MXS_ADC_CHAN(12, IIO_VOLTAGE, "VDDA"),670670+ MXS_ADC_CHAN(13, IIO_VOLTAGE, "VDDD"),671671+ MXS_ADC_CHAN(14, IIO_VOLTAGE, "VBG"),672672+ MXS_ADC_CHAN(15, IIO_VOLTAGE, "VDD5V"),673673+};674674+675675+static void mxs_lradc_adc_hw_init(struct mxs_lradc_adc *adc)676676+{677677+ /* The ADC always uses DELAY CHANNEL 0. */678678+ const u32 adc_cfg =679679+ (1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET + 0)) |680680+ (LRADC_DELAY_TIMER_PER << LRADC_DELAY_DELAY_OFFSET);681681+682682+ /* Configure DELAY CHANNEL 0 for generic ADC sampling. */683683+ writel(adc_cfg, adc->base + LRADC_DELAY(0));684684+685685+ /*686686+ * Start internal temperature sensing by clearing bit687687+ * HW_LRADC_CTRL2_TEMPSENSE_PWD. This bit can be left cleared688688+ * after power up.689689+ */690690+ writel(0, adc->base + LRADC_CTRL2);691691+}692692+693693+static void mxs_lradc_adc_hw_stop(struct mxs_lradc_adc *adc)694694+{695695+ writel(0, adc->base + LRADC_DELAY(0));696696+}697697+698698+static int mxs_lradc_adc_probe(struct platform_device *pdev)699699+{700700+ struct device *dev = &pdev->dev;701701+ struct mxs_lradc *lradc = dev_get_drvdata(dev->parent);702702+ struct mxs_lradc_adc *adc;703703+ struct iio_dev *iio;704704+ struct resource *iores;705705+ int ret, irq, virq, i, s, n;706706+ u64 scale_uv;707707+ const char **irq_name;708708+709709+ /* Allocate the IIO device. */710710+ iio = devm_iio_device_alloc(dev, sizeof(*adc));711711+ if (!iio) {712712+ dev_err(dev, "Failed to allocate IIO device\n");713713+ return -ENOMEM;714714+ }715715+716716+ adc = iio_priv(iio);717717+ adc->lradc = lradc;718718+ adc->dev = dev;719719+720720+ iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);721721+ adc->base = devm_ioremap(dev, iores->start, resource_size(iores));722722+ if (IS_ERR(adc->base))723723+ return PTR_ERR(adc->base);724724+725725+ init_completion(&adc->completion);726726+ spin_lock_init(&adc->lock);727727+728728+ platform_set_drvdata(pdev, iio);729729+730730+ iio->name = pdev->name;731731+ iio->dev.parent = dev;732732+ iio->dev.of_node = dev->parent->of_node;733733+ iio->info = &mxs_lradc_adc_iio_info;734734+ iio->modes = INDIO_DIRECT_MODE;735735+ iio->masklength = LRADC_MAX_TOTAL_CHANS;736736+737737+ if (lradc->soc == IMX23_LRADC) {738738+ iio->channels = mx23_lradc_chan_spec;739739+ iio->num_channels = ARRAY_SIZE(mx23_lradc_chan_spec);740740+ irq_name = mx23_lradc_adc_irq_names;741741+ n = ARRAY_SIZE(mx23_lradc_adc_irq_names);742742+ } else {743743+ iio->channels = mx28_lradc_chan_spec;744744+ iio->num_channels = ARRAY_SIZE(mx28_lradc_chan_spec);745745+ irq_name = mx28_lradc_adc_irq_names;746746+ n = ARRAY_SIZE(mx28_lradc_adc_irq_names);747747+ }748748+749749+ ret = stmp_reset_block(adc->base);750750+ if (ret)751751+ return ret;752752+753753+ for (i = 0; i < n; i++) {754754+ irq = platform_get_irq_byname(pdev, irq_name[i]);755755+ if (irq < 0)756756+ return irq;757757+758758+ virq = irq_of_parse_and_map(dev->parent->of_node, irq);759759+760760+ ret = devm_request_irq(dev, virq, mxs_lradc_adc_handle_irq,761761+ 0, irq_name[i], iio);762762+ if (ret)763763+ return ret;764764+ }765765+766766+ ret = mxs_lradc_adc_trigger_init(iio);767767+ if (ret)768768+ goto err_trig;769769+770770+ ret = iio_triggered_buffer_setup(iio, &iio_pollfunc_store_time,771771+ &mxs_lradc_adc_trigger_handler,772772+ &mxs_lradc_adc_buffer_ops);773773+ if (ret)774774+ return ret;775775+776776+ adc->vref_mv = mxs_lradc_adc_vref_mv[lradc->soc];777777+778778+ /* Populate available ADC input ranges */779779+ for (i = 0; i < LRADC_MAX_TOTAL_CHANS; i++) {780780+ for (s = 0; s < ARRAY_SIZE(adc->scale_avail[i]); s++) {781781+ /*782782+ * [s=0] = optional divider by two disabled (default)783783+ * [s=1] = optional divider by two enabled784784+ *785785+ * The scale is calculated by doing:786786+ * Vref >> (realbits - s)787787+ * which multiplies by two on the second component788788+ * of the array.789789+ */790790+ scale_uv = ((u64)adc->vref_mv[i] * 100000000) >>791791+ (LRADC_RESOLUTION - s);792792+ adc->scale_avail[i][s].nano =793793+ do_div(scale_uv, 100000000) * 10;794794+ adc->scale_avail[i][s].integer = scale_uv;795795+ }796796+ }797797+798798+ /* Configure the hardware. */799799+ mxs_lradc_adc_hw_init(adc);800800+801801+ /* Register IIO device. */802802+ ret = iio_device_register(iio);803803+ if (ret) {804804+ dev_err(dev, "Failed to register IIO device\n");805805+ goto err_dev;806806+ }807807+808808+ return 0;809809+810810+err_dev:811811+ mxs_lradc_adc_hw_stop(adc);812812+ mxs_lradc_adc_trigger_remove(iio);813813+err_trig:814814+ iio_triggered_buffer_cleanup(iio);815815+ return ret;816816+}817817+818818+static int mxs_lradc_adc_remove(struct platform_device *pdev)819819+{820820+ struct iio_dev *iio = platform_get_drvdata(pdev);821821+ struct mxs_lradc_adc *adc = iio_priv(iio);822822+823823+ iio_device_unregister(iio);824824+ mxs_lradc_adc_hw_stop(adc);825825+ mxs_lradc_adc_trigger_remove(iio);826826+ iio_triggered_buffer_cleanup(iio);827827+828828+ return 0;829829+}830830+831831+static struct platform_driver mxs_lradc_adc_driver = {832832+ .driver = {833833+ .name = "mxs-lradc-adc",834834+ },835835+ .probe = mxs_lradc_adc_probe,836836+ .remove = mxs_lradc_adc_remove,837837+};838838+module_platform_driver(mxs_lradc_adc_driver);839839+840840+MODULE_AUTHOR("Marek Vasut <marex@denx.de>");841841+MODULE_DESCRIPTION("Freescale MXS LRADC driver general purpose ADC driver");842842+MODULE_LICENSE("GPL");843843+MODULE_ALIAS("platform:mxs-lradc-adc");
-1750
drivers/iio/adc/mxs-lradc.c
···11-/*22- * Freescale MXS LRADC driver33- *44- * Copyright (c) 2012 DENX Software Engineering, GmbH.55- * Marek Vasut <marex@denx.de>66- *77- * This program is free software; you can redistribute it and/or modify88- * it under the terms of the GNU General Public License as published by99- * the Free Software Foundation; either version 2 of the License, or1010- * (at your option) any later version.1111- *1212- * This program is distributed in the hope that it will be useful,1313- * but WITHOUT ANY WARRANTY; without even the implied warranty of1414- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the1515- * GNU General Public License for more details.1616- */1717-1818-#include <linux/bitops.h>1919-#include <linux/clk.h>2020-#include <linux/completion.h>2121-#include <linux/device.h>2222-#include <linux/err.h>2323-#include <linux/input.h>2424-#include <linux/interrupt.h>2525-#include <linux/io.h>2626-#include <linux/kernel.h>2727-#include <linux/module.h>2828-#include <linux/mutex.h>2929-#include <linux/of.h>3030-#include <linux/of_device.h>3131-#include <linux/platform_device.h>3232-#include <linux/slab.h>3333-#include <linux/stmp_device.h>3434-#include <linux/sysfs.h>3535-3636-#include <linux/iio/buffer.h>3737-#include <linux/iio/iio.h>3838-#include <linux/iio/trigger.h>3939-#include <linux/iio/trigger_consumer.h>4040-#include <linux/iio/triggered_buffer.h>4141-#include <linux/iio/sysfs.h>4242-4343-#define DRIVER_NAME "mxs-lradc"4444-4545-#define LRADC_MAX_DELAY_CHANS 44646-#define LRADC_MAX_MAPPED_CHANS 84747-#define LRADC_MAX_TOTAL_CHANS 164848-4949-#define LRADC_DELAY_TIMER_HZ 20005050-5151-/*5252- * Make this runtime configurable if necessary. Currently, if the buffered mode5353- * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before5454- * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000)5555- * seconds. The result is that the samples arrive every 500mS.5656- */5757-#define LRADC_DELAY_TIMER_PER 2005858-#define LRADC_DELAY_TIMER_LOOP 55959-6060-/*6161- * Once the pen touches the touchscreen, the touchscreen switches from6262- * IRQ-driven mode to polling mode to prevent interrupt storm. The polling6363- * is realized by worker thread, which is called every 20 or so milliseconds.6464- * This gives the touchscreen enough fluency and does not strain the system6565- * too much.6666- */6767-#define LRADC_TS_SAMPLE_DELAY_MS 56868-6969-/*7070- * The LRADC reads the following amount of samples from each touchscreen7171- * channel and the driver then computes average of these.7272- */7373-#define LRADC_TS_SAMPLE_AMOUNT 47474-7575-enum mxs_lradc_id {7676- IMX23_LRADC,7777- IMX28_LRADC,7878-};7979-8080-static const char * const mx23_lradc_irq_names[] = {8181- "mxs-lradc-touchscreen",8282- "mxs-lradc-channel0",8383- "mxs-lradc-channel1",8484- "mxs-lradc-channel2",8585- "mxs-lradc-channel3",8686- "mxs-lradc-channel4",8787- "mxs-lradc-channel5",8888- "mxs-lradc-channel6",8989- "mxs-lradc-channel7",9090-};9191-9292-static const char * const mx28_lradc_irq_names[] = {9393- "mxs-lradc-touchscreen",9494- "mxs-lradc-thresh0",9595- "mxs-lradc-thresh1",9696- "mxs-lradc-channel0",9797- "mxs-lradc-channel1",9898- "mxs-lradc-channel2",9999- "mxs-lradc-channel3",100100- "mxs-lradc-channel4",101101- "mxs-lradc-channel5",102102- "mxs-lradc-channel6",103103- "mxs-lradc-channel7",104104- "mxs-lradc-button0",105105- "mxs-lradc-button1",106106-};107107-108108-struct mxs_lradc_of_config {109109- const int irq_count;110110- const char * const *irq_name;111111- const u32 *vref_mv;112112-};113113-114114-#define VREF_MV_BASE 1850115115-116116-static const u32 mx23_vref_mv[LRADC_MAX_TOTAL_CHANS] = {117117- VREF_MV_BASE, /* CH0 */118118- VREF_MV_BASE, /* CH1 */119119- VREF_MV_BASE, /* CH2 */120120- VREF_MV_BASE, /* CH3 */121121- VREF_MV_BASE, /* CH4 */122122- VREF_MV_BASE, /* CH5 */123123- VREF_MV_BASE * 2, /* CH6 VDDIO */124124- VREF_MV_BASE * 4, /* CH7 VBATT */125125- VREF_MV_BASE, /* CH8 Temp sense 0 */126126- VREF_MV_BASE, /* CH9 Temp sense 1 */127127- VREF_MV_BASE, /* CH10 */128128- VREF_MV_BASE, /* CH11 */129129- VREF_MV_BASE, /* CH12 USB_DP */130130- VREF_MV_BASE, /* CH13 USB_DN */131131- VREF_MV_BASE, /* CH14 VBG */132132- VREF_MV_BASE * 4, /* CH15 VDD5V */133133-};134134-135135-static const u32 mx28_vref_mv[LRADC_MAX_TOTAL_CHANS] = {136136- VREF_MV_BASE, /* CH0 */137137- VREF_MV_BASE, /* CH1 */138138- VREF_MV_BASE, /* CH2 */139139- VREF_MV_BASE, /* CH3 */140140- VREF_MV_BASE, /* CH4 */141141- VREF_MV_BASE, /* CH5 */142142- VREF_MV_BASE, /* CH6 */143143- VREF_MV_BASE * 4, /* CH7 VBATT */144144- VREF_MV_BASE, /* CH8 Temp sense 0 */145145- VREF_MV_BASE, /* CH9 Temp sense 1 */146146- VREF_MV_BASE * 2, /* CH10 VDDIO */147147- VREF_MV_BASE, /* CH11 VTH */148148- VREF_MV_BASE * 2, /* CH12 VDDA */149149- VREF_MV_BASE, /* CH13 VDDD */150150- VREF_MV_BASE, /* CH14 VBG */151151- VREF_MV_BASE * 4, /* CH15 VDD5V */152152-};153153-154154-static const struct mxs_lradc_of_config mxs_lradc_of_config[] = {155155- [IMX23_LRADC] = {156156- .irq_count = ARRAY_SIZE(mx23_lradc_irq_names),157157- .irq_name = mx23_lradc_irq_names,158158- .vref_mv = mx23_vref_mv,159159- },160160- [IMX28_LRADC] = {161161- .irq_count = ARRAY_SIZE(mx28_lradc_irq_names),162162- .irq_name = mx28_lradc_irq_names,163163- .vref_mv = mx28_vref_mv,164164- },165165-};166166-167167-enum mxs_lradc_ts {168168- MXS_LRADC_TOUCHSCREEN_NONE = 0,169169- MXS_LRADC_TOUCHSCREEN_4WIRE,170170- MXS_LRADC_TOUCHSCREEN_5WIRE,171171-};172172-173173-/*174174- * Touchscreen handling175175- */176176-enum lradc_ts_plate {177177- LRADC_TOUCH = 0,178178- LRADC_SAMPLE_X,179179- LRADC_SAMPLE_Y,180180- LRADC_SAMPLE_PRESSURE,181181- LRADC_SAMPLE_VALID,182182-};183183-184184-enum mxs_lradc_divbytwo {185185- MXS_LRADC_DIV_DISABLED = 0,186186- MXS_LRADC_DIV_ENABLED,187187-};188188-189189-struct mxs_lradc_scale {190190- unsigned int integer;191191- unsigned int nano;192192-};193193-194194-struct mxs_lradc {195195- struct device *dev;196196- void __iomem *base;197197- int irq[13];198198-199199- struct clk *clk;200200-201201- u32 *buffer;202202- struct iio_trigger *trig;203203-204204- struct mutex lock;205205-206206- struct completion completion;207207-208208- const u32 *vref_mv;209209- struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];210210- unsigned long is_divided;211211-212212- /*213213- * When the touchscreen is enabled, we give it two private virtual214214- * channels: #6 and #7. This means that only 6 virtual channels (instead215215- * of 8) will be available for buffered capture.216216- */217217-#define TOUCHSCREEN_VCHANNEL1 7218218-#define TOUCHSCREEN_VCHANNEL2 6219219-#define BUFFER_VCHANS_LIMITED 0x3f220220-#define BUFFER_VCHANS_ALL 0xff221221- u8 buffer_vchans;222222-223223- /*224224- * Furthermore, certain LRADC channels are shared between touchscreen225225- * and/or touch-buttons and generic LRADC block. Therefore when using226226- * either of these, these channels are not available for the regular227227- * sampling. The shared channels are as follows:228228- *229229- * CH0 -- Touch button #0230230- * CH1 -- Touch button #1231231- * CH2 -- Touch screen XPUL232232- * CH3 -- Touch screen YPLL233233- * CH4 -- Touch screen XNUL234234- * CH5 -- Touch screen YNLR235235- * CH6 -- Touch screen WIPER (5-wire only)236236- *237237- * The bit fields below represents which parts of the LRADC block are238238- * switched into special mode of operation. These channels can not239239- * be sampled as regular LRADC channels. The driver will refuse any240240- * attempt to sample these channels.241241- */242242-#define CHAN_MASK_TOUCHBUTTON (BIT(1) | BIT(0))243243-#define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)244244-#define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)245245- enum mxs_lradc_ts use_touchscreen;246246- bool use_touchbutton;247247-248248- struct input_dev *ts_input;249249-250250- enum mxs_lradc_id soc;251251- enum lradc_ts_plate cur_plate; /* state machine */252252- bool ts_valid;253253- unsigned ts_x_pos;254254- unsigned ts_y_pos;255255- unsigned ts_pressure;256256-257257- /* handle touchscreen's physical behaviour */258258- /* samples per coordinate */259259- unsigned over_sample_cnt;260260- /* time clocks between samples */261261- unsigned over_sample_delay;262262- /* time in clocks to wait after the plates where switched */263263- unsigned settling_delay;264264-};265265-266266-#define LRADC_CTRL0 0x00267267-# define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE BIT(23)268268-# define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE BIT(22)269269-# define LRADC_CTRL0_MX28_YNNSW /* YM */ BIT(21)270270-# define LRADC_CTRL0_MX28_YPNSW /* YP */ BIT(20)271271-# define LRADC_CTRL0_MX28_YPPSW /* YP */ BIT(19)272272-# define LRADC_CTRL0_MX28_XNNSW /* XM */ BIT(18)273273-# define LRADC_CTRL0_MX28_XNPSW /* XM */ BIT(17)274274-# define LRADC_CTRL0_MX28_XPPSW /* XP */ BIT(16)275275-276276-# define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE BIT(20)277277-# define LRADC_CTRL0_MX23_YM BIT(19)278278-# define LRADC_CTRL0_MX23_XM BIT(18)279279-# define LRADC_CTRL0_MX23_YP BIT(17)280280-# define LRADC_CTRL0_MX23_XP BIT(16)281281-282282-# define LRADC_CTRL0_MX28_PLATE_MASK \283283- (LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \284284- LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \285285- LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \286286- LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW)287287-288288-# define LRADC_CTRL0_MX23_PLATE_MASK \289289- (LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \290290- LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \291291- LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)292292-293293-#define LRADC_CTRL1 0x10294294-#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN BIT(24)295295-#define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))296296-#define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16)297297-#define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16)298298-#define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16299299-#define LRADC_CTRL1_TOUCH_DETECT_IRQ BIT(8)300300-#define LRADC_CTRL1_LRADC_IRQ(n) (1 << (n))301301-#define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff302302-#define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff303303-#define LRADC_CTRL1_LRADC_IRQ_OFFSET 0304304-305305-#define LRADC_CTRL2 0x20306306-#define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24307307-#define LRADC_CTRL2_TEMPSENSE_PWD BIT(15)308308-309309-#define LRADC_STATUS 0x40310310-#define LRADC_STATUS_TOUCH_DETECT_RAW BIT(0)311311-312312-#define LRADC_CH(n) (0x50 + (0x10 * (n)))313313-#define LRADC_CH_ACCUMULATE BIT(29)314314-#define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)315315-#define LRADC_CH_NUM_SAMPLES_OFFSET 24316316-#define LRADC_CH_NUM_SAMPLES(x) \317317- ((x) << LRADC_CH_NUM_SAMPLES_OFFSET)318318-#define LRADC_CH_VALUE_MASK 0x3ffff319319-#define LRADC_CH_VALUE_OFFSET 0320320-321321-#define LRADC_DELAY(n) (0xd0 + (0x10 * (n)))322322-#define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xffUL << 24)323323-#define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24324324-#define LRADC_DELAY_TRIGGER(x) \325325- (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \326326- LRADC_DELAY_TRIGGER_LRADCS_MASK)327327-#define LRADC_DELAY_KICK BIT(20)328328-#define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16)329329-#define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16330330-#define LRADC_DELAY_TRIGGER_DELAYS(x) \331331- (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \332332- LRADC_DELAY_TRIGGER_DELAYS_MASK)333333-#define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11)334334-#define LRADC_DELAY_LOOP_COUNT_OFFSET 11335335-#define LRADC_DELAY_LOOP(x) \336336- (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \337337- LRADC_DELAY_LOOP_COUNT_MASK)338338-#define LRADC_DELAY_DELAY_MASK 0x7ff339339-#define LRADC_DELAY_DELAY_OFFSET 0340340-#define LRADC_DELAY_DELAY(x) \341341- (((x) << LRADC_DELAY_DELAY_OFFSET) & \342342- LRADC_DELAY_DELAY_MASK)343343-344344-#define LRADC_CTRL4 0x140345345-#define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))346346-#define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)347347-#define LRADC_CTRL4_LRADCSELECT(n, x) \348348- (((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \349349- LRADC_CTRL4_LRADCSELECT_MASK(n))350350-351351-#define LRADC_RESOLUTION 12352352-#define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1)353353-354354-static void mxs_lradc_reg_set(struct mxs_lradc *lradc, u32 val, u32 reg)355355-{356356- writel(val, lradc->base + reg + STMP_OFFSET_REG_SET);357357-}358358-359359-static void mxs_lradc_reg_clear(struct mxs_lradc *lradc, u32 val, u32 reg)360360-{361361- writel(val, lradc->base + reg + STMP_OFFSET_REG_CLR);362362-}363363-364364-static void mxs_lradc_reg_wrt(struct mxs_lradc *lradc, u32 val, u32 reg)365365-{366366- writel(val, lradc->base + reg);367367-}368368-369369-static u32 mxs_lradc_plate_mask(struct mxs_lradc *lradc)370370-{371371- if (lradc->soc == IMX23_LRADC)372372- return LRADC_CTRL0_MX23_PLATE_MASK;373373- return LRADC_CTRL0_MX28_PLATE_MASK;374374-}375375-376376-static u32 mxs_lradc_irq_mask(struct mxs_lradc *lradc)377377-{378378- if (lradc->soc == IMX23_LRADC)379379- return LRADC_CTRL1_MX23_LRADC_IRQ_MASK;380380- return LRADC_CTRL1_MX28_LRADC_IRQ_MASK;381381-}382382-383383-static u32 mxs_lradc_touch_detect_bit(struct mxs_lradc *lradc)384384-{385385- if (lradc->soc == IMX23_LRADC)386386- return LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE;387387- return LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE;388388-}389389-390390-static u32 mxs_lradc_drive_x_plate(struct mxs_lradc *lradc)391391-{392392- if (lradc->soc == IMX23_LRADC)393393- return LRADC_CTRL0_MX23_XP | LRADC_CTRL0_MX23_XM;394394- return LRADC_CTRL0_MX28_XPPSW | LRADC_CTRL0_MX28_XNNSW;395395-}396396-397397-static u32 mxs_lradc_drive_y_plate(struct mxs_lradc *lradc)398398-{399399- if (lradc->soc == IMX23_LRADC)400400- return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_YM;401401- return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_YNNSW;402402-}403403-404404-static u32 mxs_lradc_drive_pressure(struct mxs_lradc *lradc)405405-{406406- if (lradc->soc == IMX23_LRADC)407407- return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XM;408408- return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW;409409-}410410-411411-static bool mxs_lradc_check_touch_event(struct mxs_lradc *lradc)412412-{413413- return !!(readl(lradc->base + LRADC_STATUS) &414414- LRADC_STATUS_TOUCH_DETECT_RAW);415415-}416416-417417-static void mxs_lradc_map_channel(struct mxs_lradc *lradc, unsigned vch,418418- unsigned ch)419419-{420420- mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(vch),421421- LRADC_CTRL4);422422- mxs_lradc_reg_set(lradc, LRADC_CTRL4_LRADCSELECT(vch, ch), LRADC_CTRL4);423423-}424424-425425-static void mxs_lradc_setup_ts_channel(struct mxs_lradc *lradc, unsigned ch)426426-{427427- /*428428- * prepare for oversampling conversion429429- *430430- * from the datasheet:431431- * "The ACCUMULATE bit in the appropriate channel register432432- * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;433433- * otherwise, the IRQs will not fire."434434- */435435- mxs_lradc_reg_wrt(lradc, LRADC_CH_ACCUMULATE |436436- LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1),437437- LRADC_CH(ch));438438-439439- /*440440- * from the datasheet:441441- * "Software must clear this register in preparation for a442442- * multi-cycle accumulation.443443- */444444- mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch));445445-446446- /*447447- * prepare the delay/loop unit according to the oversampling count448448- *449449- * from the datasheet:450450- * "The DELAY fields in HW_LRADC_DELAY0, HW_LRADC_DELAY1,451451- * HW_LRADC_DELAY2, and HW_LRADC_DELAY3 must be non-zero; otherwise,452452- * the LRADC will not trigger the delay group."453453- */454454- mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << ch) |455455- LRADC_DELAY_TRIGGER_DELAYS(0) |456456- LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) |457457- LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),458458- LRADC_DELAY(3));459459-460460- mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch), LRADC_CTRL1);461461-462462- /*463463- * after changing the touchscreen plates setting464464- * the signals need some initial time to settle. Start the465465- * SoC's delay unit and start the conversion later466466- * and automatically.467467- */468468- mxs_lradc_reg_wrt(469469- lradc,470470- LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */471471- LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */472472- LRADC_DELAY_KICK |473473- LRADC_DELAY_DELAY(lradc->settling_delay),474474- LRADC_DELAY(2));475475-}476476-477477-/*478478- * Pressure detection is special:479479- * We want to do both required measurements for the pressure detection in480480- * one turn. Use the hardware features to chain both conversions and let the481481- * hardware report one interrupt if both conversions are done482482- */483483-static void mxs_lradc_setup_ts_pressure(struct mxs_lradc *lradc, unsigned ch1,484484- unsigned ch2)485485-{486486- u32 reg;487487-488488- /*489489- * prepare for oversampling conversion490490- *491491- * from the datasheet:492492- * "The ACCUMULATE bit in the appropriate channel register493493- * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;494494- * otherwise, the IRQs will not fire."495495- */496496- reg = LRADC_CH_ACCUMULATE |497497- LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1);498498- mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch1));499499- mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch2));500500-501501- /*502502- * from the datasheet:503503- * "Software must clear this register in preparation for a504504- * multi-cycle accumulation.505505- */506506- mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch1));507507- mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch2));508508-509509- /* prepare the delay/loop unit according to the oversampling count */510510- mxs_lradc_reg_wrt(511511- lradc,512512- LRADC_DELAY_TRIGGER(1 << ch1) |513513- LRADC_DELAY_TRIGGER(1 << ch2) | /* start both channels */514514- LRADC_DELAY_TRIGGER_DELAYS(0) |515515- LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) |516516- LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),517517- LRADC_DELAY(3));518518-519519- mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch2), LRADC_CTRL1);520520-521521- /*522522- * after changing the touchscreen plates setting523523- * the signals need some initial time to settle. Start the524524- * SoC's delay unit and start the conversion later525525- * and automatically.526526- */527527- mxs_lradc_reg_wrt(528528- lradc,529529- LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */530530- LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */531531- LRADC_DELAY_KICK |532532- LRADC_DELAY_DELAY(lradc->settling_delay), LRADC_DELAY(2));533533-}534534-535535-static unsigned mxs_lradc_read_raw_channel(struct mxs_lradc *lradc,536536- unsigned channel)537537-{538538- u32 reg;539539- unsigned num_samples, val;540540-541541- reg = readl(lradc->base + LRADC_CH(channel));542542- if (reg & LRADC_CH_ACCUMULATE)543543- num_samples = lradc->over_sample_cnt;544544- else545545- num_samples = 1;546546-547547- val = (reg & LRADC_CH_VALUE_MASK) >> LRADC_CH_VALUE_OFFSET;548548- return val / num_samples;549549-}550550-551551-static unsigned mxs_lradc_read_ts_pressure(struct mxs_lradc *lradc,552552- unsigned ch1, unsigned ch2)553553-{554554- u32 reg, mask;555555- unsigned pressure, m1, m2;556556-557557- mask = LRADC_CTRL1_LRADC_IRQ(ch1) | LRADC_CTRL1_LRADC_IRQ(ch2);558558- reg = readl(lradc->base + LRADC_CTRL1) & mask;559559-560560- while (reg != mask) {561561- reg = readl(lradc->base + LRADC_CTRL1) & mask;562562- dev_dbg(lradc->dev, "One channel is still busy: %X\n", reg);563563- }564564-565565- m1 = mxs_lradc_read_raw_channel(lradc, ch1);566566- m2 = mxs_lradc_read_raw_channel(lradc, ch2);567567-568568- if (m2 == 0) {569569- dev_warn(lradc->dev, "Cannot calculate pressure\n");570570- return 1 << (LRADC_RESOLUTION - 1);571571- }572572-573573- /* simply scale the value from 0 ... max ADC resolution */574574- pressure = m1;575575- pressure *= (1 << LRADC_RESOLUTION);576576- pressure /= m2;577577-578578- dev_dbg(lradc->dev, "Pressure = %u\n", pressure);579579- return pressure;580580-}581581-582582-#define TS_CH_XP 2583583-#define TS_CH_YP 3584584-#define TS_CH_XM 4585585-#define TS_CH_YM 5586586-587587-/*588588- * YP(open)--+-------------+589589- * | |--+590590- * | | |591591- * YM(-)--+-------------+ |592592- * +--------------+593593- * | |594594- * XP(weak+) XM(open)595595- *596596- * "weak+" means 200k Ohm VDDIO597597- * (-) means GND598598- */599599-static void mxs_lradc_setup_touch_detection(struct mxs_lradc *lradc)600600-{601601- /*602602- * In order to detect a touch event the 'touch detect enable' bit603603- * enables:604604- * - a weak pullup to the X+ connector605605- * - a strong ground at the Y- connector606606- */607607- mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);608608- mxs_lradc_reg_set(lradc, mxs_lradc_touch_detect_bit(lradc),609609- LRADC_CTRL0);610610-}611611-612612-/*613613- * YP(meas)--+-------------+614614- * | |--+615615- * | | |616616- * YM(open)--+-------------+ |617617- * +--------------+618618- * | |619619- * XP(+) XM(-)620620- *621621- * (+) means here 1.85 V622622- * (-) means here GND623623- */624624-static void mxs_lradc_prepare_x_pos(struct mxs_lradc *lradc)625625-{626626- mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);627627- mxs_lradc_reg_set(lradc, mxs_lradc_drive_x_plate(lradc), LRADC_CTRL0);628628-629629- lradc->cur_plate = LRADC_SAMPLE_X;630630- mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YP);631631- mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1);632632-}633633-634634-/*635635- * YP(+)--+-------------+636636- * | |--+637637- * | | |638638- * YM(-)--+-------------+ |639639- * +--------------+640640- * | |641641- * XP(open) XM(meas)642642- *643643- * (+) means here 1.85 V644644- * (-) means here GND645645- */646646-static void mxs_lradc_prepare_y_pos(struct mxs_lradc *lradc)647647-{648648- mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);649649- mxs_lradc_reg_set(lradc, mxs_lradc_drive_y_plate(lradc), LRADC_CTRL0);650650-651651- lradc->cur_plate = LRADC_SAMPLE_Y;652652- mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_XM);653653- mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1);654654-}655655-656656-/*657657- * YP(+)--+-------------+658658- * | |--+659659- * | | |660660- * YM(meas)--+-------------+ |661661- * +--------------+662662- * | |663663- * XP(meas) XM(-)664664- *665665- * (+) means here 1.85 V666666- * (-) means here GND667667- */668668-static void mxs_lradc_prepare_pressure(struct mxs_lradc *lradc)669669-{670670- mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);671671- mxs_lradc_reg_set(lradc, mxs_lradc_drive_pressure(lradc), LRADC_CTRL0);672672-673673- lradc->cur_plate = LRADC_SAMPLE_PRESSURE;674674- mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YM);675675- mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL2, TS_CH_XP);676676- mxs_lradc_setup_ts_pressure(lradc, TOUCHSCREEN_VCHANNEL2,677677- TOUCHSCREEN_VCHANNEL1);678678-}679679-680680-static void mxs_lradc_enable_touch_detection(struct mxs_lradc *lradc)681681-{682682- /* Configure the touchscreen type */683683- if (lradc->soc == IMX28_LRADC) {684684- mxs_lradc_reg_clear(lradc, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,685685- LRADC_CTRL0);686686-687687- if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)688688- mxs_lradc_reg_set(lradc,689689- LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,690690- LRADC_CTRL0);691691- }692692-693693- mxs_lradc_setup_touch_detection(lradc);694694-695695- lradc->cur_plate = LRADC_TOUCH;696696- mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ |697697- LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);698698- mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);699699-}700700-701701-static void mxs_lradc_start_touch_event(struct mxs_lradc *lradc)702702-{703703- mxs_lradc_reg_clear(lradc,704704- LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,705705- LRADC_CTRL1);706706- mxs_lradc_reg_set(lradc,707707- LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1),708708- LRADC_CTRL1);709709- /*710710- * start with the Y-pos, because it uses nearly the same plate711711- * settings like the touch detection712712- */713713- mxs_lradc_prepare_y_pos(lradc);714714-}715715-716716-static void mxs_lradc_report_ts_event(struct mxs_lradc *lradc)717717-{718718- input_report_abs(lradc->ts_input, ABS_X, lradc->ts_x_pos);719719- input_report_abs(lradc->ts_input, ABS_Y, lradc->ts_y_pos);720720- input_report_abs(lradc->ts_input, ABS_PRESSURE, lradc->ts_pressure);721721- input_report_key(lradc->ts_input, BTN_TOUCH, 1);722722- input_sync(lradc->ts_input);723723-}724724-725725-static void mxs_lradc_complete_touch_event(struct mxs_lradc *lradc)726726-{727727- mxs_lradc_setup_touch_detection(lradc);728728- lradc->cur_plate = LRADC_SAMPLE_VALID;729729- /*730730- * start a dummy conversion to burn time to settle the signals731731- * note: we are not interested in the conversion's value732732- */733733- mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(TOUCHSCREEN_VCHANNEL1));734734- mxs_lradc_reg_clear(lradc,735735- LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |736736- LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2),737737- LRADC_CTRL1);738738- mxs_lradc_reg_wrt(739739- lradc,740740- LRADC_DELAY_TRIGGER(1 << TOUCHSCREEN_VCHANNEL1) |741741- LRADC_DELAY_KICK | LRADC_DELAY_DELAY(10), /* waste 5 ms */742742- LRADC_DELAY(2));743743-}744744-745745-/*746746- * in order to avoid false measurements, report only samples where747747- * the surface is still touched after the position measurement748748- */749749-static void mxs_lradc_finish_touch_event(struct mxs_lradc *lradc, bool valid)750750-{751751- /* if it is still touched, report the sample */752752- if (valid && mxs_lradc_check_touch_event(lradc)) {753753- lradc->ts_valid = true;754754- mxs_lradc_report_ts_event(lradc);755755- }756756-757757- /* if it is even still touched, continue with the next measurement */758758- if (mxs_lradc_check_touch_event(lradc)) {759759- mxs_lradc_prepare_y_pos(lradc);760760- return;761761- }762762-763763- if (lradc->ts_valid) {764764- /* signal the release */765765- lradc->ts_valid = false;766766- input_report_key(lradc->ts_input, BTN_TOUCH, 0);767767- input_sync(lradc->ts_input);768768- }769769-770770- /* if it is released, wait for the next touch via IRQ */771771- lradc->cur_plate = LRADC_TOUCH;772772- mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));773773- mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));774774- mxs_lradc_reg_clear(lradc,775775- LRADC_CTRL1_TOUCH_DETECT_IRQ |776776- LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |777777- LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1),778778- LRADC_CTRL1);779779- mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);780780-}781781-782782-/* touchscreen's state machine */783783-static void mxs_lradc_handle_touch(struct mxs_lradc *lradc)784784-{785785- switch (lradc->cur_plate) {786786- case LRADC_TOUCH:787787- if (mxs_lradc_check_touch_event(lradc))788788- mxs_lradc_start_touch_event(lradc);789789- mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ,790790- LRADC_CTRL1);791791- return;792792-793793- case LRADC_SAMPLE_Y:794794- lradc->ts_y_pos =795795- mxs_lradc_read_raw_channel(lradc,796796- TOUCHSCREEN_VCHANNEL1);797797- mxs_lradc_prepare_x_pos(lradc);798798- return;799799-800800- case LRADC_SAMPLE_X:801801- lradc->ts_x_pos =802802- mxs_lradc_read_raw_channel(lradc,803803- TOUCHSCREEN_VCHANNEL1);804804- mxs_lradc_prepare_pressure(lradc);805805- return;806806-807807- case LRADC_SAMPLE_PRESSURE:808808- lradc->ts_pressure =809809- mxs_lradc_read_ts_pressure(lradc,810810- TOUCHSCREEN_VCHANNEL2,811811- TOUCHSCREEN_VCHANNEL1);812812- mxs_lradc_complete_touch_event(lradc);813813- return;814814-815815- case LRADC_SAMPLE_VALID:816816- mxs_lradc_finish_touch_event(lradc, 1);817817- break;818818- }819819-}820820-821821-/*822822- * Raw I/O operations823823- */824824-static int mxs_lradc_read_single(struct iio_dev *iio_dev, int chan, int *val)825825-{826826- struct mxs_lradc *lradc = iio_priv(iio_dev);827827- int ret;828828-829829- /*830830- * See if there is no buffered operation in progress. If there is, simply831831- * bail out. This can be improved to support both buffered and raw IO at832832- * the same time, yet the code becomes horribly complicated. Therefore I833833- * applied KISS principle here.834834- */835835- ret = mutex_trylock(&lradc->lock);836836- if (!ret)837837- return -EBUSY;838838-839839- reinit_completion(&lradc->completion);840840-841841- /*842842- * No buffered operation in progress, map the channel and trigger it.843843- * Virtual channel 0 is always used here as the others are always not844844- * used if doing raw sampling.845845- */846846- if (lradc->soc == IMX28_LRADC)847847- mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0),848848- LRADC_CTRL1);849849- mxs_lradc_reg_clear(lradc, 0x1, LRADC_CTRL0);850850-851851- /* Enable / disable the divider per requirement */852852- if (test_bit(chan, &lradc->is_divided))853853- mxs_lradc_reg_set(lradc,854854- 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,855855- LRADC_CTRL2);856856- else857857- mxs_lradc_reg_clear(lradc,858858- 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,859859- LRADC_CTRL2);860860-861861- /* Clean the slot's previous content, then set new one. */862862- mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(0),863863- LRADC_CTRL4);864864- mxs_lradc_reg_set(lradc, chan, LRADC_CTRL4);865865-866866- mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(0));867867-868868- /* Enable the IRQ and start sampling the channel. */869869- mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1);870870- mxs_lradc_reg_set(lradc, BIT(0), LRADC_CTRL0);871871-872872- /* Wait for completion on the channel, 1 second max. */873873- ret = wait_for_completion_killable_timeout(&lradc->completion, HZ);874874- if (!ret)875875- ret = -ETIMEDOUT;876876- if (ret < 0)877877- goto err;878878-879879- /* Read the data. */880880- *val = readl(lradc->base + LRADC_CH(0)) & LRADC_CH_VALUE_MASK;881881- ret = IIO_VAL_INT;882882-883883-err:884884- mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1);885885-886886- mutex_unlock(&lradc->lock);887887-888888- return ret;889889-}890890-891891-static int mxs_lradc_read_temp(struct iio_dev *iio_dev, int *val)892892-{893893- int ret, min, max;894894-895895- ret = mxs_lradc_read_single(iio_dev, 8, &min);896896- if (ret != IIO_VAL_INT)897897- return ret;898898-899899- ret = mxs_lradc_read_single(iio_dev, 9, &max);900900- if (ret != IIO_VAL_INT)901901- return ret;902902-903903- *val = max - min;904904-905905- return IIO_VAL_INT;906906-}907907-908908-static int mxs_lradc_read_raw(struct iio_dev *iio_dev,909909- const struct iio_chan_spec *chan,910910- int *val, int *val2, long m)911911-{912912- struct mxs_lradc *lradc = iio_priv(iio_dev);913913-914914- switch (m) {915915- case IIO_CHAN_INFO_RAW:916916- if (chan->type == IIO_TEMP)917917- return mxs_lradc_read_temp(iio_dev, val);918918-919919- return mxs_lradc_read_single(iio_dev, chan->channel, val);920920-921921- case IIO_CHAN_INFO_SCALE:922922- if (chan->type == IIO_TEMP) {923923- /*924924- * From the datasheet, we have to multiply by 1.012 and925925- * divide by 4926926- */927927- *val = 0;928928- *val2 = 253000;929929- return IIO_VAL_INT_PLUS_MICRO;930930- }931931-932932- *val = lradc->vref_mv[chan->channel];933933- *val2 = chan->scan_type.realbits -934934- test_bit(chan->channel, &lradc->is_divided);935935- return IIO_VAL_FRACTIONAL_LOG2;936936-937937- case IIO_CHAN_INFO_OFFSET:938938- if (chan->type == IIO_TEMP) {939939- /*940940- * The calculated value from the ADC is in Kelvin, we941941- * want Celsius for hwmon so the offset is -273.15942942- * The offset is applied before scaling so it is943943- * actually -213.15 * 4 / 1.012 = -1079.644268944944- */945945- *val = -1079;946946- *val2 = 644268;947947-948948- return IIO_VAL_INT_PLUS_MICRO;949949- }950950-951951- return -EINVAL;952952-953953- default:954954- break;955955- }956956-957957- return -EINVAL;958958-}959959-960960-static int mxs_lradc_write_raw(struct iio_dev *iio_dev,961961- const struct iio_chan_spec *chan,962962- int val, int val2, long m)963963-{964964- struct mxs_lradc *lradc = iio_priv(iio_dev);965965- struct mxs_lradc_scale *scale_avail =966966- lradc->scale_avail[chan->channel];967967- int ret;968968-969969- ret = mutex_trylock(&lradc->lock);970970- if (!ret)971971- return -EBUSY;972972-973973- switch (m) {974974- case IIO_CHAN_INFO_SCALE:975975- ret = -EINVAL;976976- if (val == scale_avail[MXS_LRADC_DIV_DISABLED].integer &&977977- val2 == scale_avail[MXS_LRADC_DIV_DISABLED].nano) {978978- /* divider by two disabled */979979- clear_bit(chan->channel, &lradc->is_divided);980980- ret = 0;981981- } else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer &&982982- val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {983983- /* divider by two enabled */984984- set_bit(chan->channel, &lradc->is_divided);985985- ret = 0;986986- }987987-988988- break;989989- default:990990- ret = -EINVAL;991991- break;992992- }993993-994994- mutex_unlock(&lradc->lock);995995-996996- return ret;997997-}998998-999999-static int mxs_lradc_write_raw_get_fmt(struct iio_dev *iio_dev,10001000- const struct iio_chan_spec *chan,10011001- long m)10021002-{10031003- return IIO_VAL_INT_PLUS_NANO;10041004-}10051005-10061006-static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev,10071007- struct device_attribute *attr,10081008- char *buf,10091009- int ch)10101010-{10111011- struct iio_dev *iio = dev_to_iio_dev(dev);10121012- struct mxs_lradc *lradc = iio_priv(iio);10131013- int i, len = 0;10141014-10151015- for (i = 0; i < ARRAY_SIZE(lradc->scale_avail[ch]); i++)10161016- len += sprintf(buf + len, "%u.%09u ",10171017- lradc->scale_avail[ch][i].integer,10181018- lradc->scale_avail[ch][i].nano);10191019-10201020- len += sprintf(buf + len, "\n");10211021-10221022- return len;10231023-}10241024-10251025-static ssize_t mxs_lradc_show_scale_available(struct device *dev,10261026- struct device_attribute *attr,10271027- char *buf)10281028-{10291029- struct iio_dev_attr *iio_attr = to_iio_dev_attr(attr);10301030-10311031- return mxs_lradc_show_scale_available_ch(dev, attr, buf,10321032- iio_attr->address);10331033-}10341034-10351035-#define SHOW_SCALE_AVAILABLE_ATTR(ch) \10361036-static IIO_DEVICE_ATTR(in_voltage##ch##_scale_available, S_IRUGO, \10371037- mxs_lradc_show_scale_available, NULL, ch)10381038-10391039-SHOW_SCALE_AVAILABLE_ATTR(0);10401040-SHOW_SCALE_AVAILABLE_ATTR(1);10411041-SHOW_SCALE_AVAILABLE_ATTR(2);10421042-SHOW_SCALE_AVAILABLE_ATTR(3);10431043-SHOW_SCALE_AVAILABLE_ATTR(4);10441044-SHOW_SCALE_AVAILABLE_ATTR(5);10451045-SHOW_SCALE_AVAILABLE_ATTR(6);10461046-SHOW_SCALE_AVAILABLE_ATTR(7);10471047-SHOW_SCALE_AVAILABLE_ATTR(10);10481048-SHOW_SCALE_AVAILABLE_ATTR(11);10491049-SHOW_SCALE_AVAILABLE_ATTR(12);10501050-SHOW_SCALE_AVAILABLE_ATTR(13);10511051-SHOW_SCALE_AVAILABLE_ATTR(14);10521052-SHOW_SCALE_AVAILABLE_ATTR(15);10531053-10541054-static struct attribute *mxs_lradc_attributes[] = {10551055- &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,10561056- &iio_dev_attr_in_voltage1_scale_available.dev_attr.attr,10571057- &iio_dev_attr_in_voltage2_scale_available.dev_attr.attr,10581058- &iio_dev_attr_in_voltage3_scale_available.dev_attr.attr,10591059- &iio_dev_attr_in_voltage4_scale_available.dev_attr.attr,10601060- &iio_dev_attr_in_voltage5_scale_available.dev_attr.attr,10611061- &iio_dev_attr_in_voltage6_scale_available.dev_attr.attr,10621062- &iio_dev_attr_in_voltage7_scale_available.dev_attr.attr,10631063- &iio_dev_attr_in_voltage10_scale_available.dev_attr.attr,10641064- &iio_dev_attr_in_voltage11_scale_available.dev_attr.attr,10651065- &iio_dev_attr_in_voltage12_scale_available.dev_attr.attr,10661066- &iio_dev_attr_in_voltage13_scale_available.dev_attr.attr,10671067- &iio_dev_attr_in_voltage14_scale_available.dev_attr.attr,10681068- &iio_dev_attr_in_voltage15_scale_available.dev_attr.attr,10691069- NULL10701070-};10711071-10721072-static const struct attribute_group mxs_lradc_attribute_group = {10731073- .attrs = mxs_lradc_attributes,10741074-};10751075-10761076-static const struct iio_info mxs_lradc_iio_info = {10771077- .driver_module = THIS_MODULE,10781078- .read_raw = mxs_lradc_read_raw,10791079- .write_raw = mxs_lradc_write_raw,10801080- .write_raw_get_fmt = mxs_lradc_write_raw_get_fmt,10811081- .attrs = &mxs_lradc_attribute_group,10821082-};10831083-10841084-static int mxs_lradc_ts_open(struct input_dev *dev)10851085-{10861086- struct mxs_lradc *lradc = input_get_drvdata(dev);10871087-10881088- /* Enable the touch-detect circuitry. */10891089- mxs_lradc_enable_touch_detection(lradc);10901090-10911091- return 0;10921092-}10931093-10941094-static void mxs_lradc_disable_ts(struct mxs_lradc *lradc)10951095-{10961096- /* stop all interrupts from firing */10971097- mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN |10981098- LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |10991099- LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL2), LRADC_CTRL1);11001100-11011101- /* Power-down touchscreen touch-detect circuitry. */11021102- mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);11031103-}11041104-11051105-static void mxs_lradc_ts_close(struct input_dev *dev)11061106-{11071107- struct mxs_lradc *lradc = input_get_drvdata(dev);11081108-11091109- mxs_lradc_disable_ts(lradc);11101110-}11111111-11121112-static int mxs_lradc_ts_register(struct mxs_lradc *lradc)11131113-{11141114- struct input_dev *input;11151115- struct device *dev = lradc->dev;11161116-11171117- if (!lradc->use_touchscreen)11181118- return 0;11191119-11201120- input = devm_input_allocate_device(dev);11211121- if (!input)11221122- return -ENOMEM;11231123-11241124- input->name = DRIVER_NAME;11251125- input->id.bustype = BUS_HOST;11261126- input->open = mxs_lradc_ts_open;11271127- input->close = mxs_lradc_ts_close;11281128-11291129- __set_bit(EV_ABS, input->evbit);11301130- __set_bit(EV_KEY, input->evbit);11311131- __set_bit(BTN_TOUCH, input->keybit);11321132- __set_bit(INPUT_PROP_DIRECT, input->propbit);11331133- input_set_abs_params(input, ABS_X, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);11341134- input_set_abs_params(input, ABS_Y, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);11351135- input_set_abs_params(input, ABS_PRESSURE, 0, LRADC_SINGLE_SAMPLE_MASK,11361136- 0, 0);11371137-11381138- lradc->ts_input = input;11391139- input_set_drvdata(input, lradc);11401140-11411141- return input_register_device(input);11421142-}11431143-11441144-/*11451145- * IRQ Handling11461146- */11471147-static irqreturn_t mxs_lradc_handle_irq(int irq, void *data)11481148-{11491149- struct iio_dev *iio = data;11501150- struct mxs_lradc *lradc = iio_priv(iio);11511151- unsigned long reg = readl(lradc->base + LRADC_CTRL1);11521152- u32 clr_irq = mxs_lradc_irq_mask(lradc);11531153- const u32 ts_irq_mask =11541154- LRADC_CTRL1_TOUCH_DETECT_IRQ |11551155- LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |11561156- LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2);11571157-11581158- if (!(reg & mxs_lradc_irq_mask(lradc)))11591159- return IRQ_NONE;11601160-11611161- if (lradc->use_touchscreen && (reg & ts_irq_mask)) {11621162- mxs_lradc_handle_touch(lradc);11631163-11641164- /* Make sure we don't clear the next conversion's interrupt. */11651165- clr_irq &= ~(LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |11661166- LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2));11671167- }11681168-11691169- if (iio_buffer_enabled(iio)) {11701170- if (reg & lradc->buffer_vchans)11711171- iio_trigger_poll(iio->trig);11721172- } else if (reg & LRADC_CTRL1_LRADC_IRQ(0)) {11731173- complete(&lradc->completion);11741174- }11751175-11761176- mxs_lradc_reg_clear(lradc, reg & clr_irq, LRADC_CTRL1);11771177-11781178- return IRQ_HANDLED;11791179-}11801180-11811181-/*11821182- * Trigger handling11831183- */11841184-static irqreturn_t mxs_lradc_trigger_handler(int irq, void *p)11851185-{11861186- struct iio_poll_func *pf = p;11871187- struct iio_dev *iio = pf->indio_dev;11881188- struct mxs_lradc *lradc = iio_priv(iio);11891189- const u32 chan_value = LRADC_CH_ACCUMULATE |11901190- ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);11911191- unsigned int i, j = 0;11921192-11931193- for_each_set_bit(i, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {11941194- lradc->buffer[j] = readl(lradc->base + LRADC_CH(j));11951195- mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(j));11961196- lradc->buffer[j] &= LRADC_CH_VALUE_MASK;11971197- lradc->buffer[j] /= LRADC_DELAY_TIMER_LOOP;11981198- j++;11991199- }12001200-12011201- iio_push_to_buffers_with_timestamp(iio, lradc->buffer, pf->timestamp);12021202-12031203- iio_trigger_notify_done(iio->trig);12041204-12051205- return IRQ_HANDLED;12061206-}12071207-12081208-static int mxs_lradc_configure_trigger(struct iio_trigger *trig, bool state)12091209-{12101210- struct iio_dev *iio = iio_trigger_get_drvdata(trig);12111211- struct mxs_lradc *lradc = iio_priv(iio);12121212- const u32 st = state ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR;12131213-12141214- mxs_lradc_reg_wrt(lradc, LRADC_DELAY_KICK, LRADC_DELAY(0) + st);12151215-12161216- return 0;12171217-}12181218-12191219-static const struct iio_trigger_ops mxs_lradc_trigger_ops = {12201220- .owner = THIS_MODULE,12211221- .set_trigger_state = &mxs_lradc_configure_trigger,12221222-};12231223-12241224-static int mxs_lradc_trigger_init(struct iio_dev *iio)12251225-{12261226- int ret;12271227- struct iio_trigger *trig;12281228- struct mxs_lradc *lradc = iio_priv(iio);12291229-12301230- trig = iio_trigger_alloc("%s-dev%i", iio->name, iio->id);12311231- if (!trig)12321232- return -ENOMEM;12331233-12341234- trig->dev.parent = lradc->dev;12351235- iio_trigger_set_drvdata(trig, iio);12361236- trig->ops = &mxs_lradc_trigger_ops;12371237-12381238- ret = iio_trigger_register(trig);12391239- if (ret) {12401240- iio_trigger_free(trig);12411241- return ret;12421242- }12431243-12441244- lradc->trig = trig;12451245-12461246- return 0;12471247-}12481248-12491249-static void mxs_lradc_trigger_remove(struct iio_dev *iio)12501250-{12511251- struct mxs_lradc *lradc = iio_priv(iio);12521252-12531253- iio_trigger_unregister(lradc->trig);12541254- iio_trigger_free(lradc->trig);12551255-}12561256-12571257-static int mxs_lradc_buffer_preenable(struct iio_dev *iio)12581258-{12591259- struct mxs_lradc *lradc = iio_priv(iio);12601260- int ret = 0, chan, ofs = 0;12611261- unsigned long enable = 0;12621262- u32 ctrl4_set = 0;12631263- u32 ctrl4_clr = 0;12641264- u32 ctrl1_irq = 0;12651265- const u32 chan_value = LRADC_CH_ACCUMULATE |12661266- ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);12671267- const int len = bitmap_weight(iio->active_scan_mask,12681268- LRADC_MAX_TOTAL_CHANS);12691269-12701270- if (!len)12711271- return -EINVAL;12721272-12731273- /*12741274- * Lock the driver so raw access can not be done during buffered12751275- * operation. This simplifies the code a lot.12761276- */12771277- ret = mutex_trylock(&lradc->lock);12781278- if (!ret)12791279- return -EBUSY;12801280-12811281- lradc->buffer = kmalloc_array(len, sizeof(*lradc->buffer), GFP_KERNEL);12821282- if (!lradc->buffer) {12831283- ret = -ENOMEM;12841284- goto err_mem;12851285- }12861286-12871287- if (lradc->soc == IMX28_LRADC)12881288- mxs_lradc_reg_clear(12891289- lradc,12901290- lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,12911291- LRADC_CTRL1);12921292- mxs_lradc_reg_clear(lradc, lradc->buffer_vchans, LRADC_CTRL0);12931293-12941294- for_each_set_bit(chan, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {12951295- ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs);12961296- ctrl4_clr |= LRADC_CTRL4_LRADCSELECT_MASK(ofs);12971297- ctrl1_irq |= LRADC_CTRL1_LRADC_IRQ_EN(ofs);12981298- mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(ofs));12991299- bitmap_set(&enable, ofs, 1);13001300- ofs++;13011301- }13021302-13031303- mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK |13041304- LRADC_DELAY_KICK, LRADC_DELAY(0));13051305- mxs_lradc_reg_clear(lradc, ctrl4_clr, LRADC_CTRL4);13061306- mxs_lradc_reg_set(lradc, ctrl4_set, LRADC_CTRL4);13071307- mxs_lradc_reg_set(lradc, ctrl1_irq, LRADC_CTRL1);13081308- mxs_lradc_reg_set(lradc, enable << LRADC_DELAY_TRIGGER_LRADCS_OFFSET,13091309- LRADC_DELAY(0));13101310-13111311- return 0;13121312-13131313-err_mem:13141314- mutex_unlock(&lradc->lock);13151315- return ret;13161316-}13171317-13181318-static int mxs_lradc_buffer_postdisable(struct iio_dev *iio)13191319-{13201320- struct mxs_lradc *lradc = iio_priv(iio);13211321-13221322- mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK |13231323- LRADC_DELAY_KICK, LRADC_DELAY(0));13241324-13251325- mxs_lradc_reg_clear(lradc, lradc->buffer_vchans, LRADC_CTRL0);13261326- if (lradc->soc == IMX28_LRADC)13271327- mxs_lradc_reg_clear(13281328- lradc,13291329- lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,13301330- LRADC_CTRL1);13311331-13321332- kfree(lradc->buffer);13331333- mutex_unlock(&lradc->lock);13341334-13351335- return 0;13361336-}13371337-13381338-static bool mxs_lradc_validate_scan_mask(struct iio_dev *iio,13391339- const unsigned long *mask)13401340-{13411341- struct mxs_lradc *lradc = iio_priv(iio);13421342- const int map_chans = bitmap_weight(mask, LRADC_MAX_TOTAL_CHANS);13431343- int rsvd_chans = 0;13441344- unsigned long rsvd_mask = 0;13451345-13461346- if (lradc->use_touchbutton)13471347- rsvd_mask |= CHAN_MASK_TOUCHBUTTON;13481348- if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_4WIRE)13491349- rsvd_mask |= CHAN_MASK_TOUCHSCREEN_4WIRE;13501350- if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)13511351- rsvd_mask |= CHAN_MASK_TOUCHSCREEN_5WIRE;13521352-13531353- if (lradc->use_touchbutton)13541354- rsvd_chans++;13551355- if (lradc->use_touchscreen)13561356- rsvd_chans += 2;13571357-13581358- /* Test for attempts to map channels with special mode of operation. */13591359- if (bitmap_intersects(mask, &rsvd_mask, LRADC_MAX_TOTAL_CHANS))13601360- return false;13611361-13621362- /* Test for attempts to map more channels then available slots. */13631363- if (map_chans + rsvd_chans > LRADC_MAX_MAPPED_CHANS)13641364- return false;13651365-13661366- return true;13671367-}13681368-13691369-static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops = {13701370- .preenable = &mxs_lradc_buffer_preenable,13711371- .postenable = &iio_triggered_buffer_postenable,13721372- .predisable = &iio_triggered_buffer_predisable,13731373- .postdisable = &mxs_lradc_buffer_postdisable,13741374- .validate_scan_mask = &mxs_lradc_validate_scan_mask,13751375-};13761376-13771377-/*13781378- * Driver initialization13791379- */13801380-13811381-#define MXS_ADC_CHAN(idx, chan_type, name) { \13821382- .type = (chan_type), \13831383- .indexed = 1, \13841384- .scan_index = (idx), \13851385- .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \13861386- BIT(IIO_CHAN_INFO_SCALE), \13871387- .channel = (idx), \13881388- .address = (idx), \13891389- .scan_type = { \13901390- .sign = 'u', \13911391- .realbits = LRADC_RESOLUTION, \13921392- .storagebits = 32, \13931393- }, \13941394- .datasheet_name = (name), \13951395-}13961396-13971397-static const struct iio_chan_spec mx23_lradc_chan_spec[] = {13981398- MXS_ADC_CHAN(0, IIO_VOLTAGE, "LRADC0"),13991399- MXS_ADC_CHAN(1, IIO_VOLTAGE, "LRADC1"),14001400- MXS_ADC_CHAN(2, IIO_VOLTAGE, "LRADC2"),14011401- MXS_ADC_CHAN(3, IIO_VOLTAGE, "LRADC3"),14021402- MXS_ADC_CHAN(4, IIO_VOLTAGE, "LRADC4"),14031403- MXS_ADC_CHAN(5, IIO_VOLTAGE, "LRADC5"),14041404- MXS_ADC_CHAN(6, IIO_VOLTAGE, "VDDIO"),14051405- MXS_ADC_CHAN(7, IIO_VOLTAGE, "VBATT"),14061406- /* Combined Temperature sensors */14071407- {14081408- .type = IIO_TEMP,14091409- .indexed = 1,14101410- .scan_index = 8,14111411- .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |14121412- BIT(IIO_CHAN_INFO_OFFSET) |14131413- BIT(IIO_CHAN_INFO_SCALE),14141414- .channel = 8,14151415- .scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,},14161416- .datasheet_name = "TEMP_DIE",14171417- },14181418- /* Hidden channel to keep indexes */14191419- {14201420- .type = IIO_TEMP,14211421- .indexed = 1,14221422- .scan_index = -1,14231423- .channel = 9,14241424- },14251425- MXS_ADC_CHAN(10, IIO_VOLTAGE, NULL),14261426- MXS_ADC_CHAN(11, IIO_VOLTAGE, NULL),14271427- MXS_ADC_CHAN(12, IIO_VOLTAGE, "USB_DP"),14281428- MXS_ADC_CHAN(13, IIO_VOLTAGE, "USB_DN"),14291429- MXS_ADC_CHAN(14, IIO_VOLTAGE, "VBG"),14301430- MXS_ADC_CHAN(15, IIO_VOLTAGE, "VDD5V"),14311431-};14321432-14331433-static const struct iio_chan_spec mx28_lradc_chan_spec[] = {14341434- MXS_ADC_CHAN(0, IIO_VOLTAGE, "LRADC0"),14351435- MXS_ADC_CHAN(1, IIO_VOLTAGE, "LRADC1"),14361436- MXS_ADC_CHAN(2, IIO_VOLTAGE, "LRADC2"),14371437- MXS_ADC_CHAN(3, IIO_VOLTAGE, "LRADC3"),14381438- MXS_ADC_CHAN(4, IIO_VOLTAGE, "LRADC4"),14391439- MXS_ADC_CHAN(5, IIO_VOLTAGE, "LRADC5"),14401440- MXS_ADC_CHAN(6, IIO_VOLTAGE, "LRADC6"),14411441- MXS_ADC_CHAN(7, IIO_VOLTAGE, "VBATT"),14421442- /* Combined Temperature sensors */14431443- {14441444- .type = IIO_TEMP,14451445- .indexed = 1,14461446- .scan_index = 8,14471447- .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |14481448- BIT(IIO_CHAN_INFO_OFFSET) |14491449- BIT(IIO_CHAN_INFO_SCALE),14501450- .channel = 8,14511451- .scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,},14521452- .datasheet_name = "TEMP_DIE",14531453- },14541454- /* Hidden channel to keep indexes */14551455- {14561456- .type = IIO_TEMP,14571457- .indexed = 1,14581458- .scan_index = -1,14591459- .channel = 9,14601460- },14611461- MXS_ADC_CHAN(10, IIO_VOLTAGE, "VDDIO"),14621462- MXS_ADC_CHAN(11, IIO_VOLTAGE, "VTH"),14631463- MXS_ADC_CHAN(12, IIO_VOLTAGE, "VDDA"),14641464- MXS_ADC_CHAN(13, IIO_VOLTAGE, "VDDD"),14651465- MXS_ADC_CHAN(14, IIO_VOLTAGE, "VBG"),14661466- MXS_ADC_CHAN(15, IIO_VOLTAGE, "VDD5V"),14671467-};14681468-14691469-static void mxs_lradc_hw_init(struct mxs_lradc *lradc)14701470-{14711471- /* The ADC always uses DELAY CHANNEL 0. */14721472- const u32 adc_cfg =14731473- (1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET + 0)) |14741474- (LRADC_DELAY_TIMER_PER << LRADC_DELAY_DELAY_OFFSET);14751475-14761476- /* Configure DELAY CHANNEL 0 for generic ADC sampling. */14771477- mxs_lradc_reg_wrt(lradc, adc_cfg, LRADC_DELAY(0));14781478-14791479- /* Disable remaining DELAY CHANNELs */14801480- mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(1));14811481- mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));14821482- mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));14831483-14841484- /* Start internal temperature sensing. */14851485- mxs_lradc_reg_wrt(lradc, 0, LRADC_CTRL2);14861486-}14871487-14881488-static void mxs_lradc_hw_stop(struct mxs_lradc *lradc)14891489-{14901490- int i;14911491-14921492- mxs_lradc_reg_clear(lradc,14931493- lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,14941494- LRADC_CTRL1);14951495-14961496- for (i = 0; i < LRADC_MAX_DELAY_CHANS; i++)14971497- mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(i));14981498-}14991499-15001500-static const struct of_device_id mxs_lradc_dt_ids[] = {15011501- { .compatible = "fsl,imx23-lradc", .data = (void *)IMX23_LRADC, },15021502- { .compatible = "fsl,imx28-lradc", .data = (void *)IMX28_LRADC, },15031503- { /* sentinel */ }15041504-};15051505-MODULE_DEVICE_TABLE(of, mxs_lradc_dt_ids);15061506-15071507-static int mxs_lradc_probe_touchscreen(struct mxs_lradc *lradc,15081508- struct device_node *lradc_node)15091509-{15101510- int ret;15111511- u32 ts_wires = 0, adapt;15121512-15131513- ret = of_property_read_u32(lradc_node, "fsl,lradc-touchscreen-wires",15141514- &ts_wires);15151515- if (ret)15161516- return -ENODEV; /* touchscreen feature disabled */15171517-15181518- switch (ts_wires) {15191519- case 4:15201520- lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_4WIRE;15211521- break;15221522- case 5:15231523- if (lradc->soc == IMX28_LRADC) {15241524- lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_5WIRE;15251525- break;15261526- }15271527- /* fall through an error message for i.MX23 */15281528- default:15291529- dev_err(lradc->dev,15301530- "Unsupported number of touchscreen wires (%d)\n",15311531- ts_wires);15321532- return -EINVAL;15331533- }15341534-15351535- if (of_property_read_u32(lradc_node, "fsl,ave-ctrl", &adapt)) {15361536- lradc->over_sample_cnt = 4;15371537- } else {15381538- if (adapt < 1 || adapt > 32) {15391539- dev_err(lradc->dev, "Invalid sample count (%u)\n",15401540- adapt);15411541- return -EINVAL;15421542- }15431543- lradc->over_sample_cnt = adapt;15441544- }15451545-15461546- if (of_property_read_u32(lradc_node, "fsl,ave-delay", &adapt)) {15471547- lradc->over_sample_delay = 2;15481548- } else {15491549- if (adapt < 2 || adapt > LRADC_DELAY_DELAY_MASK + 1) {15501550- dev_err(lradc->dev, "Invalid sample delay (%u)\n",15511551- adapt);15521552- return -EINVAL;15531553- }15541554- lradc->over_sample_delay = adapt;15551555- }15561556-15571557- if (of_property_read_u32(lradc_node, "fsl,settling", &adapt)) {15581558- lradc->settling_delay = 10;15591559- } else {15601560- if (adapt < 1 || adapt > LRADC_DELAY_DELAY_MASK) {15611561- dev_err(lradc->dev, "Invalid settling delay (%u)\n",15621562- adapt);15631563- return -EINVAL;15641564- }15651565- lradc->settling_delay = adapt;15661566- }15671567-15681568- return 0;15691569-}15701570-15711571-static int mxs_lradc_probe(struct platform_device *pdev)15721572-{15731573- const struct of_device_id *of_id =15741574- of_match_device(mxs_lradc_dt_ids, &pdev->dev);15751575- const struct mxs_lradc_of_config *of_cfg =15761576- &mxs_lradc_of_config[(enum mxs_lradc_id)of_id->data];15771577- struct device *dev = &pdev->dev;15781578- struct device_node *node = dev->of_node;15791579- struct mxs_lradc *lradc;15801580- struct iio_dev *iio;15811581- struct resource *iores;15821582- int ret = 0, touch_ret;15831583- int i, s;15841584- u64 scale_uv;15851585-15861586- /* Allocate the IIO device. */15871587- iio = devm_iio_device_alloc(dev, sizeof(*lradc));15881588- if (!iio) {15891589- dev_err(dev, "Failed to allocate IIO device\n");15901590- return -ENOMEM;15911591- }15921592-15931593- lradc = iio_priv(iio);15941594- lradc->soc = (enum mxs_lradc_id)of_id->data;15951595-15961596- /* Grab the memory area */15971597- iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);15981598- lradc->dev = &pdev->dev;15991599- lradc->base = devm_ioremap_resource(dev, iores);16001600- if (IS_ERR(lradc->base))16011601- return PTR_ERR(lradc->base);16021602-16031603- lradc->clk = devm_clk_get(&pdev->dev, NULL);16041604- if (IS_ERR(lradc->clk)) {16051605- dev_err(dev, "Failed to get the delay unit clock\n");16061606- return PTR_ERR(lradc->clk);16071607- }16081608- ret = clk_prepare_enable(lradc->clk);16091609- if (ret != 0) {16101610- dev_err(dev, "Failed to enable the delay unit clock\n");16111611- return ret;16121612- }16131613-16141614- touch_ret = mxs_lradc_probe_touchscreen(lradc, node);16151615-16161616- if (touch_ret == 0)16171617- lradc->buffer_vchans = BUFFER_VCHANS_LIMITED;16181618- else16191619- lradc->buffer_vchans = BUFFER_VCHANS_ALL;16201620-16211621- /* Grab all IRQ sources */16221622- for (i = 0; i < of_cfg->irq_count; i++) {16231623- lradc->irq[i] = platform_get_irq(pdev, i);16241624- if (lradc->irq[i] < 0) {16251625- ret = lradc->irq[i];16261626- goto err_clk;16271627- }16281628-16291629- ret = devm_request_irq(dev, lradc->irq[i],16301630- mxs_lradc_handle_irq, 0,16311631- of_cfg->irq_name[i], iio);16321632- if (ret)16331633- goto err_clk;16341634- }16351635-16361636- lradc->vref_mv = of_cfg->vref_mv;16371637-16381638- platform_set_drvdata(pdev, iio);16391639-16401640- init_completion(&lradc->completion);16411641- mutex_init(&lradc->lock);16421642-16431643- iio->name = pdev->name;16441644- iio->dev.parent = &pdev->dev;16451645- iio->info = &mxs_lradc_iio_info;16461646- iio->modes = INDIO_DIRECT_MODE;16471647- iio->masklength = LRADC_MAX_TOTAL_CHANS;16481648-16491649- if (lradc->soc == IMX23_LRADC) {16501650- iio->channels = mx23_lradc_chan_spec;16511651- iio->num_channels = ARRAY_SIZE(mx23_lradc_chan_spec);16521652- } else {16531653- iio->channels = mx28_lradc_chan_spec;16541654- iio->num_channels = ARRAY_SIZE(mx28_lradc_chan_spec);16551655- }16561656-16571657- ret = iio_triggered_buffer_setup(iio, &iio_pollfunc_store_time,16581658- &mxs_lradc_trigger_handler,16591659- &mxs_lradc_buffer_ops);16601660- if (ret)16611661- goto err_clk;16621662-16631663- ret = mxs_lradc_trigger_init(iio);16641664- if (ret)16651665- goto err_trig;16661666-16671667- /* Populate available ADC input ranges */16681668- for (i = 0; i < LRADC_MAX_TOTAL_CHANS; i++) {16691669- for (s = 0; s < ARRAY_SIZE(lradc->scale_avail[i]); s++) {16701670- /*16711671- * [s=0] = optional divider by two disabled (default)16721672- * [s=1] = optional divider by two enabled16731673- *16741674- * The scale is calculated by doing:16751675- * Vref >> (realbits - s)16761676- * which multiplies by two on the second component16771677- * of the array.16781678- */16791679- scale_uv = ((u64)lradc->vref_mv[i] * 100000000) >>16801680- (LRADC_RESOLUTION - s);16811681- lradc->scale_avail[i][s].nano =16821682- do_div(scale_uv, 100000000) * 10;16831683- lradc->scale_avail[i][s].integer = scale_uv;16841684- }16851685- }16861686-16871687- ret = stmp_reset_block(lradc->base);16881688- if (ret)16891689- goto err_dev;16901690-16911691- /* Configure the hardware. */16921692- mxs_lradc_hw_init(lradc);16931693-16941694- /* Register the touchscreen input device. */16951695- if (touch_ret == 0) {16961696- ret = mxs_lradc_ts_register(lradc);16971697- if (ret)16981698- goto err_ts_register;16991699- }17001700-17011701- /* Register IIO device. */17021702- ret = iio_device_register(iio);17031703- if (ret) {17041704- dev_err(dev, "Failed to register IIO device\n");17051705- return ret;17061706- }17071707-17081708- return 0;17091709-17101710-err_ts_register:17111711- mxs_lradc_hw_stop(lradc);17121712-err_dev:17131713- mxs_lradc_trigger_remove(iio);17141714-err_trig:17151715- iio_triggered_buffer_cleanup(iio);17161716-err_clk:17171717- clk_disable_unprepare(lradc->clk);17181718- return ret;17191719-}17201720-17211721-static int mxs_lradc_remove(struct platform_device *pdev)17221722-{17231723- struct iio_dev *iio = platform_get_drvdata(pdev);17241724- struct mxs_lradc *lradc = iio_priv(iio);17251725-17261726- iio_device_unregister(iio);17271727- mxs_lradc_hw_stop(lradc);17281728- mxs_lradc_trigger_remove(iio);17291729- iio_triggered_buffer_cleanup(iio);17301730-17311731- clk_disable_unprepare(lradc->clk);17321732-17331733- return 0;17341734-}17351735-17361736-static struct platform_driver mxs_lradc_driver = {17371737- .driver = {17381738- .name = DRIVER_NAME,17391739- .of_match_table = mxs_lradc_dt_ids,17401740- },17411741- .probe = mxs_lradc_probe,17421742- .remove = mxs_lradc_remove,17431743-};17441744-17451745-module_platform_driver(mxs_lradc_driver);17461746-17471747-MODULE_AUTHOR("Marek Vasut <marex@denx.de>");17481748-MODULE_DESCRIPTION("Freescale MXS LRADC driver");17491749-MODULE_LICENSE("GPL v2");17501750-MODULE_ALIAS("platform:" DRIVER_NAME);
+10
drivers/input/misc/Kconfig
···316316 To compile this driver as a module, choose M here: the317317 module will be called cobalt_btns.318318319319+config INPUT_CPCAP_PWRBUTTON320320+ tristate "CPCAP OnKey"321321+ depends on MFD_CPCAP322322+ help323323+ Say Y here if you want to enable power key reporting via the324324+ Motorola CPCAP chip.325325+326326+ To compile this driver as a module, choose M here. The module will327327+ be called cpcap-pwrbutton.328328+319329config INPUT_WISTRON_BTNS320330 tristate "x86 Wistron laptop button interface"321331 depends on X86_32
···11+/**22+ * CPCAP Power Button Input Driver33+ *44+ * Copyright (C) 2017 Sebastian Reichel <sre@kernel.org>55+ *66+ * This file is subject to the terms and conditions of the GNU General77+ * Public License. See the file "COPYING" in the main directory of this88+ * archive for more details.99+ *1010+ * This program is distributed in the hope that it will be useful,1111+ * but WITHOUT ANY WARRANTY; without even the implied warranty of1212+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the1313+ * GNU General Public License for more details.1414+ */1515+1616+#include <linux/module.h>1717+#include <linux/init.h>1818+#include <linux/kernel.h>1919+#include <linux/errno.h>2020+#include <linux/input.h>2121+#include <linux/interrupt.h>2222+#include <linux/regmap.h>2323+#include <linux/of.h>2424+#include <linux/platform_device.h>2525+#include <linux/mfd/motorola-cpcap.h>2626+2727+#define CPCAP_IRQ_ON 232828+#define CPCAP_IRQ_ON_BITMASK (1 << (CPCAP_IRQ_ON % 16))2929+3030+struct cpcap_power_button {3131+ struct regmap *regmap;3232+ struct input_dev *idev;3333+ struct device *dev;3434+};3535+3636+static irqreturn_t powerbutton_irq(int irq, void *_button)3737+{3838+ struct cpcap_power_button *button = _button;3939+ int val;4040+4141+ val = cpcap_sense_virq(button->regmap, irq);4242+ if (val < 0) {4343+ dev_err(button->dev, "irq read failed: %d", val);4444+ return IRQ_HANDLED;4545+ }4646+4747+ pm_wakeup_event(button->dev, 0);4848+ input_report_key(button->idev, KEY_POWER, val);4949+ input_sync(button->idev);5050+5151+ return IRQ_HANDLED;5252+}5353+5454+static int cpcap_power_button_probe(struct platform_device *pdev)5555+{5656+ struct cpcap_power_button *button;5757+ int irq = platform_get_irq(pdev, 0);5858+ int err;5959+6060+ button = devm_kmalloc(&pdev->dev, sizeof(*button), GFP_KERNEL);6161+ if (!button)6262+ return -ENOMEM;6363+6464+ button->idev = devm_input_allocate_device(&pdev->dev);6565+ if (!button->idev)6666+ return -ENOMEM;6767+6868+ button->regmap = dev_get_regmap(pdev->dev.parent, NULL);6969+ if (!button->regmap)7070+ return -ENODEV;7171+7272+ button->dev = &pdev->dev;7373+7474+ button->idev->name = "cpcap-pwrbutton";7575+ button->idev->phys = "cpcap-pwrbutton/input0";7676+ button->idev->dev.parent = button->dev;7777+ input_set_capability(button->idev, EV_KEY, KEY_POWER);7878+7979+ err = devm_request_threaded_irq(&pdev->dev, irq, NULL,8080+ powerbutton_irq, IRQF_ONESHOT, "cpcap_pwrbutton", button);8181+ if (err < 0) {8282+ dev_err(&pdev->dev, "IRQ request failed: %d\n", err);8383+ return err;8484+ }8585+8686+ err = input_register_device(button->idev);8787+ if (err) {8888+ dev_err(&pdev->dev, "Input register failed: %d\n", err);8989+ return err;9090+ }9191+9292+ device_init_wakeup(&pdev->dev, true);9393+9494+ return 0;9595+}9696+9797+#ifdef CONFIG_OF9898+static const struct of_device_id cpcap_pwrbutton_dt_match_table[] = {9999+ { .compatible = "motorola,cpcap-pwrbutton" },100100+ {},101101+};102102+MODULE_DEVICE_TABLE(of, cpcap_pwrbutton_dt_match_table);103103+#endif104104+105105+static struct platform_driver cpcap_power_button_driver = {106106+ .probe = cpcap_power_button_probe,107107+ .driver = {108108+ .name = "cpcap-pwrbutton",109109+ .of_match_table = of_match_ptr(cpcap_pwrbutton_dt_match_table),110110+ },111111+};112112+module_platform_driver(cpcap_power_button_driver);113113+114114+MODULE_ALIAS("platform:cpcap-pwrbutton");115115+MODULE_DESCRIPTION("CPCAP Power Button");116116+MODULE_LICENSE("GPL");117117+MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>");
+10
drivers/input/touchscreen/Kconfig
···829829 To compile this driver as a module, choose M here: the830830 module will be called usbtouchscreen.831831832832+config TOUCHSCREEN_MXS_LRADC833833+ tristate "Freescale i.MX23/i.MX28 LRADC touchscreen"834834+ depends on MFD_MXS_LRADC835835+ help836836+ Say Y here if you have a touchscreen connected to the low-resolution837837+ analog-to-digital converter (LRADC) on an i.MX23 or i.MX28 processor.838838+839839+ To compile this driver as a module, choose M here: the module will be840840+ called mxs-lradc-ts.841841+832842config TOUCHSCREEN_MX25833843 tristate "Freescale i.MX25 touchscreen input driver"834844 depends on MFD_MX25_TSADC
···11+/*22+ * Freescale MXS LRADC touchscreen driver33+ *44+ * Copyright (c) 2012 DENX Software Engineering, GmbH.55+ * Copyright (c) 2017 Ksenija Stanojevic <ksenija.stanojevic@gmail.com>66+ *77+ * Authors:88+ * Marek Vasut <marex@denx.de>99+ * Ksenija Stanojevic <ksenija.stanojevic@gmail.com>1010+ *1111+ * This program is free software; you can redistribute it and/or modify1212+ * it under the terms of the GNU General Public License as published by1313+ * the Free Software Foundation; either version 2 of the License, or1414+ * (at your option) any later version.1515+ *1616+ * This program is distributed in the hope that it will be useful,1717+ * but WITHOUT ANY WARRANTY; without even the implied warranty of1818+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the1919+ * GNU General Public License for more details.2020+ */2121+2222+#include <linux/device.h>2323+#include <linux/err.h>2424+#include <linux/input.h>2525+#include <linux/interrupt.h>2626+#include <linux/module.h>2727+#include <linux/mfd/core.h>2828+#include <linux/mfd/mxs-lradc.h>2929+#include <linux/of.h>3030+#include <linux/of_irq.h>3131+#include <linux/platform_device.h>3232+3333+const char *mxs_lradc_ts_irq_names[] = {3434+ "mxs-lradc-touchscreen",3535+ "mxs-lradc-channel6",3636+ "mxs-lradc-channel7",3737+};3838+3939+/*4040+ * Touchscreen handling4141+ */4242+enum mxs_lradc_ts_plate {4343+ LRADC_TOUCH = 0,4444+ LRADC_SAMPLE_X,4545+ LRADC_SAMPLE_Y,4646+ LRADC_SAMPLE_PRESSURE,4747+ LRADC_SAMPLE_VALID,4848+};4949+5050+struct mxs_lradc_ts {5151+ struct mxs_lradc *lradc;5252+ struct device *dev;5353+5454+ void __iomem *base;5555+ /*5656+ * When the touchscreen is enabled, we give it two private virtual5757+ * channels: #6 and #7. This means that only 6 virtual channels (instead5858+ * of 8) will be available for buffered capture.5959+ */6060+#define TOUCHSCREEN_VCHANNEL1 76161+#define TOUCHSCREEN_VCHANNEL2 66262+6363+ struct input_dev *ts_input;6464+6565+ enum mxs_lradc_ts_plate cur_plate; /* state machine */6666+ bool ts_valid;6767+ unsigned int ts_x_pos;6868+ unsigned int ts_y_pos;6969+ unsigned int ts_pressure;7070+7171+ /* handle touchscreen's physical behaviour */7272+ /* samples per coordinate */7373+ unsigned int over_sample_cnt;7474+ /* time clocks between samples */7575+ unsigned int over_sample_delay;7676+ /* time in clocks to wait after the plates where switched */7777+ unsigned int settling_delay;7878+ spinlock_t lock;7979+};8080+8181+struct state_info {8282+ u32 mask;8383+ u32 bit;8484+ u32 x_plate;8585+ u32 y_plate;8686+ u32 pressure;8787+};8888+8989+static struct state_info info[] = {9090+ {LRADC_CTRL0_MX23_PLATE_MASK, LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE,9191+ LRADC_CTRL0_MX23_XP | LRADC_CTRL0_MX23_XM,9292+ LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_YM,9393+ LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XM},9494+ {LRADC_CTRL0_MX28_PLATE_MASK, LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE,9595+ LRADC_CTRL0_MX28_XPPSW | LRADC_CTRL0_MX28_XNNSW,9696+ LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_YNNSW,9797+ LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW}9898+};9999+100100+static bool mxs_lradc_check_touch_event(struct mxs_lradc_ts *ts)101101+{102102+ return !!(readl(ts->base + LRADC_STATUS) &103103+ LRADC_STATUS_TOUCH_DETECT_RAW);104104+}105105+106106+static void mxs_lradc_map_ts_channel(struct mxs_lradc_ts *ts, unsigned int vch,107107+ unsigned int ch)108108+{109109+ writel(LRADC_CTRL4_LRADCSELECT_MASK(vch),110110+ ts->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);111111+ writel(LRADC_CTRL4_LRADCSELECT(vch, ch),112112+ ts->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);113113+}114114+115115+static void mxs_lradc_setup_ts_channel(struct mxs_lradc_ts *ts, unsigned int ch)116116+{117117+ /*118118+ * prepare for oversampling conversion119119+ *120120+ * from the datasheet:121121+ * "The ACCUMULATE bit in the appropriate channel register122122+ * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;123123+ * otherwise, the IRQs will not fire."124124+ */125125+ writel(LRADC_CH_ACCUMULATE |126126+ LRADC_CH_NUM_SAMPLES(ts->over_sample_cnt - 1),127127+ ts->base + LRADC_CH(ch));128128+129129+ /* from the datasheet:130130+ * "Software must clear this register in preparation for a131131+ * multi-cycle accumulation.132132+ */133133+ writel(LRADC_CH_VALUE_MASK,134134+ ts->base + LRADC_CH(ch) + STMP_OFFSET_REG_CLR);135135+136136+ /*137137+ * prepare the delay/loop unit according to the oversampling count138138+ *139139+ * from the datasheet:140140+ * "The DELAY fields in HW_LRADC_DELAY0, HW_LRADC_DELAY1,141141+ * HW_LRADC_DELAY2, and HW_LRADC_DELAY3 must be non-zero; otherwise,142142+ * the LRADC will not trigger the delay group."143143+ */144144+ writel(LRADC_DELAY_TRIGGER(1 << ch) | LRADC_DELAY_TRIGGER_DELAYS(0) |145145+ LRADC_DELAY_LOOP(ts->over_sample_cnt - 1) |146146+ LRADC_DELAY_DELAY(ts->over_sample_delay - 1),147147+ ts->base + LRADC_DELAY(3));148148+149149+ writel(LRADC_CTRL1_LRADC_IRQ(ch),150150+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);151151+152152+ /*153153+ * after changing the touchscreen plates setting154154+ * the signals need some initial time to settle. Start the155155+ * SoC's delay unit and start the conversion later156156+ * and automatically.157157+ */158158+ writel(LRADC_DELAY_TRIGGER(0) | LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) |159159+ LRADC_DELAY_KICK | LRADC_DELAY_DELAY(ts->settling_delay),160160+ ts->base + LRADC_DELAY(2));161161+}162162+163163+/*164164+ * Pressure detection is special:165165+ * We want to do both required measurements for the pressure detection in166166+ * one turn. Use the hardware features to chain both conversions and let the167167+ * hardware report one interrupt if both conversions are done168168+ */169169+static void mxs_lradc_setup_ts_pressure(struct mxs_lradc_ts *ts,170170+ unsigned int ch1, unsigned int ch2)171171+{172172+ u32 reg;173173+174174+ /*175175+ * prepare for oversampling conversion176176+ *177177+ * from the datasheet:178178+ * "The ACCUMULATE bit in the appropriate channel register179179+ * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0;180180+ * otherwise, the IRQs will not fire."181181+ */182182+ reg = LRADC_CH_ACCUMULATE |183183+ LRADC_CH_NUM_SAMPLES(ts->over_sample_cnt - 1);184184+ writel(reg, ts->base + LRADC_CH(ch1));185185+ writel(reg, ts->base + LRADC_CH(ch2));186186+187187+ /* from the datasheet:188188+ * "Software must clear this register in preparation for a189189+ * multi-cycle accumulation.190190+ */191191+ writel(LRADC_CH_VALUE_MASK,192192+ ts->base + LRADC_CH(ch1) + STMP_OFFSET_REG_CLR);193193+ writel(LRADC_CH_VALUE_MASK,194194+ ts->base + LRADC_CH(ch2) + STMP_OFFSET_REG_CLR);195195+196196+ /* prepare the delay/loop unit according to the oversampling count */197197+ writel(LRADC_DELAY_TRIGGER(1 << ch1) | LRADC_DELAY_TRIGGER(1 << ch2) |198198+ LRADC_DELAY_TRIGGER_DELAYS(0) |199199+ LRADC_DELAY_LOOP(ts->over_sample_cnt - 1) |200200+ LRADC_DELAY_DELAY(ts->over_sample_delay - 1),201201+ ts->base + LRADC_DELAY(3));202202+203203+ writel(LRADC_CTRL1_LRADC_IRQ(ch2),204204+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);205205+206206+ /*207207+ * after changing the touchscreen plates setting208208+ * the signals need some initial time to settle. Start the209209+ * SoC's delay unit and start the conversion later210210+ * and automatically.211211+ */212212+ writel(LRADC_DELAY_TRIGGER(0) | LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) |213213+ LRADC_DELAY_KICK | LRADC_DELAY_DELAY(ts->settling_delay),214214+ ts->base + LRADC_DELAY(2));215215+}216216+217217+static unsigned int mxs_lradc_ts_read_raw_channel(struct mxs_lradc_ts *ts,218218+ unsigned int channel)219219+{220220+ u32 reg;221221+ unsigned int num_samples, val;222222+223223+ reg = readl(ts->base + LRADC_CH(channel));224224+ if (reg & LRADC_CH_ACCUMULATE)225225+ num_samples = ts->over_sample_cnt;226226+ else227227+ num_samples = 1;228228+229229+ val = (reg & LRADC_CH_VALUE_MASK) >> LRADC_CH_VALUE_OFFSET;230230+ return val / num_samples;231231+}232232+233233+static unsigned int mxs_lradc_read_ts_pressure(struct mxs_lradc_ts *ts,234234+ unsigned int ch1, unsigned int ch2)235235+{236236+ u32 reg, mask;237237+ unsigned int pressure, m1, m2;238238+239239+ mask = LRADC_CTRL1_LRADC_IRQ(ch1) | LRADC_CTRL1_LRADC_IRQ(ch2);240240+ reg = readl(ts->base + LRADC_CTRL1) & mask;241241+242242+ while (reg != mask) {243243+ reg = readl(ts->base + LRADC_CTRL1) & mask;244244+ dev_dbg(ts->dev, "One channel is still busy: %X\n", reg);245245+ }246246+247247+ m1 = mxs_lradc_ts_read_raw_channel(ts, ch1);248248+ m2 = mxs_lradc_ts_read_raw_channel(ts, ch2);249249+250250+ if (m2 == 0) {251251+ dev_warn(ts->dev, "Cannot calculate pressure\n");252252+ return 1 << (LRADC_RESOLUTION - 1);253253+ }254254+255255+ /* simply scale the value from 0 ... max ADC resolution */256256+ pressure = m1;257257+ pressure *= (1 << LRADC_RESOLUTION);258258+ pressure /= m2;259259+260260+ dev_dbg(ts->dev, "Pressure = %u\n", pressure);261261+ return pressure;262262+}263263+264264+#define TS_CH_XP 2265265+#define TS_CH_YP 3266266+#define TS_CH_XM 4267267+#define TS_CH_YM 5268268+269269+/*270270+ * YP(open)--+-------------+271271+ * | |--+272272+ * | | |273273+ * YM(-)--+-------------+ |274274+ * +--------------+275275+ * | |276276+ * XP(weak+) XM(open)277277+ *278278+ * "weak+" means 200k Ohm VDDIO279279+ * (-) means GND280280+ */281281+static void mxs_lradc_setup_touch_detection(struct mxs_lradc_ts *ts)282282+{283283+ struct mxs_lradc *lradc = ts->lradc;284284+285285+ /*286286+ * In order to detect a touch event the 'touch detect enable' bit287287+ * enables:288288+ * - a weak pullup to the X+ connector289289+ * - a strong ground at the Y- connector290290+ */291291+ writel(info[lradc->soc].mask,292292+ ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);293293+ writel(info[lradc->soc].bit,294294+ ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);295295+}296296+297297+/*298298+ * YP(meas)--+-------------+299299+ * | |--+300300+ * | | |301301+ * YM(open)--+-------------+ |302302+ * +--------------+303303+ * | |304304+ * XP(+) XM(-)305305+ *306306+ * (+) means here 1.85 V307307+ * (-) means here GND308308+ */309309+static void mxs_lradc_prepare_x_pos(struct mxs_lradc_ts *ts)310310+{311311+ struct mxs_lradc *lradc = ts->lradc;312312+313313+ writel(info[lradc->soc].mask,314314+ ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);315315+ writel(info[lradc->soc].x_plate,316316+ ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);317317+318318+ ts->cur_plate = LRADC_SAMPLE_X;319319+ mxs_lradc_map_ts_channel(ts, TOUCHSCREEN_VCHANNEL1, TS_CH_YP);320320+ mxs_lradc_setup_ts_channel(ts, TOUCHSCREEN_VCHANNEL1);321321+}322322+323323+/*324324+ * YP(+)--+-------------+325325+ * | |--+326326+ * | | |327327+ * YM(-)--+-------------+ |328328+ * +--------------+329329+ * | |330330+ * XP(open) XM(meas)331331+ *332332+ * (+) means here 1.85 V333333+ * (-) means here GND334334+ */335335+static void mxs_lradc_prepare_y_pos(struct mxs_lradc_ts *ts)336336+{337337+ struct mxs_lradc *lradc = ts->lradc;338338+339339+ writel(info[lradc->soc].mask,340340+ ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);341341+ writel(info[lradc->soc].y_plate,342342+ ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);343343+344344+ ts->cur_plate = LRADC_SAMPLE_Y;345345+ mxs_lradc_map_ts_channel(ts, TOUCHSCREEN_VCHANNEL1, TS_CH_XM);346346+ mxs_lradc_setup_ts_channel(ts, TOUCHSCREEN_VCHANNEL1);347347+}348348+349349+/*350350+ * YP(+)--+-------------+351351+ * | |--+352352+ * | | |353353+ * YM(meas)--+-------------+ |354354+ * +--------------+355355+ * | |356356+ * XP(meas) XM(-)357357+ *358358+ * (+) means here 1.85 V359359+ * (-) means here GND360360+ */361361+static void mxs_lradc_prepare_pressure(struct mxs_lradc_ts *ts)362362+{363363+ struct mxs_lradc *lradc = ts->lradc;364364+365365+ writel(info[lradc->soc].mask,366366+ ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);367367+ writel(info[lradc->soc].pressure,368368+ ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);369369+370370+ ts->cur_plate = LRADC_SAMPLE_PRESSURE;371371+ mxs_lradc_map_ts_channel(ts, TOUCHSCREEN_VCHANNEL1, TS_CH_YM);372372+ mxs_lradc_map_ts_channel(ts, TOUCHSCREEN_VCHANNEL2, TS_CH_XP);373373+ mxs_lradc_setup_ts_pressure(ts, TOUCHSCREEN_VCHANNEL2,374374+ TOUCHSCREEN_VCHANNEL1);375375+}376376+377377+static void mxs_lradc_enable_touch_detection(struct mxs_lradc_ts *ts)378378+{379379+ mxs_lradc_setup_touch_detection(ts);380380+381381+ ts->cur_plate = LRADC_TOUCH;382382+ writel(LRADC_CTRL1_TOUCH_DETECT_IRQ | LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,383383+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);384384+ writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,385385+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);386386+}387387+388388+static void mxs_lradc_start_touch_event(struct mxs_lradc_ts *ts)389389+{390390+ writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,391391+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);392392+ writel(LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1),393393+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);394394+ /*395395+ * start with the Y-pos, because it uses nearly the same plate396396+ * settings like the touch detection397397+ */398398+ mxs_lradc_prepare_y_pos(ts);399399+}400400+401401+static void mxs_lradc_report_ts_event(struct mxs_lradc_ts *ts)402402+{403403+ input_report_abs(ts->ts_input, ABS_X, ts->ts_x_pos);404404+ input_report_abs(ts->ts_input, ABS_Y, ts->ts_y_pos);405405+ input_report_abs(ts->ts_input, ABS_PRESSURE, ts->ts_pressure);406406+ input_report_key(ts->ts_input, BTN_TOUCH, 1);407407+ input_sync(ts->ts_input);408408+}409409+410410+static void mxs_lradc_complete_touch_event(struct mxs_lradc_ts *ts)411411+{412412+ mxs_lradc_setup_touch_detection(ts);413413+ ts->cur_plate = LRADC_SAMPLE_VALID;414414+ /*415415+ * start a dummy conversion to burn time to settle the signals416416+ * note: we are not interested in the conversion's value417417+ */418418+ writel(0, ts->base + LRADC_CH(TOUCHSCREEN_VCHANNEL1));419419+ writel(LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |420420+ LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2),421421+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);422422+ writel(LRADC_DELAY_TRIGGER(1 << TOUCHSCREEN_VCHANNEL1) |423423+ LRADC_DELAY_KICK | LRADC_DELAY_DELAY(10),424424+ ts->base + LRADC_DELAY(2));425425+}426426+427427+/*428428+ * in order to avoid false measurements, report only samples where429429+ * the surface is still touched after the position measurement430430+ */431431+static void mxs_lradc_finish_touch_event(struct mxs_lradc_ts *ts, bool valid)432432+{433433+ /* if it is still touched, report the sample */434434+ if (valid && mxs_lradc_check_touch_event(ts)) {435435+ ts->ts_valid = true;436436+ mxs_lradc_report_ts_event(ts);437437+ }438438+439439+ /* if it is even still touched, continue with the next measurement */440440+ if (mxs_lradc_check_touch_event(ts)) {441441+ mxs_lradc_prepare_y_pos(ts);442442+ return;443443+ }444444+445445+ if (ts->ts_valid) {446446+ /* signal the release */447447+ ts->ts_valid = false;448448+ input_report_key(ts->ts_input, BTN_TOUCH, 0);449449+ input_sync(ts->ts_input);450450+ }451451+452452+ /* if it is released, wait for the next touch via IRQ */453453+ ts->cur_plate = LRADC_TOUCH;454454+ writel(0, ts->base + LRADC_DELAY(2));455455+ writel(0, ts->base + LRADC_DELAY(3));456456+ writel(LRADC_CTRL1_TOUCH_DETECT_IRQ |457457+ LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |458458+ LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1),459459+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);460460+ writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,461461+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);462462+}463463+464464+/* touchscreen's state machine */465465+static void mxs_lradc_handle_touch(struct mxs_lradc_ts *ts)466466+{467467+ switch (ts->cur_plate) {468468+ case LRADC_TOUCH:469469+ if (mxs_lradc_check_touch_event(ts))470470+ mxs_lradc_start_touch_event(ts);471471+ writel(LRADC_CTRL1_TOUCH_DETECT_IRQ,472472+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);473473+ return;474474+475475+ case LRADC_SAMPLE_Y:476476+ ts->ts_y_pos =477477+ mxs_lradc_ts_read_raw_channel(ts, TOUCHSCREEN_VCHANNEL1);478478+ mxs_lradc_prepare_x_pos(ts);479479+ return;480480+481481+ case LRADC_SAMPLE_X:482482+ ts->ts_x_pos =483483+ mxs_lradc_ts_read_raw_channel(ts, TOUCHSCREEN_VCHANNEL1);484484+ mxs_lradc_prepare_pressure(ts);485485+ return;486486+487487+ case LRADC_SAMPLE_PRESSURE:488488+ ts->ts_pressure =489489+ mxs_lradc_read_ts_pressure(ts,490490+ TOUCHSCREEN_VCHANNEL2,491491+ TOUCHSCREEN_VCHANNEL1);492492+ mxs_lradc_complete_touch_event(ts);493493+ return;494494+495495+ case LRADC_SAMPLE_VALID:496496+ mxs_lradc_finish_touch_event(ts, 1);497497+ break;498498+ }499499+}500500+501501+/* IRQ Handling */502502+static irqreturn_t mxs_lradc_ts_handle_irq(int irq, void *data)503503+{504504+ struct mxs_lradc_ts *ts = data;505505+ struct mxs_lradc *lradc = ts->lradc;506506+ unsigned long reg = readl(ts->base + LRADC_CTRL1);507507+ u32 clr_irq = mxs_lradc_irq_mask(lradc);508508+ const u32 ts_irq_mask =509509+ LRADC_CTRL1_TOUCH_DETECT_IRQ |510510+ LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |511511+ LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2);512512+ unsigned long flags;513513+514514+ if (!(reg & mxs_lradc_irq_mask(lradc)))515515+ return IRQ_NONE;516516+517517+ if (reg & ts_irq_mask) {518518+ spin_lock_irqsave(&ts->lock, flags);519519+ mxs_lradc_handle_touch(ts);520520+ spin_unlock_irqrestore(&ts->lock, flags);521521+ /* Make sure we don't clear the next conversion's interrupt. */522522+ clr_irq &= ~(LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |523523+ LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2));524524+ writel(reg & clr_irq,525525+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);526526+ }527527+528528+ return IRQ_HANDLED;529529+}530530+531531+static int mxs_lradc_ts_open(struct input_dev *dev)532532+{533533+ struct mxs_lradc_ts *ts = input_get_drvdata(dev);534534+535535+ /* Enable the touch-detect circuitry. */536536+ mxs_lradc_enable_touch_detection(ts);537537+538538+ return 0;539539+}540540+541541+static void mxs_lradc_ts_stop(struct mxs_lradc_ts *ts)542542+{543543+ int i;544544+ struct mxs_lradc *lradc = ts->lradc;545545+546546+ /* stop all interrupts from firing */547547+ writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN |548548+ LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |549549+ LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL2),550550+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);551551+552552+ /* Power-down touchscreen touch-detect circuitry. */553553+ writel(info[lradc->soc].mask,554554+ ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);555555+556556+ writel(lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,557557+ ts->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);558558+559559+ for (i = 1; i < LRADC_MAX_DELAY_CHANS; i++)560560+ writel(0, ts->base + LRADC_DELAY(i));561561+}562562+563563+static void mxs_lradc_ts_close(struct input_dev *dev)564564+{565565+ struct mxs_lradc_ts *ts = input_get_drvdata(dev);566566+567567+ mxs_lradc_ts_stop(ts);568568+}569569+570570+static void mxs_lradc_ts_hw_init(struct mxs_lradc_ts *ts)571571+{572572+ struct mxs_lradc *lradc = ts->lradc;573573+574574+ /* Configure the touchscreen type */575575+ if (lradc->soc == IMX28_LRADC) {576576+ writel(LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,577577+ ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);578578+579579+ if (lradc->touchscreen_wire == MXS_LRADC_TOUCHSCREEN_5WIRE)580580+ writel(LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,581581+ ts->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);582582+ }583583+}584584+585585+static int mxs_lradc_ts_register(struct mxs_lradc_ts *ts)586586+{587587+ struct input_dev *input = ts->ts_input;588588+ struct device *dev = ts->dev;589589+590590+ input = devm_input_allocate_device(dev);591591+ if (!input)592592+ return -ENOMEM;593593+594594+ input->name = "mxs-lradc-ts";595595+ input->id.bustype = BUS_HOST;596596+ input->open = mxs_lradc_ts_open;597597+ input->close = mxs_lradc_ts_close;598598+599599+ __set_bit(INPUT_PROP_DIRECT, input->propbit);600600+ input_set_capability(input, EV_KEY, BTN_TOUCH);601601+ input_set_abs_params(input, ABS_X, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);602602+ input_set_abs_params(input, ABS_Y, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);603603+ input_set_abs_params(input, ABS_PRESSURE, 0, LRADC_SINGLE_SAMPLE_MASK,604604+ 0, 0);605605+606606+ ts->ts_input = input;607607+ input_set_drvdata(input, ts);608608+609609+ return input_register_device(input);610610+}611611+612612+static int mxs_lradc_ts_probe(struct platform_device *pdev)613613+{614614+ struct device *dev = &pdev->dev;615615+ struct device_node *node = dev->parent->of_node;616616+ struct mxs_lradc *lradc = dev_get_drvdata(dev->parent);617617+ struct mxs_lradc_ts *ts;618618+ struct resource *iores;619619+ int ret, irq, virq, i;620620+ u32 ts_wires = 0, adapt;621621+622622+ ts = devm_kzalloc(dev, sizeof(*ts), GFP_KERNEL);623623+ if (!ts)624624+ return -ENOMEM;625625+626626+ platform_set_drvdata(pdev, ts);627627+628628+ ts->lradc = lradc;629629+ ts->dev = dev;630630+ spin_lock_init(&ts->lock);631631+632632+ iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);633633+ ts->base = devm_ioremap(dev, iores->start, resource_size(iores));634634+ if (IS_ERR(ts->base))635635+ return PTR_ERR(ts->base);636636+637637+ ret = of_property_read_u32(node, "fsl,lradc-touchscreen-wires",638638+ &ts_wires);639639+ if (ret)640640+ return ret;641641+642642+ if (of_property_read_u32(node, "fsl,ave-ctrl", &adapt)) {643643+ ts->over_sample_cnt = 4;644644+ } else {645645+ if (adapt >= 1 || adapt <= 32) {646646+ ts->over_sample_cnt = adapt;647647+ } else {648648+ dev_err(ts->dev, "Invalid sample count (%u)\n",649649+ adapt);650650+ return -EINVAL;651651+ }652652+ }653653+654654+ if (of_property_read_u32(node, "fsl,ave-delay", &adapt)) {655655+ ts->over_sample_delay = 2;656656+ } else {657657+ if (adapt >= 2 || adapt <= LRADC_DELAY_DELAY_MASK + 1) {658658+ ts->over_sample_delay = adapt;659659+ } else {660660+ dev_err(ts->dev, "Invalid sample delay (%u)\n",661661+ adapt);662662+ return -EINVAL;663663+ }664664+ }665665+666666+ if (of_property_read_u32(node, "fsl,settling", &adapt)) {667667+ ts->settling_delay = 10;668668+ } else {669669+ if (adapt >= 1 || adapt <= LRADC_DELAY_DELAY_MASK) {670670+ ts->settling_delay = adapt;671671+ } else {672672+ dev_err(ts->dev, "Invalid settling delay (%u)\n",673673+ adapt);674674+ return -EINVAL;675675+ }676676+ }677677+678678+ ret = stmp_reset_block(ts->base);679679+ if (ret)680680+ return ret;681681+682682+ mxs_lradc_ts_hw_init(ts);683683+684684+ for (i = 0; i < 3; i++) {685685+ irq = platform_get_irq_byname(pdev, mxs_lradc_ts_irq_names[i]);686686+ if (irq < 0)687687+ return irq;688688+689689+ virq = irq_of_parse_and_map(node, irq);690690+691691+ mxs_lradc_ts_stop(ts);692692+693693+ ret = devm_request_irq(dev, virq,694694+ mxs_lradc_ts_handle_irq,695695+ 0, mxs_lradc_ts_irq_names[i], ts);696696+ if (ret)697697+ return ret;698698+ }699699+700700+ return mxs_lradc_ts_register(ts);701701+}702702+703703+static struct platform_driver mxs_lradc_ts_driver = {704704+ .driver = {705705+ .name = "mxs-lradc-ts",706706+ },707707+ .probe = mxs_lradc_ts_probe,708708+};709709+module_platform_driver(mxs_lradc_ts_driver);710710+711711+MODULE_AUTHOR("Marek Vasut <marex@denx.de>");712712+MODULE_DESCRIPTION("Freescale MXS LRADC touchscreen driver");713713+MODULE_LICENSE("GPL");714714+MODULE_ALIAS("platform:mxs-lradc-ts");
+17
drivers/mfd/Kconfig
···344344 help345345 Select this if your MC13xxx is connected via an I2C bus.346346347347+config MFD_MXS_LRADC348348+ tristate "Freescale i.MX23/i.MX28 LRADC"349349+ depends on ARCH_MXS || COMPILE_TEST350350+ select MFD_CORE351351+ select STMP_DEVICE352352+ help353353+ Say yes here to build support for the Low Resolution354354+ Analog-to-Digital Converter (LRADC) found on the i.MX23 and i.MX28355355+ processors. This driver provides common support for accessing the356356+ device, additional drivers must be enabled in order to use the357357+ functionality of the device:358358+ mxs-lradc-adc for ADC readings359359+ mxs-lradc-ts for touchscreen support360360+361361+ This driver can also be built as a module. If so, the module will be362362+ called mxs-lradc.363363+347364config MFD_MX25_TSADC348365 tristate "Freescale i.MX25 integrated Touchscreen and ADC unit"349366 select REGMAP_MMIO
···1414 * published by the Free Software Foundation.1515 */16161717+#include <linux/device.h>1818+#include <linux/regmap.h>1919+1720#define CPCAP_VENDOR_ST 01821#define CPCAP_VENDOR_TI 11922···293290294291 return 0;295292}293293+294294+extern int cpcap_sense_virq(struct regmap *regmap, int virq);
+187
include/linux/mfd/mxs-lradc.h
···11+/*22+ * Freescale MXS Low Resolution Analog-to-Digital Converter driver33+ *44+ * Copyright (c) 2012 DENX Software Engineering, GmbH.55+ * Copyright (c) 2016 Ksenija Stanojevic <ksenija.stanojevic@gmail.com>66+ *77+ * Author: Marek Vasut <marex@denx.de>88+ *99+ * This program is free software; you can redistribute it and/or modify1010+ * it under the terms of the GNU General Public License as published by1111+ * the Free Software Foundation; either version 2 of the License, or1212+ * (at your option) any later version.1313+ *1414+ * This program is distributed in the hope that it will be useful,1515+ * but WITHOUT ANY WARRANTY; without even the implied warranty of1616+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the1717+ * GNU General Public License for more details.1818+ */1919+2020+#ifndef __MFD_MXS_LRADC_H2121+#define __MFD_MXS_LRADC_H2222+2323+#include <linux/bitops.h>2424+#include <linux/io.h>2525+#include <linux/stmp_device.h>2626+2727+#define LRADC_MAX_DELAY_CHANS 42828+#define LRADC_MAX_MAPPED_CHANS 82929+#define LRADC_MAX_TOTAL_CHANS 163030+3131+#define LRADC_DELAY_TIMER_HZ 20003232+3333+#define LRADC_CTRL0 0x003434+# define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE BIT(23)3535+# define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE BIT(22)3636+# define LRADC_CTRL0_MX28_YNNSW /* YM */ BIT(21)3737+# define LRADC_CTRL0_MX28_YPNSW /* YP */ BIT(20)3838+# define LRADC_CTRL0_MX28_YPPSW /* YP */ BIT(19)3939+# define LRADC_CTRL0_MX28_XNNSW /* XM */ BIT(18)4040+# define LRADC_CTRL0_MX28_XNPSW /* XM */ BIT(17)4141+# define LRADC_CTRL0_MX28_XPPSW /* XP */ BIT(16)4242+4343+# define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE BIT(20)4444+# define LRADC_CTRL0_MX23_YM BIT(19)4545+# define LRADC_CTRL0_MX23_XM BIT(18)4646+# define LRADC_CTRL0_MX23_YP BIT(17)4747+# define LRADC_CTRL0_MX23_XP BIT(16)4848+4949+# define LRADC_CTRL0_MX28_PLATE_MASK \5050+ (LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \5151+ LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \5252+ LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \5353+ LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW)5454+5555+# define LRADC_CTRL0_MX23_PLATE_MASK \5656+ (LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \5757+ LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \5858+ LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)5959+6060+#define LRADC_CTRL1 0x106161+#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN BIT(24)6262+#define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))6363+#define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16)6464+#define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16)6565+#define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 166666+#define LRADC_CTRL1_TOUCH_DETECT_IRQ BIT(8)6767+#define LRADC_CTRL1_LRADC_IRQ(n) BIT(n)6868+#define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff6969+#define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff7070+#define LRADC_CTRL1_LRADC_IRQ_OFFSET 07171+7272+#define LRADC_CTRL2 0x207373+#define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 247474+#define LRADC_CTRL2_TEMPSENSE_PWD BIT(15)7575+7676+#define LRADC_STATUS 0x407777+#define LRADC_STATUS_TOUCH_DETECT_RAW BIT(0)7878+7979+#define LRADC_CH(n) (0x50 + (0x10 * (n)))8080+#define LRADC_CH_ACCUMULATE BIT(29)8181+#define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)8282+#define LRADC_CH_NUM_SAMPLES_OFFSET 248383+#define LRADC_CH_NUM_SAMPLES(x) \8484+ ((x) << LRADC_CH_NUM_SAMPLES_OFFSET)8585+#define LRADC_CH_VALUE_MASK 0x3ffff8686+#define LRADC_CH_VALUE_OFFSET 08787+8888+#define LRADC_DELAY(n) (0xd0 + (0x10 * (n)))8989+#define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xffUL << 24)9090+#define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 249191+#define LRADC_DELAY_TRIGGER(x) \9292+ (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \9393+ LRADC_DELAY_TRIGGER_LRADCS_MASK)9494+#define LRADC_DELAY_KICK BIT(20)9595+#define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16)9696+#define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 169797+#define LRADC_DELAY_TRIGGER_DELAYS(x) \9898+ (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \9999+ LRADC_DELAY_TRIGGER_DELAYS_MASK)100100+#define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11)101101+#define LRADC_DELAY_LOOP_COUNT_OFFSET 11102102+#define LRADC_DELAY_LOOP(x) \103103+ (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \104104+ LRADC_DELAY_LOOP_COUNT_MASK)105105+#define LRADC_DELAY_DELAY_MASK 0x7ff106106+#define LRADC_DELAY_DELAY_OFFSET 0107107+#define LRADC_DELAY_DELAY(x) \108108+ (((x) << LRADC_DELAY_DELAY_OFFSET) & \109109+ LRADC_DELAY_DELAY_MASK)110110+111111+#define LRADC_CTRL4 0x140112112+#define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))113113+#define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)114114+#define LRADC_CTRL4_LRADCSELECT(n, x) \115115+ (((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \116116+ LRADC_CTRL4_LRADCSELECT_MASK(n))117117+118118+#define LRADC_RESOLUTION 12119119+#define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1)120120+121121+#define BUFFER_VCHANS_LIMITED 0x3f122122+#define BUFFER_VCHANS_ALL 0xff123123+124124+ /*125125+ * Certain LRADC channels are shared between touchscreen126126+ * and/or touch-buttons and generic LRADC block. Therefore when using127127+ * either of these, these channels are not available for the regular128128+ * sampling. The shared channels are as follows:129129+ *130130+ * CH0 -- Touch button #0131131+ * CH1 -- Touch button #1132132+ * CH2 -- Touch screen XPUL133133+ * CH3 -- Touch screen YPLL134134+ * CH4 -- Touch screen XNUL135135+ * CH5 -- Touch screen YNLR136136+ * CH6 -- Touch screen WIPER (5-wire only)137137+ *138138+ * The bit fields below represents which parts of the LRADC block are139139+ * switched into special mode of operation. These channels can not140140+ * be sampled as regular LRADC channels. The driver will refuse any141141+ * attempt to sample these channels.142142+ */143143+#define CHAN_MASK_TOUCHBUTTON (BIT(1) | BIT(0))144144+#define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)145145+#define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)146146+147147+enum mxs_lradc_id {148148+ IMX23_LRADC,149149+ IMX28_LRADC,150150+};151151+152152+enum mxs_lradc_ts_wires {153153+ MXS_LRADC_TOUCHSCREEN_NONE = 0,154154+ MXS_LRADC_TOUCHSCREEN_4WIRE,155155+ MXS_LRADC_TOUCHSCREEN_5WIRE,156156+};157157+158158+/**159159+ * struct mxs_lradc160160+ * @soc: soc type (IMX23 or IMX28)161161+ * @clk: 2 kHz clock for delay units162162+ * @buffer_vchans: channels that can be used during buffered capture163163+ * @touchscreen_wire: touchscreen type (4-wire or 5-wire)164164+ * @use_touchbutton: button state (on or off)165165+ */166166+struct mxs_lradc {167167+ enum mxs_lradc_id soc;168168+ struct clk *clk;169169+ u8 buffer_vchans;170170+171171+ enum mxs_lradc_ts_wires touchscreen_wire;172172+ bool use_touchbutton;173173+};174174+175175+static inline u32 mxs_lradc_irq_mask(struct mxs_lradc *lradc)176176+{177177+ switch (lradc->soc) {178178+ case IMX23_LRADC:179179+ return LRADC_CTRL1_MX23_LRADC_IRQ_MASK;180180+ case IMX28_LRADC:181181+ return LRADC_CTRL1_MX28_LRADC_IRQ_MASK;182182+ default:183183+ return 0;184184+ }185185+}186186+187187+#endif /* __MXS_LRADC_H */