Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'linux-can-next-for-4.13-20170404' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next

Marc Kleine-Budde says:

====================
pull-request: can-next 2017-03-03

this is a pull request of 5 patches for net-next/master.

There are two patches by Yegor Yefremov which convert the ti_hecc
driver into a DT only driver, as there is no in-tree user of the old
platform driver interface anymore. The next patch by Mario Kicherer
adds network namespace support to the can subsystem. The last two
patches by Akshay Bhat add support for the holt_hi311x SPI CAN driver.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

+1469 -305
+24
Documentation/devicetree/bindings/net/can/holt_hi311x.txt
··· 1 + * Holt HI-311X stand-alone CAN controller device tree bindings 2 + 3 + Required properties: 4 + - compatible: Should be one of the following: 5 + - "holt,hi3110" for HI-3110 6 + - reg: SPI chip select. 7 + - clocks: The clock feeding the CAN controller. 8 + - interrupt-parent: The parent interrupt controller. 9 + - interrupts: Should contain IRQ line for the CAN controller. 10 + 11 + Optional properties: 12 + - vdd-supply: Regulator that powers the CAN controller. 13 + - xceiver-supply: Regulator that powers the CAN transceiver. 14 + 15 + Example: 16 + can0: can@1 { 17 + compatible = "holt,hi3110"; 18 + reg = <1>; 19 + clocks = <&clk32m>; 20 + interrupt-parent = <&gpio4>; 21 + interrupts = <13 IRQ_TYPE_EDGE_RISING>; 22 + vdd-supply = <&reg5v0>; 23 + xceiver-supply = <&reg5v0>; 24 + };
+32
Documentation/devicetree/bindings/net/can/ti_hecc.txt
··· 1 + Texas Instruments High End CAN Controller (HECC) 2 + ================================================ 3 + 4 + This file provides information, what the device node 5 + for the hecc interface contains. 6 + 7 + Required properties: 8 + - compatible: "ti,am3517-hecc" 9 + - reg: addresses and lengths of the register spaces for 'hecc', 'hecc-ram' 10 + and 'mbx' 11 + - reg-names :"hecc", "hecc-ram", "mbx" 12 + - interrupts: interrupt mapping for the hecc interrupts sources 13 + - clocks: clock phandles (see clock bindings for details) 14 + 15 + Optional properties: 16 + - ti,use-hecc1int: if provided configures HECC to produce all interrupts 17 + on HECC1INT interrupt line. By default HECC0INT interrupt 18 + line will be used. 19 + - xceiver-supply: regulator that powers the CAN transceiver 20 + 21 + Example: 22 + 23 + For am3517evm board: 24 + hecc: can@5c050000 { 25 + compatible = "ti,am3517-hecc"; 26 + reg = <0x5c050000 0x80>, 27 + <0x5c053000 0x180>, 28 + <0x5c052000 0x200>; 29 + reg-names = "hecc", "hecc-ram", "mbx"; 30 + interrupts = <24>; 31 + clocks = <&hecc_ck>; 32 + };
+6
drivers/net/can/spi/Kconfig
··· 1 1 menu "CAN SPI interfaces" 2 2 depends on SPI 3 3 4 + config CAN_HI311X 5 + tristate "Holt HI311x SPI CAN controllers" 6 + depends on CAN_DEV && SPI && HAS_DMA 7 + ---help--- 8 + Driver for the Holt HI311x SPI CAN controllers. 9 + 4 10 config CAN_MCP251X 5 11 tristate "Microchip MCP251x SPI CAN controllers" 6 12 depends on HAS_DMA
+1
drivers/net/can/spi/Makefile
··· 3 3 # 4 4 5 5 6 + obj-$(CONFIG_CAN_HI311X) += hi311x.o 6 7 obj-$(CONFIG_CAN_MCP251X) += mcp251x.o
+1076
drivers/net/can/spi/hi311x.c
··· 1 + /* CAN bus driver for Holt HI3110 CAN Controller with SPI Interface 2 + * 3 + * Copyright(C) Timesys Corporation 2016 4 + * 5 + * Based on Microchip 251x CAN Controller (mcp251x) Linux kernel driver 6 + * Copyright 2009 Christian Pellegrin EVOL S.r.l. 7 + * Copyright 2007 Raymarine UK, Ltd. All Rights Reserved. 8 + * Copyright 2006 Arcom Control Systems Ltd. 9 + * 10 + * Based on CAN bus driver for the CCAN controller written by 11 + * - Sascha Hauer, Marc Kleine-Budde, Pengutronix 12 + * - Simon Kallweit, intefo AG 13 + * Copyright 2007 14 + * 15 + * This program is free software; you can redistribute it and/or modify 16 + * it under the terms of the GNU General Public License version 2 as 17 + * published by the Free Software Foundation. 18 + */ 19 + 20 + #include <linux/can/core.h> 21 + #include <linux/can/dev.h> 22 + #include <linux/can/led.h> 23 + #include <linux/clk.h> 24 + #include <linux/completion.h> 25 + #include <linux/delay.h> 26 + #include <linux/device.h> 27 + #include <linux/dma-mapping.h> 28 + #include <linux/freezer.h> 29 + #include <linux/interrupt.h> 30 + #include <linux/io.h> 31 + #include <linux/kernel.h> 32 + #include <linux/module.h> 33 + #include <linux/netdevice.h> 34 + #include <linux/of.h> 35 + #include <linux/of_device.h> 36 + #include <linux/platform_device.h> 37 + #include <linux/regulator/consumer.h> 38 + #include <linux/slab.h> 39 + #include <linux/spi/spi.h> 40 + #include <linux/uaccess.h> 41 + 42 + #define HI3110_MASTER_RESET 0x56 43 + #define HI3110_READ_CTRL0 0xD2 44 + #define HI3110_READ_CTRL1 0xD4 45 + #define HI3110_READ_STATF 0xE2 46 + #define HI3110_WRITE_CTRL0 0x14 47 + #define HI3110_WRITE_CTRL1 0x16 48 + #define HI3110_WRITE_INTE 0x1C 49 + #define HI3110_WRITE_BTR0 0x18 50 + #define HI3110_WRITE_BTR1 0x1A 51 + #define HI3110_READ_BTR0 0xD6 52 + #define HI3110_READ_BTR1 0xD8 53 + #define HI3110_READ_INTF 0xDE 54 + #define HI3110_READ_ERR 0xDC 55 + #define HI3110_READ_FIFO_WOTIME 0x48 56 + #define HI3110_WRITE_FIFO 0x12 57 + #define HI3110_READ_MESSTAT 0xDA 58 + #define HI3110_READ_REC 0xEA 59 + #define HI3110_READ_TEC 0xEC 60 + 61 + #define HI3110_CTRL0_MODE_MASK (7 << 5) 62 + #define HI3110_CTRL0_NORMAL_MODE (0 << 5) 63 + #define HI3110_CTRL0_LOOPBACK_MODE (1 << 5) 64 + #define HI3110_CTRL0_MONITOR_MODE (2 << 5) 65 + #define HI3110_CTRL0_SLEEP_MODE (3 << 5) 66 + #define HI3110_CTRL0_INIT_MODE (4 << 5) 67 + 68 + #define HI3110_CTRL1_TXEN BIT(7) 69 + 70 + #define HI3110_INT_RXTMP BIT(7) 71 + #define HI3110_INT_RXFIFO BIT(6) 72 + #define HI3110_INT_TXCPLT BIT(5) 73 + #define HI3110_INT_BUSERR BIT(4) 74 + #define HI3110_INT_MCHG BIT(3) 75 + #define HI3110_INT_WAKEUP BIT(2) 76 + #define HI3110_INT_F1MESS BIT(1) 77 + #define HI3110_INT_F0MESS BIT(0) 78 + 79 + #define HI3110_ERR_BUSOFF BIT(7) 80 + #define HI3110_ERR_TXERRP BIT(6) 81 + #define HI3110_ERR_RXERRP BIT(5) 82 + #define HI3110_ERR_BITERR BIT(4) 83 + #define HI3110_ERR_FRMERR BIT(3) 84 + #define HI3110_ERR_CRCERR BIT(2) 85 + #define HI3110_ERR_ACKERR BIT(1) 86 + #define HI3110_ERR_STUFERR BIT(0) 87 + #define HI3110_ERR_PROTOCOL_MASK (0x1F) 88 + #define HI3110_ERR_PASSIVE_MASK (0x60) 89 + 90 + #define HI3110_STAT_RXFMTY BIT(1) 91 + #define HI3110_STAT_BUSOFF BIT(2) 92 + #define HI3110_STAT_ERRP BIT(3) 93 + #define HI3110_STAT_ERRW BIT(4) 94 + 95 + #define HI3110_BTR0_SJW_SHIFT 6 96 + #define HI3110_BTR0_BRP_SHIFT 0 97 + 98 + #define HI3110_BTR1_SAMP_3PERBIT (1 << 7) 99 + #define HI3110_BTR1_SAMP_1PERBIT (0 << 7) 100 + #define HI3110_BTR1_TSEG2_SHIFT 4 101 + #define HI3110_BTR1_TSEG1_SHIFT 0 102 + 103 + #define HI3110_FIFO_WOTIME_TAG_OFF 0 104 + #define HI3110_FIFO_WOTIME_ID_OFF 1 105 + #define HI3110_FIFO_WOTIME_DLC_OFF 5 106 + #define HI3110_FIFO_WOTIME_DAT_OFF 6 107 + 108 + #define HI3110_FIFO_WOTIME_TAG_IDE BIT(7) 109 + #define HI3110_FIFO_WOTIME_ID_RTR BIT(0) 110 + 111 + #define HI3110_FIFO_TAG_OFF 0 112 + #define HI3110_FIFO_ID_OFF 1 113 + #define HI3110_FIFO_STD_DLC_OFF 3 114 + #define HI3110_FIFO_STD_DATA_OFF 4 115 + #define HI3110_FIFO_EXT_DLC_OFF 5 116 + #define HI3110_FIFO_EXT_DATA_OFF 6 117 + 118 + #define HI3110_CAN_MAX_DATA_LEN 8 119 + #define HI3110_RX_BUF_LEN 15 120 + #define HI3110_TX_STD_BUF_LEN 12 121 + #define HI3110_TX_EXT_BUF_LEN 14 122 + #define HI3110_CAN_FRAME_MAX_BITS 128 123 + #define HI3110_EFF_FLAGS 0x18 /* IDE + SRR */ 124 + 125 + #define HI3110_TX_ECHO_SKB_MAX 1 126 + 127 + #define HI3110_OST_DELAY_MS (10) 128 + 129 + #define DEVICE_NAME "hi3110" 130 + 131 + static int hi3110_enable_dma = 1; /* Enable SPI DMA. Default: 1 (On) */ 132 + module_param(hi3110_enable_dma, int, 0444); 133 + MODULE_PARM_DESC(hi3110_enable_dma, "Enable SPI DMA. Default: 1 (On)"); 134 + 135 + static const struct can_bittiming_const hi3110_bittiming_const = { 136 + .name = DEVICE_NAME, 137 + .tseg1_min = 2, 138 + .tseg1_max = 16, 139 + .tseg2_min = 2, 140 + .tseg2_max = 8, 141 + .sjw_max = 4, 142 + .brp_min = 1, 143 + .brp_max = 64, 144 + .brp_inc = 1, 145 + }; 146 + 147 + enum hi3110_model { 148 + CAN_HI3110_HI3110 = 0x3110, 149 + }; 150 + 151 + struct hi3110_priv { 152 + struct can_priv can; 153 + struct net_device *net; 154 + struct spi_device *spi; 155 + enum hi3110_model model; 156 + 157 + struct mutex hi3110_lock; /* SPI device lock */ 158 + 159 + u8 *spi_tx_buf; 160 + u8 *spi_rx_buf; 161 + dma_addr_t spi_tx_dma; 162 + dma_addr_t spi_rx_dma; 163 + 164 + struct sk_buff *tx_skb; 165 + int tx_len; 166 + 167 + struct workqueue_struct *wq; 168 + struct work_struct tx_work; 169 + struct work_struct restart_work; 170 + 171 + int force_quit; 172 + int after_suspend; 173 + #define HI3110_AFTER_SUSPEND_UP 1 174 + #define HI3110_AFTER_SUSPEND_DOWN 2 175 + #define HI3110_AFTER_SUSPEND_POWER 4 176 + #define HI3110_AFTER_SUSPEND_RESTART 8 177 + int restart_tx; 178 + struct regulator *power; 179 + struct regulator *transceiver; 180 + struct clk *clk; 181 + }; 182 + 183 + static void hi3110_clean(struct net_device *net) 184 + { 185 + struct hi3110_priv *priv = netdev_priv(net); 186 + 187 + if (priv->tx_skb || priv->tx_len) 188 + net->stats.tx_errors++; 189 + if (priv->tx_skb) 190 + dev_kfree_skb(priv->tx_skb); 191 + if (priv->tx_len) 192 + can_free_echo_skb(priv->net, 0); 193 + priv->tx_skb = NULL; 194 + priv->tx_len = 0; 195 + } 196 + 197 + /* Note about handling of error return of hi3110_spi_trans: accessing 198 + * registers via SPI is not really different conceptually than using 199 + * normal I/O assembler instructions, although it's much more 200 + * complicated from a practical POV. So it's not advisable to always 201 + * check the return value of this function. Imagine that every 202 + * read{b,l}, write{b,l} and friends would be bracketed in "if ( < 0) 203 + * error();", it would be a great mess (well there are some situation 204 + * when exception handling C++ like could be useful after all). So we 205 + * just check that transfers are OK at the beginning of our 206 + * conversation with the chip and to avoid doing really nasty things 207 + * (like injecting bogus packets in the network stack). 208 + */ 209 + static int hi3110_spi_trans(struct spi_device *spi, int len) 210 + { 211 + struct hi3110_priv *priv = spi_get_drvdata(spi); 212 + struct spi_transfer t = { 213 + .tx_buf = priv->spi_tx_buf, 214 + .rx_buf = priv->spi_rx_buf, 215 + .len = len, 216 + .cs_change = 0, 217 + }; 218 + struct spi_message m; 219 + int ret; 220 + 221 + spi_message_init(&m); 222 + 223 + if (hi3110_enable_dma) { 224 + t.tx_dma = priv->spi_tx_dma; 225 + t.rx_dma = priv->spi_rx_dma; 226 + m.is_dma_mapped = 1; 227 + } 228 + 229 + spi_message_add_tail(&t, &m); 230 + 231 + ret = spi_sync(spi, &m); 232 + 233 + if (ret) 234 + dev_err(&spi->dev, "spi transfer failed: ret = %d\n", ret); 235 + return ret; 236 + } 237 + 238 + static u8 hi3110_cmd(struct spi_device *spi, u8 command) 239 + { 240 + struct hi3110_priv *priv = spi_get_drvdata(spi); 241 + 242 + priv->spi_tx_buf[0] = command; 243 + dev_dbg(&spi->dev, "hi3110_cmd: %02X\n", command); 244 + 245 + return hi3110_spi_trans(spi, 1); 246 + } 247 + 248 + static u8 hi3110_read(struct spi_device *spi, u8 command) 249 + { 250 + struct hi3110_priv *priv = spi_get_drvdata(spi); 251 + u8 val = 0; 252 + 253 + priv->spi_tx_buf[0] = command; 254 + hi3110_spi_trans(spi, 2); 255 + val = priv->spi_rx_buf[1]; 256 + 257 + return val; 258 + } 259 + 260 + static void hi3110_write(struct spi_device *spi, u8 reg, u8 val) 261 + { 262 + struct hi3110_priv *priv = spi_get_drvdata(spi); 263 + 264 + priv->spi_tx_buf[0] = reg; 265 + priv->spi_tx_buf[1] = val; 266 + hi3110_spi_trans(spi, 2); 267 + } 268 + 269 + static void hi3110_hw_tx_frame(struct spi_device *spi, u8 *buf, int len) 270 + { 271 + struct hi3110_priv *priv = spi_get_drvdata(spi); 272 + 273 + priv->spi_tx_buf[0] = HI3110_WRITE_FIFO; 274 + memcpy(priv->spi_tx_buf + 1, buf, len); 275 + hi3110_spi_trans(spi, len + 1); 276 + } 277 + 278 + static void hi3110_hw_tx(struct spi_device *spi, struct can_frame *frame) 279 + { 280 + u8 buf[HI3110_TX_EXT_BUF_LEN]; 281 + 282 + buf[HI3110_FIFO_TAG_OFF] = 0; 283 + 284 + if (frame->can_id & CAN_EFF_FLAG) { 285 + /* Extended frame */ 286 + buf[HI3110_FIFO_ID_OFF] = (frame->can_id & CAN_EFF_MASK) >> 21; 287 + buf[HI3110_FIFO_ID_OFF + 1] = 288 + (((frame->can_id & CAN_EFF_MASK) >> 13) & 0xe0) | 289 + HI3110_EFF_FLAGS | 290 + (((frame->can_id & CAN_EFF_MASK) >> 15) & 0x07); 291 + buf[HI3110_FIFO_ID_OFF + 2] = 292 + (frame->can_id & CAN_EFF_MASK) >> 7; 293 + buf[HI3110_FIFO_ID_OFF + 3] = 294 + ((frame->can_id & CAN_EFF_MASK) << 1) | 295 + ((frame->can_id & CAN_RTR_FLAG) ? 1 : 0); 296 + 297 + buf[HI3110_FIFO_EXT_DLC_OFF] = frame->can_dlc; 298 + 299 + memcpy(buf + HI3110_FIFO_EXT_DATA_OFF, 300 + frame->data, frame->can_dlc); 301 + 302 + hi3110_hw_tx_frame(spi, buf, HI3110_TX_EXT_BUF_LEN - 303 + (HI3110_CAN_MAX_DATA_LEN - frame->can_dlc)); 304 + } else { 305 + /* Standard frame */ 306 + buf[HI3110_FIFO_ID_OFF] = (frame->can_id & CAN_SFF_MASK) >> 3; 307 + buf[HI3110_FIFO_ID_OFF + 1] = 308 + ((frame->can_id & CAN_SFF_MASK) << 5) | 309 + ((frame->can_id & CAN_RTR_FLAG) ? (1 << 4) : 0); 310 + 311 + buf[HI3110_FIFO_STD_DLC_OFF] = frame->can_dlc; 312 + 313 + memcpy(buf + HI3110_FIFO_STD_DATA_OFF, 314 + frame->data, frame->can_dlc); 315 + 316 + hi3110_hw_tx_frame(spi, buf, HI3110_TX_STD_BUF_LEN - 317 + (HI3110_CAN_MAX_DATA_LEN - frame->can_dlc)); 318 + } 319 + } 320 + 321 + static void hi3110_hw_rx_frame(struct spi_device *spi, u8 *buf) 322 + { 323 + struct hi3110_priv *priv = spi_get_drvdata(spi); 324 + 325 + priv->spi_tx_buf[0] = HI3110_READ_FIFO_WOTIME; 326 + hi3110_spi_trans(spi, HI3110_RX_BUF_LEN); 327 + memcpy(buf, priv->spi_rx_buf + 1, HI3110_RX_BUF_LEN - 1); 328 + } 329 + 330 + static void hi3110_hw_rx(struct spi_device *spi) 331 + { 332 + struct hi3110_priv *priv = spi_get_drvdata(spi); 333 + struct sk_buff *skb; 334 + struct can_frame *frame; 335 + u8 buf[HI3110_RX_BUF_LEN - 1]; 336 + 337 + skb = alloc_can_skb(priv->net, &frame); 338 + if (!skb) { 339 + priv->net->stats.rx_dropped++; 340 + return; 341 + } 342 + 343 + hi3110_hw_rx_frame(spi, buf); 344 + if (buf[HI3110_FIFO_WOTIME_TAG_OFF] & HI3110_FIFO_WOTIME_TAG_IDE) { 345 + /* IDE is recessive (1), indicating extended 29-bit frame */ 346 + frame->can_id = CAN_EFF_FLAG; 347 + frame->can_id |= 348 + (buf[HI3110_FIFO_WOTIME_ID_OFF] << 21) | 349 + (((buf[HI3110_FIFO_WOTIME_ID_OFF + 1] & 0xE0) >> 5) << 18) | 350 + ((buf[HI3110_FIFO_WOTIME_ID_OFF + 1] & 0x07) << 15) | 351 + (buf[HI3110_FIFO_WOTIME_ID_OFF + 2] << 7) | 352 + (buf[HI3110_FIFO_WOTIME_ID_OFF + 3] >> 1); 353 + } else { 354 + /* IDE is dominant (0), frame indicating standard 11-bit */ 355 + frame->can_id = 356 + (buf[HI3110_FIFO_WOTIME_ID_OFF] << 3) | 357 + ((buf[HI3110_FIFO_WOTIME_ID_OFF + 1] & 0xE0) >> 5); 358 + } 359 + 360 + /* Data length */ 361 + frame->can_dlc = get_can_dlc(buf[HI3110_FIFO_WOTIME_DLC_OFF] & 0x0F); 362 + 363 + if (buf[HI3110_FIFO_WOTIME_ID_OFF + 3] & HI3110_FIFO_WOTIME_ID_RTR) 364 + frame->can_id |= CAN_RTR_FLAG; 365 + else 366 + memcpy(frame->data, buf + HI3110_FIFO_WOTIME_DAT_OFF, 367 + frame->can_dlc); 368 + 369 + priv->net->stats.rx_packets++; 370 + priv->net->stats.rx_bytes += frame->can_dlc; 371 + 372 + can_led_event(priv->net, CAN_LED_EVENT_RX); 373 + 374 + netif_rx_ni(skb); 375 + } 376 + 377 + static void hi3110_hw_sleep(struct spi_device *spi) 378 + { 379 + hi3110_write(spi, HI3110_WRITE_CTRL0, HI3110_CTRL0_SLEEP_MODE); 380 + } 381 + 382 + static netdev_tx_t hi3110_hard_start_xmit(struct sk_buff *skb, 383 + struct net_device *net) 384 + { 385 + struct hi3110_priv *priv = netdev_priv(net); 386 + struct spi_device *spi = priv->spi; 387 + 388 + if (priv->tx_skb || priv->tx_len) { 389 + dev_err(&spi->dev, "hard_xmit called while tx busy\n"); 390 + return NETDEV_TX_BUSY; 391 + } 392 + 393 + if (can_dropped_invalid_skb(net, skb)) 394 + return NETDEV_TX_OK; 395 + 396 + netif_stop_queue(net); 397 + priv->tx_skb = skb; 398 + queue_work(priv->wq, &priv->tx_work); 399 + 400 + return NETDEV_TX_OK; 401 + } 402 + 403 + static int hi3110_do_set_mode(struct net_device *net, enum can_mode mode) 404 + { 405 + struct hi3110_priv *priv = netdev_priv(net); 406 + 407 + switch (mode) { 408 + case CAN_MODE_START: 409 + hi3110_clean(net); 410 + /* We have to delay work since SPI I/O may sleep */ 411 + priv->can.state = CAN_STATE_ERROR_ACTIVE; 412 + priv->restart_tx = 1; 413 + if (priv->can.restart_ms == 0) 414 + priv->after_suspend = HI3110_AFTER_SUSPEND_RESTART; 415 + queue_work(priv->wq, &priv->restart_work); 416 + break; 417 + default: 418 + return -EOPNOTSUPP; 419 + } 420 + 421 + return 0; 422 + } 423 + 424 + static int hi3110_get_berr_counter(const struct net_device *net, 425 + struct can_berr_counter *bec) 426 + { 427 + struct hi3110_priv *priv = netdev_priv(net); 428 + struct spi_device *spi = priv->spi; 429 + 430 + bec->txerr = hi3110_read(spi, HI3110_READ_TEC); 431 + bec->rxerr = hi3110_read(spi, HI3110_READ_REC); 432 + 433 + return 0; 434 + } 435 + 436 + static int hi3110_set_normal_mode(struct spi_device *spi) 437 + { 438 + struct hi3110_priv *priv = spi_get_drvdata(spi); 439 + u8 reg = 0; 440 + 441 + hi3110_write(spi, HI3110_WRITE_INTE, HI3110_INT_BUSERR | 442 + HI3110_INT_RXFIFO | HI3110_INT_TXCPLT); 443 + 444 + /* Enable TX */ 445 + hi3110_write(spi, HI3110_WRITE_CTRL1, HI3110_CTRL1_TXEN); 446 + 447 + if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) 448 + reg = HI3110_CTRL0_LOOPBACK_MODE; 449 + else if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) 450 + reg = HI3110_CTRL0_MONITOR_MODE; 451 + else 452 + reg = HI3110_CTRL0_NORMAL_MODE; 453 + 454 + hi3110_write(spi, HI3110_WRITE_CTRL0, reg); 455 + 456 + /* Wait for the device to enter the mode */ 457 + mdelay(HI3110_OST_DELAY_MS); 458 + reg = hi3110_read(spi, HI3110_READ_CTRL0); 459 + if ((reg & HI3110_CTRL0_MODE_MASK) != reg) 460 + return -EBUSY; 461 + 462 + priv->can.state = CAN_STATE_ERROR_ACTIVE; 463 + return 0; 464 + } 465 + 466 + static int hi3110_do_set_bittiming(struct net_device *net) 467 + { 468 + struct hi3110_priv *priv = netdev_priv(net); 469 + struct can_bittiming *bt = &priv->can.bittiming; 470 + struct spi_device *spi = priv->spi; 471 + 472 + hi3110_write(spi, HI3110_WRITE_BTR0, 473 + ((bt->sjw - 1) << HI3110_BTR0_SJW_SHIFT) | 474 + ((bt->brp - 1) << HI3110_BTR0_BRP_SHIFT)); 475 + 476 + hi3110_write(spi, HI3110_WRITE_BTR1, 477 + (priv->can.ctrlmode & 478 + CAN_CTRLMODE_3_SAMPLES ? 479 + HI3110_BTR1_SAMP_3PERBIT : HI3110_BTR1_SAMP_1PERBIT) | 480 + ((bt->phase_seg1 + bt->prop_seg - 1) 481 + << HI3110_BTR1_TSEG1_SHIFT) | 482 + ((bt->phase_seg2 - 1) << HI3110_BTR1_TSEG2_SHIFT)); 483 + 484 + dev_dbg(&spi->dev, "BT: 0x%02x 0x%02x\n", 485 + hi3110_read(spi, HI3110_READ_BTR0), 486 + hi3110_read(spi, HI3110_READ_BTR1)); 487 + 488 + return 0; 489 + } 490 + 491 + static int hi3110_setup(struct net_device *net) 492 + { 493 + hi3110_do_set_bittiming(net); 494 + return 0; 495 + } 496 + 497 + static int hi3110_hw_reset(struct spi_device *spi) 498 + { 499 + u8 reg; 500 + int ret; 501 + 502 + /* Wait for oscillator startup timer after power up */ 503 + mdelay(HI3110_OST_DELAY_MS); 504 + 505 + ret = hi3110_cmd(spi, HI3110_MASTER_RESET); 506 + if (ret) 507 + return ret; 508 + 509 + /* Wait for oscillator startup timer after reset */ 510 + mdelay(HI3110_OST_DELAY_MS); 511 + 512 + reg = hi3110_read(spi, HI3110_READ_CTRL0); 513 + if ((reg & HI3110_CTRL0_MODE_MASK) != HI3110_CTRL0_INIT_MODE) 514 + return -ENODEV; 515 + 516 + /* As per the datasheet it appears the error flags are 517 + * not cleared on reset. Explicitly clear them by performing a read 518 + */ 519 + hi3110_read(spi, HI3110_READ_ERR); 520 + 521 + return 0; 522 + } 523 + 524 + static int hi3110_hw_probe(struct spi_device *spi) 525 + { 526 + u8 statf; 527 + 528 + hi3110_hw_reset(spi); 529 + 530 + /* Confirm correct operation by checking against reset values 531 + * in datasheet 532 + */ 533 + statf = hi3110_read(spi, HI3110_READ_STATF); 534 + 535 + dev_dbg(&spi->dev, "statf: %02X\n", statf); 536 + 537 + if (statf != 0x82) 538 + return -ENODEV; 539 + 540 + return 0; 541 + } 542 + 543 + static int hi3110_power_enable(struct regulator *reg, int enable) 544 + { 545 + if (IS_ERR_OR_NULL(reg)) 546 + return 0; 547 + 548 + if (enable) 549 + return regulator_enable(reg); 550 + else 551 + return regulator_disable(reg); 552 + } 553 + 554 + static int hi3110_stop(struct net_device *net) 555 + { 556 + struct hi3110_priv *priv = netdev_priv(net); 557 + struct spi_device *spi = priv->spi; 558 + 559 + close_candev(net); 560 + 561 + priv->force_quit = 1; 562 + free_irq(spi->irq, priv); 563 + destroy_workqueue(priv->wq); 564 + priv->wq = NULL; 565 + 566 + mutex_lock(&priv->hi3110_lock); 567 + 568 + /* Disable transmit, interrupts and clear flags */ 569 + hi3110_write(spi, HI3110_WRITE_CTRL1, 0x0); 570 + hi3110_write(spi, HI3110_WRITE_INTE, 0x0); 571 + hi3110_read(spi, HI3110_READ_INTF); 572 + 573 + hi3110_clean(net); 574 + 575 + hi3110_hw_sleep(spi); 576 + 577 + hi3110_power_enable(priv->transceiver, 0); 578 + 579 + priv->can.state = CAN_STATE_STOPPED; 580 + 581 + mutex_unlock(&priv->hi3110_lock); 582 + 583 + can_led_event(net, CAN_LED_EVENT_STOP); 584 + 585 + return 0; 586 + } 587 + 588 + static void hi3110_tx_work_handler(struct work_struct *ws) 589 + { 590 + struct hi3110_priv *priv = container_of(ws, struct hi3110_priv, 591 + tx_work); 592 + struct spi_device *spi = priv->spi; 593 + struct net_device *net = priv->net; 594 + struct can_frame *frame; 595 + 596 + mutex_lock(&priv->hi3110_lock); 597 + if (priv->tx_skb) { 598 + if (priv->can.state == CAN_STATE_BUS_OFF) { 599 + hi3110_clean(net); 600 + } else { 601 + frame = (struct can_frame *)priv->tx_skb->data; 602 + hi3110_hw_tx(spi, frame); 603 + priv->tx_len = 1 + frame->can_dlc; 604 + can_put_echo_skb(priv->tx_skb, net, 0); 605 + priv->tx_skb = NULL; 606 + } 607 + } 608 + mutex_unlock(&priv->hi3110_lock); 609 + } 610 + 611 + static void hi3110_restart_work_handler(struct work_struct *ws) 612 + { 613 + struct hi3110_priv *priv = container_of(ws, struct hi3110_priv, 614 + restart_work); 615 + struct spi_device *spi = priv->spi; 616 + struct net_device *net = priv->net; 617 + 618 + mutex_lock(&priv->hi3110_lock); 619 + if (priv->after_suspend) { 620 + hi3110_hw_reset(spi); 621 + hi3110_setup(net); 622 + if (priv->after_suspend & HI3110_AFTER_SUSPEND_RESTART) { 623 + hi3110_set_normal_mode(spi); 624 + } else if (priv->after_suspend & HI3110_AFTER_SUSPEND_UP) { 625 + netif_device_attach(net); 626 + hi3110_clean(net); 627 + hi3110_set_normal_mode(spi); 628 + netif_wake_queue(net); 629 + } else { 630 + hi3110_hw_sleep(spi); 631 + } 632 + priv->after_suspend = 0; 633 + priv->force_quit = 0; 634 + } 635 + 636 + if (priv->restart_tx) { 637 + priv->restart_tx = 0; 638 + hi3110_hw_reset(spi); 639 + hi3110_setup(net); 640 + hi3110_clean(net); 641 + hi3110_set_normal_mode(spi); 642 + netif_wake_queue(net); 643 + } 644 + mutex_unlock(&priv->hi3110_lock); 645 + } 646 + 647 + static irqreturn_t hi3110_can_ist(int irq, void *dev_id) 648 + { 649 + struct hi3110_priv *priv = dev_id; 650 + struct spi_device *spi = priv->spi; 651 + struct net_device *net = priv->net; 652 + 653 + mutex_lock(&priv->hi3110_lock); 654 + 655 + while (!priv->force_quit) { 656 + enum can_state new_state; 657 + u8 intf, eflag, statf; 658 + 659 + while (!(HI3110_STAT_RXFMTY & 660 + (statf = hi3110_read(spi, HI3110_READ_STATF)))) { 661 + hi3110_hw_rx(spi); 662 + } 663 + 664 + intf = hi3110_read(spi, HI3110_READ_INTF); 665 + eflag = hi3110_read(spi, HI3110_READ_ERR); 666 + /* Update can state */ 667 + if (eflag & HI3110_ERR_BUSOFF) 668 + new_state = CAN_STATE_BUS_OFF; 669 + else if (eflag & HI3110_ERR_PASSIVE_MASK) 670 + new_state = CAN_STATE_ERROR_PASSIVE; 671 + else if (statf & HI3110_STAT_ERRW) 672 + new_state = CAN_STATE_ERROR_WARNING; 673 + else 674 + new_state = CAN_STATE_ERROR_ACTIVE; 675 + 676 + if (new_state != priv->can.state) { 677 + struct can_frame *cf; 678 + struct sk_buff *skb; 679 + enum can_state rx_state, tx_state; 680 + u8 rxerr, txerr; 681 + 682 + skb = alloc_can_err_skb(net, &cf); 683 + if (!skb) 684 + break; 685 + 686 + txerr = hi3110_read(spi, HI3110_READ_TEC); 687 + rxerr = hi3110_read(spi, HI3110_READ_REC); 688 + cf->data[6] = txerr; 689 + cf->data[7] = rxerr; 690 + tx_state = txerr >= rxerr ? new_state : 0; 691 + rx_state = txerr <= rxerr ? new_state : 0; 692 + can_change_state(net, cf, tx_state, rx_state); 693 + netif_rx_ni(skb); 694 + 695 + if (new_state == CAN_STATE_BUS_OFF) { 696 + can_bus_off(net); 697 + if (priv->can.restart_ms == 0) { 698 + priv->force_quit = 1; 699 + hi3110_hw_sleep(spi); 700 + break; 701 + } 702 + } 703 + } 704 + 705 + /* Update bus errors */ 706 + if ((intf & HI3110_INT_BUSERR) && 707 + (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)) { 708 + struct can_frame *cf; 709 + struct sk_buff *skb; 710 + 711 + /* Check for protocol errors */ 712 + if (eflag & HI3110_ERR_PROTOCOL_MASK) { 713 + skb = alloc_can_err_skb(net, &cf); 714 + if (!skb) 715 + break; 716 + 717 + cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 718 + priv->can.can_stats.bus_error++; 719 + priv->net->stats.rx_errors++; 720 + if (eflag & HI3110_ERR_BITERR) 721 + cf->data[2] |= CAN_ERR_PROT_BIT; 722 + else if (eflag & HI3110_ERR_FRMERR) 723 + cf->data[2] |= CAN_ERR_PROT_FORM; 724 + else if (eflag & HI3110_ERR_STUFERR) 725 + cf->data[2] |= CAN_ERR_PROT_STUFF; 726 + else if (eflag & HI3110_ERR_CRCERR) 727 + cf->data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ; 728 + else if (eflag & HI3110_ERR_ACKERR) 729 + cf->data[3] |= CAN_ERR_PROT_LOC_ACK; 730 + 731 + cf->data[6] = hi3110_read(spi, HI3110_READ_TEC); 732 + cf->data[7] = hi3110_read(spi, HI3110_READ_REC); 733 + netdev_dbg(priv->net, "Bus Error\n"); 734 + netif_rx_ni(skb); 735 + } 736 + } 737 + 738 + if (intf == 0) 739 + break; 740 + 741 + if (intf & HI3110_INT_TXCPLT) { 742 + net->stats.tx_packets++; 743 + net->stats.tx_bytes += priv->tx_len - 1; 744 + can_led_event(net, CAN_LED_EVENT_TX); 745 + if (priv->tx_len) { 746 + can_get_echo_skb(net, 0); 747 + priv->tx_len = 0; 748 + } 749 + netif_wake_queue(net); 750 + } 751 + } 752 + mutex_unlock(&priv->hi3110_lock); 753 + return IRQ_HANDLED; 754 + } 755 + 756 + static int hi3110_open(struct net_device *net) 757 + { 758 + struct hi3110_priv *priv = netdev_priv(net); 759 + struct spi_device *spi = priv->spi; 760 + unsigned long flags = IRQF_ONESHOT | IRQF_TRIGGER_RISING; 761 + int ret; 762 + 763 + ret = open_candev(net); 764 + if (ret) 765 + return ret; 766 + 767 + mutex_lock(&priv->hi3110_lock); 768 + hi3110_power_enable(priv->transceiver, 1); 769 + 770 + priv->force_quit = 0; 771 + priv->tx_skb = NULL; 772 + priv->tx_len = 0; 773 + 774 + ret = request_threaded_irq(spi->irq, NULL, hi3110_can_ist, 775 + flags, DEVICE_NAME, priv); 776 + if (ret) { 777 + dev_err(&spi->dev, "failed to acquire irq %d\n", spi->irq); 778 + goto out_close; 779 + } 780 + 781 + priv->wq = alloc_workqueue("hi3110_wq", WQ_FREEZABLE | WQ_MEM_RECLAIM, 782 + 0); 783 + if (!priv->wq) { 784 + ret = -ENOMEM; 785 + goto out_free_irq; 786 + } 787 + INIT_WORK(&priv->tx_work, hi3110_tx_work_handler); 788 + INIT_WORK(&priv->restart_work, hi3110_restart_work_handler); 789 + 790 + ret = hi3110_hw_reset(spi); 791 + if (ret) 792 + goto out_free_wq; 793 + 794 + ret = hi3110_setup(net); 795 + if (ret) 796 + goto out_free_wq; 797 + 798 + ret = hi3110_set_normal_mode(spi); 799 + if (ret) 800 + goto out_free_wq; 801 + 802 + can_led_event(net, CAN_LED_EVENT_OPEN); 803 + netif_wake_queue(net); 804 + mutex_unlock(&priv->hi3110_lock); 805 + 806 + return 0; 807 + 808 + out_free_wq: 809 + destroy_workqueue(priv->wq); 810 + out_free_irq: 811 + free_irq(spi->irq, priv); 812 + hi3110_hw_sleep(spi); 813 + out_close: 814 + hi3110_power_enable(priv->transceiver, 0); 815 + close_candev(net); 816 + mutex_unlock(&priv->hi3110_lock); 817 + return ret; 818 + } 819 + 820 + static const struct net_device_ops hi3110_netdev_ops = { 821 + .ndo_open = hi3110_open, 822 + .ndo_stop = hi3110_stop, 823 + .ndo_start_xmit = hi3110_hard_start_xmit, 824 + }; 825 + 826 + static const struct of_device_id hi3110_of_match[] = { 827 + { 828 + .compatible = "holt,hi3110", 829 + .data = (void *)CAN_HI3110_HI3110, 830 + }, 831 + { } 832 + }; 833 + MODULE_DEVICE_TABLE(of, hi3110_of_match); 834 + 835 + static const struct spi_device_id hi3110_id_table[] = { 836 + { 837 + .name = "hi3110", 838 + .driver_data = (kernel_ulong_t)CAN_HI3110_HI3110, 839 + }, 840 + { } 841 + }; 842 + MODULE_DEVICE_TABLE(spi, hi3110_id_table); 843 + 844 + static int hi3110_can_probe(struct spi_device *spi) 845 + { 846 + const struct of_device_id *of_id = of_match_device(hi3110_of_match, 847 + &spi->dev); 848 + struct net_device *net; 849 + struct hi3110_priv *priv; 850 + struct clk *clk; 851 + int freq, ret; 852 + 853 + clk = devm_clk_get(&spi->dev, NULL); 854 + if (IS_ERR(clk)) { 855 + dev_err(&spi->dev, "no CAN clock source defined\n"); 856 + return PTR_ERR(clk); 857 + } 858 + freq = clk_get_rate(clk); 859 + 860 + /* Sanity check */ 861 + if (freq > 40000000) 862 + return -ERANGE; 863 + 864 + /* Allocate can/net device */ 865 + net = alloc_candev(sizeof(struct hi3110_priv), HI3110_TX_ECHO_SKB_MAX); 866 + if (!net) 867 + return -ENOMEM; 868 + 869 + if (!IS_ERR(clk)) { 870 + ret = clk_prepare_enable(clk); 871 + if (ret) 872 + goto out_free; 873 + } 874 + 875 + net->netdev_ops = &hi3110_netdev_ops; 876 + net->flags |= IFF_ECHO; 877 + 878 + priv = netdev_priv(net); 879 + priv->can.bittiming_const = &hi3110_bittiming_const; 880 + priv->can.do_set_mode = hi3110_do_set_mode; 881 + priv->can.do_get_berr_counter = hi3110_get_berr_counter; 882 + priv->can.clock.freq = freq / 2; 883 + priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES | 884 + CAN_CTRLMODE_LOOPBACK | 885 + CAN_CTRLMODE_LISTENONLY | 886 + CAN_CTRLMODE_BERR_REPORTING; 887 + 888 + if (of_id) 889 + priv->model = (enum hi3110_model)of_id->data; 890 + else 891 + priv->model = spi_get_device_id(spi)->driver_data; 892 + priv->net = net; 893 + priv->clk = clk; 894 + 895 + spi_set_drvdata(spi, priv); 896 + 897 + /* Configure the SPI bus */ 898 + spi->bits_per_word = 8; 899 + ret = spi_setup(spi); 900 + if (ret) 901 + goto out_clk; 902 + 903 + priv->power = devm_regulator_get_optional(&spi->dev, "vdd"); 904 + priv->transceiver = devm_regulator_get_optional(&spi->dev, "xceiver"); 905 + if ((PTR_ERR(priv->power) == -EPROBE_DEFER) || 906 + (PTR_ERR(priv->transceiver) == -EPROBE_DEFER)) { 907 + ret = -EPROBE_DEFER; 908 + goto out_clk; 909 + } 910 + 911 + ret = hi3110_power_enable(priv->power, 1); 912 + if (ret) 913 + goto out_clk; 914 + 915 + priv->spi = spi; 916 + mutex_init(&priv->hi3110_lock); 917 + 918 + /* If requested, allocate DMA buffers */ 919 + if (hi3110_enable_dma) { 920 + spi->dev.coherent_dma_mask = ~0; 921 + 922 + /* Minimum coherent DMA allocation is PAGE_SIZE, so allocate 923 + * that much and share it between Tx and Rx DMA buffers. 924 + */ 925 + priv->spi_tx_buf = dmam_alloc_coherent(&spi->dev, 926 + PAGE_SIZE, 927 + &priv->spi_tx_dma, 928 + GFP_DMA); 929 + 930 + if (priv->spi_tx_buf) { 931 + priv->spi_rx_buf = (priv->spi_tx_buf + (PAGE_SIZE / 2)); 932 + priv->spi_rx_dma = (dma_addr_t)(priv->spi_tx_dma + 933 + (PAGE_SIZE / 2)); 934 + } else { 935 + /* Fall back to non-DMA */ 936 + hi3110_enable_dma = 0; 937 + } 938 + } 939 + 940 + /* Allocate non-DMA buffers */ 941 + if (!hi3110_enable_dma) { 942 + priv->spi_tx_buf = devm_kzalloc(&spi->dev, HI3110_RX_BUF_LEN, 943 + GFP_KERNEL); 944 + if (!priv->spi_tx_buf) { 945 + ret = -ENOMEM; 946 + goto error_probe; 947 + } 948 + priv->spi_rx_buf = devm_kzalloc(&spi->dev, HI3110_RX_BUF_LEN, 949 + GFP_KERNEL); 950 + 951 + if (!priv->spi_rx_buf) { 952 + ret = -ENOMEM; 953 + goto error_probe; 954 + } 955 + } 956 + 957 + SET_NETDEV_DEV(net, &spi->dev); 958 + 959 + ret = hi3110_hw_probe(spi); 960 + if (ret) { 961 + if (ret == -ENODEV) 962 + dev_err(&spi->dev, "Cannot initialize %x. Wrong wiring?\n", 963 + priv->model); 964 + goto error_probe; 965 + } 966 + hi3110_hw_sleep(spi); 967 + 968 + ret = register_candev(net); 969 + if (ret) 970 + goto error_probe; 971 + 972 + devm_can_led_init(net); 973 + netdev_info(net, "%x successfully initialized.\n", priv->model); 974 + 975 + return 0; 976 + 977 + error_probe: 978 + hi3110_power_enable(priv->power, 0); 979 + 980 + out_clk: 981 + if (!IS_ERR(clk)) 982 + clk_disable_unprepare(clk); 983 + 984 + out_free: 985 + free_candev(net); 986 + 987 + dev_err(&spi->dev, "Probe failed, err=%d\n", -ret); 988 + return ret; 989 + } 990 + 991 + static int hi3110_can_remove(struct spi_device *spi) 992 + { 993 + struct hi3110_priv *priv = spi_get_drvdata(spi); 994 + struct net_device *net = priv->net; 995 + 996 + unregister_candev(net); 997 + 998 + hi3110_power_enable(priv->power, 0); 999 + 1000 + if (!IS_ERR(priv->clk)) 1001 + clk_disable_unprepare(priv->clk); 1002 + 1003 + free_candev(net); 1004 + 1005 + return 0; 1006 + } 1007 + 1008 + static int __maybe_unused hi3110_can_suspend(struct device *dev) 1009 + { 1010 + struct spi_device *spi = to_spi_device(dev); 1011 + struct hi3110_priv *priv = spi_get_drvdata(spi); 1012 + struct net_device *net = priv->net; 1013 + 1014 + priv->force_quit = 1; 1015 + disable_irq(spi->irq); 1016 + 1017 + /* Note: at this point neither IST nor workqueues are running. 1018 + * open/stop cannot be called anyway so locking is not needed 1019 + */ 1020 + if (netif_running(net)) { 1021 + netif_device_detach(net); 1022 + 1023 + hi3110_hw_sleep(spi); 1024 + hi3110_power_enable(priv->transceiver, 0); 1025 + priv->after_suspend = HI3110_AFTER_SUSPEND_UP; 1026 + } else { 1027 + priv->after_suspend = HI3110_AFTER_SUSPEND_DOWN; 1028 + } 1029 + 1030 + if (!IS_ERR_OR_NULL(priv->power)) { 1031 + regulator_disable(priv->power); 1032 + priv->after_suspend |= HI3110_AFTER_SUSPEND_POWER; 1033 + } 1034 + 1035 + return 0; 1036 + } 1037 + 1038 + static int __maybe_unused hi3110_can_resume(struct device *dev) 1039 + { 1040 + struct spi_device *spi = to_spi_device(dev); 1041 + struct hi3110_priv *priv = spi_get_drvdata(spi); 1042 + 1043 + if (priv->after_suspend & HI3110_AFTER_SUSPEND_POWER) 1044 + hi3110_power_enable(priv->power, 1); 1045 + 1046 + if (priv->after_suspend & HI3110_AFTER_SUSPEND_UP) { 1047 + hi3110_power_enable(priv->transceiver, 1); 1048 + queue_work(priv->wq, &priv->restart_work); 1049 + } else { 1050 + priv->after_suspend = 0; 1051 + } 1052 + 1053 + priv->force_quit = 0; 1054 + enable_irq(spi->irq); 1055 + return 0; 1056 + } 1057 + 1058 + static SIMPLE_DEV_PM_OPS(hi3110_can_pm_ops, hi3110_can_suspend, hi3110_can_resume); 1059 + 1060 + static struct spi_driver hi3110_can_driver = { 1061 + .driver = { 1062 + .name = DEVICE_NAME, 1063 + .of_match_table = hi3110_of_match, 1064 + .pm = &hi3110_can_pm_ops, 1065 + }, 1066 + .id_table = hi3110_id_table, 1067 + .probe = hi3110_can_probe, 1068 + .remove = hi3110_can_remove, 1069 + }; 1070 + 1071 + module_spi_driver(hi3110_can_driver); 1072 + 1073 + MODULE_AUTHOR("Akshay Bhat <akshay.bhat@timesys.com>"); 1074 + MODULE_AUTHOR("Casey Fitzpatrick <casey.fitzpatrick@timesys.com>"); 1075 + MODULE_DESCRIPTION("Holt HI-3110 CAN driver"); 1076 + MODULE_LICENSE("GPL v2");
+88 -82
drivers/net/can/ti_hecc.c
··· 17 17 * 18 18 */ 19 19 20 - /* 21 - * Your platform definitions should specify module ram offsets and interrupt 22 - * number to use as follows: 23 - * 24 - * static struct ti_hecc_platform_data am3517_evm_hecc_pdata = { 25 - * .scc_hecc_offset = 0, 26 - * .scc_ram_offset = 0x3000, 27 - * .hecc_ram_offset = 0x3000, 28 - * .mbx_offset = 0x2000, 29 - * .int_line = 0, 30 - * .revision = 1, 31 - * .transceiver_switch = hecc_phy_control, 32 - * }; 33 - * 34 - * Please see include/linux/can/platform/ti_hecc.h for description of 35 - * above fields. 36 - * 37 - */ 38 - 39 20 #include <linux/module.h> 40 21 #include <linux/kernel.h> 41 22 #include <linux/types.h> ··· 27 46 #include <linux/platform_device.h> 28 47 #include <linux/clk.h> 29 48 #include <linux/io.h> 49 + #include <linux/of.h> 50 + #include <linux/of_device.h> 51 + #include <linux/regulator/consumer.h> 30 52 31 53 #include <linux/can/dev.h> 32 54 #include <linux/can/error.h> 33 55 #include <linux/can/led.h> 34 - #include <linux/can/platform/ti_hecc.h> 35 56 36 57 #define DRV_NAME "ti_hecc" 37 58 #define HECC_MODULE_VERSION "0.7" ··· 197 214 struct net_device *ndev; 198 215 struct clk *clk; 199 216 void __iomem *base; 200 - u32 scc_ram_offset; 201 - u32 hecc_ram_offset; 202 - u32 mbx_offset; 203 - u32 int_line; 217 + void __iomem *hecc_ram; 218 + void __iomem *mbx; 219 + bool use_hecc1int; 204 220 spinlock_t mbx_lock; /* CANME register needs protection */ 205 221 u32 tx_head; 206 222 u32 tx_tail; 207 223 u32 rx_next; 208 - void (*transceiver_switch)(int); 224 + struct regulator *reg_xceiver; 209 225 }; 210 226 211 227 static inline int get_tx_head_mb(struct ti_hecc_priv *priv) ··· 224 242 225 243 static inline void hecc_write_lam(struct ti_hecc_priv *priv, u32 mbxno, u32 val) 226 244 { 227 - __raw_writel(val, priv->base + priv->hecc_ram_offset + mbxno * 4); 245 + __raw_writel(val, priv->hecc_ram + mbxno * 4); 228 246 } 229 247 230 248 static inline void hecc_write_mbx(struct ti_hecc_priv *priv, u32 mbxno, 231 249 u32 reg, u32 val) 232 250 { 233 - __raw_writel(val, priv->base + priv->mbx_offset + mbxno * 0x10 + 234 - reg); 251 + __raw_writel(val, priv->mbx + mbxno * 0x10 + reg); 235 252 } 236 253 237 254 static inline u32 hecc_read_mbx(struct ti_hecc_priv *priv, u32 mbxno, u32 reg) 238 255 { 239 - return __raw_readl(priv->base + priv->mbx_offset + mbxno * 0x10 + 240 - reg); 256 + return __raw_readl(priv->mbx + mbxno * 0x10 + reg); 241 257 } 242 258 243 259 static inline void hecc_write(struct ti_hecc_priv *priv, u32 reg, u32 val) ··· 291 311 return 0; 292 312 } 293 313 294 - static void ti_hecc_transceiver_switch(const struct ti_hecc_priv *priv, 295 - int on) 314 + static int ti_hecc_transceiver_switch(const struct ti_hecc_priv *priv, 315 + int on) 296 316 { 297 - if (priv->transceiver_switch) 298 - priv->transceiver_switch(on); 317 + if (!priv->reg_xceiver) 318 + return 0; 319 + 320 + if (on) 321 + return regulator_enable(priv->reg_xceiver); 322 + else 323 + return regulator_disable(priv->reg_xceiver); 299 324 } 300 325 301 326 static void ti_hecc_reset(struct net_device *ndev) ··· 394 409 395 410 /* Prevent message over-write & Enable interrupts */ 396 411 hecc_write(priv, HECC_CANOPC, HECC_SET_REG); 397 - if (priv->int_line) { 412 + if (priv->use_hecc1int) { 398 413 hecc_write(priv, HECC_CANMIL, HECC_SET_REG); 399 414 hecc_write(priv, HECC_CANGIM, HECC_CANGIM_DEF_MASK | 400 415 HECC_CANGIM_I1EN | HECC_CANGIM_SIL); ··· 745 760 unsigned long ack, flags; 746 761 747 762 int_status = hecc_read(priv, 748 - (priv->int_line) ? HECC_CANGIF1 : HECC_CANGIF0); 763 + (priv->use_hecc1int) ? HECC_CANGIF1 : HECC_CANGIF0); 749 764 750 765 if (!int_status) 751 766 return IRQ_NONE; ··· 791 806 } 792 807 793 808 /* clear all interrupt conditions - read back to avoid spurious ints */ 794 - if (priv->int_line) { 809 + if (priv->use_hecc1int) { 795 810 hecc_write(priv, HECC_CANGIF1, HECC_SET_REG); 796 811 int_status = hecc_read(priv, HECC_CANGIF1); 797 812 } else { ··· 857 872 .ndo_change_mtu = can_change_mtu, 858 873 }; 859 874 875 + static const struct of_device_id ti_hecc_dt_ids[] = { 876 + { 877 + .compatible = "ti,am3517-hecc", 878 + }, 879 + { } 880 + }; 881 + MODULE_DEVICE_TABLE(of, ti_hecc_dt_ids); 882 + 860 883 static int ti_hecc_probe(struct platform_device *pdev) 861 884 { 862 885 struct net_device *ndev = (struct net_device *)0; 863 886 struct ti_hecc_priv *priv; 864 - struct ti_hecc_platform_data *pdata; 865 - struct resource *mem, *irq; 866 - void __iomem *addr; 887 + struct device_node *np = pdev->dev.of_node; 888 + struct resource *res, *irq; 889 + struct regulator *reg_xceiver; 867 890 int err = -ENODEV; 868 891 869 - pdata = dev_get_platdata(&pdev->dev); 870 - if (!pdata) { 871 - dev_err(&pdev->dev, "No platform data\n"); 872 - goto probe_exit; 892 + if (!IS_ENABLED(CONFIG_OF) || !np) 893 + return -EINVAL; 894 + 895 + reg_xceiver = devm_regulator_get(&pdev->dev, "xceiver"); 896 + if (PTR_ERR(reg_xceiver) == -EPROBE_DEFER) 897 + return -EPROBE_DEFER; 898 + else if (IS_ERR(reg_xceiver)) 899 + reg_xceiver = NULL; 900 + 901 + ndev = alloc_candev(sizeof(struct ti_hecc_priv), HECC_MAX_TX_MBOX); 902 + if (!ndev) { 903 + dev_err(&pdev->dev, "alloc_candev failed\n"); 904 + return -ENOMEM; 905 + } 906 + priv = netdev_priv(ndev); 907 + 908 + /* handle hecc memory */ 909 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hecc"); 910 + if (!res) { 911 + dev_err(&pdev->dev, "can't get IORESOURCE_MEM hecc\n"); 912 + return -EINVAL; 873 913 } 874 914 875 - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 876 - if (!mem) { 877 - dev_err(&pdev->dev, "No mem resources\n"); 878 - goto probe_exit; 915 + priv->base = devm_ioremap_resource(&pdev->dev, res); 916 + if (!priv->base) { 917 + dev_err(&pdev->dev, "hecc ioremap failed\n"); 918 + return -ENOMEM; 879 919 } 920 + 921 + /* handle hecc-ram memory */ 922 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hecc-ram"); 923 + if (!res) { 924 + dev_err(&pdev->dev, "can't get IORESOURCE_MEM hecc-ram\n"); 925 + return -EINVAL; 926 + } 927 + 928 + priv->hecc_ram = devm_ioremap_resource(&pdev->dev, res); 929 + if (!priv->hecc_ram) { 930 + dev_err(&pdev->dev, "hecc-ram ioremap failed\n"); 931 + return -ENOMEM; 932 + } 933 + 934 + /* handle mbx memory */ 935 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mbx"); 936 + if (!res) { 937 + dev_err(&pdev->dev, "can't get IORESOURCE_MEM mbx\n"); 938 + return -EINVAL; 939 + } 940 + 941 + priv->mbx = devm_ioremap_resource(&pdev->dev, res); 942 + if (!priv->mbx) { 943 + dev_err(&pdev->dev, "mbx ioremap failed\n"); 944 + return -ENOMEM; 945 + } 946 + 880 947 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 881 948 if (!irq) { 882 949 dev_err(&pdev->dev, "No irq resource\n"); 883 950 goto probe_exit; 884 951 } 885 - if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) { 886 - dev_err(&pdev->dev, "HECC region already claimed\n"); 887 - err = -EBUSY; 888 - goto probe_exit; 889 - } 890 - addr = ioremap(mem->start, resource_size(mem)); 891 - if (!addr) { 892 - dev_err(&pdev->dev, "ioremap failed\n"); 893 - err = -ENOMEM; 894 - goto probe_exit_free_region; 895 - } 896 952 897 - ndev = alloc_candev(sizeof(struct ti_hecc_priv), HECC_MAX_TX_MBOX); 898 - if (!ndev) { 899 - dev_err(&pdev->dev, "alloc_candev failed\n"); 900 - err = -ENOMEM; 901 - goto probe_exit_iounmap; 902 - } 903 - 904 - priv = netdev_priv(ndev); 905 953 priv->ndev = ndev; 906 - priv->base = addr; 907 - priv->scc_ram_offset = pdata->scc_ram_offset; 908 - priv->hecc_ram_offset = pdata->hecc_ram_offset; 909 - priv->mbx_offset = pdata->mbx_offset; 910 - priv->int_line = pdata->int_line; 911 - priv->transceiver_switch = pdata->transceiver_switch; 954 + priv->reg_xceiver = reg_xceiver; 955 + priv->use_hecc1int = of_property_read_bool(np, "ti,use-hecc1int"); 912 956 913 957 priv->can.bittiming_const = &ti_hecc_bittiming_const; 914 958 priv->can.do_set_mode = ti_hecc_do_set_mode; ··· 985 971 clk_put(priv->clk); 986 972 probe_exit_candev: 987 973 free_candev(ndev); 988 - probe_exit_iounmap: 989 - iounmap(addr); 990 - probe_exit_free_region: 991 - release_mem_region(mem->start, resource_size(mem)); 992 974 probe_exit: 993 975 return err; 994 976 } 995 977 996 978 static int ti_hecc_remove(struct platform_device *pdev) 997 979 { 998 - struct resource *res; 999 980 struct net_device *ndev = platform_get_drvdata(pdev); 1000 981 struct ti_hecc_priv *priv = netdev_priv(ndev); 1001 982 1002 983 unregister_candev(ndev); 1003 984 clk_disable_unprepare(priv->clk); 1004 985 clk_put(priv->clk); 1005 - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1006 - iounmap(priv->base); 1007 - release_mem_region(res->start, resource_size(res)); 1008 986 free_candev(ndev); 1009 987 1010 988 return 0; 1011 989 } 1012 - 1013 990 1014 991 #ifdef CONFIG_PM 1015 992 static int ti_hecc_suspend(struct platform_device *pdev, pm_message_t state) ··· 1050 1045 static struct platform_driver ti_hecc_driver = { 1051 1046 .driver = { 1052 1047 .name = DRV_NAME, 1048 + .of_match_table = ti_hecc_dt_ids, 1053 1049 }, 1054 1050 .probe = ti_hecc_probe, 1055 1051 .remove = ti_hecc_remove,
+4 -3
include/linux/can/core.h
··· 45 45 extern int can_proto_register(const struct can_proto *cp); 46 46 extern void can_proto_unregister(const struct can_proto *cp); 47 47 48 - int can_rx_register(struct net_device *dev, canid_t can_id, canid_t mask, 48 + int can_rx_register(struct net *net, struct net_device *dev, 49 + canid_t can_id, canid_t mask, 49 50 void (*func)(struct sk_buff *, void *), 50 51 void *data, char *ident, struct sock *sk); 51 52 52 - extern void can_rx_unregister(struct net_device *dev, canid_t can_id, 53 - canid_t mask, 53 + extern void can_rx_unregister(struct net *net, struct net_device *dev, 54 + canid_t can_id, canid_t mask, 54 55 void (*func)(struct sk_buff *, void *), 55 56 void *data); 56 57
-44
include/linux/can/platform/ti_hecc.h
··· 1 - #ifndef _CAN_PLATFORM_TI_HECC_H 2 - #define _CAN_PLATFORM_TI_HECC_H 3 - 4 - /* 5 - * TI HECC (High End CAN Controller) driver platform header 6 - * 7 - * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ 8 - * 9 - * This program is free software; you can redistribute it and/or 10 - * modify it under the terms of the GNU General Public License as 11 - * published by the Free Software Foundation version 2. 12 - * 13 - * This program is distributed as is WITHOUT ANY WARRANTY of any 14 - * kind, whether express or implied; without even the implied warranty 15 - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 - * GNU General Public License for more details. 17 - * 18 - */ 19 - 20 - /** 21 - * struct hecc_platform_data - HECC Platform Data 22 - * 23 - * @scc_hecc_offset: mostly 0 - should really never change 24 - * @scc_ram_offset: SCC RAM offset 25 - * @hecc_ram_offset: HECC RAM offset 26 - * @mbx_offset: Mailbox RAM offset 27 - * @int_line: Interrupt line to use - 0 or 1 28 - * @version: version for future use 29 - * @transceiver_switch: platform specific callback fn for transceiver control 30 - * 31 - * Platform data structure to get all platform specific settings. 32 - * this structure also accounts the fact that the IP may have different 33 - * RAM and mailbox offsets for different SOC's 34 - */ 35 - struct ti_hecc_platform_data { 36 - u32 scc_hecc_offset; 37 - u32 scc_ram_offset; 38 - u32 hecc_ram_offset; 39 - u32 mbx_offset; 40 - u32 int_line; 41 - u32 version; 42 - void (*transceiver_switch) (int); 43 - }; 44 - #endif /* !_CAN_PLATFORM_TI_HECC_H */
+4
include/net/net_namespace.h
··· 27 27 #include <net/netns/nftables.h> 28 28 #include <net/netns/xfrm.h> 29 29 #include <net/netns/mpls.h> 30 + #include <net/netns/can.h> 30 31 #include <linux/ns_common.h> 31 32 #include <linux/idr.h> 32 33 #include <linux/skbuff.h> ··· 141 140 #endif 142 141 #if IS_ENABLED(CONFIG_MPLS) 143 142 struct netns_mpls mpls; 143 + #endif 144 + #if IS_ENABLED(CONFIG_CAN) 145 + struct netns_can can; 144 146 #endif 145 147 struct sock *diag_nlsk; 146 148 atomic_t fnhe_genid;
+31
include/net/netns/can.h
··· 1 + /* 2 + * can in net namespaces 3 + */ 4 + 5 + #ifndef __NETNS_CAN_H__ 6 + #define __NETNS_CAN_H__ 7 + 8 + #include <linux/spinlock.h> 9 + 10 + struct dev_rcv_lists; 11 + 12 + struct netns_can { 13 + #if IS_ENABLED(CONFIG_PROC_FS) 14 + struct proc_dir_entry *proc_dir; 15 + struct proc_dir_entry *pde_version; 16 + struct proc_dir_entry *pde_stats; 17 + struct proc_dir_entry *pde_reset_stats; 18 + struct proc_dir_entry *pde_rcvlist_all; 19 + struct proc_dir_entry *pde_rcvlist_fil; 20 + struct proc_dir_entry *pde_rcvlist_inv; 21 + struct proc_dir_entry *pde_rcvlist_sff; 22 + struct proc_dir_entry *pde_rcvlist_eff; 23 + struct proc_dir_entry *pde_rcvlist_err; 24 + #endif 25 + 26 + /* receive filters subscribed for 'all' CAN devices */ 27 + struct dev_rcv_lists *can_rx_alldev_list; 28 + spinlock_t can_rcvlists_lock; 29 + }; 30 + 31 + #endif /* __NETNS_CAN_H__ */
+70 -52
net/can/af_can.c
··· 75 75 module_param(stats_timer, int, S_IRUGO); 76 76 MODULE_PARM_DESC(stats_timer, "enable timer for statistics (default:on)"); 77 77 78 - /* receive filters subscribed for 'all' CAN devices */ 79 - struct dev_rcv_lists can_rx_alldev_list; 80 - static DEFINE_SPINLOCK(can_rcvlists_lock); 78 + static int can_net_id; 81 79 82 80 static struct kmem_cache *rcv_cache __read_mostly; 83 81 ··· 142 144 143 145 if (protocol < 0 || protocol >= CAN_NPROTO) 144 146 return -EINVAL; 145 - 146 - if (!net_eq(net, &init_net)) 147 - return -EAFNOSUPPORT; 148 147 149 148 cp = can_get_proto(protocol); 150 149 ··· 326 331 * af_can rx path 327 332 */ 328 333 329 - static struct dev_rcv_lists *find_dev_rcv_lists(struct net_device *dev) 334 + static struct dev_rcv_lists *find_dev_rcv_lists(struct net *net, 335 + struct net_device *dev) 330 336 { 331 337 if (!dev) 332 - return &can_rx_alldev_list; 338 + return net->can.can_rx_alldev_list; 333 339 else 334 340 return (struct dev_rcv_lists *)dev->ml_priv; 335 341 } ··· 463 467 * -ENOMEM on missing cache mem to create subscription entry 464 468 * -ENODEV unknown device 465 469 */ 466 - int can_rx_register(struct net_device *dev, canid_t can_id, canid_t mask, 467 - void (*func)(struct sk_buff *, void *), void *data, 468 - char *ident, struct sock *sk) 470 + int can_rx_register(struct net *net, struct net_device *dev, canid_t can_id, 471 + canid_t mask, void (*func)(struct sk_buff *, void *), 472 + void *data, char *ident, struct sock *sk) 469 473 { 470 474 struct receiver *r; 471 475 struct hlist_head *rl; ··· 477 481 if (dev && dev->type != ARPHRD_CAN) 478 482 return -ENODEV; 479 483 484 + if (dev && !net_eq(net, dev_net(dev))) 485 + return -ENODEV; 486 + 480 487 r = kmem_cache_alloc(rcv_cache, GFP_KERNEL); 481 488 if (!r) 482 489 return -ENOMEM; 483 490 484 - spin_lock(&can_rcvlists_lock); 491 + spin_lock(&net->can.can_rcvlists_lock); 485 492 486 - d = find_dev_rcv_lists(dev); 493 + d = find_dev_rcv_lists(net, dev); 487 494 if (d) { 488 495 rl = find_rcv_list(&can_id, &mask, d); 489 496 ··· 509 510 err = -ENODEV; 510 511 } 511 512 512 - spin_unlock(&can_rcvlists_lock); 513 + spin_unlock(&net->can.can_rcvlists_lock); 513 514 514 515 return err; 515 516 } ··· 539 540 * Description: 540 541 * Removes subscription entry depending on given (subscription) values. 541 542 */ 542 - void can_rx_unregister(struct net_device *dev, canid_t can_id, canid_t mask, 543 - void (*func)(struct sk_buff *, void *), void *data) 543 + void can_rx_unregister(struct net *net, struct net_device *dev, canid_t can_id, 544 + canid_t mask, void (*func)(struct sk_buff *, void *), 545 + void *data) 544 546 { 545 547 struct receiver *r = NULL; 546 548 struct hlist_head *rl; ··· 550 550 if (dev && dev->type != ARPHRD_CAN) 551 551 return; 552 552 553 - spin_lock(&can_rcvlists_lock); 553 + if (dev && !net_eq(net, dev_net(dev))) 554 + return; 554 555 555 - d = find_dev_rcv_lists(dev); 556 + spin_lock(&net->can.can_rcvlists_lock); 557 + 558 + d = find_dev_rcv_lists(net, dev); 556 559 if (!d) { 557 560 pr_err("BUG: receive list not found for " 558 561 "dev %s, id %03X, mask %03X\n", ··· 601 598 } 602 599 603 600 out: 604 - spin_unlock(&can_rcvlists_lock); 601 + spin_unlock(&net->can.can_rcvlists_lock); 605 602 606 603 /* schedule the receiver item for deletion */ 607 604 if (r) { ··· 699 696 rcu_read_lock(); 700 697 701 698 /* deliver the packet to sockets listening on all devices */ 702 - matches = can_rcv_filter(&can_rx_alldev_list, skb); 699 + matches = can_rcv_filter(dev_net(dev)->can.can_rx_alldev_list, skb); 703 700 704 701 /* find receive list for this device */ 705 - d = find_dev_rcv_lists(dev); 702 + d = find_dev_rcv_lists(dev_net(dev), dev); 706 703 if (d) 707 704 matches += can_rcv_filter(d, skb); 708 705 ··· 721 718 struct packet_type *pt, struct net_device *orig_dev) 722 719 { 723 720 struct canfd_frame *cfd = (struct canfd_frame *)skb->data; 724 - 725 - if (unlikely(!net_eq(dev_net(dev), &init_net))) 726 - goto drop; 727 721 728 722 if (WARN_ONCE(dev->type != ARPHRD_CAN || 729 723 skb->len != CAN_MTU || ··· 742 742 struct packet_type *pt, struct net_device *orig_dev) 743 743 { 744 744 struct canfd_frame *cfd = (struct canfd_frame *)skb->data; 745 - 746 - if (unlikely(!net_eq(dev_net(dev), &init_net))) 747 - goto drop; 748 745 749 746 if (WARN_ONCE(dev->type != ARPHRD_CAN || 750 747 skb->len != CANFD_MTU || ··· 832 835 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 833 836 struct dev_rcv_lists *d; 834 837 835 - if (!net_eq(dev_net(dev), &init_net)) 836 - return NOTIFY_DONE; 837 - 838 838 if (dev->type != ARPHRD_CAN) 839 839 return NOTIFY_DONE; 840 840 ··· 849 855 break; 850 856 851 857 case NETDEV_UNREGISTER: 852 - spin_lock(&can_rcvlists_lock); 858 + spin_lock(&dev_net(dev)->can.can_rcvlists_lock); 853 859 854 860 d = dev->ml_priv; 855 861 if (d) { ··· 863 869 pr_err("can: notifier: receive list not found for dev " 864 870 "%s\n", dev->name); 865 871 866 - spin_unlock(&can_rcvlists_lock); 872 + spin_unlock(&dev_net(dev)->can.can_rcvlists_lock); 867 873 868 874 break; 869 875 } 870 876 871 877 return NOTIFY_DONE; 878 + } 879 + 880 + static int can_pernet_init(struct net *net) 881 + { 882 + net->can.can_rcvlists_lock = 883 + __SPIN_LOCK_UNLOCKED(net->can.can_rcvlists_lock); 884 + net->can.can_rx_alldev_list = 885 + kzalloc(sizeof(struct dev_rcv_lists), GFP_KERNEL); 886 + 887 + if (IS_ENABLED(CONFIG_PROC_FS)) 888 + can_init_proc(net); 889 + 890 + return 0; 891 + } 892 + 893 + static void can_pernet_exit(struct net *net) 894 + { 895 + struct net_device *dev; 896 + 897 + if (IS_ENABLED(CONFIG_PROC_FS)) 898 + can_remove_proc(net); 899 + 900 + /* remove created dev_rcv_lists from still registered CAN devices */ 901 + rcu_read_lock(); 902 + for_each_netdev_rcu(net, dev) { 903 + if (dev->type == ARPHRD_CAN && dev->ml_priv) { 904 + struct dev_rcv_lists *d = dev->ml_priv; 905 + 906 + BUG_ON(d->entries); 907 + kfree(d); 908 + dev->ml_priv = NULL; 909 + } 910 + } 911 + rcu_read_unlock(); 872 912 } 873 913 874 914 /* ··· 930 902 .notifier_call = can_notifier, 931 903 }; 932 904 905 + static struct pernet_operations can_pernet_ops __read_mostly = { 906 + .init = can_pernet_init, 907 + .exit = can_pernet_exit, 908 + .id = &can_net_id, 909 + .size = 0, 910 + }; 911 + 933 912 static __init int can_init(void) 934 913 { 935 914 /* check for correct padding to be able to use the structs similarly */ ··· 946 911 offsetof(struct canfd_frame, data)); 947 912 948 913 pr_info("can: controller area network core (" CAN_VERSION_STRING ")\n"); 949 - 950 - memset(&can_rx_alldev_list, 0, sizeof(can_rx_alldev_list)); 951 914 952 915 rcv_cache = kmem_cache_create("can_receiver", sizeof(struct receiver), 953 916 0, 0, NULL); ··· 958 925 setup_timer(&can_stattimer, can_stat_update, 0); 959 926 mod_timer(&can_stattimer, round_jiffies(jiffies + HZ)); 960 927 } 961 - can_init_proc(); 962 928 } 929 + 930 + register_pernet_subsys(&can_pernet_ops); 963 931 964 932 /* protocol register */ 965 933 sock_register(&can_family_ops); ··· 973 939 974 940 static __exit void can_exit(void) 975 941 { 976 - struct net_device *dev; 977 - 978 942 if (IS_ENABLED(CONFIG_PROC_FS)) { 979 943 if (stats_timer) 980 944 del_timer_sync(&can_stattimer); 981 - 982 - can_remove_proc(); 983 945 } 984 946 985 947 /* protocol unregister */ ··· 984 954 unregister_netdevice_notifier(&can_netdev_notifier); 985 955 sock_unregister(PF_CAN); 986 956 987 - /* remove created dev_rcv_lists from still registered CAN devices */ 988 - rcu_read_lock(); 989 - for_each_netdev_rcu(&init_net, dev) { 990 - if (dev->type == ARPHRD_CAN && dev->ml_priv) { 991 - 992 - struct dev_rcv_lists *d = dev->ml_priv; 993 - 994 - BUG_ON(d->entries); 995 - kfree(d); 996 - dev->ml_priv = NULL; 997 - } 998 - } 999 - rcu_read_unlock(); 957 + unregister_pernet_subsys(&can_pernet_ops); 1000 958 1001 959 rcu_barrier(); /* Wait for completion of call_rcu()'s */ 1002 960
+2 -2
net/can/af_can.h
··· 114 114 extern struct dev_rcv_lists can_rx_alldev_list; 115 115 116 116 /* function prototypes for the CAN networklayer procfs (proc.c) */ 117 - void can_init_proc(void); 118 - void can_remove_proc(void); 117 + void can_init_proc(struct net *net); 118 + void can_remove_proc(struct net *net); 119 119 void can_stat_update(unsigned long data); 120 120 121 121 /* structures and variables from af_can.c needed in proc.c for reading */
+7 -6
net/can/bcm.c
··· 764 764 static void bcm_rx_unreg(struct net_device *dev, struct bcm_op *op) 765 765 { 766 766 if (op->rx_reg_dev == dev) { 767 - can_rx_unregister(dev, op->can_id, REGMASK(op->can_id), 768 - bcm_rx_handler, op); 767 + can_rx_unregister(&init_net, dev, op->can_id, 768 + REGMASK(op->can_id), bcm_rx_handler, op); 769 769 770 770 /* mark as removed subscription */ 771 771 op->rx_reg_dev = NULL; ··· 808 808 } 809 809 } 810 810 } else 811 - can_rx_unregister(NULL, op->can_id, 811 + can_rx_unregister(&init_net, NULL, op->can_id, 812 812 REGMASK(op->can_id), 813 813 bcm_rx_handler, op); 814 814 ··· 1222 1222 1223 1223 dev = dev_get_by_index(&init_net, ifindex); 1224 1224 if (dev) { 1225 - err = can_rx_register(dev, op->can_id, 1225 + err = can_rx_register(&init_net, dev, 1226 + op->can_id, 1226 1227 REGMASK(op->can_id), 1227 1228 bcm_rx_handler, op, 1228 1229 "bcm", sk); ··· 1233 1232 } 1234 1233 1235 1234 } else 1236 - err = can_rx_register(NULL, op->can_id, 1235 + err = can_rx_register(&init_net, NULL, op->can_id, 1237 1236 REGMASK(op->can_id), 1238 1237 bcm_rx_handler, op, "bcm", sk); 1239 1238 if (err) { ··· 1529 1528 } 1530 1529 } 1531 1530 } else 1532 - can_rx_unregister(NULL, op->can_id, 1531 + can_rx_unregister(&init_net, NULL, op->can_id, 1533 1532 REGMASK(op->can_id), 1534 1533 bcm_rx_handler, op); 1535 1534
+2 -2
net/can/gw.c
··· 440 440 441 441 static inline int cgw_register_filter(struct cgw_job *gwj) 442 442 { 443 - return can_rx_register(gwj->src.dev, gwj->ccgw.filter.can_id, 443 + return can_rx_register(&init_net, gwj->src.dev, gwj->ccgw.filter.can_id, 444 444 gwj->ccgw.filter.can_mask, can_can_gw_rcv, 445 445 gwj, "gw", NULL); 446 446 } 447 447 448 448 static inline void cgw_unregister_filter(struct cgw_job *gwj) 449 449 { 450 - can_rx_unregister(gwj->src.dev, gwj->ccgw.filter.can_id, 450 + can_rx_unregister(&init_net, gwj->src.dev, gwj->ccgw.filter.can_id, 451 451 gwj->ccgw.filter.can_mask, can_can_gw_rcv, gwj); 452 452 } 453 453
+70 -74
net/can/proc.c
··· 62 62 #define CAN_PROC_RCVLIST_EFF "rcvlist_eff" 63 63 #define CAN_PROC_RCVLIST_ERR "rcvlist_err" 64 64 65 - static struct proc_dir_entry *can_dir; 66 - static struct proc_dir_entry *pde_version; 67 - static struct proc_dir_entry *pde_stats; 68 - static struct proc_dir_entry *pde_reset_stats; 69 - static struct proc_dir_entry *pde_rcvlist_all; 70 - static struct proc_dir_entry *pde_rcvlist_fil; 71 - static struct proc_dir_entry *pde_rcvlist_inv; 72 - static struct proc_dir_entry *pde_rcvlist_sff; 73 - static struct proc_dir_entry *pde_rcvlist_eff; 74 - static struct proc_dir_entry *pde_rcvlist_err; 75 - 76 65 static int user_reset; 77 66 78 67 static const char rx_list_name[][8] = { ··· 340 351 static int can_rcvlist_proc_show(struct seq_file *m, void *v) 341 352 { 342 353 /* double cast to prevent GCC warning */ 343 - int idx = (int)(long)m->private; 354 + int idx = (int)(long)PDE_DATA(m->file->f_inode); 344 355 struct net_device *dev; 345 356 struct dev_rcv_lists *d; 357 + struct net *net = m->private; 346 358 347 359 seq_printf(m, "\nreceive list '%s':\n", rx_list_name[idx]); 348 360 349 361 rcu_read_lock(); 350 362 351 363 /* receive list for 'all' CAN devices (dev == NULL) */ 352 - d = &can_rx_alldev_list; 364 + d = net->can.can_rx_alldev_list; 353 365 can_rcvlist_proc_show_one(m, idx, NULL, d); 354 366 355 367 /* receive list for registered CAN devices */ 356 - for_each_netdev_rcu(&init_net, dev) { 368 + for_each_netdev_rcu(net, dev) { 357 369 if (dev->type == ARPHRD_CAN && dev->ml_priv) 358 370 can_rcvlist_proc_show_one(m, idx, dev, dev->ml_priv); 359 371 } ··· 367 377 368 378 static int can_rcvlist_proc_open(struct inode *inode, struct file *file) 369 379 { 370 - return single_open(file, can_rcvlist_proc_show, PDE_DATA(inode)); 380 + return single_open_net(inode, file, can_rcvlist_proc_show); 371 381 } 372 382 373 383 static const struct file_operations can_rcvlist_proc_fops = { ··· 407 417 { 408 418 struct net_device *dev; 409 419 struct dev_rcv_lists *d; 420 + struct net *net = m->private; 410 421 411 422 /* RX_SFF */ 412 423 seq_puts(m, "\nreceive list 'rx_sff':\n"); ··· 415 424 rcu_read_lock(); 416 425 417 426 /* sff receive list for 'all' CAN devices (dev == NULL) */ 418 - d = &can_rx_alldev_list; 427 + d = net->can.can_rx_alldev_list; 419 428 can_rcvlist_proc_show_array(m, NULL, d->rx_sff, ARRAY_SIZE(d->rx_sff)); 420 429 421 430 /* sff receive list for registered CAN devices */ 422 - for_each_netdev_rcu(&init_net, dev) { 431 + for_each_netdev_rcu(net, dev) { 423 432 if (dev->type == ARPHRD_CAN && dev->ml_priv) { 424 433 d = dev->ml_priv; 425 434 can_rcvlist_proc_show_array(m, dev, d->rx_sff, ··· 435 444 436 445 static int can_rcvlist_sff_proc_open(struct inode *inode, struct file *file) 437 446 { 438 - return single_open(file, can_rcvlist_sff_proc_show, NULL); 447 + return single_open_net(inode, file, can_rcvlist_sff_proc_show); 439 448 } 440 449 441 450 static const struct file_operations can_rcvlist_sff_proc_fops = { ··· 451 460 { 452 461 struct net_device *dev; 453 462 struct dev_rcv_lists *d; 463 + struct net *net = m->private; 454 464 455 465 /* RX_EFF */ 456 466 seq_puts(m, "\nreceive list 'rx_eff':\n"); ··· 459 467 rcu_read_lock(); 460 468 461 469 /* eff receive list for 'all' CAN devices (dev == NULL) */ 462 - d = &can_rx_alldev_list; 470 + d = net->can.can_rx_alldev_list; 463 471 can_rcvlist_proc_show_array(m, NULL, d->rx_eff, ARRAY_SIZE(d->rx_eff)); 464 472 465 473 /* eff receive list for registered CAN devices */ 466 - for_each_netdev_rcu(&init_net, dev) { 474 + for_each_netdev_rcu(net, dev) { 467 475 if (dev->type == ARPHRD_CAN && dev->ml_priv) { 468 476 d = dev->ml_priv; 469 477 can_rcvlist_proc_show_array(m, dev, d->rx_eff, ··· 479 487 480 488 static int can_rcvlist_eff_proc_open(struct inode *inode, struct file *file) 481 489 { 482 - return single_open(file, can_rcvlist_eff_proc_show, NULL); 490 + return single_open_net(inode, file, can_rcvlist_eff_proc_show); 483 491 } 484 492 485 493 static const struct file_operations can_rcvlist_eff_proc_fops = { ··· 491 499 }; 492 500 493 501 /* 494 - * proc utility functions 495 - */ 496 - 497 - static void can_remove_proc_readentry(const char *name) 498 - { 499 - if (can_dir) 500 - remove_proc_entry(name, can_dir); 501 - } 502 - 503 - /* 504 502 * can_init_proc - create main CAN proc directory and procfs entries 505 503 */ 506 - void can_init_proc(void) 504 + void can_init_proc(struct net *net) 507 505 { 508 506 /* create /proc/net/can directory */ 509 - can_dir = proc_mkdir("can", init_net.proc_net); 507 + net->can.proc_dir = proc_net_mkdir(net, "can", net->proc_net); 510 508 511 - if (!can_dir) { 512 - pr_info("can: failed to create /proc/net/can.\n"); 509 + if (!net->can.proc_dir) { 510 + printk(KERN_INFO "can: failed to create /proc/net/can . " 511 + "CONFIG_PROC_FS missing?\n"); 513 512 return; 514 513 } 515 514 516 515 /* own procfs entries from the AF_CAN core */ 517 - pde_version = proc_create(CAN_PROC_VERSION, 0644, can_dir, 518 - &can_version_proc_fops); 519 - pde_stats = proc_create(CAN_PROC_STATS, 0644, can_dir, 520 - &can_stats_proc_fops); 521 - pde_reset_stats = proc_create(CAN_PROC_RESET_STATS, 0644, can_dir, 522 - &can_reset_stats_proc_fops); 523 - pde_rcvlist_err = proc_create_data(CAN_PROC_RCVLIST_ERR, 0644, can_dir, 524 - &can_rcvlist_proc_fops, (void *)RX_ERR); 525 - pde_rcvlist_all = proc_create_data(CAN_PROC_RCVLIST_ALL, 0644, can_dir, 526 - &can_rcvlist_proc_fops, (void *)RX_ALL); 527 - pde_rcvlist_fil = proc_create_data(CAN_PROC_RCVLIST_FIL, 0644, can_dir, 528 - &can_rcvlist_proc_fops, (void *)RX_FIL); 529 - pde_rcvlist_inv = proc_create_data(CAN_PROC_RCVLIST_INV, 0644, can_dir, 530 - &can_rcvlist_proc_fops, (void *)RX_INV); 531 - pde_rcvlist_eff = proc_create(CAN_PROC_RCVLIST_EFF, 0644, can_dir, 532 - &can_rcvlist_eff_proc_fops); 533 - pde_rcvlist_sff = proc_create(CAN_PROC_RCVLIST_SFF, 0644, can_dir, 534 - &can_rcvlist_sff_proc_fops); 516 + net->can.pde_version = proc_create(CAN_PROC_VERSION, 0644, 517 + net->can.proc_dir, 518 + &can_version_proc_fops); 519 + net->can.pde_stats = proc_create(CAN_PROC_STATS, 0644, 520 + net->can.proc_dir, 521 + &can_stats_proc_fops); 522 + net->can.pde_reset_stats = proc_create(CAN_PROC_RESET_STATS, 0644, 523 + net->can.proc_dir, 524 + &can_reset_stats_proc_fops); 525 + net->can.pde_rcvlist_err = proc_create_data(CAN_PROC_RCVLIST_ERR, 0644, 526 + net->can.proc_dir, 527 + &can_rcvlist_proc_fops, 528 + (void *)RX_ERR); 529 + net->can.pde_rcvlist_all = proc_create_data(CAN_PROC_RCVLIST_ALL, 0644, 530 + net->can.proc_dir, 531 + &can_rcvlist_proc_fops, 532 + (void *)RX_ALL); 533 + net->can.pde_rcvlist_fil = proc_create_data(CAN_PROC_RCVLIST_FIL, 0644, 534 + net->can.proc_dir, 535 + &can_rcvlist_proc_fops, 536 + (void *)RX_FIL); 537 + net->can.pde_rcvlist_inv = proc_create_data(CAN_PROC_RCVLIST_INV, 0644, 538 + net->can.proc_dir, 539 + &can_rcvlist_proc_fops, 540 + (void *)RX_INV); 541 + net->can.pde_rcvlist_eff = proc_create(CAN_PROC_RCVLIST_EFF, 0644, 542 + net->can.proc_dir, 543 + &can_rcvlist_eff_proc_fops); 544 + net->can.pde_rcvlist_sff = proc_create(CAN_PROC_RCVLIST_SFF, 0644, 545 + net->can.proc_dir, 546 + &can_rcvlist_sff_proc_fops); 535 547 } 536 548 537 549 /* 538 550 * can_remove_proc - remove procfs entries and main CAN proc directory 539 551 */ 540 - void can_remove_proc(void) 552 + void can_remove_proc(struct net *net) 541 553 { 542 - if (pde_version) 543 - can_remove_proc_readentry(CAN_PROC_VERSION); 554 + if (net->can.pde_version) 555 + remove_proc_entry(CAN_PROC_VERSION, net->can.proc_dir); 544 556 545 - if (pde_stats) 546 - can_remove_proc_readentry(CAN_PROC_STATS); 557 + if (net->can.pde_stats) 558 + remove_proc_entry(CAN_PROC_STATS, net->can.proc_dir); 547 559 548 - if (pde_reset_stats) 549 - can_remove_proc_readentry(CAN_PROC_RESET_STATS); 560 + if (net->can.pde_reset_stats) 561 + remove_proc_entry(CAN_PROC_RESET_STATS, net->can.proc_dir); 550 562 551 - if (pde_rcvlist_err) 552 - can_remove_proc_readentry(CAN_PROC_RCVLIST_ERR); 563 + if (net->can.pde_rcvlist_err) 564 + remove_proc_entry(CAN_PROC_RCVLIST_ERR, net->can.proc_dir); 553 565 554 - if (pde_rcvlist_all) 555 - can_remove_proc_readentry(CAN_PROC_RCVLIST_ALL); 566 + if (net->can.pde_rcvlist_all) 567 + remove_proc_entry(CAN_PROC_RCVLIST_ALL, net->can.proc_dir); 556 568 557 - if (pde_rcvlist_fil) 558 - can_remove_proc_readentry(CAN_PROC_RCVLIST_FIL); 569 + if (net->can.pde_rcvlist_fil) 570 + remove_proc_entry(CAN_PROC_RCVLIST_FIL, net->can.proc_dir); 559 571 560 - if (pde_rcvlist_inv) 561 - can_remove_proc_readentry(CAN_PROC_RCVLIST_INV); 572 + if (net->can.pde_rcvlist_inv) 573 + remove_proc_entry(CAN_PROC_RCVLIST_INV, net->can.proc_dir); 562 574 563 - if (pde_rcvlist_eff) 564 - can_remove_proc_readentry(CAN_PROC_RCVLIST_EFF); 575 + if (net->can.pde_rcvlist_eff) 576 + remove_proc_entry(CAN_PROC_RCVLIST_EFF, net->can.proc_dir); 565 577 566 - if (pde_rcvlist_sff) 567 - can_remove_proc_readentry(CAN_PROC_RCVLIST_SFF); 578 + if (net->can.pde_rcvlist_sff) 579 + remove_proc_entry(CAN_PROC_RCVLIST_SFF, net->can.proc_dir); 568 580 569 - if (can_dir) 570 - remove_proc_entry("can", init_net.proc_net); 581 + if (net->can.proc_dir) 582 + remove_proc_entry("can", net->proc_net); 571 583 }
+52 -40
net/can/raw.c
··· 181 181 kfree_skb(skb); 182 182 } 183 183 184 - static int raw_enable_filters(struct net_device *dev, struct sock *sk, 185 - struct can_filter *filter, int count) 184 + static int raw_enable_filters(struct net *net, struct net_device *dev, 185 + struct sock *sk, struct can_filter *filter, 186 + int count) 186 187 { 187 188 int err = 0; 188 189 int i; 189 190 190 191 for (i = 0; i < count; i++) { 191 - err = can_rx_register(dev, filter[i].can_id, 192 + err = can_rx_register(net, dev, filter[i].can_id, 192 193 filter[i].can_mask, 193 194 raw_rcv, sk, "raw", sk); 194 195 if (err) { 195 196 /* clean up successfully registered filters */ 196 197 while (--i >= 0) 197 - can_rx_unregister(dev, filter[i].can_id, 198 + can_rx_unregister(net, dev, filter[i].can_id, 198 199 filter[i].can_mask, 199 200 raw_rcv, sk); 200 201 break; ··· 205 204 return err; 206 205 } 207 206 208 - static int raw_enable_errfilter(struct net_device *dev, struct sock *sk, 209 - can_err_mask_t err_mask) 207 + static int raw_enable_errfilter(struct net *net, struct net_device *dev, 208 + struct sock *sk, can_err_mask_t err_mask) 210 209 { 211 210 int err = 0; 212 211 213 212 if (err_mask) 214 - err = can_rx_register(dev, 0, err_mask | CAN_ERR_FLAG, 213 + err = can_rx_register(net, dev, 0, err_mask | CAN_ERR_FLAG, 215 214 raw_rcv, sk, "raw", sk); 216 215 217 216 return err; 218 217 } 219 218 220 - static void raw_disable_filters(struct net_device *dev, struct sock *sk, 221 - struct can_filter *filter, int count) 219 + static void raw_disable_filters(struct net *net, struct net_device *dev, 220 + struct sock *sk, struct can_filter *filter, 221 + int count) 222 222 { 223 223 int i; 224 224 225 225 for (i = 0; i < count; i++) 226 - can_rx_unregister(dev, filter[i].can_id, filter[i].can_mask, 227 - raw_rcv, sk); 226 + can_rx_unregister(net, dev, filter[i].can_id, 227 + filter[i].can_mask, raw_rcv, sk); 228 228 } 229 229 230 - static inline void raw_disable_errfilter(struct net_device *dev, 230 + static inline void raw_disable_errfilter(struct net *net, 231 + struct net_device *dev, 231 232 struct sock *sk, 232 233 can_err_mask_t err_mask) 233 234 234 235 { 235 236 if (err_mask) 236 - can_rx_unregister(dev, 0, err_mask | CAN_ERR_FLAG, 237 + can_rx_unregister(net, dev, 0, err_mask | CAN_ERR_FLAG, 237 238 raw_rcv, sk); 238 239 } 239 240 240 - static inline void raw_disable_allfilters(struct net_device *dev, 241 + static inline void raw_disable_allfilters(struct net *net, 242 + struct net_device *dev, 241 243 struct sock *sk) 242 244 { 243 245 struct raw_sock *ro = raw_sk(sk); 244 246 245 - raw_disable_filters(dev, sk, ro->filter, ro->count); 246 - raw_disable_errfilter(dev, sk, ro->err_mask); 247 + raw_disable_filters(net, dev, sk, ro->filter, ro->count); 248 + raw_disable_errfilter(net, dev, sk, ro->err_mask); 247 249 } 248 250 249 - static int raw_enable_allfilters(struct net_device *dev, struct sock *sk) 251 + static int raw_enable_allfilters(struct net *net, struct net_device *dev, 252 + struct sock *sk) 250 253 { 251 254 struct raw_sock *ro = raw_sk(sk); 252 255 int err; 253 256 254 - err = raw_enable_filters(dev, sk, ro->filter, ro->count); 257 + err = raw_enable_filters(net, dev, sk, ro->filter, ro->count); 255 258 if (!err) { 256 - err = raw_enable_errfilter(dev, sk, ro->err_mask); 259 + err = raw_enable_errfilter(net, dev, sk, ro->err_mask); 257 260 if (err) 258 - raw_disable_filters(dev, sk, ro->filter, ro->count); 261 + raw_disable_filters(net, dev, sk, ro->filter, 262 + ro->count); 259 263 } 260 264 261 265 return err; ··· 273 267 struct raw_sock *ro = container_of(nb, struct raw_sock, notifier); 274 268 struct sock *sk = &ro->sk; 275 269 276 - if (!net_eq(dev_net(dev), &init_net)) 270 + if (!net_eq(dev_net(dev), sock_net(sk))) 277 271 return NOTIFY_DONE; 278 272 279 273 if (dev->type != ARPHRD_CAN) ··· 288 282 lock_sock(sk); 289 283 /* remove current filters & unregister */ 290 284 if (ro->bound) 291 - raw_disable_allfilters(dev, sk); 285 + raw_disable_allfilters(dev_net(dev), dev, sk); 292 286 293 287 if (ro->count > 1) 294 288 kfree(ro->filter); ··· 364 358 if (ro->ifindex) { 365 359 struct net_device *dev; 366 360 367 - dev = dev_get_by_index(&init_net, ro->ifindex); 361 + dev = dev_get_by_index(sock_net(sk), ro->ifindex); 368 362 if (dev) { 369 - raw_disable_allfilters(dev, sk); 363 + raw_disable_allfilters(dev_net(dev), dev, sk); 370 364 dev_put(dev); 371 365 } 372 366 } else 373 - raw_disable_allfilters(NULL, sk); 367 + raw_disable_allfilters(sock_net(sk), NULL, sk); 374 368 } 375 369 376 370 if (ro->count > 1) ··· 410 404 if (addr->can_ifindex) { 411 405 struct net_device *dev; 412 406 413 - dev = dev_get_by_index(&init_net, addr->can_ifindex); 407 + dev = dev_get_by_index(sock_net(sk), addr->can_ifindex); 414 408 if (!dev) { 415 409 err = -ENODEV; 416 410 goto out; ··· 426 420 ifindex = dev->ifindex; 427 421 428 422 /* filters set by default/setsockopt */ 429 - err = raw_enable_allfilters(dev, sk); 423 + err = raw_enable_allfilters(sock_net(sk), dev, sk); 430 424 dev_put(dev); 431 425 } else { 432 426 ifindex = 0; 433 427 434 428 /* filters set by default/setsockopt */ 435 - err = raw_enable_allfilters(NULL, sk); 429 + err = raw_enable_allfilters(sock_net(sk), NULL, sk); 436 430 } 437 431 438 432 if (!err) { ··· 441 435 if (ro->ifindex) { 442 436 struct net_device *dev; 443 437 444 - dev = dev_get_by_index(&init_net, ro->ifindex); 438 + dev = dev_get_by_index(sock_net(sk), 439 + ro->ifindex); 445 440 if (dev) { 446 - raw_disable_allfilters(dev, sk); 441 + raw_disable_allfilters(dev_net(dev), 442 + dev, sk); 447 443 dev_put(dev); 448 444 } 449 445 } else 450 - raw_disable_allfilters(NULL, sk); 446 + raw_disable_allfilters(sock_net(sk), NULL, sk); 451 447 } 452 448 ro->ifindex = ifindex; 453 449 ro->bound = 1; ··· 525 517 lock_sock(sk); 526 518 527 519 if (ro->bound && ro->ifindex) 528 - dev = dev_get_by_index(&init_net, ro->ifindex); 520 + dev = dev_get_by_index(sock_net(sk), ro->ifindex); 529 521 530 522 if (ro->bound) { 531 523 /* (try to) register the new filters */ 532 524 if (count == 1) 533 - err = raw_enable_filters(dev, sk, &sfilter, 1); 525 + err = raw_enable_filters(sock_net(sk), dev, sk, 526 + &sfilter, 1); 534 527 else 535 - err = raw_enable_filters(dev, sk, filter, 536 - count); 528 + err = raw_enable_filters(sock_net(sk), dev, sk, 529 + filter, count); 537 530 if (err) { 538 531 if (count > 1) 539 532 kfree(filter); ··· 542 533 } 543 534 544 535 /* remove old filter registrations */ 545 - raw_disable_filters(dev, sk, ro->filter, ro->count); 536 + raw_disable_filters(sock_net(sk), dev, sk, ro->filter, 537 + ro->count); 546 538 } 547 539 548 540 /* remove old filter space */ ··· 579 569 lock_sock(sk); 580 570 581 571 if (ro->bound && ro->ifindex) 582 - dev = dev_get_by_index(&init_net, ro->ifindex); 572 + dev = dev_get_by_index(sock_net(sk), ro->ifindex); 583 573 584 574 /* remove current error mask */ 585 575 if (ro->bound) { 586 576 /* (try to) register the new err_mask */ 587 - err = raw_enable_errfilter(dev, sk, err_mask); 577 + err = raw_enable_errfilter(sock_net(sk), dev, sk, 578 + err_mask); 588 579 589 580 if (err) 590 581 goto out_err; 591 582 592 583 /* remove old err_mask registration */ 593 - raw_disable_errfilter(dev, sk, ro->err_mask); 584 + raw_disable_errfilter(sock_net(sk), dev, sk, 585 + ro->err_mask); 594 586 } 595 587 596 588 /* link new err_mask to the socket */ ··· 753 741 return -EINVAL; 754 742 } 755 743 756 - dev = dev_get_by_index(&init_net, ifindex); 744 + dev = dev_get_by_index(sock_net(sk), ifindex); 757 745 if (!dev) 758 746 return -ENXIO; 759 747