ohci1394: clean up asynchronous and physical request filters programming

Various cleanups of how ohci1394 programs AsynchronousRequestFilter,
PhysicalRequestFilter, and physUpperBoundOffset. In particular, do not
rewrite registers within the bus reset interrupt handler if bus resets
do not affect the registers in the first place.

Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Signed-off-by: Jody McIntyre <scjody@modernduck.com>

authored by

Stefan Richter and committed by
Jody McIntyre
180a4304 c1d08eb6

+19 -18
+19 -18
drivers/ieee1394/ohci1394.c
··· 544 /* Initialize IR Legacy DMA channel mask */ 545 ohci->ir_legacy_channels = 0; 546 547 - /* 548 - * Accept AT requests from all nodes. This probably 549 - * will have to be controlled from the subsystem 550 - * on a per node basis. 551 - */ 552 - reg_write(ohci,OHCI1394_AsReqFilterHiSet, 0x80000000); 553 554 /* Specify AT retries */ 555 reg_write(ohci, OHCI1394_ATRetries, ··· 2523 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset); 2524 spin_unlock_irqrestore(&ohci->event_lock, flags); 2525 2526 - /* Accept Physical requests from all nodes. */ 2527 - reg_write(ohci,OHCI1394_AsReqFilterHiSet, 0xffffffff); 2528 - reg_write(ohci,OHCI1394_AsReqFilterLoSet, 0xffffffff); 2529 - 2530 /* Turn on phys dma reception. 2531 * 2532 * TODO: Enable some sort of filtering management. 2533 */ 2534 if (phys_dma) { 2535 - reg_write(ohci,OHCI1394_PhyReqFilterHiSet, 0xffffffff); 2536 - reg_write(ohci,OHCI1394_PhyReqFilterLoSet, 0xffffffff); 2537 - reg_write(ohci,OHCI1394_PhyUpperBound, 0xffff0000); 2538 - } else { 2539 - reg_write(ohci,OHCI1394_PhyReqFilterHiSet, 0x00000000); 2540 - reg_write(ohci,OHCI1394_PhyReqFilterLoSet, 0x00000000); 2541 } 2542 2543 DBGMSG("PhyReqFilter=%08x%08x", 2544 - reg_read(ohci,OHCI1394_PhyReqFilterHiSet), 2545 - reg_read(ohci,OHCI1394_PhyReqFilterLoSet)); 2546 2547 hpsb_selfid_complete(host, phyid, isroot); 2548 } else
··· 544 /* Initialize IR Legacy DMA channel mask */ 545 ohci->ir_legacy_channels = 0; 546 547 + /* Accept AR requests from all nodes */ 548 + reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); 549 + 550 + /* Set the address range of the physical response unit. 551 + * Most controllers do not implement it as a writable register though. 552 + * They will keep a hardwired offset of 0x00010000 and show 0x0 as 553 + * register content. 554 + * To actually enable physical responses is the job of our interrupt 555 + * handler which programs the physical request filter. */ 556 + reg_write(ohci, OHCI1394_PhyUpperBound, 0xffff0000); 557 + 558 + DBGMSG("physUpperBoundOffset=%08x", 559 + reg_read(ohci, OHCI1394_PhyUpperBound)); 560 561 /* Specify AT retries */ 562 reg_write(ohci, OHCI1394_ATRetries, ··· 2516 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset); 2517 spin_unlock_irqrestore(&ohci->event_lock, flags); 2518 2519 /* Turn on phys dma reception. 2520 * 2521 * TODO: Enable some sort of filtering management. 2522 */ 2523 if (phys_dma) { 2524 + reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 2525 + 0xffffffff); 2526 + reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 2527 + 0xffffffff); 2528 } 2529 2530 DBGMSG("PhyReqFilter=%08x%08x", 2531 + reg_read(ohci, OHCI1394_PhyReqFilterHiSet), 2532 + reg_read(ohci, OHCI1394_PhyReqFilterLoSet)); 2533 2534 hpsb_selfid_complete(host, phyid, isroot); 2535 } else