Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

firmware: qcom: scm: add support for SHM bridge operations

SHM Bridge is a safety mechanism allowing to limit the amount of memory
shared between the kernel and the TrustZone to regions explicitly marked
as such.

Add low-level primitives for enabling SHM bridge support as well as
creating and destroying SHM bridges to qcom-scm.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Andrew Halaney <ahalaney@redhat.com>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sc8280xp-lenovo-thinkpad-x13s
Tested-by: Deepti Jaggi <quic_djaggi@quicinc.com> #sa8775p-ride
Reviewed-by: Elliot Berman <quic_eberman@quicinc.com>
Link: https://lore.kernel.org/r/20240527-shm-bridge-v10-10-ce7afaa58d3a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Bartosz Golaszewski and committed by
Bjorn Andersson
178e19c0 6612103e

+69
+60
drivers/firmware/qcom/qcom_scm.c
··· 1343 1343 } 1344 1344 EXPORT_SYMBOL_GPL(qcom_scm_lmh_dcvsh_available); 1345 1345 1346 + int qcom_scm_shm_bridge_enable(void) 1347 + { 1348 + struct qcom_scm_desc desc = { 1349 + .svc = QCOM_SCM_SVC_MP, 1350 + .cmd = QCOM_SCM_MP_SHM_BRIDGE_ENABLE, 1351 + .owner = ARM_SMCCC_OWNER_SIP 1352 + }; 1353 + 1354 + struct qcom_scm_res res; 1355 + 1356 + if (!__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_MP, 1357 + QCOM_SCM_MP_SHM_BRIDGE_ENABLE)) 1358 + return -EOPNOTSUPP; 1359 + 1360 + return qcom_scm_call(__scm->dev, &desc, &res) ?: res.result[0]; 1361 + } 1362 + EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_enable); 1363 + 1364 + int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags, 1365 + u64 ipfn_and_s_perm_flags, u64 size_and_flags, 1366 + u64 ns_vmids, u64 *handle) 1367 + { 1368 + struct qcom_scm_desc desc = { 1369 + .svc = QCOM_SCM_SVC_MP, 1370 + .cmd = QCOM_SCM_MP_SHM_BRIDGE_CREATE, 1371 + .owner = ARM_SMCCC_OWNER_SIP, 1372 + .args[0] = pfn_and_ns_perm_flags, 1373 + .args[1] = ipfn_and_s_perm_flags, 1374 + .args[2] = size_and_flags, 1375 + .args[3] = ns_vmids, 1376 + .arginfo = QCOM_SCM_ARGS(4, QCOM_SCM_VAL, QCOM_SCM_VAL, 1377 + QCOM_SCM_VAL, QCOM_SCM_VAL), 1378 + }; 1379 + 1380 + struct qcom_scm_res res; 1381 + int ret; 1382 + 1383 + ret = qcom_scm_call(__scm->dev, &desc, &res); 1384 + 1385 + if (handle && !ret) 1386 + *handle = res.result[1]; 1387 + 1388 + return ret ?: res.result[0]; 1389 + } 1390 + EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_create); 1391 + 1392 + int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle) 1393 + { 1394 + struct qcom_scm_desc desc = { 1395 + .svc = QCOM_SCM_SVC_MP, 1396 + .cmd = QCOM_SCM_MP_SHM_BRIDGE_DELETE, 1397 + .owner = ARM_SMCCC_OWNER_SIP, 1398 + .args[0] = handle, 1399 + .arginfo = QCOM_SCM_ARGS(1, QCOM_SCM_VAL), 1400 + }; 1401 + 1402 + return qcom_scm_call(__scm->dev, &desc, NULL); 1403 + } 1404 + EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_delete); 1405 + 1346 1406 int qcom_scm_lmh_profile_change(u32 profile_id) 1347 1407 { 1348 1408 struct qcom_scm_desc desc = {
+3
drivers/firmware/qcom/qcom_scm.h
··· 116 116 #define QCOM_SCM_MP_IOMMU_SET_CP_POOL_SIZE 0x05 117 117 #define QCOM_SCM_MP_VIDEO_VAR 0x08 118 118 #define QCOM_SCM_MP_ASSIGN 0x16 119 + #define QCOM_SCM_MP_SHM_BRIDGE_ENABLE 0x1c 120 + #define QCOM_SCM_MP_SHM_BRIDGE_DELETE 0x1d 121 + #define QCOM_SCM_MP_SHM_BRIDGE_CREATE 0x1e 119 122 120 123 #define QCOM_SCM_SVC_OCMEM 0x0f 121 124 #define QCOM_SCM_OCMEM_LOCK_CMD 0x01
+6
include/linux/firmware/qcom/qcom_scm.h
··· 138 138 139 139 int qcom_scm_gpu_init_regs(u32 gpu_req); 140 140 141 + int qcom_scm_shm_bridge_enable(void); 142 + int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags, 143 + u64 ipfn_and_s_perm_flags, u64 size_and_flags, 144 + u64 ns_vmids, u64 *handle); 145 + int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle); 146 + 141 147 #ifdef CONFIG_QCOM_QSEECOM 142 148 143 149 int qcom_scm_qseecom_app_get_id(const char *app_name, u32 *app_id);