ARM: dts: Add support for dra762 abz package

dra762 abz package is pin compatible with dra742 and few peripherals
like DDR with upgraded speed. Add dt support for this SoC.

Reported-by: Praneeth Bajjuri <[e-mail]>
Tested-by: Praneeth Bajjuri <[e-mail]>
Signed-off-by: Lokesh Vutla <[e-mail]>
[khilman: forward port from ti-linux-5.4.y]
Signed-off-by: Kevin Hilman <[e-mail]>
Signed-off-by: Tony Lindgren <[e-mail]>

arch/arm/boot/dts/am5748.dtsi

···
  * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
  */
 
-#include "dra76x.dtsi"
+#include "dra74x-p.dtsi"
 #include "am57-pruss.dtsi"
 
 / {
···
  */
 
 &usb3_tm {
-	status = "disabled";
-};
-
-&usb4_tm {
 	status = "disabled";
 };
 

arch/arm/boot/dts/am574x-idk.dts

···
 	pinctrl-2 = <&mmc2_pins_default>;
 };
 
-&m_can0 {
-	status = "disabled";
-};
-
 &emif1 {
 	status = "okay";
 };

arch/arm/boot/dts/dra74x-p.dtsi

···
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "dra74x.dtsi"
+
+/ {
+	compatible = "ti,dra762", "ti,dra7";
+
+	ocp {
+		emif1: emif@4c000000 {
+			compatible = "ti,emif-dra7xx";
+			reg = <0x4c000000 0x200>;
+			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+	};
+};
+
+/* MCAN interrupts are hard-wired to irqs 67, 68 */
+&crossbar_mpu {
+	ti,irqs-skip = <10 67 68 133 139 140>;
+};

arch/arm/boot/dts/dra76x.dtsi

···
 	compatible = "ti,dra762", "ti,dra7";
 
 	ocp {
-		emif1: emif@4c000000 {
-			compatible = "ti,emif-dra7xx";
-			reg = <0x4c000000 0x200>;
-			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
 		target-module@42c01900 {
 			compatible = "ti,sysc-dra7-mcan", "ti,sysc";
 			ranges = <0x0 0x42c00000 0x2000>;
···
 			};
 		};
 	};
-};
-
-/* MCAN interrupts are hard-wired to irqs 67, 68 */
-&crossbar_mpu {
-	ti,irqs-skip = <10 67 68 133 139 140>;
 };
 
 &scm_conf_clocks {