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Merge tag 'pinctrl-v5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:
"Some early fixes collected during the first week after the merge
window, all pretty self-evident, with the details below. The revert is
the crucial thing.

- Fix a warning on the Qualcomm SPMI GPIO chip being instatiated
twice without a unique irqchip struct

- Use the noirq variants of the suspend and resume callbacks in the
Tegra driver

- Clean up the errorpath on the MCP23s08 driver

- Revert the use of devm_of_iomap() in the Freescale driver as it was
regressing the platform

- Add some missing pins in the Qualcomm IPQ6018 driver

- Fix a simple documentation bug in the pinctrl-single driver"

* tag 'pinctrl-v5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: single: fix function name in documentation
pinctrl: qcom: ipq6018 Add missing pins in qpic pin group
Revert "pinctrl: freescale: imx: Use 'devm_of_iomap()' to avoid a resource leak in case of error in 'imx_pinctrl_probe()'"
pinctrl: mcp23s08: Split to three parts: fix ptr_ret.cocci warnings
pinctrl: tegra: Use noirq suspend/resume callbacks
pinctrl: qcom: spmi-gpio: fix warning about irq chip reusage

+19 -23
+3 -4
drivers/pinctrl/freescale/pinctrl-imx.c
··· 824 824 return -EINVAL; 825 825 } 826 826 827 - ipctl->input_sel_base = devm_of_iomap(&pdev->dev, np, 828 - 0, NULL); 827 + ipctl->input_sel_base = of_iomap(np, 0); 829 828 of_node_put(np); 830 - if (IS_ERR(ipctl->input_sel_base)) { 829 + if (!ipctl->input_sel_base) { 831 830 dev_err(&pdev->dev, 832 831 "iomuxc input select base address not found\n"); 833 - return PTR_ERR(ipctl->input_sel_base); 832 + return -ENOMEM; 834 833 } 835 834 } 836 835 }
+1 -4
drivers/pinctrl/pinctrl-mcp23s08_spi.c
··· 126 126 copy->name = name; 127 127 128 128 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp, copy); 129 - if (IS_ERR(mcp->regmap)) 130 - return PTR_ERR(mcp->regmap); 131 - 132 - return 0; 129 + return PTR_ERR_OR_ZERO(mcp->regmap); 133 130 } 134 131 135 132 static int mcp23s08_probe(struct spi_device *spi)
+1 -1
drivers/pinctrl/pinctrl-single.c
··· 958 958 } 959 959 960 960 /** 961 - * smux_parse_one_pinctrl_entry() - parses a device tree mux entry 961 + * pcs_parse_one_pinctrl_entry() - parses a device tree mux entry 962 962 * @pctldev: pin controller device 963 963 * @pcs: pinctrl driver instance 964 964 * @np: device node of the mux entry
+2 -1
drivers/pinctrl/qcom/pinctrl-ipq6018.c
··· 367 367 368 368 static const char * const qpic_pad_groups[] = { 369 369 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio9", "gpio10", 370 - "gpio11", "gpio17", 370 + "gpio11", "gpio17", "gpio15", "gpio12", "gpio13", "gpio14", "gpio5", 371 + "gpio6", "gpio7", "gpio8", 371 372 }; 372 373 373 374 static const char * const burn0_groups[] = {
+10 -11
drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
··· 170 170 struct regmap *map; 171 171 struct pinctrl_dev *ctrl; 172 172 struct gpio_chip chip; 173 + struct irq_chip irq; 173 174 }; 174 175 175 176 static const struct pinconf_generic_params pmic_gpio_bindings[] = { ··· 918 917 return 0; 919 918 } 920 919 921 - static struct irq_chip pmic_gpio_irq_chip = { 922 - .name = "spmi-gpio", 923 - .irq_ack = irq_chip_ack_parent, 924 - .irq_mask = irq_chip_mask_parent, 925 - .irq_unmask = irq_chip_unmask_parent, 926 - .irq_set_type = irq_chip_set_type_parent, 927 - .irq_set_wake = irq_chip_set_wake_parent, 928 - .flags = IRQCHIP_MASK_ON_SUSPEND, 929 - }; 930 - 931 920 static int pmic_gpio_domain_translate(struct irq_domain *domain, 932 921 struct irq_fwspec *fwspec, 933 922 unsigned long *hwirq, ··· 1044 1053 if (!parent_domain) 1045 1054 return -ENXIO; 1046 1055 1056 + state->irq.name = "spmi-gpio", 1057 + state->irq.irq_ack = irq_chip_ack_parent, 1058 + state->irq.irq_mask = irq_chip_mask_parent, 1059 + state->irq.irq_unmask = irq_chip_unmask_parent, 1060 + state->irq.irq_set_type = irq_chip_set_type_parent, 1061 + state->irq.irq_set_wake = irq_chip_set_wake_parent, 1062 + state->irq.flags = IRQCHIP_MASK_ON_SUSPEND, 1063 + 1047 1064 girq = &state->chip.irq; 1048 - girq->chip = &pmic_gpio_irq_chip; 1065 + girq->chip = &state->irq; 1049 1066 girq->default_type = IRQ_TYPE_NONE; 1050 1067 girq->handler = handle_level_irq; 1051 1068 girq->fwnode = of_node_to_fwnode(state->dev->of_node);
+2 -2
drivers/pinctrl/tegra/pinctrl-tegra.c
··· 731 731 } 732 732 733 733 const struct dev_pm_ops tegra_pinctrl_pm = { 734 - .suspend = &tegra_pinctrl_suspend, 735 - .resume = &tegra_pinctrl_resume 734 + .suspend_noirq = &tegra_pinctrl_suspend, 735 + .resume_noirq = &tegra_pinctrl_resume 736 736 }; 737 737 738 738 static bool tegra_pinctrl_gpio_node_has_range(struct tegra_pmx *pmx)