Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915/vdsc: Check slice design requirement

Add function to check if slice design requirements are being
met as defined in Bspec: 49259 in the section
Slice Design Requirement

--v7
-remove full bspec link [Jani]
-rename intel_dsc_check_slice_design_req to
intel_dsc_slice_dimensions_valid [Jani]

--v8
-fix condition to check if slice width and height are
of two
-fix minimum pixel in slice condition

--v10
-condition should be < rather then >= [Uma]

Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230309062855.393087-7-suraj.kandpal@intel.com

authored by

Suraj Kandpal and committed by
Uma Shankar
16e7a0db 9aeabe19

+32
+32
drivers/gpu/drm/i915/display/intel_vdsc.c
··· 448 448 } 449 449 } 450 450 451 + static int intel_dsc_slice_dimensions_valid(struct intel_crtc_state *pipe_config, 452 + struct drm_dsc_config *vdsc_cfg) 453 + { 454 + if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_RGB || 455 + pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) { 456 + if (vdsc_cfg->slice_height > 4095) 457 + return -EINVAL; 458 + if (vdsc_cfg->slice_height * vdsc_cfg->slice_width < 15000) 459 + return -EINVAL; 460 + } else if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) { 461 + if (vdsc_cfg->slice_width % 2) 462 + return -EINVAL; 463 + if (vdsc_cfg->slice_height % 2) 464 + return -EINVAL; 465 + if (vdsc_cfg->slice_height > 4094) 466 + return -EINVAL; 467 + if (vdsc_cfg->slice_height * vdsc_cfg->slice_width < 30000) 468 + return -EINVAL; 469 + } 470 + 471 + return 0; 472 + } 473 + 451 474 int intel_dsc_compute_params(struct intel_crtc_state *pipe_config) 452 475 { 453 476 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); ··· 479 456 u16 compressed_bpp = pipe_config->dsc.compressed_bpp; 480 457 const struct rc_parameters *rc_params; 481 458 struct rc_parameters *rc = NULL; 459 + int err; 482 460 u8 i = 0; 483 461 484 462 vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay; 485 463 vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width, 486 464 pipe_config->dsc.slice_count); 465 + 466 + err = intel_dsc_slice_dimensions_valid(pipe_config, vdsc_cfg); 467 + 468 + if (err) { 469 + drm_dbg_kms(&dev_priv->drm, "Slice dimension requirements not met\n"); 470 + return err; 471 + } 472 + 487 473 /* 488 474 * According to DSC 1.2 specs if colorspace is YCbCr then convert_rgb is 0 489 475 * else 1