Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

KVM: x86/mmu: Rename "nxe" role bit to "efer_nx" for macro shenanigans

Rename "nxe" to "efer_nx" so that future macro magic can use the pattern
<reg>_<bit> for all CR0, CR4, and EFER bits that included in the role.
Using "efer_nx" also makes it clear that the role bit reflects EFER.NX,
not the NX bit in the corresponding PTE.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20210622175739.3610207-25-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

authored by

Sean Christopherson and committed by
Paolo Bonzini
167f8a5c 8626c120

+8 -8
+2 -2
Documentation/virt/kvm/mmu.rst
··· 180 180 role.gpte_is_8_bytes: 181 181 Reflects the size of the guest PTE for which the page is valid, i.e. '1' 182 182 if 64-bit gptes are in use, '0' if 32-bit gptes are in use. 183 - role.nxe: 184 - Contains the value of efer.nxe for which the page is valid. 183 + role.efer_nx: 184 + Contains the value of efer.nx for which the page is valid. 185 185 role.cr0_wp: 186 186 Contains the value of cr0.wp for which the page is valid. 187 187 role.smep_andnot_wp:
+2 -2
arch/x86/include/asm/kvm_host.h
··· 274 274 * by indirect shadow page can not be more than 15 bits. 275 275 * 276 276 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 277 - * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 277 + * @efer_nx, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 278 278 */ 279 279 union kvm_mmu_page_role { 280 280 u32 word; ··· 285 285 unsigned direct:1; 286 286 unsigned access:3; 287 287 unsigned invalid:1; 288 - unsigned nxe:1; 288 + unsigned efer_nx:1; 289 289 unsigned cr0_wp:1; 290 290 unsigned smep_andnot_wp:1; 291 291 unsigned smap_andnot_wp:1;
+1 -1
arch/x86/kvm/mmu/mmu.c
··· 4567 4567 union kvm_mmu_role role = {0}; 4568 4568 4569 4569 role.base.access = ACC_ALL; 4570 - role.base.nxe = ____is_efer_nx(regs); 4570 + role.base.efer_nx = ____is_efer_nx(regs); 4571 4571 role.base.cr0_wp = ____is_cr0_wp(regs); 4572 4572 role.base.smm = is_smm(vcpu); 4573 4573 role.base.guest_mode = is_guest_mode(vcpu);
+1 -1
arch/x86/kvm/mmu/mmutrace.h
··· 40 40 role.direct ? " direct" : "", \ 41 41 access_str[role.access], \ 42 42 role.invalid ? " invalid" : "", \ 43 - role.nxe ? "" : "!", \ 43 + role.efer_nx ? "" : "!", \ 44 44 role.ad_disabled ? "!" : "", \ 45 45 __entry->root_count, \ 46 46 __entry->unsync ? "unsync" : "sync", 0); \
+2 -2
tools/lib/traceevent/plugins/plugin_kvm.c
··· 366 366 unsigned direct:1; 367 367 unsigned access:3; 368 368 unsigned invalid:1; 369 - unsigned nxe:1; 369 + unsigned efer_nx:1; 370 370 unsigned cr0_wp:1; 371 371 unsigned smep_and_not_wp:1; 372 372 unsigned smap_and_not_wp:1; ··· 403 403 access_str[role.access], 404 404 role.invalid ? " invalid" : "", 405 405 role.cr4_pae ? "" : "!", 406 - role.nxe ? "" : "!", 406 + role.efer_nx ? "" : "!", 407 407 role.cr0_wp ? "" : "!", 408 408 role.smep_and_not_wp ? " smep" : "", 409 409 role.smap_and_not_wp ? " smap" : "",