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ARM: 6700/1: SPEAr: Correct SOC config base address for spear320
SPEAR320_SOC_CONFIG_BASE was wrong, causing the wrong registers to be
accessed.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
authored by viresh kumar and committed by Russell King 167879ae b8272a61
+1
-1
arch/arm/mach-spear3xx/include/mach/spear320.h
+1
-1
arch/arm/mach-spear3xx/include/mach/spear320.h
···
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#define SPEAR320_SMII1_BASE 0xAB000000
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#define SPEAR320_SMII1_SIZE 0x01000000
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-
#define SPEAR320_SOC_CONFIG_BASE 0xB4000000
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+
#define SPEAR320_SOC_CONFIG_BASE 0xB3000000
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#define SPEAR320_SOC_CONFIG_SIZE 0x00000070
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/* Interrupt registers offsets and masks */
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#define INT_STS_MASK_REG 0x04