tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

tree-wide: use reinit_completion instead of INIT_COMPLETION

Use this new function to make code more comprehensible, since we are
reinitialzing the completion, not initializing.

[akpm@linux-foundation.org: linux-next resyncs]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13)
Cc: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Wolfram Sang and committed by
Linus Torvalds 16735d02 c32f74ab

+138 -138
+1 -1
arch/arm/mach-tegra/apbio.c
··· 114 114 dma_desc->callback = apb_dma_complete; 115 115 dma_desc->callback_param = NULL; 116 116 117 - INIT_COMPLETION(tegra_apb_wait); 117 + reinit_completion(&tegra_apb_wait); 118 118 119 119 dmaengine_submit(dma_desc); 120 120 dma_async_issue_pending(tegra_apb_dma_chan);
+3 -3
arch/powerpc/platforms/powermac/low_i2c.c
··· 452 452 */ 453 453 if (use_irq) { 454 454 /* Clear completion */ 455 - INIT_COMPLETION(host->complete); 455 + reinit_completion(&host->complete); 456 456 /* Ack stale interrupts */ 457 457 kw_write_reg(reg_isr, kw_read_reg(reg_isr)); 458 458 /* Arm timeout */ ··· 717 717 return -EINVAL; 718 718 } 719 719 720 - INIT_COMPLETION(comp); 720 + reinit_completion(&comp); 721 721 req->data[0] = PMU_I2C_CMD; 722 722 req->reply[0] = 0xff; 723 723 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1; ··· 748 748 749 749 hdr->bus = PMU_I2C_BUS_STATUS; 750 750 751 - INIT_COMPLETION(comp); 751 + reinit_completion(&comp); 752 752 req->data[0] = PMU_I2C_CMD; 753 753 req->reply[0] = 0xff; 754 754 req->nbytes = 2;
+1 -1
arch/powerpc/platforms/pseries/suspend.c
··· 106 106 atomic_set(&suspend_data.done, 0); 107 107 atomic_set(&suspend_data.error, 0); 108 108 suspend_data.complete = &suspend_work; 109 - INIT_COMPLETION(suspend_work); 109 + reinit_completion(&suspend_work); 110 110 return 0; 111 111 } 112 112
+1 -1
crypto/af_alg.c
··· 434 434 case -EINPROGRESS: 435 435 case -EBUSY: 436 436 wait_for_completion(&completion->completion); 437 - INIT_COMPLETION(completion->completion); 437 + reinit_completion(&completion->completion); 438 438 err = completion->err; 439 439 break; 440 440 };
+2 -2
crypto/tcrypt.c
··· 493 493 ret = wait_for_completion_interruptible(&tr->completion); 494 494 if (!ret) 495 495 ret = tr->err; 496 - INIT_COMPLETION(tr->completion); 496 + reinit_completion(&tr->completion); 497 497 } 498 498 return ret; 499 499 } ··· 721 721 ret = wait_for_completion_interruptible(&tr->completion); 722 722 if (!ret) 723 723 ret = tr->err; 724 - INIT_COMPLETION(tr->completion); 724 + reinit_completion(&tr->completion); 725 725 } 726 726 727 727 return ret;
+6 -6
crypto/testmgr.c
··· 179 179 ret = wait_for_completion_interruptible(&tr->completion); 180 180 if (!ret) 181 181 ret = tr->err; 182 - INIT_COMPLETION(tr->completion); 182 + reinit_completion(&tr->completion); 183 183 } 184 184 return ret; 185 185 } ··· 336 336 ret = wait_for_completion_interruptible( 337 337 &tresult.completion); 338 338 if (!ret && !(ret = tresult.err)) { 339 - INIT_COMPLETION(tresult.completion); 339 + reinit_completion(&tresult.completion); 340 340 break; 341 341 } 342 342 /* fall through */ ··· 543 543 ret = wait_for_completion_interruptible( 544 544 &result.completion); 545 545 if (!ret && !(ret = result.err)) { 546 - INIT_COMPLETION(result.completion); 546 + reinit_completion(&result.completion); 547 547 break; 548 548 } 549 549 case -EBADMSG: ··· 697 697 ret = wait_for_completion_interruptible( 698 698 &result.completion); 699 699 if (!ret && !(ret = result.err)) { 700 - INIT_COMPLETION(result.completion); 700 + reinit_completion(&result.completion); 701 701 break; 702 702 } 703 703 case -EBADMSG: ··· 983 983 ret = wait_for_completion_interruptible( 984 984 &result.completion); 985 985 if (!ret && !((ret = result.err))) { 986 - INIT_COMPLETION(result.completion); 986 + reinit_completion(&result.completion); 987 987 break; 988 988 } 989 989 /* fall through */ ··· 1086 1086 ret = wait_for_completion_interruptible( 1087 1087 &result.completion); 1088 1088 if (!ret && !((ret = result.err))) { 1089 - INIT_COMPLETION(result.completion); 1089 + reinit_completion(&result.completion); 1090 1090 break; 1091 1091 } 1092 1092 /* fall through */
+2 -2
drivers/ata/libata-eh.c
··· 3017 3017 * ourselves at the beginning of each pass over the loop. 3018 3018 * 3019 3019 * Additionally, all write accesses to &ap->park_req_pending 3020 - * through INIT_COMPLETION() (see below) or complete_all() 3020 + * through reinit_completion() (see below) or complete_all() 3021 3021 * (see ata_scsi_park_store()) are protected by the host lock. 3022 3022 * As a result we have that park_req_pending.done is zero on 3023 3023 * exit from this function, i.e. when ATA_EH_PARK actions for ··· 3031 3031 */ 3032 3032 3033 3033 spin_lock_irqsave(ap->lock, flags); 3034 - INIT_COMPLETION(ap->park_req_pending); 3034 + reinit_completion(&ap->park_req_pending); 3035 3035 ata_for_each_link(link, ap, EDGE) { 3036 3036 ata_for_each_dev(dev, link, ALL) { 3037 3037 struct ata_eh_info *ehi = &link->eh_info;
+2 -2
drivers/base/power/main.c
··· 757 757 async_error = 0; 758 758 759 759 list_for_each_entry(dev, &dpm_suspended_list, power.entry) { 760 - INIT_COMPLETION(dev->power.completion); 760 + reinit_completion(&dev->power.completion); 761 761 if (is_async(dev)) { 762 762 get_device(dev); 763 763 async_schedule(async_resume, dev); ··· 1237 1237 1238 1238 static int device_suspend(struct device *dev) 1239 1239 { 1240 - INIT_COMPLETION(dev->power.completion); 1240 + reinit_completion(&dev->power.completion); 1241 1241 1242 1242 if (pm_async_enabled && dev->power.async_suspend) { 1243 1243 get_device(dev);
+1 -1
drivers/block/amiflop.c
··· 343 343 unit[nr].motor = 1; 344 344 fd_select(nr); 345 345 346 - INIT_COMPLETION(motor_on_completion); 346 + reinit_completion(&motor_on_completion); 347 347 motor_on_timer.data = nr; 348 348 mod_timer(&motor_on_timer, jiffies + HZ/2); 349 349
+2 -2
drivers/block/cciss.c
··· 2808 2808 /* erase the old error information */ 2809 2809 memset(c->err_info, 0, sizeof(ErrorInfo_struct)); 2810 2810 return_status = IO_OK; 2811 - INIT_COMPLETION(wait); 2811 + reinit_completion(&wait); 2812 2812 goto resend_cmd2; 2813 2813 } 2814 2814 ··· 3669 3669 } 3670 3670 } 3671 3671 if (!found && !h->busy_scanning) { 3672 - INIT_COMPLETION(h->scan_wait); 3672 + reinit_completion(&h->scan_wait); 3673 3673 list_add_tail(&h->scan_list, &scan_q); 3674 3674 ret = 1; 3675 3675 }
+1 -1
drivers/char/hw_random/timeriomem-rng.c
··· 79 79 priv->expires = cur + delay; 80 80 priv->present = 0; 81 81 82 - INIT_COMPLETION(priv->completion); 82 + reinit_completion(&priv->completion); 83 83 mod_timer(&priv->timer, priv->expires); 84 84 85 85 return 4;
+1 -1
drivers/crypto/tegra-aes.c
··· 268 268 aes_writel(dd, value, TEGRA_AES_SECURE_INPUT_SELECT); 269 269 270 270 aes_writel(dd, out_addr, TEGRA_AES_SECURE_DEST_ADDR); 271 - INIT_COMPLETION(dd->op_complete); 271 + reinit_completion(&dd->op_complete); 272 272 273 273 for (i = 0; i < AES_HW_MAX_ICQ_LENGTH - 1; i++) { 274 274 do {
+1 -1
drivers/firewire/core-transaction.c
··· 477 477 phy_config_packet.header[1] = data; 478 478 phy_config_packet.header[2] = ~data; 479 479 phy_config_packet.generation = generation; 480 - INIT_COMPLETION(phy_config_done); 480 + reinit_completion(&phy_config_done); 481 481 482 482 card->driver->send_request(card, &phy_config_packet); 483 483 wait_for_completion_timeout(&phy_config_done, timeout);
+1 -1
drivers/gpu/drm/gma500/oaktrail_hdmi_i2c.c
··· 99 99 i2c_dev->status = I2C_STAT_INIT; 100 100 i2c_dev->msg = pmsg; 101 101 i2c_dev->buf_offset = 0; 102 - INIT_COMPLETION(i2c_dev->complete); 102 + reinit_completion(&i2c_dev->complete); 103 103 104 104 /* Enable I2C transaction */ 105 105 temp = ((pmsg->len) << 20) | HI2C_EDID_READ | HI2C_ENABLE_TRANSACTION;
+1 -1
drivers/hid/hid-wiimote.h
··· 327 327 static inline void wiimote_cmd_set(struct wiimote_data *wdata, int cmd, 328 328 __u32 opt) 329 329 { 330 - INIT_COMPLETION(wdata->state.ready); 330 + reinit_completion(&wdata->state.ready); 331 331 wdata->state.cmd = cmd; 332 332 wdata->state.opt = opt; 333 333 }
+1 -1
drivers/hwmon/jz4740-hwmon.c
··· 66 66 67 67 mutex_lock(&hwmon->lock); 68 68 69 - INIT_COMPLETION(*completion); 69 + reinit_completion(completion); 70 70 71 71 enable_irq(hwmon->irq); 72 72 hwmon->cell->enable(to_platform_device(dev));
+1 -1
drivers/i2c/busses/i2c-at91.c
··· 371 371 dev_dbg(dev->dev, "transfer: %s %d bytes.\n", 372 372 (dev->msg->flags & I2C_M_RD) ? "read" : "write", dev->buf_len); 373 373 374 - INIT_COMPLETION(dev->cmd_complete); 374 + reinit_completion(&dev->cmd_complete); 375 375 dev->transfer_status = 0; 376 376 377 377 if (!dev->buf_len) {
+1 -1
drivers/i2c/busses/i2c-bcm2835.c
··· 151 151 152 152 i2c_dev->msg_buf = msg->buf; 153 153 i2c_dev->msg_buf_remaining = msg->len; 154 - INIT_COMPLETION(i2c_dev->completion); 154 + reinit_completion(&i2c_dev->completion); 155 155 156 156 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR); 157 157
+1 -1
drivers/i2c/busses/i2c-davinci.c
··· 323 323 324 324 davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len); 325 325 326 - INIT_COMPLETION(dev->cmd_complete); 326 + reinit_completion(&dev->cmd_complete); 327 327 dev->cmd_err = 0; 328 328 329 329 /* Take I2C out of reset and configure it as master */
+1 -1
drivers/i2c/busses/i2c-designware-core.c
··· 613 613 mutex_lock(&dev->lock); 614 614 pm_runtime_get_sync(dev->dev); 615 615 616 - INIT_COMPLETION(dev->cmd_complete); 616 + reinit_completion(&dev->cmd_complete); 617 617 dev->msgs = msgs; 618 618 dev->msgs_num = num; 619 619 dev->cmd_err = 0;
+1 -1
drivers/i2c/busses/i2c-ismt.c
··· 541 541 desc->dptr_high = upper_32_bits(dma_addr); 542 542 } 543 543 544 - INIT_COMPLETION(priv->cmp); 544 + reinit_completion(&priv->cmp); 545 545 546 546 /* Add the descriptor */ 547 547 ismt_submit_desc(priv);
+1 -1
drivers/i2c/busses/i2c-mxs.c
··· 505 505 return err; 506 506 } 507 507 } else { 508 - INIT_COMPLETION(i2c->cmd_complete); 508 + reinit_completion(&i2c->cmd_complete); 509 509 ret = mxs_i2c_dma_setup_xfer(adap, msg, flags); 510 510 if (ret) 511 511 return ret;
+1 -1
drivers/i2c/busses/i2c-omap.c
··· 543 543 w |= OMAP_I2C_BUF_RXFIF_CLR | OMAP_I2C_BUF_TXFIF_CLR; 544 544 omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, w); 545 545 546 - INIT_COMPLETION(dev->cmd_complete); 546 + reinit_completion(&dev->cmd_complete); 547 547 dev->cmd_err = 0; 548 548 549 549 w = OMAP_I2C_CON_EN | OMAP_I2C_CON_MST | OMAP_I2C_CON_STT;
+1 -1
drivers/i2c/busses/i2c-tegra.c
··· 544 544 i2c_dev->msg_buf_remaining = msg->len; 545 545 i2c_dev->msg_err = I2C_ERR_NONE; 546 546 i2c_dev->msg_read = (msg->flags & I2C_M_RD); 547 - INIT_COMPLETION(i2c_dev->msg_complete); 547 + reinit_completion(&i2c_dev->msg_complete); 548 548 549 549 packet_header = (0 << PACKET_HEADER0_HEADER_SIZE_SHIFT) | 550 550 PACKET_HEADER0_PROTOCOL_I2C |
+2 -2
drivers/i2c/busses/i2c-wmt.c
··· 158 158 writew(val, i2c_dev->base + REG_CR); 159 159 } 160 160 161 - INIT_COMPLETION(i2c_dev->complete); 161 + reinit_completion(&i2c_dev->complete); 162 162 163 163 if (i2c_dev->mode == I2C_MODE_STANDARD) 164 164 tcr_val = TCR_STANDARD_MODE; ··· 247 247 writew(val, i2c_dev->base + REG_CR); 248 248 } 249 249 250 - INIT_COMPLETION(i2c_dev->complete); 250 + reinit_completion(&i2c_dev->complete); 251 251 252 252 if (i2c_dev->mode == I2C_MODE_STANDARD) 253 253 tcr_val = TCR_STANDARD_MODE;
+3 -3
drivers/iio/adc/ad_sigma_delta.c
··· 188 188 189 189 spi_bus_lock(sigma_delta->spi->master); 190 190 sigma_delta->bus_locked = true; 191 - INIT_COMPLETION(sigma_delta->completion); 191 + reinit_completion(&sigma_delta->completion); 192 192 193 193 ret = ad_sigma_delta_set_mode(sigma_delta, mode); 194 194 if (ret < 0) ··· 259 259 260 260 spi_bus_lock(sigma_delta->spi->master); 261 261 sigma_delta->bus_locked = true; 262 - INIT_COMPLETION(sigma_delta->completion); 262 + reinit_completion(&sigma_delta->completion); 263 263 264 264 ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_SINGLE); 265 265 ··· 343 343 { 344 344 struct ad_sigma_delta *sigma_delta = iio_device_get_drvdata(indio_dev); 345 345 346 - INIT_COMPLETION(sigma_delta->completion); 346 + reinit_completion(&sigma_delta->completion); 347 347 wait_for_completion_timeout(&sigma_delta->completion, HZ); 348 348 349 349 if (!sigma_delta->irq_dis) {
+1 -1
drivers/iio/adc/nau7802.c
··· 190 190 struct nau7802_state *st = iio_priv(indio_dev); 191 191 int ret; 192 192 193 - INIT_COMPLETION(st->value_ok); 193 + reinit_completion(&st->value_ok); 194 194 enable_irq(st->client->irq); 195 195 196 196 nau7802_sync(st);
+1 -1
drivers/input/touchscreen/cyttsp_core.c
··· 242 242 int retval; 243 243 244 244 /* wait for interrupt to set ready completion */ 245 - INIT_COMPLETION(ts->bl_ready); 245 + reinit_completion(&ts->bl_ready); 246 246 ts->state = CY_BL_STATE; 247 247 248 248 enable_irq(ts->irq);
+1 -1
drivers/md/dm-crypt.c
··· 950 950 /* async */ 951 951 case -EBUSY: 952 952 wait_for_completion(&ctx->restart); 953 - INIT_COMPLETION(ctx->restart); 953 + reinit_completion(&ctx->restart); 954 954 /* fall through*/ 955 955 case -EINPROGRESS: 956 956 this_cc->req = NULL;
+1 -1
drivers/media/platform/blackfin/bfin_capture.c
··· 422 422 return ret; 423 423 } 424 424 425 - INIT_COMPLETION(bcap_dev->comp); 425 + reinit_completion(&bcap_dev->comp); 426 426 bcap_dev->stop = false; 427 427 return 0; 428 428 }
+5 -5
drivers/media/radio/radio-wl1273.c
··· 375 375 if (r) 376 376 return r; 377 377 378 - INIT_COMPLETION(radio->busy); 378 + reinit_completion(&radio->busy); 379 379 380 380 /* wait for the FR IRQ */ 381 381 r = wait_for_completion_timeout(&radio->busy, msecs_to_jiffies(2000)); ··· 389 389 if (r) 390 390 return r; 391 391 392 - INIT_COMPLETION(radio->busy); 392 + reinit_completion(&radio->busy); 393 393 394 394 /* wait for the POWER_ENB IRQ */ 395 395 r = wait_for_completion_timeout(&radio->busy, msecs_to_jiffies(1000)); ··· 444 444 goto err; 445 445 } 446 446 447 - INIT_COMPLETION(radio->busy); 447 + reinit_completion(&radio->busy); 448 448 449 449 r = wait_for_completion_timeout(&radio->busy, msecs_to_jiffies(2000)); 450 450 if (!r) { ··· 805 805 if (level < SCHAR_MIN || level > SCHAR_MAX) 806 806 return -EINVAL; 807 807 808 - INIT_COMPLETION(radio->busy); 808 + reinit_completion(&radio->busy); 809 809 dev_dbg(radio->dev, "%s: BUSY\n", __func__); 810 810 811 811 r = core->write(core, WL1273_INT_MASK_SET, radio->irq_flags); ··· 847 847 if (r) 848 848 goto out; 849 849 850 - INIT_COMPLETION(radio->busy); 850 + reinit_completion(&radio->busy); 851 851 dev_dbg(radio->dev, "%s: BUSY\n", __func__); 852 852 853 853 r = core->write(core, WL1273_TUNER_MODE_SET, TUNER_MODE_AUTO_SEEK);
+2 -2
drivers/media/radio/si470x/radio-si470x-common.c
··· 218 218 goto done; 219 219 220 220 /* wait till tune operation has completed */ 221 - INIT_COMPLETION(radio->completion); 221 + reinit_completion(&radio->completion); 222 222 retval = wait_for_completion_timeout(&radio->completion, 223 223 msecs_to_jiffies(tune_timeout)); 224 224 if (!retval) ··· 341 341 return retval; 342 342 343 343 /* wait till tune operation has completed */ 344 - INIT_COMPLETION(radio->completion); 344 + reinit_completion(&radio->completion); 345 345 retval = wait_for_completion_timeout(&radio->completion, 346 346 msecs_to_jiffies(seek_timeout)); 347 347 if (!retval)
+1 -1
drivers/media/rc/iguanair.c
··· 207 207 { 208 208 int rc; 209 209 210 - INIT_COMPLETION(ir->completion); 210 + reinit_completion(&ir->completion); 211 211 212 212 ir->urb_out->transfer_buffer_length = size; 213 213 rc = usb_submit_urb(ir->urb_out, GFP_KERNEL);
+1 -1
drivers/memstick/core/memstick.c
··· 253 253 { 254 254 if (host->card) { 255 255 host->retries = cmd_retries; 256 - INIT_COMPLETION(host->card->mrq_complete); 256 + reinit_completion(&host->card->mrq_complete); 257 257 host->request(host); 258 258 } 259 259 }
+1 -1
drivers/memstick/host/r592.c
··· 290 290 dbg_verbose("doing dma transfer"); 291 291 292 292 dev->dma_error = 0; 293 - INIT_COMPLETION(dev->dma_done); 293 + reinit_completion(&dev->dma_done); 294 294 295 295 /* TODO: hidden assumption about nenth beeing always 1 */ 296 296 sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
+1 -1
drivers/misc/mic/card/mic_virtio.c
··· 493 493 ioread8(&dc->config_change), ioread8(&d->type), mvdev); 494 494 495 495 status = ioread8(&d->status); 496 - INIT_COMPLETION(mvdev->reset_done); 496 + reinit_completion(&mvdev->reset_done); 497 497 unregister_virtio_device(&mvdev->vdev); 498 498 mic_free_card_irq(mvdev->virtio_cookie, mvdev); 499 499 if (status & VIRTIO_CONFIG_S_DRIVER_OK)
+1 -1
drivers/misc/mic/host/mic_boot.c
··· 38 38 39 39 #define MIC_RESET_TO (45) 40 40 41 - INIT_COMPLETION(mdev->reset_wait); 41 + reinit_completion(&mdev->reset_wait); 42 42 mdev->ops->reset_fw_ready(mdev); 43 43 mdev->ops->reset(mdev); 44 44
+6 -6
drivers/misc/ti-st/st_kim.c
··· 218 218 219 219 pr_debug("%s", __func__); 220 220 221 - INIT_COMPLETION(kim_gdata->kim_rcvd); 221 + reinit_completion(&kim_gdata->kim_rcvd); 222 222 if (4 != st_int_write(kim_gdata->core_data, read_ver_cmd, 4)) { 223 223 pr_err("kim: couldn't write 4 bytes"); 224 224 return -EIO; ··· 229 229 pr_err(" waiting for ver info- timed out "); 230 230 return -ETIMEDOUT; 231 231 } 232 - INIT_COMPLETION(kim_gdata->kim_rcvd); 232 + reinit_completion(&kim_gdata->kim_rcvd); 233 233 /* the positions 12 & 13 in the response buffer provide with the 234 234 * chip, major & minor numbers 235 235 */ ··· 362 362 /* reinit completion before sending for the 363 363 * relevant wait 364 364 */ 365 - INIT_COMPLETION(kim_gdata->kim_rcvd); 365 + reinit_completion(&kim_gdata->kim_rcvd); 366 366 367 367 /* 368 368 * Free space found in uart buffer, call st_int_write ··· 398 398 release_firmware(kim_gdata->fw_entry); 399 399 return -ETIMEDOUT; 400 400 } 401 - INIT_COMPLETION(kim_gdata->kim_rcvd); 401 + reinit_completion(&kim_gdata->kim_rcvd); 402 402 break; 403 403 case ACTION_DELAY: /* sleep */ 404 404 pr_info("sleep command in scr"); ··· 474 474 gpio_set_value(kim_gdata->nshutdown, GPIO_HIGH); 475 475 mdelay(100); 476 476 /* re-initialize the completion */ 477 - INIT_COMPLETION(kim_gdata->ldisc_installed); 477 + reinit_completion(&kim_gdata->ldisc_installed); 478 478 /* send notification to UIM */ 479 479 kim_gdata->ldisc_install = 1; 480 480 pr_info("ldisc_install = 1"); ··· 525 525 kim_gdata->kim_pdev->dev.platform_data; 526 526 struct tty_struct *tty = kim_gdata->core_data->tty; 527 527 528 - INIT_COMPLETION(kim_gdata->ldisc_installed); 528 + reinit_completion(&kim_gdata->ldisc_installed); 529 529 530 530 if (tty) { /* can be called before ldisc is installed */ 531 531 /* Flush any pending characters in the driver and discipline. */
+1 -1
drivers/mtd/nand/mxc_nand.c
··· 396 396 397 397 if (useirq) { 398 398 if (!host->devtype_data->check_int(host)) { 399 - INIT_COMPLETION(host->op_completion); 399 + reinit_completion(&host->op_completion); 400 400 irq_control(host, 1); 401 401 wait_for_completion(&host->op_completion); 402 402 }
+1 -1
drivers/mtd/nand/r852.c
··· 181 181 /* Set dma direction */ 182 182 dev->dma_dir = do_read; 183 183 dev->dma_stage = 1; 184 - INIT_COMPLETION(dev->dma_done); 184 + reinit_completion(&dev->dma_done); 185 185 186 186 dbg_verbose("doing dma %s ", do_read ? "read" : "write"); 187 187
+5 -5
drivers/mtd/onenand/omap2.c
··· 159 159 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1); 160 160 } 161 161 162 - INIT_COMPLETION(c->irq_done); 162 + reinit_completion(&c->irq_done); 163 163 if (c->gpio_irq) { 164 164 result = gpio_get_value(c->gpio_irq); 165 165 if (result == -1) { ··· 349 349 omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC, 350 350 dma_dst, 0, 0); 351 351 352 - INIT_COMPLETION(c->dma_done); 352 + reinit_completion(&c->dma_done); 353 353 omap_start_dma(c->dma_channel); 354 354 355 355 timeout = jiffies + msecs_to_jiffies(20); ··· 420 420 omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC, 421 421 dma_dst, 0, 0); 422 422 423 - INIT_COMPLETION(c->dma_done); 423 + reinit_completion(&c->dma_done); 424 424 omap_start_dma(c->dma_channel); 425 425 426 426 timeout = jiffies + msecs_to_jiffies(20); ··· 499 499 omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC, 500 500 dma_dst, 0, 0); 501 501 502 - INIT_COMPLETION(c->dma_done); 502 + reinit_completion(&c->dma_done); 503 503 omap_start_dma(c->dma_channel); 504 504 wait_for_completion(&c->dma_done); 505 505 ··· 544 544 omap_set_dma_dest_params(c->dma_channel, 0, OMAP_DMA_AMODE_POST_INC, 545 545 dma_dst, 0, 0); 546 546 547 - INIT_COMPLETION(c->dma_done); 547 + reinit_completion(&c->dma_done); 548 548 omap_start_dma(c->dma_channel); 549 549 wait_for_completion(&c->dma_done); 550 550
+1 -1
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
··· 3537 3537 3538 3538 void qlcnic_83xx_reinit_mbx_work(struct qlcnic_mailbox *mbx) 3539 3539 { 3540 - INIT_COMPLETION(mbx->completion); 3540 + reinit_completion(&mbx->completion); 3541 3541 set_bit(QLC_83XX_MBX_READY, &mbx->status); 3542 3542 } 3543 3543
+1 -1
drivers/net/ieee802154/at86rf230.c
··· 561 561 562 562 spin_lock_irqsave(&lp->lock, flags); 563 563 lp->is_tx = 1; 564 - INIT_COMPLETION(lp->tx_complete); 564 + reinit_completion(&lp->tx_complete); 565 565 spin_unlock_irqrestore(&lp->lock, flags); 566 566 567 567 rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
+1 -1
drivers/net/ieee802154/mrf24j40.c
··· 343 343 if (ret) 344 344 goto err; 345 345 346 - INIT_COMPLETION(devrec->tx_complete); 346 + reinit_completion(&devrec->tx_complete); 347 347 348 348 /* Set TXNTRIG bit of TXNCON to send packet */ 349 349 ret = read_short_reg(devrec, REG_TXNCON, &val);
+2 -2
drivers/net/wireless/ath/ath10k/htc.c
··· 534 534 u16 credit_count; 535 535 u16 credit_size; 536 536 537 - INIT_COMPLETION(htc->ctl_resp); 537 + reinit_completion(&htc->ctl_resp); 538 538 539 539 status = ath10k_hif_start(htc->ar); 540 540 if (status) { ··· 669 669 req_msg->flags = __cpu_to_le16(flags); 670 670 req_msg->service_id = __cpu_to_le16(conn_req->service_id); 671 671 672 - INIT_COMPLETION(htc->ctl_resp); 672 + reinit_completion(&htc->ctl_resp); 673 673 674 674 status = ath10k_htc_send(htc, ATH10K_HTC_EP_0, skb); 675 675 if (status) {
+9 -9
drivers/net/wireless/ath/ath10k/mac.c
··· 92 92 93 93 lockdep_assert_held(&ar->conf_mutex); 94 94 95 - INIT_COMPLETION(ar->install_key_done); 95 + reinit_completion(&ar->install_key_done); 96 96 97 97 ret = ath10k_send_key(arvif, key, cmd, macaddr); 98 98 if (ret) ··· 438 438 439 439 lockdep_assert_held(&ar->conf_mutex); 440 440 441 - INIT_COMPLETION(ar->vdev_setup_done); 441 + reinit_completion(&ar->vdev_setup_done); 442 442 443 443 arg.vdev_id = arvif->vdev_id; 444 444 arg.dtim_period = arvif->dtim_period; ··· 491 491 492 492 lockdep_assert_held(&ar->conf_mutex); 493 493 494 - INIT_COMPLETION(ar->vdev_setup_done); 494 + reinit_completion(&ar->vdev_setup_done); 495 495 496 496 ret = ath10k_wmi_vdev_stop(ar, arvif->vdev_id); 497 497 if (ret) { ··· 1666 1666 } 1667 1667 1668 1668 spin_lock_bh(&ar->data_lock); 1669 - INIT_COMPLETION(ar->offchan_tx_completed); 1669 + reinit_completion(&ar->offchan_tx_completed); 1670 1670 ar->offchan_tx_skb = skb; 1671 1671 spin_unlock_bh(&ar->data_lock); 1672 1672 ··· 2476 2476 goto exit; 2477 2477 } 2478 2478 2479 - INIT_COMPLETION(ar->scan.started); 2480 - INIT_COMPLETION(ar->scan.completed); 2479 + reinit_completion(&ar->scan.started); 2480 + reinit_completion(&ar->scan.completed); 2481 2481 ar->scan.in_progress = true; 2482 2482 ar->scan.aborting = false; 2483 2483 ar->scan.is_roc = false; ··· 2832 2832 goto exit; 2833 2833 } 2834 2834 2835 - INIT_COMPLETION(ar->scan.started); 2836 - INIT_COMPLETION(ar->scan.completed); 2837 - INIT_COMPLETION(ar->scan.on_channel); 2835 + reinit_completion(&ar->scan.started); 2836 + reinit_completion(&ar->scan.completed); 2837 + reinit_completion(&ar->scan.on_channel); 2838 2838 ar->scan.in_progress = true; 2839 2839 ar->scan.aborting = false; 2840 2840 ar->scan.is_roc = true;
+1 -1
drivers/net/wireless/ath/carl9170/usb.c
··· 773 773 complete_all(&ar->cmd_wait); 774 774 775 775 /* This is required to prevent an early completion on _start */ 776 - INIT_COMPLETION(ar->cmd_wait); 776 + reinit_completion(&ar->cmd_wait); 777 777 778 778 /* 779 779 * Note:
+1 -1
drivers/net/wireless/ath/wil6210/main.c
··· 250 250 251 251 /* init after reset */ 252 252 wil->pending_connect_cid = -1; 253 - INIT_COMPLETION(wil->wmi_ready); 253 + reinit_completion(&wil->wmi_ready); 254 254 255 255 /* TODO: release MAC reset */ 256 256 wil6210_enable_irq(wil);
+2 -2
drivers/net/wireless/brcm80211/brcmfmac/p2p.c
··· 1148 1148 1149 1149 pri_vif = p2p->bss_idx[P2PAPI_BSSCFG_PRIMARY].vif; 1150 1150 1151 - INIT_COMPLETION(afx_hdl->act_frm_scan); 1151 + reinit_completion(&afx_hdl->act_frm_scan); 1152 1152 set_bit(BRCMF_P2P_STATUS_FINDING_COMMON_CHANNEL, &p2p->status); 1153 1153 afx_hdl->is_active = true; 1154 1154 afx_hdl->peer_chan = P2P_INVALID_CHANNEL; ··· 1501 1501 1502 1502 brcmf_dbg(TRACE, "Enter\n"); 1503 1503 1504 - INIT_COMPLETION(p2p->send_af_done); 1504 + reinit_completion(&p2p->send_af_done); 1505 1505 clear_bit(BRCMF_P2P_STATUS_ACTION_TX_COMPLETED, &p2p->status); 1506 1506 clear_bit(BRCMF_P2P_STATUS_ACTION_TX_NOACK, &p2p->status); 1507 1507
+1 -1
drivers/net/wireless/zd1211rw/zd_usb.c
··· 1619 1619 atomic_set(&intr->read_regs_enabled, 1); 1620 1620 intr->read_regs.req = req; 1621 1621 intr->read_regs.req_count = count; 1622 - INIT_COMPLETION(intr->read_regs.completion); 1622 + reinit_completion(&intr->read_regs.completion); 1623 1623 spin_unlock_irq(&intr->lock); 1624 1624 } 1625 1625
+2 -2
drivers/parport/parport_ip32.c
··· 1331 1331 break; 1332 1332 1333 1333 /* Initialize mutex used to take interrupts into account */ 1334 - INIT_COMPLETION(priv->irq_complete); 1334 + reinit_completion(&priv->irq_complete); 1335 1335 1336 1336 /* Enable serviceIntr */ 1337 1337 parport_ip32_frob_econtrol(p, ECR_SERVINTR, 0); ··· 1446 1446 priv->irq_mode = PARPORT_IP32_IRQ_HERE; 1447 1447 1448 1448 parport_ip32_dma_start(DMA_TO_DEVICE, (void *)buf, len); 1449 - INIT_COMPLETION(priv->irq_complete); 1449 + reinit_completion(&priv->irq_complete); 1450 1450 parport_ip32_frob_econtrol(p, ECR_DMAEN | ECR_SERVINTR, ECR_DMAEN); 1451 1451 1452 1452 nfault_timeout = min((unsigned long)physport->cad->timeout,
+1 -1
drivers/platform/x86/apple-gmux.c
··· 289 289 static int gmux_set_discrete_state(struct apple_gmux_data *gmux_data, 290 290 enum vga_switcheroo_state state) 291 291 { 292 - INIT_COMPLETION(gmux_data->powerchange_done); 292 + reinit_completion(&gmux_data->powerchange_done); 293 293 294 294 if (state == VGA_SWITCHEROO_ON) { 295 295 gmux_write8(gmux_data, GMUX_PORT_DISCRETE_POWER, 1);
+2 -2
drivers/power/ab8500_fg.c
··· 574 574 } 575 575 576 576 /* Return and WFI */ 577 - INIT_COMPLETION(di->ab8500_fg_started); 578 - INIT_COMPLETION(di->ab8500_fg_complete); 577 + reinit_completion(&di->ab8500_fg_started); 578 + reinit_completion(&di->ab8500_fg_complete); 579 579 enable_irq(di->irq); 580 580 581 581 /* Note: cc_lock is still locked */
+1 -1
drivers/power/jz4740-battery.c
··· 73 73 74 74 mutex_lock(&battery->lock); 75 75 76 - INIT_COMPLETION(battery->read_completion); 76 + reinit_completion(&battery->read_completion); 77 77 78 78 enable_irq(battery->irq); 79 79 battery->cell->enable(battery->pdev);
+1 -1
drivers/rtc/rtc-hid-sensor-time.c
··· 209 209 platform_get_drvdata(to_platform_device(dev)); 210 210 int ret; 211 211 212 - INIT_COMPLETION(time_state->comp_last_time); 212 + reinit_completion(&time_state->comp_last_time); 213 213 /* get a report with all values through requesting one value */ 214 214 sensor_hub_input_attr_get_raw_value(time_state->common_attributes.hsdev, 215 215 HID_USAGE_SENSOR_TIME, hid_time_addresses[0],
+1 -1
drivers/spi/spi-bcm2835.c
··· 217 217 cs |= spi->chip_select; 218 218 } 219 219 220 - INIT_COMPLETION(bs->done); 220 + reinit_completion(&bs->done); 221 221 bs->tx_buf = tfr->tx_buf; 222 222 bs->rx_buf = tfr->rx_buf; 223 223 bs->len = tfr->len;
+1 -1
drivers/spi/spi-clps711x.c
··· 105 105 106 106 gpio_set_value(cs, !!(msg->spi->mode & SPI_CS_HIGH)); 107 107 108 - INIT_COMPLETION(hw->done); 108 + reinit_completion(&hw->done); 109 109 110 110 hw->count = 0; 111 111 hw->len = xfer->len;
+1 -1
drivers/spi/spi-davinci.c
··· 554 554 clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); 555 555 set_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); 556 556 557 - INIT_COMPLETION(dspi->done); 557 + reinit_completion(&dspi->done); 558 558 559 559 if (spicfg->io_type == SPI_IO_TYPE_INTR) 560 560 set_io_bits(dspi->base + SPIINT, SPIINT_MASKINT);
+1 -1
drivers/spi/spi-fsl-espi.c
··· 232 232 mpc8xxx_spi->tx = t->tx_buf; 233 233 mpc8xxx_spi->rx = t->rx_buf; 234 234 235 - INIT_COMPLETION(mpc8xxx_spi->done); 235 + reinit_completion(&mpc8xxx_spi->done); 236 236 237 237 /* Set SPCOM[CS] and SPCOM[TRANLEN] field */ 238 238 if ((t->len - 1) > SPCOM_TRANLEN_MAX) {
+1 -1
drivers/spi/spi-fsl-spi.c
··· 339 339 mpc8xxx_spi->tx = t->tx_buf; 340 340 mpc8xxx_spi->rx = t->rx_buf; 341 341 342 - INIT_COMPLETION(mpc8xxx_spi->done); 342 + reinit_completion(&mpc8xxx_spi->done); 343 343 344 344 if (mpc8xxx_spi->flags & SPI_CPM_MODE) 345 345 ret = fsl_spi_cpm_bufs(mpc8xxx_spi, t, is_dma_mapped);
+1 -1
drivers/spi/spi-mpc512x-psc.c
··· 167 167 } 168 168 169 169 /* have the ISR trigger when the TX FIFO is empty */ 170 - INIT_COMPLETION(mps->txisrdone); 170 + reinit_completion(&mps->txisrdone); 171 171 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY); 172 172 out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY); 173 173 wait_for_completion(&mps->txisrdone);
+1 -1
drivers/spi/spi-mxs.c
··· 202 202 if (!dma_xfer) 203 203 return -ENOMEM; 204 204 205 - INIT_COMPLETION(spi->c); 205 + reinit_completion(&spi->c); 206 206 207 207 /* Chip select was already programmed into CTRL0 */ 208 208 ctrl0 = readl(ssp->base + HW_SSP_CTRL0);
+1 -1
drivers/spi/spi-s3c64xx.c
··· 890 890 unsigned long flags; 891 891 int use_dma; 892 892 893 - INIT_COMPLETION(sdd->xfer_completion); 893 + reinit_completion(&sdd->xfer_completion); 894 894 895 895 /* Only BPW and Speed may change across transfers */ 896 896 bpw = xfer->bits_per_word;
+1 -1
drivers/spi/spi-sh-msiof.c
··· 465 465 ret = ret ? ret : sh_msiof_modify_ctr_wait(p, 0, CTR_TXE); 466 466 467 467 /* start by setting frame bit */ 468 - INIT_COMPLETION(p->done); 468 + reinit_completion(&p->done); 469 469 ret = ret ? ret : sh_msiof_modify_ctr_wait(p, 0, CTR_TFSE); 470 470 if (ret) { 471 471 dev_err(&p->pdev->dev, "failed to start hardware\n");
+2 -2
drivers/spi/spi-sirf.c
··· 305 305 sspi->tx = t->tx_buf ? t->tx_buf : sspi->dummypage; 306 306 sspi->rx = t->rx_buf ? t->rx_buf : sspi->dummypage; 307 307 sspi->left_tx_word = sspi->left_rx_word = t->len / sspi->word_width; 308 - INIT_COMPLETION(sspi->rx_done); 309 - INIT_COMPLETION(sspi->tx_done); 308 + reinit_completion(&sspi->rx_done); 309 + reinit_completion(&sspi->tx_done); 310 310 311 311 writel(SIRFSOC_SPI_INT_MASK_ALL, sspi->base + SIRFSOC_SPI_INT_STATUS); 312 312
+3 -3
drivers/spi/spi-tegra114.c
··· 451 451 452 452 static int tegra_spi_start_tx_dma(struct tegra_spi_data *tspi, int len) 453 453 { 454 - INIT_COMPLETION(tspi->tx_dma_complete); 454 + reinit_completion(&tspi->tx_dma_complete); 455 455 tspi->tx_dma_desc = dmaengine_prep_slave_single(tspi->tx_dma_chan, 456 456 tspi->tx_dma_phys, len, DMA_MEM_TO_DEV, 457 457 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); ··· 470 470 471 471 static int tegra_spi_start_rx_dma(struct tegra_spi_data *tspi, int len) 472 472 { 473 - INIT_COMPLETION(tspi->rx_dma_complete); 473 + reinit_completion(&tspi->rx_dma_complete); 474 474 tspi->rx_dma_desc = dmaengine_prep_slave_single(tspi->rx_dma_chan, 475 475 tspi->rx_dma_phys, len, DMA_DEV_TO_MEM, 476 476 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); ··· 844 844 list_for_each_entry(xfer, &msg->transfers, transfer_list) { 845 845 unsigned long cmd1; 846 846 847 - INIT_COMPLETION(tspi->xfer_completion); 847 + reinit_completion(&tspi->xfer_completion); 848 848 849 849 cmd1 = tegra_spi_setup_transfer_one(spi, xfer, is_first_msg); 850 850
+1 -1
drivers/spi/spi-tegra20-sflash.c
··· 339 339 msg->actual_length = 0; 340 340 single_xfer = list_is_singular(&msg->transfers); 341 341 list_for_each_entry(xfer, &msg->transfers, transfer_list) { 342 - INIT_COMPLETION(tsd->xfer_completion); 342 + reinit_completion(&tsd->xfer_completion); 343 343 ret = tegra_sflash_start_transfer_one(spi, xfer, 344 344 is_first_msg, single_xfer); 345 345 if (ret < 0) {
+3 -3
drivers/spi/spi-tegra20-slink.c
··· 462 462 463 463 static int tegra_slink_start_tx_dma(struct tegra_slink_data *tspi, int len) 464 464 { 465 - INIT_COMPLETION(tspi->tx_dma_complete); 465 + reinit_completion(&tspi->tx_dma_complete); 466 466 tspi->tx_dma_desc = dmaengine_prep_slave_single(tspi->tx_dma_chan, 467 467 tspi->tx_dma_phys, len, DMA_MEM_TO_DEV, 468 468 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); ··· 481 481 482 482 static int tegra_slink_start_rx_dma(struct tegra_slink_data *tspi, int len) 483 483 { 484 - INIT_COMPLETION(tspi->rx_dma_complete); 484 + reinit_completion(&tspi->rx_dma_complete); 485 485 tspi->rx_dma_desc = dmaengine_prep_slave_single(tspi->rx_dma_chan, 486 486 tspi->rx_dma_phys, len, DMA_DEV_TO_MEM, 487 487 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); ··· 836 836 struct tegra_slink_data *tspi = spi_master_get_devdata(master); 837 837 int ret; 838 838 839 - INIT_COMPLETION(tspi->xfer_completion); 839 + reinit_completion(&tspi->xfer_completion); 840 840 ret = tegra_slink_start_transfer_one(spi, xfer); 841 841 if (ret < 0) { 842 842 dev_err(tspi->dev,
+1 -1
drivers/spi/spi-xilinx.c
··· 258 258 xspi->tx_ptr = t->tx_buf; 259 259 xspi->rx_ptr = t->rx_buf; 260 260 xspi->remaining_bytes = t->len; 261 - INIT_COMPLETION(xspi->done); 261 + reinit_completion(&xspi->done); 262 262 263 263 264 264 /* Enable the transmit empty interrupt, which we use to determine
+1 -1
drivers/spi/spi.c
··· 571 571 list_for_each_entry(xfer, &msg->transfers, transfer_list) { 572 572 trace_spi_transfer_start(msg, xfer); 573 573 574 - INIT_COMPLETION(master->xfer_completion); 574 + reinit_completion(&master->xfer_completion); 575 575 576 576 ret = master->transfer_one(master, msg->spi, xfer); 577 577 if (ret < 0) {
+1 -1
drivers/staging/iio/adc/mxs-lradc.c
··· 783 783 if (!ret) 784 784 return -EBUSY; 785 785 786 - INIT_COMPLETION(lradc->completion); 786 + reinit_completion(&lradc->completion); 787 787 788 788 /* 789 789 * No buffered operation in progress, map the channel and trigger it.
+1 -1
drivers/staging/media/solo6x10/solo6x10-p2m.c
··· 87 87 if (mutex_lock_interruptible(&p2m_dev->mutex)) 88 88 return -EINTR; 89 89 90 - INIT_COMPLETION(p2m_dev->completion); 90 + reinit_completion(&p2m_dev->completion); 91 91 p2m_dev->error = 0; 92 92 93 93 if (desc_cnt > 1 && solo_dev->type != SOLO_DEV_6110 && desc_mode) {
+2 -2
drivers/staging/tidspbridge/core/sync.c
··· 72 72 spin_lock_bh(&sync_lock); 73 73 for (i = 0; i < count; i++) { 74 74 if (completion_done(&events[i]->comp)) { 75 - INIT_COMPLETION(events[i]->comp); 75 + reinit_completion(&events[i]->comp); 76 76 *index = i; 77 77 spin_unlock_bh(&sync_lock); 78 78 status = 0; ··· 92 92 spin_lock_bh(&sync_lock); 93 93 for (i = 0; i < count; i++) { 94 94 if (completion_done(&events[i]->comp)) { 95 - INIT_COMPLETION(events[i]->comp); 95 + reinit_completion(&events[i]->comp); 96 96 *index = i; 97 97 status = 0; 98 98 }
+1 -1
drivers/staging/tidspbridge/include/dspbridge/sync.h
··· 59 59 60 60 static inline void sync_reset_event(struct sync_object *event) 61 61 { 62 - INIT_COMPLETION(event->comp); 62 + reinit_completion(&event->comp); 63 63 event->multi_comp = NULL; 64 64 } 65 65
+3 -3
drivers/staging/tidspbridge/rmgr/drv_interface.c
··· 332 332 struct dev_object *dev; 333 333 struct cfg_devnode *dev_node; 334 334 if (atomic_read(&bridge_cref)) { 335 - INIT_COMPLETION(bridge_comp); 335 + reinit_completion(&bridge_comp); 336 336 while (!wait_for_completion_timeout(&bridge_comp, 337 337 msecs_to_jiffies(REC_TIMEOUT))) 338 338 pr_info("%s:%d handle(s) still opened\n", ··· 348 348 349 349 void bridge_recover_schedule(void) 350 350 { 351 - INIT_COMPLETION(bridge_open_comp); 351 + reinit_completion(&bridge_open_comp); 352 352 recover = true; 353 353 queue_work(bridge_rec_queue, &bridge_recovery_work); 354 354 } ··· 389 389 #ifdef CONFIG_TIDSPBRIDGE_RECOVERY 390 390 bridge_rec_queue = create_workqueue("bridge_rec_queue"); 391 391 INIT_WORK(&bridge_recovery_work, bridge_recover); 392 - INIT_COMPLETION(bridge_comp); 392 + reinit_completion(&bridge_comp); 393 393 #endif 394 394 395 395 #ifdef CONFIG_PM
+1 -1
drivers/tty/metag_da.c
··· 495 495 count = dport->xmit_cnt; 496 496 /* xmit buffer no longer empty? */ 497 497 if (count) 498 - INIT_COMPLETION(dport->xmit_empty); 498 + reinit_completion(&dport->xmit_empty); 499 499 mutex_unlock(&dport->xmit_lock); 500 500 501 501 if (total) {
+1 -1
drivers/usb/c67x00/c67x00-sched.c
··· 344 344 /* it could happen that we reinitialize this completion, while 345 345 * somebody was waiting for that completion. The timeout and 346 346 * while loop handle such cases, but this might be improved */ 347 - INIT_COMPLETION(c67x00->endpoint_disable); 347 + reinit_completion(&c67x00->endpoint_disable); 348 348 c67x00_sched_kick(c67x00); 349 349 wait_for_completion_timeout(&c67x00->endpoint_disable, 1 * HZ); 350 350
+1 -1
drivers/usb/gadget/f_fs.c
··· 373 373 if (req->buf == NULL) 374 374 req->buf = (void *)0xDEADBABE; 375 375 376 - INIT_COMPLETION(ffs->ep0req_completion); 376 + reinit_completion(&ffs->ep0req_completion); 377 377 378 378 ret = usb_ep_queue(ffs->gadget->ep0, req, GFP_ATOMIC); 379 379 if (unlikely(ret < 0))
+1 -1
drivers/usb/serial/mos7720.c
··· 455 455 return -1; 456 456 } 457 457 mos_parport->msg_pending = true; /* synch usb call pending */ 458 - INIT_COMPLETION(mos_parport->syncmsg_compl); 458 + reinit_completion(&mos_parport->syncmsg_compl); 459 459 spin_unlock(&release_lock); 460 460 461 461 mutex_lock(&mos_parport->serial->disc_mutex);
+2 -2
drivers/video/exynos/exynos_mipi_dsi_common.c
··· 220 220 case MIPI_DSI_DCS_LONG_WRITE: 221 221 { 222 222 unsigned int size, payload = 0; 223 - INIT_COMPLETION(dsim_wr_comp); 223 + reinit_completion(&dsim_wr_comp); 224 224 225 225 size = data_size * 4; 226 226 ··· 356 356 msleep(20); 357 357 358 358 mutex_lock(&dsim->lock); 359 - INIT_COMPLETION(dsim_rd_comp); 359 + reinit_completion(&dsim_rd_comp); 360 360 exynos_mipi_dsi_rd_tx_header(dsim, 361 361 MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE, req_size); 362 362
+1 -1
drivers/video/omap2/displays-new/encoder-tpd12s015.c
··· 69 69 dst->src = dssdev; 70 70 dssdev->dst = dst; 71 71 72 - INIT_COMPLETION(ddata->hpd_completion); 72 + reinit_completion(&ddata->hpd_completion); 73 73 74 74 gpio_set_value_cansleep(ddata->ct_cp_hpd_gpio, 1); 75 75 /* DC-DC converter needs at max 300us to get to 90% of 5V */
+1 -1
fs/ecryptfs/crypto.c
··· 392 392 393 393 wait_for_completion(&ecr->completion); 394 394 rc = ecr->rc; 395 - INIT_COMPLETION(ecr->completion); 395 + reinit_completion(&ecr->completion); 396 396 } 397 397 out: 398 398 ablkcipher_request_free(req);
+1 -1
fs/nfs/nfs4state.c
··· 244 244 set_bit(NFS4_SLOT_TBL_DRAINING, &tbl->slot_tbl_state); 245 245 spin_lock(&tbl->slot_tbl_lock); 246 246 if (tbl->highest_used_slotid != NFS4_NO_SLOT) { 247 - INIT_COMPLETION(tbl->complete); 247 + reinit_completion(&tbl->complete); 248 248 spin_unlock(&tbl->slot_tbl_lock); 249 249 return wait_for_completion_interruptible(&tbl->complete); 250 250 }
+2 -2
fs/ocfs2/dlmglue.c
··· 1304 1304 { 1305 1305 wait_for_completion(&mw->mw_complete); 1306 1306 /* Re-arm the completion in case we want to wait on it again */ 1307 - INIT_COMPLETION(mw->mw_complete); 1307 + reinit_completion(&mw->mw_complete); 1308 1308 return mw->mw_status; 1309 1309 } 1310 1310 ··· 1355 1355 else 1356 1356 ret = mw->mw_status; 1357 1357 /* Re-arm the completion in case we want to wait on it again */ 1358 - INIT_COMPLETION(mw->mw_complete); 1358 + reinit_completion(&mw->mw_complete); 1359 1359 return ret; 1360 1360 } 1361 1361
+1 -1
sound/firewire/dice.c
··· 543 543 __be32 value; 544 544 int err; 545 545 546 - INIT_COMPLETION(dice->clock_accepted); 546 + reinit_completion(&dice->clock_accepted); 547 547 548 548 value = cpu_to_be32(clock_rate | CLOCK_SOURCE_ARX1); 549 549 err = snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
+3 -3
sound/soc/samsung/ac97.c
··· 74 74 if (stat == S3C_AC97_GLBSTAT_MAINSTATE_ACTIVE) 75 75 return; /* Return if already active */ 76 76 77 - INIT_COMPLETION(s3c_ac97.done); 77 + reinit_completion(&s3c_ac97.done); 78 78 79 79 ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL); 80 80 ac_glbctrl = S3C_AC97_GLBCTRL_ACLINKON; ··· 103 103 104 104 s3c_ac97_activate(ac97); 105 105 106 - INIT_COMPLETION(s3c_ac97.done); 106 + reinit_completion(&s3c_ac97.done); 107 107 108 108 ac_codec_cmd = readl(s3c_ac97.regs + S3C_AC97_CODEC_CMD); 109 109 ac_codec_cmd = S3C_AC97_CODEC_CMD_READ | AC_CMD_ADDR(reg); ··· 140 140 141 141 s3c_ac97_activate(ac97); 142 142 143 - INIT_COMPLETION(s3c_ac97.done); 143 + reinit_completion(&s3c_ac97.done); 144 144 145 145 ac_codec_cmd = readl(s3c_ac97.regs + S3C_AC97_CODEC_CMD); 146 146 ac_codec_cmd = AC_CMD_ADDR(reg) | AC_CMD_DATA(val);