tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

Merge branch 'regulator-5.0' into regulator-5.1 stpmic1 const/range

Mark Brown 16646d8d e6fff62a

+152 -143
+6 -6
drivers/regulator/axp20x-regulator.c
··· 577 577 AXP22X_DCDC3_V_OUT, AXP22X_DCDC3_V_OUT_MASK, 578 578 AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC3_MASK), 579 579 AXP_DESC(AXP22X, DCDC4, "dcdc4", "vin4", 600, 1540, 20, 580 - AXP22X_DCDC4_V_OUT, AXP22X_DCDC4_V_OUT, 580 + AXP22X_DCDC4_V_OUT, AXP22X_DCDC4_V_OUT_MASK, 581 581 AXP22X_PWR_OUT_CTRL1, AXP22X_PWR_OUT_DCDC4_MASK), 582 582 AXP_DESC(AXP22X, DCDC5, "dcdc5", "vin5", 1000, 2550, 50, 583 583 AXP22X_DCDC5_V_OUT, AXP22X_DCDC5_V_OUT_MASK, ··· 795 795 AXP806_DCDCA_V_CTRL, AXP806_DCDCA_V_CTRL_MASK, 796 796 AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCA_MASK), 797 797 AXP_DESC(AXP806, DCDCB, "dcdcb", "vinb", 1000, 2550, 50, 798 - AXP806_DCDCB_V_CTRL, AXP806_DCDCB_V_CTRL, 798 + AXP806_DCDCB_V_CTRL, AXP806_DCDCB_V_CTRL_MASK, 799 799 AXP806_PWR_OUT_CTRL1, AXP806_PWR_OUT_DCDCB_MASK), 800 800 AXP_DESC_RANGES(AXP806, DCDCC, "dcdcc", "vinc", 801 801 axp806_dcdca_ranges, AXP806_DCDCA_NUM_VOLTAGES, ··· 821 821 AXP806_BLDO1_V_CTRL, AXP806_BLDO1_V_CTRL_MASK, 822 822 AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO1_MASK), 823 823 AXP_DESC(AXP806, BLDO2, "bldo2", "bldoin", 700, 1900, 100, 824 - AXP806_BLDO2_V_CTRL, AXP806_BLDO2_V_CTRL, 824 + AXP806_BLDO2_V_CTRL, AXP806_BLDO2_V_CTRL_MASK, 825 825 AXP806_PWR_OUT_CTRL2, AXP806_PWR_OUT_BLDO2_MASK), 826 826 AXP_DESC(AXP806, BLDO3, "bldo3", "bldoin", 700, 1900, 100, 827 827 AXP806_BLDO3_V_CTRL, AXP806_BLDO3_V_CTRL_MASK, ··· 956 956 AXP22X_ALDO1_V_OUT, AXP22X_ALDO1_V_OUT_MASK, 957 957 AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO1_MASK), 958 958 AXP_DESC(AXP813, ALDO2, "aldo2", "aldoin", 700, 3300, 100, 959 - AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT, 959 + AXP22X_ALDO2_V_OUT, AXP22X_ALDO2_V_OUT_MASK, 960 960 AXP22X_PWR_OUT_CTRL3, AXP806_PWR_OUT_ALDO2_MASK), 961 961 AXP_DESC(AXP813, ALDO3, "aldo3", "aldoin", 700, 3300, 100, 962 962 AXP22X_ALDO3_V_OUT, AXP22X_ALDO3_V_OUT_MASK, ··· 966 966 AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO1_MASK), 967 967 AXP_DESC_RANGES(AXP813, DLDO2, "dldo2", "dldoin", 968 968 axp803_dldo2_ranges, AXP803_DLDO2_NUM_VOLTAGES, 969 - AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT, 969 + AXP22X_DLDO2_V_OUT, AXP22X_DLDO2_V_OUT_MASK, 970 970 AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DLDO2_MASK), 971 971 AXP_DESC(AXP813, DLDO3, "dldo3", "dldoin", 700, 3300, 100, 972 972 AXP22X_DLDO3_V_OUT, AXP22X_DLDO3_V_OUT_MASK, ··· 981 981 AXP22X_ELDO2_V_OUT, AXP22X_ELDO2_V_OUT_MASK, 982 982 AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO2_MASK), 983 983 AXP_DESC(AXP813, ELDO3, "eldo3", "eldoin", 700, 1900, 50, 984 - AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT, 984 + AXP22X_ELDO3_V_OUT, AXP22X_ELDO3_V_OUT_MASK, 985 985 AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_ELDO3_MASK), 986 986 /* to do / check ... */ 987 987 AXP_DESC(AXP813, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
+4
drivers/regulator/bcm590xx-regulator.c
··· 242 242 case BCM590XX_REG_SDSR2: 243 243 reg = BCM590XX_SDSR2PMCTRL1; 244 244 break; 245 + case BCM590XX_REG_VSR: 246 + reg = BCM590XX_VSRPMCTRL1; 247 + break; 245 248 case BCM590XX_REG_VBUS: 246 249 reg = BCM590XX_OTG_CTRL; 250 + break; 247 251 } 248 252 249 253
+3 -9
drivers/regulator/core.c
··· 1337 1337 * We'll only apply the initial system load if an 1338 1338 * initial mode wasn't specified. 1339 1339 */ 1340 + regulator_lock(rdev); 1340 1341 drms_uA_update(rdev); 1342 + regulator_unlock(rdev); 1341 1343 } 1342 1344 1343 1345 if ((rdev->constraints->ramp_delay || rdev->constraints->ramp_disable) ··· 2048 2046 debugfs_remove_recursive(regulator->debugfs); 2049 2047 2050 2048 if (regulator->dev) { 2051 - int count = 0; 2052 - struct regulator *r; 2053 - 2054 - list_for_each_entry(r, &rdev->consumer_list, list) 2055 - if (r->dev == regulator->dev) 2056 - count++; 2057 - 2058 - if (count == 1) 2059 - device_link_remove(regulator->dev, &rdev->dev); 2049 + device_link_remove(regulator->dev, &rdev->dev); 2060 2050 2061 2051 /* remove any sysfs entries */ 2062 2052 sysfs_remove_link(&rdev->dev.kobj, regulator->supply_name);
+32 -32
drivers/regulator/da9052-regulator.c
··· 290 290 .disable = regulator_disable_regmap, 291 291 }; 292 292 293 - #define DA9052_LDO(_id, step, min, max, sbits, ebits, abits) \ 293 + #define DA9052_LDO(_id, _name, step, min, max, sbits, ebits, abits) \ 294 294 {\ 295 295 .reg_desc = {\ 296 - .name = #_id,\ 296 + .name = #_name,\ 297 297 .ops = &da9052_ldo_ops,\ 298 298 .type = REGULATOR_VOLTAGE,\ 299 299 .id = DA9052_ID_##_id,\ ··· 310 310 .activate_bit = (abits),\ 311 311 } 312 312 313 - #define DA9052_DCDC(_id, step, min, max, sbits, ebits, abits) \ 313 + #define DA9052_DCDC(_id, _name, step, min, max, sbits, ebits, abits) \ 314 314 {\ 315 315 .reg_desc = {\ 316 - .name = #_id,\ 316 + .name = #_name,\ 317 317 .ops = &da9052_dcdc_ops,\ 318 318 .type = REGULATOR_VOLTAGE,\ 319 319 .id = DA9052_ID_##_id,\ ··· 331 331 } 332 332 333 333 static struct da9052_regulator_info da9052_regulator_info[] = { 334 - DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), 335 - DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), 336 - DA9052_DCDC(BUCK3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO), 337 - DA9052_DCDC(BUCK4, 50, 1800, 3600, 5, 6, 0), 338 - DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), 339 - DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), 340 - DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), 341 - DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), 342 - DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), 343 - DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), 344 - DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), 345 - DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), 346 - DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), 347 - DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), 334 + DA9052_DCDC(BUCK1, buck1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), 335 + DA9052_DCDC(BUCK2, buck2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), 336 + DA9052_DCDC(BUCK3, buck3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO), 337 + DA9052_DCDC(BUCK4, buck4, 50, 1800, 3600, 5, 6, 0), 338 + DA9052_LDO(LDO1, ldo1, 50, 600, 1800, 5, 6, 0), 339 + DA9052_LDO(LDO2, ldo2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), 340 + DA9052_LDO(LDO3, ldo3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), 341 + DA9052_LDO(LDO4, ldo4, 25, 1725, 3300, 6, 6, 0), 342 + DA9052_LDO(LDO5, ldo5, 50, 1200, 3600, 6, 6, 0), 343 + DA9052_LDO(LDO6, ldo6, 50, 1200, 3600, 6, 6, 0), 344 + DA9052_LDO(LDO7, ldo7, 50, 1200, 3600, 6, 6, 0), 345 + DA9052_LDO(LDO8, ldo8, 50, 1200, 3600, 6, 6, 0), 346 + DA9052_LDO(LDO9, ldo9, 50, 1250, 3650, 6, 6, 0), 347 + DA9052_LDO(LDO10, ldo10, 50, 1200, 3600, 6, 6, 0), 348 348 }; 349 349 350 350 static struct da9052_regulator_info da9053_regulator_info[] = { 351 - DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), 352 - DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), 353 - DA9052_DCDC(BUCK3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO), 354 - DA9052_DCDC(BUCK4, 25, 950, 2525, 6, 6, 0), 355 - DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), 356 - DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), 357 - DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), 358 - DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), 359 - DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), 360 - DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), 361 - DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), 362 - DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), 363 - DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), 364 - DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), 351 + DA9052_DCDC(BUCK1, buck1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), 352 + DA9052_DCDC(BUCK2, buck2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), 353 + DA9052_DCDC(BUCK3, buck3, 25, 950, 2525, 6, 6, DA9052_SUPPLY_VBMEMGO), 354 + DA9052_DCDC(BUCK4, buck4, 25, 950, 2525, 6, 6, 0), 355 + DA9052_LDO(LDO1, ldo1, 50, 600, 1800, 5, 6, 0), 356 + DA9052_LDO(LDO2, ldo2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), 357 + DA9052_LDO(LDO3, ldo3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), 358 + DA9052_LDO(LDO4, ldo4, 25, 1725, 3300, 6, 6, 0), 359 + DA9052_LDO(LDO5, ldo5, 50, 1200, 3600, 6, 6, 0), 360 + DA9052_LDO(LDO6, ldo6, 50, 1200, 3600, 6, 6, 0), 361 + DA9052_LDO(LDO7, ldo7, 50, 1200, 3600, 6, 6, 0), 362 + DA9052_LDO(LDO8, ldo8, 50, 1200, 3600, 6, 6, 0), 363 + DA9052_LDO(LDO9, ldo9, 50, 1250, 3650, 6, 6, 0), 364 + DA9052_LDO(LDO10, ldo10, 50, 1200, 3600, 6, 6, 0), 365 365 }; 366 366 367 367 static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id,
+2 -2
drivers/regulator/lochnagar-regulator.c
··· 194 194 .name = "VDDCORE", 195 195 .supply_name = "SYSVDD", 196 196 .type = REGULATOR_VOLTAGE, 197 - .n_voltages = 57, 197 + .n_voltages = 66, 198 198 .ops = &lochnagar_vddcore_ops, 199 199 200 200 .id = LOCHNAGAR_VDDCORE, ··· 226 226 }, 227 227 { 228 228 .compatible = "cirrus,lochnagar2-mic2vdd", 229 - .data = &lochnagar_regulators[LOCHNAGAR_MIC1VDD], 229 + .data = &lochnagar_regulators[LOCHNAGAR_MIC2VDD], 230 230 }, 231 231 { 232 232 .compatible = "cirrus,lochnagar2-vddcore",
+9 -1
drivers/regulator/max77620-regulator.c
··· 1 1 /* 2 2 * Maxim MAX77620 Regulator driver 3 3 * 4 - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. 4 + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. 5 5 * 6 6 * Author: Mallikarjun Kasoju <mkasoju@nvidia.com> 7 7 * Laxman Dewangan <ldewangan@nvidia.com> ··· 803 803 rdesc = &rinfo[id].desc; 804 804 pmic->rinfo[id] = &max77620_regs_info[id]; 805 805 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL; 806 + pmic->reg_pdata[id].active_fps_src = -1; 807 + pmic->reg_pdata[id].active_fps_pd_slot = -1; 808 + pmic->reg_pdata[id].active_fps_pu_slot = -1; 809 + pmic->reg_pdata[id].suspend_fps_src = -1; 810 + pmic->reg_pdata[id].suspend_fps_pd_slot = -1; 811 + pmic->reg_pdata[id].suspend_fps_pu_slot = -1; 812 + pmic->reg_pdata[id].power_ok = -1; 813 + pmic->reg_pdata[id].ramp_rate_setting = -1; 806 814 807 815 ret = max77620_read_slew_rate(pmic, id); 808 816 if (ret < 0)
+38 -38
drivers/regulator/mc13783-regulator.c
··· 228 228 229 229 static struct regulator_ops mc13783_gpo_regulator_ops; 230 230 231 - #define MC13783_DEFINE(prefix, name, reg, vsel_reg, voltages) \ 232 - MC13xxx_DEFINE(MC13783_REG_, name, reg, vsel_reg, voltages, \ 231 + #define MC13783_DEFINE(prefix, name, node, reg, vsel_reg, voltages) \ 232 + MC13xxx_DEFINE(MC13783_REG_, name, node, reg, vsel_reg, voltages, \ 233 233 mc13xxx_regulator_ops) 234 234 235 - #define MC13783_FIXED_DEFINE(prefix, name, reg, voltages) \ 236 - MC13xxx_FIXED_DEFINE(MC13783_REG_, name, reg, voltages, \ 235 + #define MC13783_FIXED_DEFINE(prefix, name, node, reg, voltages) \ 236 + MC13xxx_FIXED_DEFINE(MC13783_REG_, name, node, reg, voltages, \ 237 237 mc13xxx_fixed_regulator_ops) 238 238 239 - #define MC13783_GPO_DEFINE(prefix, name, reg, voltages) \ 240 - MC13xxx_GPO_DEFINE(MC13783_REG_, name, reg, voltages, \ 239 + #define MC13783_GPO_DEFINE(prefix, name, node, reg, voltages) \ 240 + MC13xxx_GPO_DEFINE(MC13783_REG_, name, node, reg, voltages, \ 241 241 mc13783_gpo_regulator_ops) 242 242 243 - #define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \ 244 - MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages) 245 - #define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages) \ 246 - MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages) 243 + #define MC13783_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages) \ 244 + MC13783_DEFINE(REG, _name, _node, _reg, _vsel_reg, _voltages) 245 + #define MC13783_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages) \ 246 + MC13783_DEFINE(REG, _name, _node, _reg, _vsel_reg, _voltages) 247 247 248 248 static struct mc13xxx_regulator mc13783_regulators[] = { 249 - MC13783_DEFINE_SW(SW1A, SWITCHERS0, SWITCHERS0, mc13783_sw1x_val), 250 - MC13783_DEFINE_SW(SW1B, SWITCHERS1, SWITCHERS1, mc13783_sw1x_val), 251 - MC13783_DEFINE_SW(SW2A, SWITCHERS2, SWITCHERS2, mc13783_sw2x_val), 252 - MC13783_DEFINE_SW(SW2B, SWITCHERS3, SWITCHERS3, mc13783_sw2x_val), 253 - MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val), 249 + MC13783_DEFINE_SW(SW1A, sw1a, SWITCHERS0, SWITCHERS0, mc13783_sw1x_val), 250 + MC13783_DEFINE_SW(SW1B, sw1b, SWITCHERS1, SWITCHERS1, mc13783_sw1x_val), 251 + MC13783_DEFINE_SW(SW2A, sw2a, SWITCHERS2, SWITCHERS2, mc13783_sw2x_val), 252 + MC13783_DEFINE_SW(SW2B, sw2b, SWITCHERS3, SWITCHERS3, mc13783_sw2x_val), 253 + MC13783_DEFINE_SW(SW3, sw3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val), 254 254 255 - MC13783_FIXED_DEFINE(REG, VAUDIO, REGULATORMODE0, mc13783_vaudio_val), 256 - MC13783_FIXED_DEFINE(REG, VIOHI, REGULATORMODE0, mc13783_viohi_val), 257 - MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0, 255 + MC13783_FIXED_DEFINE(REG, VAUDIO, vaudio, REGULATORMODE0, mc13783_vaudio_val), 256 + MC13783_FIXED_DEFINE(REG, VIOHI, viohi, REGULATORMODE0, mc13783_viohi_val), 257 + MC13783_DEFINE_REGU(VIOLO, violo, REGULATORMODE0, REGULATORSETTING0, 258 258 mc13783_violo_val), 259 - MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0, 259 + MC13783_DEFINE_REGU(VDIG, vdig, REGULATORMODE0, REGULATORSETTING0, 260 260 mc13783_vdig_val), 261 - MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0, 261 + MC13783_DEFINE_REGU(VGEN, vgen, REGULATORMODE0, REGULATORSETTING0, 262 262 mc13783_vgen_val), 263 - MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0, 263 + MC13783_DEFINE_REGU(VRFDIG, vrfdig, REGULATORMODE0, REGULATORSETTING0, 264 264 mc13783_vrfdig_val), 265 - MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0, 265 + MC13783_DEFINE_REGU(VRFREF, vrfref, REGULATORMODE0, REGULATORSETTING0, 266 266 mc13783_vrfref_val), 267 - MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0, 267 + MC13783_DEFINE_REGU(VRFCP, vrfcp, REGULATORMODE0, REGULATORSETTING0, 268 268 mc13783_vrfcp_val), 269 - MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0, 269 + MC13783_DEFINE_REGU(VSIM, vsim, REGULATORMODE1, REGULATORSETTING0, 270 270 mc13783_vsim_val), 271 - MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0, 271 + MC13783_DEFINE_REGU(VESIM, vesim, REGULATORMODE1, REGULATORSETTING0, 272 272 mc13783_vesim_val), 273 - MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0, 273 + MC13783_DEFINE_REGU(VCAM, vcam, REGULATORMODE1, REGULATORSETTING0, 274 274 mc13783_vcam_val), 275 - MC13783_FIXED_DEFINE(REG, VRFBG, REGULATORMODE1, mc13783_vrfbg_val), 276 - MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1, 275 + MC13783_FIXED_DEFINE(REG, VRFBG, vrfbg, REGULATORMODE1, mc13783_vrfbg_val), 276 + MC13783_DEFINE_REGU(VVIB, vvib, REGULATORMODE1, REGULATORSETTING1, 277 277 mc13783_vvib_val), 278 - MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1, 278 + MC13783_DEFINE_REGU(VRF1, vrf1, REGULATORMODE1, REGULATORSETTING1, 279 279 mc13783_vrf_val), 280 - MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1, 280 + MC13783_DEFINE_REGU(VRF2, vrf2, REGULATORMODE1, REGULATORSETTING1, 281 281 mc13783_vrf_val), 282 - MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1, 282 + MC13783_DEFINE_REGU(VMMC1, vmmc1, REGULATORMODE1, REGULATORSETTING1, 283 283 mc13783_vmmc_val), 284 - MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1, 284 + MC13783_DEFINE_REGU(VMMC2, vmmc2, REGULATORMODE1, REGULATORSETTING1, 285 285 mc13783_vmmc_val), 286 - MC13783_GPO_DEFINE(REG, GPO1, POWERMISC, mc13783_gpo_val), 287 - MC13783_GPO_DEFINE(REG, GPO2, POWERMISC, mc13783_gpo_val), 288 - MC13783_GPO_DEFINE(REG, GPO3, POWERMISC, mc13783_gpo_val), 289 - MC13783_GPO_DEFINE(REG, GPO4, POWERMISC, mc13783_gpo_val), 290 - MC13783_GPO_DEFINE(REG, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val), 291 - MC13783_GPO_DEFINE(REG, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val), 286 + MC13783_GPO_DEFINE(REG, GPO1, gpo1, POWERMISC, mc13783_gpo_val), 287 + MC13783_GPO_DEFINE(REG, GPO2, gpo1, POWERMISC, mc13783_gpo_val), 288 + MC13783_GPO_DEFINE(REG, GPO3, gpo1, POWERMISC, mc13783_gpo_val), 289 + MC13783_GPO_DEFINE(REG, GPO4, gpo1, POWERMISC, mc13783_gpo_val), 290 + MC13783_GPO_DEFINE(REG, PWGT1SPI, pwgt1spi, POWERMISC, mc13783_pwgtdrv_val), 291 + MC13783_GPO_DEFINE(REG, PWGT2SPI, pwgt2spi, POWERMISC, mc13783_pwgtdrv_val), 292 292 }; 293 293 294 294 static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
+32 -32
drivers/regulator/mc13892-regulator.c
··· 246 246 static struct regulator_ops mc13892_sw_regulator_ops; 247 247 248 248 249 - #define MC13892_FIXED_DEFINE(name, reg, voltages) \ 250 - MC13xxx_FIXED_DEFINE(MC13892_, name, reg, voltages, \ 249 + #define MC13892_FIXED_DEFINE(name, node, reg, voltages) \ 250 + MC13xxx_FIXED_DEFINE(MC13892_, name, node, reg, voltages, \ 251 251 mc13xxx_fixed_regulator_ops) 252 252 253 - #define MC13892_GPO_DEFINE(name, reg, voltages) \ 254 - MC13xxx_GPO_DEFINE(MC13892_, name, reg, voltages, \ 253 + #define MC13892_GPO_DEFINE(name, node, reg, voltages) \ 254 + MC13xxx_GPO_DEFINE(MC13892_, name, node, reg, voltages, \ 255 255 mc13892_gpo_regulator_ops) 256 256 257 - #define MC13892_SW_DEFINE(name, reg, vsel_reg, voltages) \ 258 - MC13xxx_DEFINE(MC13892_, name, reg, vsel_reg, voltages, \ 257 + #define MC13892_SW_DEFINE(name, node, reg, vsel_reg, voltages) \ 258 + MC13xxx_DEFINE(MC13892_, name, node, reg, vsel_reg, voltages, \ 259 259 mc13892_sw_regulator_ops) 260 260 261 - #define MC13892_DEFINE_REGU(name, reg, vsel_reg, voltages) \ 262 - MC13xxx_DEFINE(MC13892_, name, reg, vsel_reg, voltages, \ 261 + #define MC13892_DEFINE_REGU(name, node, reg, vsel_reg, voltages) \ 262 + MC13xxx_DEFINE(MC13892_, name, node, reg, vsel_reg, voltages, \ 263 263 mc13xxx_regulator_ops) 264 264 265 265 static struct mc13xxx_regulator mc13892_regulators[] = { 266 - MC13892_DEFINE_REGU(VCOINCELL, POWERCTL0, POWERCTL0, mc13892_vcoincell), 267 - MC13892_SW_DEFINE(SW1, SWITCHERS0, SWITCHERS0, mc13892_sw1), 268 - MC13892_SW_DEFINE(SW2, SWITCHERS1, SWITCHERS1, mc13892_sw), 269 - MC13892_SW_DEFINE(SW3, SWITCHERS2, SWITCHERS2, mc13892_sw), 270 - MC13892_SW_DEFINE(SW4, SWITCHERS3, SWITCHERS3, mc13892_sw), 271 - MC13892_FIXED_DEFINE(SWBST, SWITCHERS5, mc13892_swbst), 272 - MC13892_FIXED_DEFINE(VIOHI, REGULATORMODE0, mc13892_viohi), 273 - MC13892_DEFINE_REGU(VPLL, REGULATORMODE0, REGULATORSETTING0, 266 + MC13892_DEFINE_REGU(VCOINCELL, vcoincell, POWERCTL0, POWERCTL0, mc13892_vcoincell), 267 + MC13892_SW_DEFINE(SW1, sw1, SWITCHERS0, SWITCHERS0, mc13892_sw1), 268 + MC13892_SW_DEFINE(SW2, sw2, SWITCHERS1, SWITCHERS1, mc13892_sw), 269 + MC13892_SW_DEFINE(SW3, sw3, SWITCHERS2, SWITCHERS2, mc13892_sw), 270 + MC13892_SW_DEFINE(SW4, sw4, SWITCHERS3, SWITCHERS3, mc13892_sw), 271 + MC13892_FIXED_DEFINE(SWBST, swbst, SWITCHERS5, mc13892_swbst), 272 + MC13892_FIXED_DEFINE(VIOHI, viohi, REGULATORMODE0, mc13892_viohi), 273 + MC13892_DEFINE_REGU(VPLL, vpll, REGULATORMODE0, REGULATORSETTING0, 274 274 mc13892_vpll), 275 - MC13892_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0, 275 + MC13892_DEFINE_REGU(VDIG, vdig, REGULATORMODE0, REGULATORSETTING0, 276 276 mc13892_vdig), 277 - MC13892_DEFINE_REGU(VSD, REGULATORMODE1, REGULATORSETTING1, 277 + MC13892_DEFINE_REGU(VSD, vsd, REGULATORMODE1, REGULATORSETTING1, 278 278 mc13892_vsd), 279 - MC13892_DEFINE_REGU(VUSB2, REGULATORMODE0, REGULATORSETTING0, 279 + MC13892_DEFINE_REGU(VUSB2, vusb2, REGULATORMODE0, REGULATORSETTING0, 280 280 mc13892_vusb2), 281 - MC13892_DEFINE_REGU(VVIDEO, REGULATORMODE1, REGULATORSETTING1, 281 + MC13892_DEFINE_REGU(VVIDEO, vvideo, REGULATORMODE1, REGULATORSETTING1, 282 282 mc13892_vvideo), 283 - MC13892_DEFINE_REGU(VAUDIO, REGULATORMODE1, REGULATORSETTING1, 283 + MC13892_DEFINE_REGU(VAUDIO, vaudio, REGULATORMODE1, REGULATORSETTING1, 284 284 mc13892_vaudio), 285 - MC13892_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0, 285 + MC13892_DEFINE_REGU(VCAM, vcam, REGULATORMODE1, REGULATORSETTING0, 286 286 mc13892_vcam), 287 - MC13892_DEFINE_REGU(VGEN1, REGULATORMODE0, REGULATORSETTING0, 287 + MC13892_DEFINE_REGU(VGEN1, vgen1, REGULATORMODE0, REGULATORSETTING0, 288 288 mc13892_vgen1), 289 - MC13892_DEFINE_REGU(VGEN2, REGULATORMODE0, REGULATORSETTING0, 289 + MC13892_DEFINE_REGU(VGEN2, vgen2, REGULATORMODE0, REGULATORSETTING0, 290 290 mc13892_vgen2), 291 - MC13892_DEFINE_REGU(VGEN3, REGULATORMODE1, REGULATORSETTING0, 291 + MC13892_DEFINE_REGU(VGEN3, vgen3, REGULATORMODE1, REGULATORSETTING0, 292 292 mc13892_vgen3), 293 - MC13892_FIXED_DEFINE(VUSB, USB1, mc13892_vusb), 294 - MC13892_GPO_DEFINE(GPO1, POWERMISC, mc13892_gpo), 295 - MC13892_GPO_DEFINE(GPO2, POWERMISC, mc13892_gpo), 296 - MC13892_GPO_DEFINE(GPO3, POWERMISC, mc13892_gpo), 297 - MC13892_GPO_DEFINE(GPO4, POWERMISC, mc13892_gpo), 298 - MC13892_GPO_DEFINE(PWGT1SPI, POWERMISC, mc13892_pwgtdrv), 299 - MC13892_GPO_DEFINE(PWGT2SPI, POWERMISC, mc13892_pwgtdrv), 293 + MC13892_FIXED_DEFINE(VUSB, vusb, USB1, mc13892_vusb), 294 + MC13892_GPO_DEFINE(GPO1, gpo1, POWERMISC, mc13892_gpo), 295 + MC13892_GPO_DEFINE(GPO2, gpo2, POWERMISC, mc13892_gpo), 296 + MC13892_GPO_DEFINE(GPO3, gpo3, POWERMISC, mc13892_gpo), 297 + MC13892_GPO_DEFINE(GPO4, gpo4, POWERMISC, mc13892_gpo), 298 + MC13892_GPO_DEFINE(PWGT1SPI, pwgt1spi, POWERMISC, mc13892_pwgtdrv), 299 + MC13892_GPO_DEFINE(PWGT2SPI, pwgt2spi, POWERMISC, mc13892_pwgtdrv), 300 300 }; 301 301 302 302 static int mc13892_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
+10 -10
drivers/regulator/mc13xxx.h
··· 56 56 extern struct regulator_ops mc13xxx_regulator_ops; 57 57 extern struct regulator_ops mc13xxx_fixed_regulator_ops; 58 58 59 - #define MC13xxx_DEFINE(prefix, _name, _reg, _vsel_reg, _voltages, _ops) \ 59 + #define MC13xxx_DEFINE(prefix, _name, _node, _reg, _vsel_reg, _voltages, _ops) \ 60 60 [prefix ## _name] = { \ 61 61 .desc = { \ 62 - .name = #_name, \ 62 + .name = #_node, \ 63 63 .n_voltages = ARRAY_SIZE(_voltages), \ 64 64 .volt_table = _voltages, \ 65 65 .ops = &_ops, \ ··· 74 74 .vsel_mask = prefix ## _vsel_reg ## _ ## _name ## VSEL_M,\ 75 75 } 76 76 77 - #define MC13xxx_FIXED_DEFINE(prefix, _name, _reg, _voltages, _ops) \ 77 + #define MC13xxx_FIXED_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \ 78 78 [prefix ## _name] = { \ 79 79 .desc = { \ 80 - .name = #_name, \ 80 + .name = #_node, \ 81 81 .n_voltages = ARRAY_SIZE(_voltages), \ 82 82 .volt_table = _voltages, \ 83 83 .ops = &_ops, \ ··· 89 89 .enable_bit = prefix ## _reg ## _ ## _name ## EN, \ 90 90 } 91 91 92 - #define MC13xxx_GPO_DEFINE(prefix, _name, _reg, _voltages, _ops) \ 92 + #define MC13xxx_GPO_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \ 93 93 [prefix ## _name] = { \ 94 94 .desc = { \ 95 - .name = #_name, \ 95 + .name = #_node, \ 96 96 .n_voltages = ARRAY_SIZE(_voltages), \ 97 97 .volt_table = _voltages, \ 98 98 .ops = &_ops, \ ··· 104 104 .enable_bit = prefix ## _reg ## _ ## _name ## EN, \ 105 105 } 106 106 107 - #define MC13xxx_DEFINE_SW(_name, _reg, _vsel_reg, _voltages, ops) \ 108 - MC13xxx_DEFINE(SW, _name, _reg, _vsel_reg, _voltages, ops) 109 - #define MC13xxx_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages, ops) \ 110 - MC13xxx_DEFINE(REGU, _name, _reg, _vsel_reg, _voltages, ops) 107 + #define MC13xxx_DEFINE_SW(_name, _node, _reg, _vsel_reg, _voltages, ops) \ 108 + MC13xxx_DEFINE(SW, _name, _node, _reg, _vsel_reg, _voltages, ops) 109 + #define MC13xxx_DEFINE_REGU(_name, _node, _reg, _vsel_reg, _voltages, ops) \ 110 + MC13xxx_DEFINE(REGU, _name, _node, _reg, _vsel_reg, _voltages, ops) 111 111 112 112 #endif
+5 -5
drivers/regulator/s2mpa01.c
··· 298 298 regulator_desc_ldo(2, STEP_50_MV), 299 299 regulator_desc_ldo(3, STEP_50_MV), 300 300 regulator_desc_ldo(4, STEP_50_MV), 301 - regulator_desc_ldo(5, STEP_50_MV), 301 + regulator_desc_ldo(5, STEP_25_MV), 302 302 regulator_desc_ldo(6, STEP_25_MV), 303 303 regulator_desc_ldo(7, STEP_50_MV), 304 304 regulator_desc_ldo(8, STEP_50_MV), 305 305 regulator_desc_ldo(9, STEP_50_MV), 306 306 regulator_desc_ldo(10, STEP_50_MV), 307 - regulator_desc_ldo(11, STEP_25_MV), 307 + regulator_desc_ldo(11, STEP_50_MV), 308 308 regulator_desc_ldo(12, STEP_50_MV), 309 309 regulator_desc_ldo(13, STEP_50_MV), 310 310 regulator_desc_ldo(14, STEP_50_MV), ··· 315 315 regulator_desc_ldo(19, STEP_50_MV), 316 316 regulator_desc_ldo(20, STEP_50_MV), 317 317 regulator_desc_ldo(21, STEP_50_MV), 318 - regulator_desc_ldo(22, STEP_25_MV), 319 - regulator_desc_ldo(23, STEP_25_MV), 318 + regulator_desc_ldo(22, STEP_50_MV), 319 + regulator_desc_ldo(23, STEP_50_MV), 320 320 regulator_desc_ldo(24, STEP_50_MV), 321 321 regulator_desc_ldo(25, STEP_50_MV), 322 - regulator_desc_ldo(26, STEP_50_MV), 322 + regulator_desc_ldo(26, STEP_25_MV), 323 323 regulator_desc_buck1_4(1), 324 324 regulator_desc_buck1_4(2), 325 325 regulator_desc_buck1_4(3),
+3 -3
drivers/regulator/s2mps11.c
··· 362 362 regulator_desc_s2mps11_ldo(32, STEP_50_MV), 363 363 regulator_desc_s2mps11_ldo(33, STEP_50_MV), 364 364 regulator_desc_s2mps11_ldo(34, STEP_50_MV), 365 - regulator_desc_s2mps11_ldo(35, STEP_50_MV), 365 + regulator_desc_s2mps11_ldo(35, STEP_25_MV), 366 366 regulator_desc_s2mps11_ldo(36, STEP_50_MV), 367 367 regulator_desc_s2mps11_ldo(37, STEP_50_MV), 368 368 regulator_desc_s2mps11_ldo(38, STEP_50_MV), ··· 372 372 regulator_desc_s2mps11_buck1_4(4), 373 373 regulator_desc_s2mps11_buck5, 374 374 regulator_desc_s2mps11_buck67810(6, MIN_600_MV, STEP_6_25_MV), 375 - regulator_desc_s2mps11_buck67810(7, MIN_600_MV, STEP_6_25_MV), 376 - regulator_desc_s2mps11_buck67810(8, MIN_600_MV, STEP_6_25_MV), 375 + regulator_desc_s2mps11_buck67810(7, MIN_600_MV, STEP_12_5_MV), 376 + regulator_desc_s2mps11_buck67810(8, MIN_600_MV, STEP_12_5_MV), 377 377 regulator_desc_s2mps11_buck9, 378 378 regulator_desc_s2mps11_buck67810(10, MIN_750_MV, STEP_12_5_MV), 379 379 };
+3 -2
drivers/regulator/stpmic1_regulator.c
··· 56 56 #define PMIC_ENABLE_TIME_US 2200 57 57 58 58 static const struct regulator_linear_range buck1_ranges[] = { 59 - REGULATOR_LINEAR_RANGE(600000, 0, 30, 25000), 60 - REGULATOR_LINEAR_RANGE(1350000, 31, 63, 0), 59 + REGULATOR_LINEAR_RANGE(725000, 0, 4, 0), 60 + REGULATOR_LINEAR_RANGE(725000, 5, 36, 25000), 61 + REGULATOR_LINEAR_RANGE(1500000, 37, 63, 0), 61 62 }; 62 63 63 64 static const struct regulator_linear_range buck2_ranges[] = {
+5 -3
drivers/regulator/uniphier-regulator.c
··· 32 32 const struct uniphier_regulator_soc_data *data; 33 33 }; 34 34 35 - static struct regulator_ops uniphier_regulator_ops = { 35 + static const struct regulator_ops uniphier_regulator_ops = { 36 36 .enable = regulator_enable_regmap, 37 37 .disable = regulator_disable_regmap, 38 38 .is_enabled = regulator_is_enabled_regmap, ··· 87 87 } 88 88 89 89 regmap = devm_regmap_init_mmio(dev, base, priv->data->regconf); 90 - if (IS_ERR(regmap)) 91 - return PTR_ERR(regmap); 90 + if (IS_ERR(regmap)) { 91 + ret = PTR_ERR(regmap); 92 + goto out_rst_assert; 93 + } 92 94 93 95 config.dev = dev; 94 96 config.driver_data = priv;