tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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mips: Replace __ASSEMBLY__ with __ASSEMBLER__ in the mips headers

While the GCC and Clang compilers already define __ASSEMBLER__
automatically when compiling assembler code, __ASSEMBLY__ is a macro
that only gets defined by the Makefiles in the kernel. Defining
such a macro was necessary in the early days of the kernel, since GCC
only started providing __ASSEMBLER__ since version 3.0 in 2000 (see
https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=f8f769ea4e69 ).
However, having two macros can be very confusing nowadays for the
developers when switching between userspace and kernelspace coding,
or when dealing with uapi headers that should use __ASSEMBLER__
instead. So let's now standardize on the __ASSEMBLER__ macro that is
provided by the compilers.

This is almost a completely mechanical patch (done with a simple
"sed -i" statement), with just one comment tweaked manually in
arch/mips/include/asm/cpu.h (that was missing some underscores).

Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

authored by

Thomas Huth and committed by
Thomas Bogendoerfer 157f9533 21050b58

+142 -142
+2 -2
arch/mips/include/asm/addrspace.h
··· 15 15 /* 16 16 * Configure language 17 17 */ 18 - #ifdef __ASSEMBLY__ 18 + #ifdef __ASSEMBLER__ 19 19 #define _ATYPE_ 20 20 #define _ATYPE32_ 21 21 #define _ATYPE64_ ··· 34 34 /* 35 35 * 32-bit MIPS address spaces 36 36 */ 37 - #ifdef __ASSEMBLY__ 37 + #ifdef __ASSEMBLER__ 38 38 #define _ACAST32_ 39 39 #define _ACAST64_ 40 40 #else
+3 -3
arch/mips/include/asm/asm-eva.h
··· 10 10 #ifndef __ASM_ASM_EVA_H 11 11 #define __ASM_ASM_EVA_H 12 12 13 - #ifndef __ASSEMBLY__ 13 + #ifndef __ASSEMBLER__ 14 14 15 15 /* Kernel variants */ 16 16 ··· 99 99 100 100 #endif /* CONFIG_EVA */ 101 101 102 - #else /* __ASSEMBLY__ */ 102 + #else /* __ASSEMBLER__ */ 103 103 104 104 #define kernel_cache(op, base) cache op, base 105 105 #define kernel_pref(hint, base) pref hint, base ··· 185 185 186 186 #endif /* CONFIG_EVA */ 187 187 188 - #endif /* __ASSEMBLY__ */ 188 + #endif /* __ASSEMBLER__ */ 189 189 190 190 #endif /* __ASM_ASM_EVA_H */
+4 -4
arch/mips/include/asm/asm.h
··· 37 37 #define CFI_SECTIONS 38 38 #endif 39 39 40 - #ifdef __ASSEMBLY__ 40 + #ifdef __ASSEMBLER__ 41 41 /* 42 42 * LEAF - declare leaf routine 43 43 */ ··· 123 123 #define ASM_PRINT(string) 124 124 #endif 125 125 126 - #endif /* __ASSEMBLY__ */ 126 + #endif /* __ASSEMBLER__ */ 127 127 128 128 /* 129 129 * Stack alignment ··· 228 228 #define LONG_INS ins 229 229 #define LONG_EXT ext 230 230 231 - #ifdef __ASSEMBLY__ 231 + #ifdef __ASSEMBLER__ 232 232 #define LONG .word 233 233 #endif 234 234 #define LONGSIZE 4 ··· 257 257 #define LONG_INS dins 258 258 #define LONG_EXT dext 259 259 260 - #ifdef __ASSEMBLY__ 260 + #ifdef __ASSEMBLER__ 261 261 #define LONG .dword 262 262 #endif 263 263 #define LONGSIZE 8
+2 -2
arch/mips/include/asm/bmips.h
··· 42 42 43 43 #define ZSCM_REG_BASE 0x97000000 44 44 45 - #if !defined(__ASSEMBLY__) 45 + #if !defined(__ASSEMBLER__) 46 46 47 47 #include <linux/cpumask.h> 48 48 #include <asm/r4kcache.h> ··· 124 124 barrier(); 125 125 } 126 126 127 - #endif /* !defined(__ASSEMBLY__) */ 127 + #endif /* !defined(__ASSEMBLER__) */ 128 128 129 129 #endif /* _ASM_BMIPS_H */
+2 -2
arch/mips/include/asm/cpu.h
··· 288 288 289 289 #define FPIR_IMP_NONE 0x0000 290 290 291 - #if !defined(__ASSEMBLY__) 291 + #if !defined(__ASSEMBLER__) 292 292 293 293 enum cpu_type_enum { 294 294 CPU_UNKNOWN, ··· 329 329 CPU_LAST 330 330 }; 331 331 332 - #endif /* !__ASSEMBLY */ 332 + #endif /* !__ASSEMBLER__ */ 333 333 334 334 /* 335 335 * ISA Level encodings
+1 -1
arch/mips/include/asm/dec/ecc.h
··· 37 37 #define KN0X_ESR_SYNLO (0x7f<<0) /* syndrome from ECC logic */ 38 38 39 39 40 - #ifndef __ASSEMBLY__ 40 + #ifndef __ASSEMBLER__ 41 41 42 42 #include <linux/interrupt.h> 43 43
+2 -2
arch/mips/include/asm/dec/interrupts.h
··· 95 95 #define DEC_CPU_IRQ_ALL (0xff << CAUSEB_IP) 96 96 97 97 98 - #ifndef __ASSEMBLY__ 98 + #ifndef __ASSEMBLER__ 99 99 100 100 /* 101 101 * Interrupt table structures to hide differences between systems. ··· 121 121 extern void dec_intr_unimplemented(void); 122 122 extern void asic_intr_unimplemented(void); 123 123 124 - #endif /* __ASSEMBLY__ */ 124 + #endif /* __ASSEMBLER__ */ 125 125 126 126 #endif
+1 -1
arch/mips/include/asm/dec/kn01.h
··· 71 71 #define KN01_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */ 72 72 73 73 74 - #ifndef __ASSEMBLY__ 74 + #ifndef __ASSEMBLER__ 75 75 76 76 #include <linux/interrupt.h> 77 77 #include <linux/spinlock.h>
+1 -1
arch/mips/include/asm/dec/kn02.h
··· 80 80 #define KN02_IRQ_ALL 0xff 81 81 82 82 83 - #ifndef __ASSEMBLY__ 83 + #ifndef __ASSEMBLER__ 84 84 85 85 #include <linux/types.h> 86 86
+1 -1
arch/mips/include/asm/dec/kn02xa.h
··· 70 70 #define KN02XA_EAR_RES_0 (0x3<<0) /* unused */ 71 71 72 72 73 - #ifndef __ASSEMBLY__ 73 + #ifndef __ASSEMBLER__ 74 74 75 75 #include <linux/interrupt.h> 76 76
+2 -2
arch/mips/include/asm/eva.h
··· 13 13 14 14 #include <kernel-entry-init.h> 15 15 16 - #ifdef __ASSEMBLY__ 16 + #ifdef __ASSEMBLER__ 17 17 18 18 #ifdef CONFIG_EVA 19 19 ··· 38 38 39 39 #endif /* CONFIG_EVA */ 40 40 41 - #endif /* __ASSEMBLY__ */ 41 + #endif /* __ASSEMBLER__ */ 42 42 43 43 #endif
+4 -4
arch/mips/include/asm/ftrace.h
··· 15 15 #define MCOUNT_ADDR ((unsigned long)(_mcount)) 16 16 #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ 17 17 18 - #ifndef __ASSEMBLY__ 18 + #ifndef __ASSEMBLER__ 19 19 extern void _mcount(void); 20 20 #define mcount _mcount 21 21 ··· 89 89 void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra, 90 90 unsigned long fp); 91 91 92 - #endif /* __ASSEMBLY__ */ 92 + #endif /* __ASSEMBLER__ */ 93 93 #endif /* CONFIG_FUNCTION_TRACER */ 94 94 95 95 #ifdef CONFIG_FTRACE_SYSCALLS 96 - #ifndef __ASSEMBLY__ 96 + #ifndef __ASSEMBLER__ 97 97 /* 98 98 * Some syscall entry functions on mips start with "__sys_" (fork and clone, 99 99 * for instance). We should also match the sys_ variant with those. ··· 105 105 return !strcmp(sym, name) || 106 106 (!strncmp(sym, "__sys_", 6) && !strcmp(sym + 6, name + 4)); 107 107 } 108 - #endif /* __ASSEMBLY__ */ 108 + #endif /* __ASSEMBLER__ */ 109 109 #endif /* CONFIG_FTRACE_SYSCALLS */ 110 110 #endif /* _ASM_MIPS_FTRACE_H */
+2 -2
arch/mips/include/asm/hazards.h
··· 301 301 302 302 #endif 303 303 304 - #ifdef __ASSEMBLY__ 304 + #ifdef __ASSEMBLER__ 305 305 306 306 #define _ssnop ___ssnop 307 307 #define _ehb ___ehb ··· 417 417 */ 418 418 extern void mips_ihb(void); 419 419 420 - #endif /* __ASSEMBLY__ */ 420 + #endif /* __ASSEMBLER__ */ 421 421 422 422 #endif /* _ASM_HAZARDS_H */
+2 -2
arch/mips/include/asm/irqflags.h
··· 11 11 #ifndef _ASM_IRQFLAGS_H 12 12 #define _ASM_IRQFLAGS_H 13 13 14 - #ifndef __ASSEMBLY__ 14 + #ifndef __ASSEMBLER__ 15 15 16 16 #include <linux/compiler.h> 17 17 #include <linux/stringify.h> ··· 142 142 return arch_irqs_disabled_flags(arch_local_save_flags()); 143 143 } 144 144 145 - #endif /* #ifndef __ASSEMBLY__ */ 145 + #endif /* #ifndef __ASSEMBLER__ */ 146 146 147 147 /* 148 148 * Do the CPU's IRQ-state tracing from assembly code.
+8 -8
arch/mips/include/asm/jazz.h
··· 70 70 #define LED_E 0x9e 71 71 #define LED_F 0x8e 72 72 73 - #ifndef __ASSEMBLY__ 73 + #ifndef __ASSEMBLER__ 74 74 75 75 static __inline__ void pica_set_led(unsigned int bits) 76 76 { ··· 79 79 *led_register = bits; 80 80 } 81 81 82 - #endif /* !__ASSEMBLY__ */ 82 + #endif /* !__ASSEMBLER__ */ 83 83 84 84 /* 85 85 * Base address of the Sonic Ethernet adapter in Jazz machines. ··· 100 100 #define JAZZ_KEYBOARD_DATA 0xe0005000 101 101 #define JAZZ_KEYBOARD_COMMAND 0xe0005001 102 102 103 - #ifndef __ASSEMBLY__ 103 + #ifndef __ASSEMBLER__ 104 104 105 105 typedef struct { 106 106 unsigned char data; ··· 121 121 */ 122 122 #define keyboard_hardware jazz_keyboard_hardware 123 123 124 - #endif /* !__ASSEMBLY__ */ 124 + #endif /* !__ASSEMBLER__ */ 125 125 126 126 /* 127 127 * i8042 keyboard controller for most other Mips machines. ··· 154 154 /* 155 155 * DRAM configuration register 156 156 */ 157 - #ifndef __ASSEMBLY__ 157 + #ifndef __ASSEMBLER__ 158 158 #ifdef __MIPSEL__ 159 159 typedef struct { 160 160 unsigned int bank2 : 3; ··· 174 174 unsigned int bank2 : 3; 175 175 } dram_configuration; 176 176 #endif 177 - #endif /* !__ASSEMBLY__ */ 177 + #endif /* !__ASSEMBLER__ */ 178 178 179 179 #define PICA_DRAM_CONFIG 0xe00fffe0 180 180 ··· 260 260 /* 261 261 * Access the R4030 DMA and I/O Controller 262 262 */ 263 - #ifndef __ASSEMBLY__ 263 + #ifndef __ASSEMBLER__ 264 264 265 265 static inline void r4030_delay(void) 266 266 { ··· 299 299 r4030_delay(); 300 300 } 301 301 302 - #endif /* !__ASSEMBLY__ */ 302 + #endif /* !__ASSEMBLER__ */ 303 303 304 304 #define JAZZ_FDC_BASE 0xe0003000 305 305 #define JAZZ_RTC_BASE 0xe0004000
+2 -2
arch/mips/include/asm/jump_label.h
··· 10 10 11 11 #define arch_jump_label_transform_static arch_jump_label_transform 12 12 13 - #ifndef __ASSEMBLY__ 13 + #ifndef __ASSEMBLER__ 14 14 15 15 #include <linux/types.h> 16 16 #include <asm/isa-rev.h> ··· 76 76 jump_label_t key; 77 77 }; 78 78 79 - #endif /* __ASSEMBLY__ */ 79 + #endif /* __ASSEMBLER__ */ 80 80 #endif /* _ASM_MIPS_JUMP_LABEL_H */
+1 -1
arch/mips/include/asm/linkage.h
··· 2 2 #ifndef __ASM_LINKAGE_H 3 3 #define __ASM_LINKAGE_H 4 4 5 - #ifdef __ASSEMBLY__ 5 + #ifdef __ASSEMBLER__ 6 6 #include <asm/asm.h> 7 7 #endif 8 8
+2 -2
arch/mips/include/asm/mach-generic/spaces.h
··· 21 21 /* 22 22 * This gives the physical RAM offset. 23 23 */ 24 - #ifndef __ASSEMBLY__ 24 + #ifndef __ASSEMBLER__ 25 25 # if defined(CONFIG_MIPS_AUTO_PFN_OFFSET) 26 26 # define PHYS_OFFSET ((unsigned long)PFN_PHYS(ARCH_PFN_OFFSET)) 27 27 # elif !defined(PHYS_OFFSET) 28 28 # define PHYS_OFFSET _AC(0, UL) 29 29 # endif 30 - #endif /* __ASSEMBLY__ */ 30 + #endif /* __ASSEMBLER__ */ 31 31 32 32 #ifdef CONFIG_32BIT 33 33 #define CAC_BASE _AC(0x80000000, UL)
+2 -2
arch/mips/include/asm/mips-boards/bonito64.h
··· 21 21 #ifndef _ASM_MIPS_BOARDS_BONITO64_H 22 22 #define _ASM_MIPS_BOARDS_BONITO64_H 23 23 24 - #ifdef __ASSEMBLY__ 24 + #ifdef __ASSEMBLER__ 25 25 26 26 /* offsets from base register */ 27 27 #define BONITO(x) (x) ··· 36 36 37 37 #define BONITO(x) *(volatile u32 *)(_pcictrl_bonito + (x)) 38 38 39 - #endif /* __ASSEMBLY__ */ 39 + #endif /* __ASSEMBLER__ */ 40 40 41 41 42 42 #define BONITO_BOOT_BASE 0x1fc00000
+3 -3
arch/mips/include/asm/mipsmtregs.h
··· 10 10 11 11 #include <asm/mipsregs.h> 12 12 13 - #ifndef __ASSEMBLY__ 13 + #ifndef __ASSEMBLER__ 14 14 15 15 /* 16 16 * C macros ··· 176 176 /* TCHalt */ 177 177 #define TCHALT_H (_ULCAST_(1)) 178 178 179 - #ifndef __ASSEMBLY__ 179 + #ifndef __ASSEMBLER__ 180 180 181 181 static inline unsigned core_nvpes(void) 182 182 { ··· 469 469 470 470 __BUILD_SET_C0(mvpcontrol) 471 471 472 - #endif /* Not __ASSEMBLY__ */ 472 + #endif /* Not __ASSEMBLER__ */ 473 473 474 474 #endif
+3 -3
arch/mips/include/asm/mipsregs.h
··· 32 32 /* 33 33 * Configure language 34 34 */ 35 - #ifdef __ASSEMBLY__ 35 + #ifdef __ASSEMBLER__ 36 36 #define _ULCAST_ 37 37 #define _U64CAST_ 38 38 #else ··· 1346 1346 #define FPU_CSR_RD 0x3 /* towards -Infinity */ 1347 1347 1348 1348 1349 - #ifndef __ASSEMBLY__ 1349 + #ifndef __ASSEMBLER__ 1350 1350 1351 1351 /* 1352 1352 * Macros for handling the ISA mode bit for MIPS16 and microMIPS. ··· 3095 3095 return read_c0_ebase() & MIPS_EBASE_CPUNUM; 3096 3096 } 3097 3097 3098 - #endif /* !__ASSEMBLY__ */ 3098 + #endif /* !__ASSEMBLER__ */ 3099 3099 3100 3100 #endif /* _ASM_MIPSREGS_H */
+2 -2
arch/mips/include/asm/msa.h
··· 8 8 9 9 #include <asm/mipsregs.h> 10 10 11 - #ifndef __ASSEMBLY__ 11 + #ifndef __ASSEMBLER__ 12 12 13 13 #include <asm/inst.h> 14 14 ··· 218 218 __BUILD_MSA_CTL_REG(map, 6) 219 219 __BUILD_MSA_CTL_REG(unmap, 7) 220 220 221 - #endif /* !__ASSEMBLY__ */ 221 + #endif /* !__ASSEMBLER__ */ 222 222 223 223 #define MSA_IR 0 224 224 #define MSA_CSR 1
+2 -2
arch/mips/include/asm/pci/bridge.h
··· 43 43 * Bridge address map 44 44 */ 45 45 46 - #ifndef __ASSEMBLY__ 46 + #ifndef __ASSEMBLER__ 47 47 48 48 #define ATE_V 0x01 49 49 #define ATE_CO 0x02 ··· 288 288 }; 289 289 290 290 #define berr_field berr_un.berr_st 291 - #endif /* !__ASSEMBLY__ */ 291 + #endif /* !__ASSEMBLER__ */ 292 292 293 293 /* 294 294 * The values of these macros can and should be crosschecked
+3 -3
arch/mips/include/asm/pm.h
··· 8 8 #ifndef __ASM_PM_H 9 9 #define __ASM_PM_H 10 10 11 - #ifdef __ASSEMBLY__ 11 + #ifdef __ASSEMBLER__ 12 12 13 13 #include <asm/asm-offsets.h> 14 14 #include <asm/asm.h> ··· 130 130 RESUME_RESTORE_REGS_RETURN 131 131 .endm 132 132 133 - #else /* __ASSEMBLY__ */ 133 + #else /* __ASSEMBLER__ */ 134 134 135 135 /** 136 136 * struct mips_static_suspend_state - Core saved CPU state across S2R. ··· 150 150 unsigned long sp; 151 151 }; 152 152 153 - #endif /* !__ASSEMBLY__ */ 153 + #endif /* !__ASSEMBLER__ */ 154 154 155 155 #endif /* __ASM_PM_HELPERS_H */
+1 -1
arch/mips/include/asm/prefetch.h
··· 42 42 #define Pref_WriteBackInvalidate 25 43 43 #define Pref_PrepareForStore 30 44 44 45 - #ifdef __ASSEMBLY__ 45 + #ifdef __ASSEMBLER__ 46 46 47 47 .macro __pref hint addr 48 48 #ifdef CONFIG_CPU_HAS_PREFETCH
+2 -2
arch/mips/include/asm/regdef.h
··· 103 103 104 104 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */ 105 105 106 - #ifdef __ASSEMBLY__ 106 + #ifdef __ASSEMBLER__ 107 107 #if _MIPS_SIM == _MIPS_SIM_ABI32 108 108 109 109 /* ··· 192 192 #define ra $31 /* return address */ 193 193 194 194 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */ 195 - #endif /* __ASSEMBLY__ */ 195 + #endif /* __ASSEMBLER__ */ 196 196 197 197 #endif /* _ASM_REGDEF_H */
+2 -2
arch/mips/include/asm/sibyte/board.h
··· 19 19 #include <asm/sibyte/bigsur.h> 20 20 #endif 21 21 22 - #ifdef __ASSEMBLY__ 22 + #ifdef __ASSEMBLER__ 23 23 24 24 #ifdef LEDS_PHYS 25 25 #define setleds(t0, t1, c0, c1, c2, c3) \ ··· 46 46 #define setleds(s) do { } while (0) 47 47 #endif /* LEDS_PHYS */ 48 48 49 - #endif /* __ASSEMBLY__ */ 49 + #endif /* __ASSEMBLER__ */ 50 50 51 51 #endif /* _SIBYTE_BOARD_H */
+1 -1
arch/mips/include/asm/sibyte/sb1250.h
··· 19 19 20 20 #define SB1250_DUART_MINOR_BASE 64 21 21 22 - #ifndef __ASSEMBLY__ 22 + #ifndef __ASSEMBLER__ 23 23 24 24 #include <asm/addrspace.h> 25 25
+3 -3
arch/mips/include/asm/sibyte/sb1250_defs.h
··· 199 199 * Note: you'll need to define uint32_t and uint64_t in your headers. 200 200 */ 201 201 202 - #if !defined(__ASSEMBLY__) 202 + #if !defined(__ASSEMBLER__) 203 203 #define _SB_MAKE64(x) ((uint64_t)(x)) 204 204 #define _SB_MAKE32(x) ((uint32_t)(x)) 205 205 #else ··· 238 238 */ 239 239 240 240 241 - #if defined(__mips64) && !defined(__ASSEMBLY__) 241 + #if defined(__mips64) && !defined(__ASSEMBLER__) 242 242 #define SBWRITECSR(csr, val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val) 243 243 #define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr))) 244 - #endif /* __ASSEMBLY__ */ 244 + #endif /* __ASSEMBLER__ */ 245 245 246 246 #endif
+3 -3
arch/mips/include/asm/smp-cps.h
··· 9 9 10 10 #define CPS_ENTRY_PATCH_INSNS 6 11 11 12 - #ifndef __ASSEMBLY__ 12 + #ifndef __ASSEMBLER__ 13 13 14 14 struct vpe_boot_config { 15 15 unsigned long pc; ··· 55 55 56 56 #endif /* !CONFIG_MIPS_CPS */ 57 57 58 - #else /* __ASSEMBLY__ */ 58 + #else /* __ASSEMBLER__ */ 59 59 60 60 .extern mips_cps_bootcfg; 61 61 62 - #endif /* __ASSEMBLY__ */ 62 + #endif /* __ASSEMBLER__ */ 63 63 #endif /* __MIPS_ASM_SMP_CPS_H__ */
+9 -9
arch/mips/include/asm/sn/addrs.h
··· 10 10 #define _ASM_SN_ADDRS_H 11 11 12 12 13 - #ifndef __ASSEMBLY__ 13 + #ifndef __ASSEMBLER__ 14 14 #include <linux/smp.h> 15 15 #include <linux/types.h> 16 - #endif /* !__ASSEMBLY__ */ 16 + #endif /* !__ASSEMBLER__ */ 17 17 18 18 #include <asm/addrspace.h> 19 19 #include <asm/sn/kldir.h> ··· 25 25 #endif 26 26 27 27 28 - #ifndef __ASSEMBLY__ 28 + #ifndef __ASSEMBLER__ 29 29 30 30 #define UINT64_CAST (unsigned long) 31 31 32 - #else /* __ASSEMBLY__ */ 32 + #else /* __ASSEMBLER__ */ 33 33 34 34 #define UINT64_CAST 35 35 36 - #endif /* __ASSEMBLY__ */ 36 + #endif /* __ASSEMBLER__ */ 37 37 38 38 39 39 #define NASID_GET_META(_n) ((_n) >> NASID_LOCAL_BITS) ··· 254 254 #define LOCAL_HUB_ADDR(_x) (IALIAS_BASE + (_x)) 255 255 #define REMOTE_HUB_ADDR(_n, _x) ((NODE_SWIN_BASE(_n, 1) + 0x800000 + (_x))) 256 256 257 - #ifndef __ASSEMBLY__ 257 + #ifndef __ASSEMBLER__ 258 258 259 259 #define LOCAL_HUB_PTR(_x) ((u64 *)LOCAL_HUB_ADDR((_x))) 260 260 #define REMOTE_HUB_PTR(_n, _x) ((u64 *)REMOTE_HUB_ADDR((_n), (_x))) ··· 265 265 #define REMOTE_HUB_S(_n, _r, _d) __raw_writeq((_d), \ 266 266 REMOTE_HUB_PTR((_n), (_r))) 267 267 268 - #endif /* !__ASSEMBLY__ */ 268 + #endif /* !__ASSEMBLER__ */ 269 269 270 270 /* 271 271 * Software structure locations -- permanently fixed ··· 315 315 #define KLI_KERN_XP 8 316 316 #define KLI_KERN_PARTID 9 317 317 318 - #ifndef __ASSEMBLY__ 318 + #ifndef __ASSEMBLER__ 319 319 320 320 #define KLD_BASE(nasid) ((kldir_ent_t *) KLDIR_ADDR(nasid)) 321 321 #define KLD_LAUNCH(nasid) (KLD_BASE(nasid) + KLI_LAUNCH) ··· 371 371 #define KERN_VARS_ADDR(nasid) KLD_KERN_VARS(nasid)->pointer 372 372 #define KERN_VARS_SIZE(nasid) KLD_KERN_VARS(nasid)->size 373 373 374 - #endif /* !__ASSEMBLY__ */ 374 + #endif /* !__ASSEMBLER__ */ 375 375 376 376 377 377 #endif /* _ASM_SN_ADDRS_H */
+2 -2
arch/mips/include/asm/sn/gda.h
··· 39 39 #define G_PARTIDOFF 40 40 40 #define G_TABLEOFF 128 41 41 42 - #ifndef __ASSEMBLY__ 42 + #ifndef __ASSEMBLER__ 43 43 44 44 typedef struct gda { 45 45 u32 g_magic; /* GDA magic number */ ··· 63 63 64 64 #define GDA ((gda_t*) GDA_ADDR(get_nasid())) 65 65 66 - #endif /* !__ASSEMBLY__ */ 66 + #endif /* !__ASSEMBLER__ */ 67 67 /* 68 68 * Define: PART_GDA_VERSION 69 69 * Purpose: Define the minimum version of the GDA required, lower
+2 -2
arch/mips/include/asm/sn/kldir.h
··· 15 15 #define KLDIR_ENT_SIZE 0x40 16 16 #define KLDIR_MAX_ENTRIES (0x400 / 0x40) 17 17 18 - #ifndef __ASSEMBLY__ 18 + #ifndef __ASSEMBLER__ 19 19 typedef struct kldir_ent_s { 20 20 u64 magic; /* Indicates validity of entry */ 21 21 off_t offset; /* Offset from start of node space */ ··· 27 27 /* NOTE: These 16 bytes are used in the Partition KLDIR 28 28 entry to store partition info. Refer to klpart.h for this. */ 29 29 } kldir_ent_t; 30 - #endif /* !__ASSEMBLY__ */ 30 + #endif /* !__ASSEMBLER__ */ 31 31 32 32 #ifdef CONFIG_SGI_IP27 33 33 #include <asm/sn/sn0/kldir.h>
+2 -2
arch/mips/include/asm/sn/klkernvars.h
··· 12 12 13 13 #define KV_MAGIC 0x5f4b565f 14 14 15 - #ifndef __ASSEMBLY__ 15 + #ifndef __ASSEMBLER__ 16 16 17 17 #include <asm/sn/types.h> 18 18 ··· 24 24 unsigned long kv_rw_baseaddr; 25 25 } kern_vars_t; 26 26 27 - #endif /* !__ASSEMBLY__ */ 27 + #endif /* !__ASSEMBLER__ */ 28 28 29 29 #endif /* __ASM_SN_KLKERNVARS_H */
+2 -2
arch/mips/include/asm/sn/launch.h
··· 59 59 * clears the BUSY flag after control is returned to it. 60 60 */ 61 61 62 - #ifndef __ASSEMBLY__ 62 + #ifndef __ASSEMBLER__ 63 63 64 64 typedef int launch_state_t; 65 65 typedef void (*launch_proc_t)(u64 call_parm); ··· 101 101 #define LAUNCH_FLASH (*(void (*)(void)) \ 102 102 IP27PROM_FLASHLEDS) 103 103 104 - #endif /* !__ASSEMBLY__ */ 104 + #endif /* !__ASSEMBLER__ */ 105 105 106 106 #endif /* _ASM_SN_LAUNCH_H */
+4 -4
arch/mips/include/asm/sn/nmi.h
··· 48 48 * 49 49 */ 50 50 51 - #ifndef __ASSEMBLY__ 51 + #ifndef __ASSEMBLER__ 52 52 53 53 typedef struct nmi_s { 54 54 volatile unsigned long magic; /* Magic number */ ··· 59 59 volatile unsigned long gmaster; /* Flag true only on global master*/ 60 60 } nmi_t; 61 61 62 - #endif /* !__ASSEMBLY__ */ 62 + #endif /* !__ASSEMBLER__ */ 63 63 64 64 /* Following definitions are needed both in the prom & the kernel 65 65 * to identify the format of the nmi cpu register save area in the 66 66 * low memory on each node. 67 67 */ 68 - #ifndef __ASSEMBLY__ 68 + #ifndef __ASSEMBLER__ 69 69 70 70 struct reg_struct { 71 71 unsigned long gpr[32]; ··· 78 78 unsigned long nmi_sr; 79 79 }; 80 80 81 - #endif /* !__ASSEMBLY__ */ 81 + #endif /* !__ASSEMBLER__ */ 82 82 83 83 /* These are the assembly language offsets into the reg_struct structure */ 84 84
+7 -7
arch/mips/include/asm/sn/sn0/addrs.h
··· 84 84 #define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \ 85 85 NASID_SHFT) & NASID_BITMASK) 86 86 87 - #if !defined(__ASSEMBLY__) 87 + #if !defined(__ASSEMBLER__) 88 88 89 89 #define NODE_SWIN_BASE(nasid, widget) \ 90 90 ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \ 91 91 : RAW_NODE_SWIN_BASE(nasid, widget)) 92 - #else /* __ASSEMBLY__ */ 92 + #else /* __ASSEMBLER__ */ 93 93 #define NODE_SWIN_BASE(nasid, widget) \ 94 94 (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS)) 95 - #endif /* __ASSEMBLY__ */ 95 + #endif /* __ASSEMBLER__ */ 96 96 97 97 /* 98 98 * The following definitions pertain to the IO special address ··· 139 139 /* Turn on sable logging for the processors whose bits are set. */ 140 140 #define SABLE_LOG_TRIGGER(_map) 141 141 142 - #ifndef __ASSEMBLY__ 142 + #ifndef __ASSEMBLER__ 143 143 #define KERN_NMI_ADDR(nasid, slice) \ 144 144 TO_NODE_UNCAC((nasid), IP27_NMI_KREGS_OFFSET + \ 145 145 (IP27_NMI_KREGS_CPU_SIZE * (slice))) 146 - #endif /* !__ASSEMBLY__ */ 146 + #endif /* !__ASSEMBLER__ */ 147 147 148 148 #ifdef PROM 149 149 ··· 248 248 #define KL_UART_DATA LOCAL_HUB_ADDR(MD_UREG0_1) /* UART data reg */ 249 249 #define KL_I2C_REG MD_UREG0_0 /* I2C reg */ 250 250 251 - #ifndef __ASSEMBLY__ 251 + #ifndef __ASSEMBLER__ 252 252 253 253 /* Address 0x400 to 0x1000 ualias points to cache error eframe + misc 254 254 * CACHE_ERR_SP_PTR could either contain an address to the stack, or ··· 266 266 #define CACHE_ERR_SP (CACHE_ERR_SP_PTR - 16) 267 267 #define CACHE_ERR_AREA_SIZE (ARCS_SPB_OFFSET - CACHE_ERR_EFRAME) 268 268 269 - #endif /* !__ASSEMBLY__ */ 269 + #endif /* !__ASSEMBLER__ */ 270 270 271 271 #define _ARCSPROM 272 272
+1 -1
arch/mips/include/asm/sn/sn0/hub.h
··· 37 37 #define UATTR_MSPEC 2 38 38 #define UATTR_UNCAC 3 39 39 40 - #ifdef __ASSEMBLY__ 40 + #ifdef __ASSEMBLER__ 41 41 /* 42 42 * Returns the local nasid into res. 43 43 */
+18 -18
arch/mips/include/asm/sn/sn0/hubio.h
··· 169 169 /* 170 170 * The IO LLP control status register and widget control register 171 171 */ 172 - #ifndef __ASSEMBLY__ 172 + #ifndef __ASSEMBLER__ 173 173 174 174 typedef union hubii_wid_u { 175 175 u64 wid_reg_value; ··· 292 292 } perf_cnt_bits; 293 293 } io_perf_cnt_t; 294 294 295 - #endif /* !__ASSEMBLY__ */ 295 + #endif /* !__ASSEMBLER__ */ 296 296 297 297 298 298 #define LNK_STAT_WORKING 0x2 ··· 440 440 /* 441 441 * Fields in CRB Register A 442 442 */ 443 - #ifndef __ASSEMBLY__ 443 + #ifndef __ASSEMBLER__ 444 444 typedef union icrba_u { 445 445 u64 reg_value; 446 446 struct { ··· 486 486 #define ICRBN_A_CERR_SHFT 54 487 487 #define ICRBN_A_ERR_MASK 0x3ff 488 488 489 - #endif /* !__ASSEMBLY__ */ 489 + #endif /* !__ASSEMBLER__ */ 490 490 491 491 #define IIO_ICRB_ADDR_SHFT 2 /* Shift to get proper address */ 492 492 ··· 509 509 /* 510 510 * Fields in CRB Register B 511 511 */ 512 - #ifndef __ASSEMBLY__ 512 + #ifndef __ASSEMBLER__ 513 513 typedef union icrbb_u { 514 514 u64 reg_value; 515 515 struct { ··· 608 608 #define b_imsg icrbb_field_s.imsg 609 609 #define b_initiator icrbb_field_s.initiator 610 610 611 - #endif /* !__ASSEMBLY__ */ 611 + #endif /* !__ASSEMBLER__ */ 612 612 613 613 /* 614 614 * values for field xtsize ··· 666 666 * Fields in CRB Register C 667 667 */ 668 668 669 - #ifndef __ASSEMBLY__ 669 + #ifndef __ASSEMBLER__ 670 670 671 671 typedef union icrbc_s { 672 672 u64 reg_value; ··· 698 698 #define c_barrop icrbc_field_s.barrop 699 699 #define c_doresp icrbc_field_s.doresp 700 700 #define c_gbr icrbc_field_s.gbr 701 - #endif /* !__ASSEMBLY__ */ 701 + #endif /* !__ASSEMBLER__ */ 702 702 703 703 /* 704 704 * Fields in CRB Register D 705 705 */ 706 706 707 - #ifndef __ASSEMBLY__ 707 + #ifndef __ASSEMBLER__ 708 708 typedef union icrbd_s { 709 709 u64 reg_value; 710 710 struct { ··· 737 737 } hi_ifdr_fields; 738 738 } hubii_ifdr_t; 739 739 740 - #endif /* !__ASSEMBLY__ */ 740 + #endif /* !__ASSEMBLER__ */ 741 741 742 742 /* 743 743 * Hardware designed names for the BTE control registers. ··· 784 784 * IO PIO Read Table Entry format 785 785 */ 786 786 787 - #ifndef __ASSEMBLY__ 787 + #ifndef __ASSEMBLER__ 788 788 789 789 typedef union iprte_a { 790 790 u64 entry; ··· 806 806 #define iprte_init iprte_fields.initiator 807 807 #define iprte_addr iprte_fields.addr 808 808 809 - #endif /* !__ASSEMBLY__ */ 809 + #endif /* !__ASSEMBLER__ */ 810 810 811 811 #define IPRTE_ADDRSHFT 3 812 812 ··· 814 814 * Hub IIO PRB Register format. 815 815 */ 816 816 817 - #ifndef __ASSEMBLY__ 817 + #ifndef __ASSEMBLER__ 818 818 /* 819 819 * Note: Fields bnakctr, anakctr, xtalkctrmode, ovflow fields are 820 820 * "Status" fields, and should only be used in case of clean up after errors. ··· 846 846 #define iprb_anakctr iprb_fields_s.anakctr 847 847 #define iprb_xtalkctr iprb_fields_s.xtalkctr 848 848 849 - #endif /* !__ASSEMBLY__ */ 849 + #endif /* !__ASSEMBLER__ */ 850 850 851 851 /* 852 852 * values for mode field in iprb_t. ··· 861 861 /* 862 862 * IO CRB entry C_A to E_A : Partial (cache) CRBS 863 863 */ 864 - #ifndef __ASSEMBLY__ 864 + #ifndef __ASSEMBLER__ 865 865 typedef union icrbp_a { 866 866 u64 ip_reg; /* the entire register value */ 867 867 struct { ··· 895 895 } ip_fmt; 896 896 } icrbp_a_t; 897 897 898 - #endif /* !__ASSEMBLY__ */ 898 + #endif /* !__ASSEMBLER__ */ 899 899 900 900 /* 901 901 * A couple of defines to go with the above structure. ··· 903 903 #define ICRBP_A_CERR_SHFT 54 904 904 #define ICRBP_A_ERR_MASK 0x3ff 905 905 906 - #ifndef __ASSEMBLY__ 906 + #ifndef __ASSEMBLER__ 907 907 typedef union hubii_idsr { 908 908 u64 iin_reg; 909 909 struct { ··· 917 917 level : 7; 918 918 } iin_fmt; 919 919 } hubii_idsr_t; 920 - #endif /* !__ASSEMBLY__ */ 920 + #endif /* !__ASSEMBLER__ */ 921 921 922 922 /* 923 923 * IO BTE Length/Status (IIO_IBLS) register bit field definitions
+2 -2
arch/mips/include/asm/sn/sn0/hubmd.h
··· 423 423 * Operations on page migration threshold register 424 424 */ 425 425 426 - #ifndef __ASSEMBLY__ 426 + #ifndef __ASSEMBLER__ 427 427 428 428 /* 429 429 * LED register macros ··· 735 735 } md_perf_cnt_t; 736 736 737 737 738 - #endif /* !__ASSEMBLY__ */ 738 + #endif /* !__ASSEMBLER__ */ 739 739 740 740 741 741 #define DIR_ERROR_VALID_MASK 0xe000000000000000
+3 -3
arch/mips/include/asm/sn/sn0/hubni.h
··· 11 11 #ifndef _ASM_SGI_SN0_HUBNI_H 12 12 #define _ASM_SGI_SN0_HUBNI_H 13 13 14 - #ifndef __ASSEMBLY__ 14 + #ifndef __ASSEMBLER__ 15 15 #include <linux/types.h> 16 16 #endif 17 17 ··· 226 226 227 227 #define NLT_EXIT_PORT_MASK (UINT64_CAST 0xf) 228 228 229 - #ifndef __ASSEMBLY__ 229 + #ifndef __ASSEMBLER__ 230 230 231 231 typedef union hubni_port_error_u { 232 232 u64 nipe_reg_value; ··· 258 258 return NASID_TO_COARSEREG_SHFT; 259 259 } 260 260 261 - #endif /* !__ASSEMBLY__ */ 261 + #endif /* !__ASSEMBLER__ */ 262 262 263 263 #endif /* _ASM_SGI_SN0_HUBNI_H */
+2 -2
arch/mips/include/asm/sn/sn0/hubpi.h
··· 306 306 #define ERR_STACK_SIZE_BYTES(_sz) \ 307 307 ((_sz) ? (PI_MIN_STACK_SIZE << ((_sz) - 1)) : 0) 308 308 309 - #ifndef __ASSEMBLY__ 309 + #ifndef __ASSEMBLER__ 310 310 /* 311 311 * format of error stack and error status registers. 312 312 */ ··· 359 359 360 360 typedef u64 rtc_time_t; 361 361 362 - #endif /* !__ASSEMBLY__ */ 362 + #endif /* !__ASSEMBLER__ */ 363 363 364 364 365 365 /* Bits in PI_SYSAD_ERRCHK_EN */
+1 -1
arch/mips/include/asm/sn/types.h
··· 11 11 12 12 #include <linux/types.h> 13 13 14 - #ifndef __ASSEMBLY__ 14 + #ifndef __ASSEMBLER__ 15 15 16 16 typedef unsigned long cpuid_t; 17 17 typedef signed short nasid_t; /* node id in numa-as-id space */
+1 -1
arch/mips/include/asm/sync.h
··· 193 193 * Preprocessor magic to expand macros used as arguments before we insert them 194 194 * into assembly code. 195 195 */ 196 - #ifdef __ASSEMBLY__ 196 + #ifdef __ASSEMBLER__ 197 197 # define ___SYNC(type, reason, else) \ 198 198 ____SYNC(type, reason, else) 199 199 #else
+2 -2
arch/mips/include/asm/thread_info.h
··· 11 11 #ifdef __KERNEL__ 12 12 13 13 14 - #ifndef __ASSEMBLY__ 14 + #ifndef __ASSEMBLER__ 15 15 16 16 #include <asm/processor.h> 17 17 ··· 73 73 register unsigned long current_stack_pointer __asm__("sp"); 74 74 #endif 75 75 76 - #endif /* !__ASSEMBLY__ */ 76 + #endif /* !__ASSEMBLER__ */ 77 77 78 78 /* thread information allocation */ 79 79 #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT)
+2 -2
arch/mips/include/asm/unistd.h
··· 29 29 #define NR_syscalls (__NR_O32_Linux + __NR_O32_Linux_syscalls) 30 30 #endif 31 31 32 - #ifndef __ASSEMBLY__ 32 + #ifndef __ASSEMBLER__ 33 33 34 34 #define __ARCH_WANT_NEW_STAT 35 35 #define __ARCH_WANT_OLD_READDIR ··· 62 62 /* whitelists for checksyscalls */ 63 63 #define __IGNORE_fadvise64_64 64 64 65 - #endif /* !__ASSEMBLY__ */ 65 + #endif /* !__ASSEMBLER__ */ 66 66 67 67 #endif /* _ASM_UNISTD_H */
+2 -2
arch/mips/include/asm/vdso/gettimeofday.h
··· 11 11 #ifndef __ASM_VDSO_GETTIMEOFDAY_H 12 12 #define __ASM_VDSO_GETTIMEOFDAY_H 13 13 14 - #ifndef __ASSEMBLY__ 14 + #ifndef __ASSEMBLER__ 15 15 16 16 #include <asm/vdso/vdso.h> 17 17 #include <asm/clocksource.h> ··· 215 215 } 216 216 #define __arch_get_vdso_u_time_data __arch_get_vdso_u_time_data 217 217 218 - #endif /* !__ASSEMBLY__ */ 218 + #endif /* !__ASSEMBLER__ */ 219 219 220 220 #endif /* __ASM_VDSO_GETTIMEOFDAY_H */
+2 -2
arch/mips/include/asm/vdso/processor.h
··· 5 5 #ifndef __ASM_VDSO_PROCESSOR_H 6 6 #define __ASM_VDSO_PROCESSOR_H 7 7 8 - #ifndef __ASSEMBLY__ 8 + #ifndef __ASSEMBLER__ 9 9 10 10 #ifdef CONFIG_CPU_LOONGSON64 11 11 /* ··· 22 22 #define cpu_relax() barrier() 23 23 #endif 24 24 25 - #endif /* __ASSEMBLY__ */ 25 + #endif /* __ASSEMBLER__ */ 26 26 27 27 #endif /* __ASM_VDSO_PROCESSOR_H */
+2 -2
arch/mips/include/asm/vdso/vdso.h
··· 9 9 10 10 #define __VDSO_PAGES 4 11 11 12 - #ifndef __ASSEMBLY__ 12 + #ifndef __ASSEMBLER__ 13 13 14 14 #include <asm/asm.h> 15 15 #include <asm/vdso.h> ··· 69 69 70 70 #endif /* CONFIG_CLKSRC_MIPS_GIC */ 71 71 72 - #endif /* __ASSEMBLY__ */ 72 + #endif /* __ASSEMBLER__ */
+2 -2
arch/mips/include/asm/vdso/vsyscall.h
··· 4 4 5 5 #include <asm/page.h> 6 6 7 - #ifndef __ASSEMBLY__ 7 + #ifndef __ASSEMBLER__ 8 8 9 9 #include <vdso/datapage.h> 10 10 11 11 /* The asm-generic header needs to be included after the definitions above */ 12 12 #include <asm-generic/vdso/vsyscall.h> 13 13 14 - #endif /* !__ASSEMBLY__ */ 14 + #endif /* !__ASSEMBLER__ */ 15 15 16 16 #endif /* __ASM_VDSO_VSYSCALL_H */
+2 -2
arch/mips/include/asm/xtalk/xtalk.h
··· 12 12 #ifndef _ASM_XTALK_XTALK_H 13 13 #define _ASM_XTALK_XTALK_H 14 14 15 - #ifndef __ASSEMBLY__ 15 + #ifndef __ASSEMBLER__ 16 16 /* 17 17 * User-level device driver visible types 18 18 */ ··· 47 47 #define XIO_PORT(x) ((xwidgetnum_t)(((x)&XIO_PORT_BITS) >> XIO_PORT_SHIFT)) 48 48 #define XIO_PACK(p, o) ((((uint64_t)(p))<<XIO_PORT_SHIFT) | ((o)&XIO_ADDR_BITS)) 49 49 50 - #endif /* !__ASSEMBLY__ */ 50 + #endif /* !__ASSEMBLER__ */ 51 51 52 52 #endif /* _ASM_XTALK_XTALK_H */
+2 -2
arch/mips/include/asm/xtalk/xwidget.h
··· 203 203 * widget target flush register are widget dependent thus will not be 204 204 * defined here 205 205 */ 206 - #ifndef __ASSEMBLY__ 206 + #ifndef __ASSEMBLER__ 207 207 typedef u32 widgetreg_t; 208 208 209 209 /* widget configuration registers */ ··· 274 274 ((hwid2)->mfg_num == XWIDGET_MFG_NUM_NONE) || \ 275 275 ((hwid1)->mfg_num == (hwid2)->mfg_num))) 276 276 277 - #endif /* !__ASSEMBLY__ */ 277 + #endif /* !__ASSEMBLER__ */ 278 278 279 279 #endif /* _ASM_XTALK_XWIDGET_H */
+1 -1
drivers/soc/bcm/brcmstb/pm/pm.h
··· 60 60 PM_DEEP_STANDBY | \ 61 61 PM_PLL_PWRDOWN | PM_PWR_DOWN) 62 62 63 - #ifndef __ASSEMBLY__ 63 + #ifndef __ASSEMBLER__ 64 64 65 65 #ifndef CONFIG_MIPS 66 66 extern const unsigned long brcmstb_pm_do_s2_sz;