Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'ata-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata

Pull ata updates from Damien Le Moal:

- Add support for the .remove_new callback to the ata_platform code to
simplify device removal interface (Uwe)

- Code simplification in ata_dev_revalidate() (Yahu)

- Fix code indentation and coding style in the pata_parport protocol
modules to avoid warnings from static code analyzers (me)

- Clarify ata_eh_qc_retry() behavior with better comments (Niklas)

- Simplify and improve ata_change_queue_depth() behavior to have a
consistent behavior between libsas managed devices and libata managed
devices (e.g. AHCI connected devices) (me)

- Cleanup libata-scsi and libata-eh code to use the ata_ncq_enabled()
and ata_ncq_supported() helpers instead of open coding flags tests
(me)

- Cleanup ahci_reset_controller() code (me)

- Change the pata_octeon_cf and sata_svw drivers to use
of_property_read_reg() to simplify the code (Rob, me)

- Remove unnecessary include files from ahci_octeon driver (me)

- Modify the DesignWare ahci dt bindings to add support for the
Rockchip RK3588 AHCI (Sebastian)

* tag 'ata-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata: (29 commits)
dt-bindings: phy: rockchip: rk3588 has two reset lines
dt-bindings: ata: dwc-ahci: add Rockchip RK3588
dt-bindings: ata: dwc-ahci: add PHY clocks
ata: ahci_octeon: Remove unnecessary include
ata: pata_octeon_cf: Add missing header include
ata: ahci: Cleanup ahci_reset_controller()
ata: Use of_property_read_reg() to parse "reg"
ata: libata-scsi: Use ata_ncq_supported in ata_scsi_dev_config()
ata: libata-eh: Use ata_ncq_enabled() in ata_eh_speed_down()
ata: libata-sata: Improve ata_change_queue_depth()
ata: libata-sata: Simplify ata_change_queue_depth()
ata: libata-eh: Clarify ata_eh_qc_retry() behavior at call site
ata: pata_parport: Fix on26 module code indentation and style
ata: pata_parport: Fix on20 module code indentation and style
ata: pata_parport: Fix ktti module code indentation and style
ata: pata_parport: Fix kbic module code indentation and style
ata: pata_parport: Fix friq module code indentation and style
ata: pata_parport: Fix fit3 module code indentation and style
ata: pata_parport: Fix fit2 module code indentation and style
ata: pata_parport: Fix epia module code indentation and style
...

+2371 -1981
+124
Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Synopsys DWC AHCI SATA controller for Rockchip devices 8 + 9 + maintainers: 10 + - Serge Semin <fancer.lancer@gmail.com> 11 + 12 + description: 13 + This document defines device tree bindings for the Synopsys DWC 14 + implementation of the AHCI SATA controller found in Rockchip 15 + devices. 16 + 17 + select: 18 + properties: 19 + compatible: 20 + contains: 21 + enum: 22 + - rockchip,rk3568-dwc-ahci 23 + - rockchip,rk3588-dwc-ahci 24 + required: 25 + - compatible 26 + 27 + properties: 28 + compatible: 29 + items: 30 + - enum: 31 + - rockchip,rk3568-dwc-ahci 32 + - rockchip,rk3588-dwc-ahci 33 + - const: snps,dwc-ahci 34 + 35 + ports-implemented: 36 + const: 1 37 + 38 + sata-port@0: 39 + $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port 40 + 41 + properties: 42 + reg: 43 + const: 0 44 + 45 + unevaluatedProperties: false 46 + 47 + patternProperties: 48 + "^sata-port@[1-9a-e]$": false 49 + 50 + required: 51 + - compatible 52 + - reg 53 + - interrupts 54 + - clocks 55 + - clock-names 56 + - ports-implemented 57 + 58 + allOf: 59 + - $ref: snps,dwc-ahci-common.yaml# 60 + - if: 61 + properties: 62 + compatible: 63 + contains: 64 + enum: 65 + - rockchip,rk3588-dwc-ahci 66 + then: 67 + properties: 68 + clocks: 69 + maxItems: 5 70 + clock-names: 71 + items: 72 + - const: sata 73 + - const: pmalive 74 + - const: rxoob 75 + - const: ref 76 + - const: asic 77 + - if: 78 + properties: 79 + compatible: 80 + contains: 81 + enum: 82 + - rockchip,rk3568-dwc-ahci 83 + then: 84 + properties: 85 + clocks: 86 + maxItems: 3 87 + clock-names: 88 + items: 89 + - const: sata 90 + - const: pmalive 91 + - const: rxoob 92 + 93 + unevaluatedProperties: false 94 + 95 + examples: 96 + - | 97 + #include <dt-bindings/clock/rockchip,rk3588-cru.h> 98 + #include <dt-bindings/interrupt-controller/arm-gic.h> 99 + #include <dt-bindings/ata/ahci.h> 100 + #include <dt-bindings/phy/phy.h> 101 + 102 + sata@fe210000 { 103 + compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci"; 104 + reg = <0xfe210000 0x1000>; 105 + clocks = <&cru ACLK_SATA0>, <&cru CLK_PMALIVE0>, 106 + <&cru CLK_RXOOB0>, <&cru CLK_PIPEPHY0_REF>, 107 + <&cru CLK_PIPEPHY0_PIPE_ASIC_G>; 108 + clock-names = "sata", "pmalive", "rxoob", "ref", "asic"; 109 + interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH 0>; 110 + ports-implemented = <0x1>; 111 + #address-cells = <1>; 112 + #size-cells = <0>; 113 + 114 + sata-port@0 { 115 + reg = <0>; 116 + hba-port-cap = <HBA_PORT_FBSCP>; 117 + phys = <&combphy0_ps PHY_TYPE_SATA>; 118 + phy-names = "sata-phy"; 119 + snps,rx-ts-max = <32>; 120 + snps,tx-ts-max = <32>; 121 + }; 122 + }; 123 + 124 + ...
+6 -2
Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml
··· 31 31 PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx) 32 32 clock, etc. 33 33 minItems: 1 34 - maxItems: 4 34 + maxItems: 6 35 35 36 36 clock-names: 37 37 minItems: 1 38 - maxItems: 4 38 + maxItems: 6 39 39 items: 40 40 oneOf: 41 41 - description: Application APB/AHB/AXI BIU clock ··· 48 48 const: pmalive 49 49 - description: RxOOB detection clock 50 50 const: rxoob 51 + - description: PHY Transmit Clock 52 + const: asic 53 + - description: PHY Receive Clock 54 + const: rbc 51 55 - description: SATA Ports reference clock 52 56 const: ref 53 57
+9 -4
Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml
··· 13 13 This document defines device tree bindings for the generic Synopsys DWC 14 14 implementation of the AHCI SATA controller. 15 15 16 + select: 17 + properties: 18 + compatible: 19 + enum: 20 + - snps,dwc-ahci 21 + - snps,spear-ahci 22 + required: 23 + - compatible 24 + 16 25 allOf: 17 26 - $ref: snps,dwc-ahci-common.yaml# 18 27 ··· 32 23 const: snps,dwc-ahci 33 24 - description: SPEAr1340 AHCI SATA device 34 25 const: snps,spear-ahci 35 - - description: Rockhip RK3568 AHCI controller 36 - items: 37 - - const: rockchip,rk3568-dwc-ahci 38 - - const: snps,dwc-ahci 39 26 40 27 patternProperties: 41 28 "^sata-port@[0-9a-e]$":
+33 -1
Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml
··· 31 31 - const: pipe 32 32 33 33 resets: 34 + minItems: 1 35 + maxItems: 2 36 + 37 + reset-names: 38 + minItems: 1 34 39 items: 35 - - description: exclusive PHY reset line 40 + - const: phy 41 + - const: apb 36 42 37 43 rockchip,enable-ssc: 38 44 type: boolean ··· 83 77 - rockchip,pipe-grf 84 78 - rockchip,pipe-phy-grf 85 79 - "#phy-cells" 80 + 81 + allOf: 82 + - if: 83 + properties: 84 + compatible: 85 + contains: 86 + const: rockchip,rk3568-naneng-combphy 87 + then: 88 + properties: 89 + resets: 90 + maxItems: 1 91 + reset-names: 92 + maxItems: 1 93 + - if: 94 + properties: 95 + compatible: 96 + contains: 97 + const: rockchip,rk3588-naneng-combphy 98 + then: 99 + properties: 100 + resets: 101 + minItems: 2 102 + reset-names: 103 + minItems: 2 104 + required: 105 + - reset-names 86 106 87 107 additionalProperties: false 88 108
+3 -3
drivers/ata/ahci_brcm.c
··· 544 544 return ret; 545 545 } 546 546 547 - static int brcm_ahci_remove(struct platform_device *pdev) 547 + static void brcm_ahci_remove(struct platform_device *pdev) 548 548 { 549 549 struct ata_host *host = dev_get_drvdata(&pdev->dev); 550 550 struct ahci_host_priv *hpriv = host->private_data; ··· 552 552 553 553 brcm_sata_phys_disable(priv); 554 554 555 - return ata_platform_remove_one(pdev); 555 + ata_platform_remove_one(pdev); 556 556 } 557 557 558 558 static void brcm_ahci_shutdown(struct platform_device *pdev) ··· 573 573 574 574 static struct platform_driver brcm_ahci_driver = { 575 575 .probe = brcm_ahci_probe, 576 - .remove = brcm_ahci_remove, 576 + .remove_new = brcm_ahci_remove, 577 577 .shutdown = brcm_ahci_shutdown, 578 578 .driver = { 579 579 .name = DRV_NAME,
+1 -1
drivers/ata/ahci_ceva.c
··· 369 369 370 370 static struct platform_driver ceva_ahci_driver = { 371 371 .probe = ceva_ahci_probe, 372 - .remove = ata_platform_remove_one, 372 + .remove_new = ata_platform_remove_one, 373 373 .driver = { 374 374 .name = DRV_NAME, 375 375 .of_match_table = ceva_ahci_of_match,
+1 -1
drivers/ata/ahci_da850.c
··· 238 238 239 239 static struct platform_driver ahci_da850_driver = { 240 240 .probe = ahci_da850_probe, 241 - .remove = ata_platform_remove_one, 241 + .remove_new = ata_platform_remove_one, 242 242 .driver = { 243 243 .name = DRV_NAME, 244 244 .of_match_table = ahci_da850_of_match,
+1 -1
drivers/ata/ahci_dm816.c
··· 182 182 183 183 static struct platform_driver ahci_dm816_driver = { 184 184 .probe = ahci_dm816_probe, 185 - .remove = ata_platform_remove_one, 185 + .remove_new = ata_platform_remove_one, 186 186 .driver = { 187 187 .name = AHCI_DM816_DRV_NAME, 188 188 .of_match_table = ahci_dm816_of_match,
+1 -1
drivers/ata/ahci_dwc.c
··· 478 478 479 479 static struct platform_driver ahci_dwc_driver = { 480 480 .probe = ahci_dwc_probe, 481 - .remove = ata_platform_remove_one, 481 + .remove_new = ata_platform_remove_one, 482 482 .shutdown = ahci_platform_shutdown, 483 483 .driver = { 484 484 .name = DRV_NAME,
+1 -1
drivers/ata/ahci_imx.c
··· 1223 1223 1224 1224 static struct platform_driver imx_ahci_driver = { 1225 1225 .probe = imx_ahci_probe, 1226 - .remove = ata_platform_remove_one, 1226 + .remove_new = ata_platform_remove_one, 1227 1227 .driver = { 1228 1228 .name = DRV_NAME, 1229 1229 .of_match_table = imx_ahci_of_match,
+1 -1
drivers/ata/ahci_mtk.c
··· 173 173 174 174 static struct platform_driver mtk_ahci_driver = { 175 175 .probe = mtk_ahci_probe, 176 - .remove = ata_platform_remove_one, 176 + .remove_new = ata_platform_remove_one, 177 177 .driver = { 178 178 .name = DRV_NAME, 179 179 .of_match_table = ahci_of_match,
+1 -1
drivers/ata/ahci_mvebu.c
··· 245 245 246 246 static struct platform_driver ahci_mvebu_driver = { 247 247 .probe = ahci_mvebu_probe, 248 - .remove = ata_platform_remove_one, 248 + .remove_new = ata_platform_remove_one, 249 249 .suspend = ahci_mvebu_suspend, 250 250 .resume = ahci_mvebu_resume, 251 251 .driver = {
-1
drivers/ata/ahci_octeon.c
··· 16 16 #include <linux/of_platform.h> 17 17 18 18 #include <asm/octeon/octeon.h> 19 - #include <asm/bitfield.h> 20 19 21 20 #define CVMX_SATA_UCTL_SHIM_CFG 0xE8 22 21
+1 -1
drivers/ata/ahci_platform.c
··· 96 96 97 97 static struct platform_driver ahci_driver = { 98 98 .probe = ahci_probe, 99 - .remove = ata_platform_remove_one, 99 + .remove_new = ata_platform_remove_one, 100 100 .shutdown = ahci_platform_shutdown, 101 101 .driver = { 102 102 .name = DRV_NAME,
+1 -1
drivers/ata/ahci_qoriq.c
··· 359 359 360 360 static struct platform_driver ahci_qoriq_driver = { 361 361 .probe = ahci_qoriq_probe, 362 - .remove = ata_platform_remove_one, 362 + .remove_new = ata_platform_remove_one, 363 363 .driver = { 364 364 .name = DRV_NAME, 365 365 .of_match_table = ahci_qoriq_of_match,
+1 -1
drivers/ata/ahci_seattle.c
··· 187 187 188 188 static struct platform_driver ahci_seattle_driver = { 189 189 .probe = ahci_seattle_probe, 190 - .remove = ata_platform_remove_one, 190 + .remove_new = ata_platform_remove_one, 191 191 .driver = { 192 192 .name = DRV_NAME, 193 193 .acpi_match_table = ahci_acpi_match,
+1 -1
drivers/ata/ahci_st.c
··· 239 239 .of_match_table = st_ahci_match, 240 240 }, 241 241 .probe = st_ahci_probe, 242 - .remove = ata_platform_remove_one, 242 + .remove_new = ata_platform_remove_one, 243 243 }; 244 244 module_platform_driver(st_ahci_driver); 245 245
+1 -1
drivers/ata/ahci_sunxi.c
··· 292 292 293 293 static struct platform_driver ahci_sunxi_driver = { 294 294 .probe = ahci_sunxi_probe, 295 - .remove = ata_platform_remove_one, 295 + .remove_new = ata_platform_remove_one, 296 296 .driver = { 297 297 .name = DRV_NAME, 298 298 .of_match_table = ahci_sunxi_of_match,
+1 -1
drivers/ata/ahci_tegra.c
··· 609 609 610 610 static struct platform_driver tegra_ahci_driver = { 611 611 .probe = tegra_ahci_probe, 612 - .remove = ata_platform_remove_one, 612 + .remove_new = ata_platform_remove_one, 613 613 .driver = { 614 614 .name = DRV_NAME, 615 615 .of_match_table = tegra_ahci_of_match,
+1 -1
drivers/ata/ahci_xgene.c
··· 868 868 869 869 static struct platform_driver xgene_ahci_driver = { 870 870 .probe = xgene_ahci_probe, 871 - .remove = ata_platform_remove_one, 871 + .remove_new = ata_platform_remove_one, 872 872 .driver = { 873 873 .name = DRV_NAME, 874 874 .of_match_table = xgene_ahci_of_match,
+30 -31
drivers/ata/libahci.c
··· 975 975 void __iomem *mmio = hpriv->mmio; 976 976 u32 tmp; 977 977 978 - /* we must be in AHCI mode, before using anything 979 - * AHCI-specific, such as HOST_RESET. 978 + /* 979 + * We must be in AHCI mode, before using anything AHCI-specific, such 980 + * as HOST_RESET. 980 981 */ 981 982 ahci_enable_ahci(mmio); 982 983 983 - /* global controller reset */ 984 - if (!ahci_skip_host_reset) { 985 - tmp = readl(mmio + HOST_CTL); 986 - if ((tmp & HOST_RESET) == 0) { 987 - writel(tmp | HOST_RESET, mmio + HOST_CTL); 988 - readl(mmio + HOST_CTL); /* flush */ 989 - } 984 + /* Global controller reset */ 985 + if (ahci_skip_host_reset) { 986 + dev_info(host->dev, "Skipping global host reset\n"); 987 + return 0; 988 + } 990 989 991 - /* 992 - * to perform host reset, OS should set HOST_RESET 993 - * and poll until this bit is read to be "0". 994 - * reset must complete within 1 second, or 995 - * the hardware should be considered fried. 996 - */ 997 - tmp = ata_wait_register(NULL, mmio + HOST_CTL, HOST_RESET, 998 - HOST_RESET, 10, 1000); 990 + tmp = readl(mmio + HOST_CTL); 991 + if (!(tmp & HOST_RESET)) { 992 + writel(tmp | HOST_RESET, mmio + HOST_CTL); 993 + readl(mmio + HOST_CTL); /* flush */ 994 + } 999 995 1000 - if (tmp & HOST_RESET) { 1001 - dev_err(host->dev, "controller reset failed (0x%x)\n", 1002 - tmp); 1003 - return -EIO; 1004 - } 996 + /* 997 + * To perform host reset, OS should set HOST_RESET and poll until this 998 + * bit is read to be "0". Reset must complete within 1 second, or the 999 + * hardware should be considered fried. 1000 + */ 1001 + tmp = ata_wait_register(NULL, mmio + HOST_CTL, HOST_RESET, 1002 + HOST_RESET, 10, 1000); 1003 + if (tmp & HOST_RESET) { 1004 + dev_err(host->dev, "Controller reset failed (0x%x)\n", 1005 + tmp); 1006 + return -EIO; 1007 + } 1005 1008 1006 - /* turn on AHCI mode */ 1007 - ahci_enable_ahci(mmio); 1009 + /* Turn on AHCI mode */ 1010 + ahci_enable_ahci(mmio); 1008 1011 1009 - /* Some registers might be cleared on reset. Restore 1010 - * initial values. 1011 - */ 1012 - if (!(hpriv->flags & AHCI_HFLAG_NO_WRITE_TO_RO)) 1013 - ahci_restore_initial_config(host); 1014 - } else 1015 - dev_info(host->dev, "skipping global host reset\n"); 1012 + /* Some registers might be cleared on reset. Restore initial values. */ 1013 + if (!(hpriv->flags & AHCI_HFLAG_NO_WRITE_TO_RO)) 1014 + ahci_restore_initial_config(host); 1016 1015 1017 1016 return 0; 1018 1017 }
+2 -8
drivers/ata/libata-core.c
··· 3802 3802 return -ENODEV; 3803 3803 3804 3804 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */ 3805 - if (ata_class_enabled(new_class) && 3806 - new_class != ATA_DEV_ATA && 3807 - new_class != ATA_DEV_ATAPI && 3808 - new_class != ATA_DEV_ZAC && 3809 - new_class != ATA_DEV_SEMB) { 3805 + if (ata_class_enabled(new_class) && new_class == ATA_DEV_PMP) { 3810 3806 ata_dev_info(dev, "class mismatch %u != %u\n", 3811 3807 dev->class, new_class); 3812 3808 rc = -ENODEV; ··· 6138 6142 * LOCKING: 6139 6143 * Inherited from platform layer (may sleep). 6140 6144 */ 6141 - int ata_platform_remove_one(struct platform_device *pdev) 6145 + void ata_platform_remove_one(struct platform_device *pdev) 6142 6146 { 6143 6147 struct ata_host *host = platform_get_drvdata(pdev); 6144 6148 6145 6149 ata_host_detach(host); 6146 - 6147 - return 0; 6148 6150 } 6149 6151 EXPORT_SYMBOL_GPL(ata_platform_remove_one); 6150 6152
+16 -5
drivers/ata/libata-eh.c
··· 1817 1817 verdict = ata_eh_speed_down_verdict(dev); 1818 1818 1819 1819 /* turn off NCQ? */ 1820 - if ((verdict & ATA_EH_SPDN_NCQ_OFF) && 1821 - (dev->flags & (ATA_DFLAG_PIO | ATA_DFLAG_NCQ | 1822 - ATA_DFLAG_NCQ_OFF)) == ATA_DFLAG_NCQ) { 1820 + if ((verdict & ATA_EH_SPDN_NCQ_OFF) && ata_ncq_enabled(dev)) { 1823 1821 dev->flags |= ATA_DFLAG_NCQ_OFF; 1824 1822 ata_dev_warn(dev, "NCQ disabled due to excessive errors\n"); 1825 1823 goto done; ··· 3811 3813 * generate sense data in this function, 3812 3814 * considering both err_mask and tf. 3813 3815 */ 3814 - if (qc->flags & ATA_QCFLAG_RETRY) 3816 + if (qc->flags & ATA_QCFLAG_RETRY) { 3817 + /* 3818 + * Since qc->err_mask is set, ata_eh_qc_retry() 3819 + * will not increment scmd->allowed, so upper 3820 + * layer will only retry the command if it has 3821 + * not already been retried too many times. 3822 + */ 3815 3823 ata_eh_qc_retry(qc); 3816 - else 3824 + } else { 3817 3825 ata_eh_qc_complete(qc); 3826 + } 3818 3827 } else { 3819 3828 if (qc->flags & ATA_QCFLAG_SENSE_VALID) { 3820 3829 ata_eh_qc_complete(qc); 3821 3830 } else { 3822 3831 /* feed zero TF to sense generation */ 3823 3832 memset(&qc->result_tf, 0, sizeof(qc->result_tf)); 3833 + /* 3834 + * Since qc->err_mask is not set, 3835 + * ata_eh_qc_retry() will increment 3836 + * scmd->allowed, so upper layer is guaranteed 3837 + * to retry the command. 3838 + */ 3824 3839 ata_eh_qc_retry(qc); 3825 3840 } 3826 3841 }
+33 -21
drivers/ata/libata-sata.c
··· 1023 1023 /** 1024 1024 * ata_change_queue_depth - Set a device maximum queue depth 1025 1025 * @ap: ATA port of the target device 1026 - * @dev: target ATA device 1027 1026 * @sdev: SCSI device to configure queue depth for 1028 1027 * @queue_depth: new queue depth 1029 1028 * ··· 1030 1031 * and libata. 1031 1032 * 1032 1033 */ 1033 - int ata_change_queue_depth(struct ata_port *ap, struct ata_device *dev, 1034 - struct scsi_device *sdev, int queue_depth) 1034 + int ata_change_queue_depth(struct ata_port *ap, struct scsi_device *sdev, 1035 + int queue_depth) 1035 1036 { 1037 + struct ata_device *dev; 1036 1038 unsigned long flags; 1039 + int max_queue_depth; 1037 1040 1038 - if (!dev || !ata_dev_enabled(dev)) 1039 - return sdev->queue_depth; 1040 - 1041 - if (queue_depth < 1 || queue_depth == sdev->queue_depth) 1042 - return sdev->queue_depth; 1043 - 1044 - /* NCQ enabled? */ 1045 1041 spin_lock_irqsave(ap->lock, flags); 1046 - dev->flags &= ~ATA_DFLAG_NCQ_OFF; 1047 - if (queue_depth == 1 || !ata_ncq_enabled(dev)) { 1042 + 1043 + dev = ata_scsi_find_dev(ap, sdev); 1044 + if (!dev || queue_depth < 1 || queue_depth == sdev->queue_depth) { 1045 + spin_unlock_irqrestore(ap->lock, flags); 1046 + return sdev->queue_depth; 1047 + } 1048 + 1049 + /* 1050 + * Make sure that the queue depth requested does not exceed the device 1051 + * capabilities. 1052 + */ 1053 + max_queue_depth = min(ATA_MAX_QUEUE, sdev->host->can_queue); 1054 + max_queue_depth = min(max_queue_depth, ata_id_queue_depth(dev->id)); 1055 + if (queue_depth > max_queue_depth) { 1056 + spin_unlock_irqrestore(ap->lock, flags); 1057 + return -EINVAL; 1058 + } 1059 + 1060 + /* 1061 + * If NCQ is not supported by the device or if the target queue depth 1062 + * is 1 (to disable drive side command queueing), turn off NCQ. 1063 + */ 1064 + if (queue_depth == 1 || !ata_ncq_supported(dev)) { 1048 1065 dev->flags |= ATA_DFLAG_NCQ_OFF; 1049 1066 queue_depth = 1; 1067 + } else { 1068 + dev->flags &= ~ATA_DFLAG_NCQ_OFF; 1050 1069 } 1070 + 1051 1071 spin_unlock_irqrestore(ap->lock, flags); 1052 1072 1053 - /* limit and apply queue depth */ 1054 - queue_depth = min(queue_depth, sdev->host->can_queue); 1055 - queue_depth = min(queue_depth, ata_id_queue_depth(dev->id)); 1056 - queue_depth = min(queue_depth, ATA_MAX_QUEUE); 1057 - 1058 - if (sdev->queue_depth == queue_depth) 1059 - return -EINVAL; 1073 + if (queue_depth == sdev->queue_depth) 1074 + return sdev->queue_depth; 1060 1075 1061 1076 return scsi_change_queue_depth(sdev, queue_depth); 1062 1077 } ··· 1095 1082 { 1096 1083 struct ata_port *ap = ata_shost_to_port(sdev->host); 1097 1084 1098 - return ata_change_queue_depth(ap, ata_scsi_find_dev(ap, sdev), 1099 - sdev, queue_depth); 1085 + return ata_change_queue_depth(ap, sdev, queue_depth); 1100 1086 } 1101 1087 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); 1102 1088
+1 -1
drivers/ata/libata-scsi.c
··· 1122 1122 if (dev->flags & ATA_DFLAG_AN) 1123 1123 set_bit(SDEV_EVT_MEDIA_CHANGE, sdev->supported_events); 1124 1124 1125 - if (dev->flags & ATA_DFLAG_NCQ) 1125 + if (ata_ncq_supported(dev)) 1126 1126 depth = min(sdev->host->can_queue, ata_id_queue_depth(dev->id)); 1127 1127 depth = min(ATA_MAX_QUEUE, depth); 1128 1128 scsi_change_queue_depth(sdev, depth);
+1 -1
drivers/ata/pata_ixp4xx_cf.c
··· 303 303 .of_match_table = ixp4xx_pata_of_match, 304 304 }, 305 305 .probe = ixp4xx_pata_probe, 306 - .remove = ata_platform_remove_one, 306 + .remove_new = ata_platform_remove_one, 307 307 }; 308 308 309 309 module_platform_driver(ixp4xx_pata_platform_driver);
+10 -17
drivers/ata/pata_octeon_cf.c
··· 16 16 #include <linux/slab.h> 17 17 #include <linux/irq.h> 18 18 #include <linux/of.h> 19 + #include <linux/of_address.h> 19 20 #include <linux/of_platform.h> 20 21 #include <linux/platform_device.h> 21 22 #include <scsi/scsi_host.h> ··· 805 804 struct resource *res_cs0, *res_cs1; 806 805 807 806 bool is_16bit; 808 - const __be32 *cs_num; 809 - struct property *reg_prop; 810 - int n_addr, n_size, reg_len; 807 + u64 reg; 811 808 struct device_node *node; 812 809 void __iomem *cs0; 813 810 void __iomem *cs1 = NULL; ··· 833 834 else 834 835 is_16bit = false; 835 836 836 - n_addr = of_n_addr_cells(node); 837 - n_size = of_n_size_cells(node); 838 - 839 - reg_prop = of_find_property(node, "reg", &reg_len); 840 - if (!reg_prop || reg_len < sizeof(__be32)) 841 - return -EINVAL; 842 - 843 - cs_num = reg_prop->value; 844 - cf_port->cs0 = be32_to_cpup(cs_num); 837 + rv = of_property_read_reg(node, 0, &reg, NULL); 838 + if (rv < 0) 839 + return rv; 840 + cf_port->cs0 = upper_32_bits(reg); 845 841 846 842 if (cf_port->is_true_ide) { 847 843 struct device_node *dma_node; ··· 878 884 cs1 = devm_ioremap(&pdev->dev, res_cs1->start, 879 885 resource_size(res_cs1)); 880 886 if (!cs1) 881 - return rv; 882 - 883 - if (reg_len < (n_addr + n_size + 1) * sizeof(__be32)) 884 887 return -EINVAL; 885 888 886 - cs_num += n_addr + n_size; 887 - cf_port->cs1 = be32_to_cpup(cs_num); 889 + rv = of_property_read_reg(node, 1, &reg, NULL); 890 + if (rv < 0) 891 + return rv; 892 + cf_port->cs1 = upper_32_bits(reg); 888 893 } 889 894 890 895 res_cs0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+1 -1
drivers/ata/pata_of_platform.c
··· 89 89 .of_match_table = pata_of_platform_match, 90 90 }, 91 91 .probe = pata_of_platform_probe, 92 - .remove = ata_platform_remove_one, 92 + .remove_new = ata_platform_remove_one, 93 93 }; 94 94 95 95 module_platform_driver(pata_of_platform_driver);
+53 -50
drivers/ata/pata_parport/aten.c
··· 1 - /* 2 - aten.c (c) 1997-8 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - aten.c is a low-level protocol driver for the ATEN EH-100 6 - parallel port adapter. The EH-100 supports 4-bit and 8-bit 7 - modes only. There is also an EH-132 which supports EPP mode 8 - transfers. The EH-132 is not yet supported. 9 - 10 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1997-8 Grant R. Guenther <grant@torque.net> 4 + * 5 + * aten.c is a low-level protocol driver for the ATEN EH-100 6 + * parallel port adapter. The EH-100 supports 4-bit and 8-bit 7 + * modes only. There is also an EH-132 which supports EPP mode 8 + * transfers. The EH-132 is not yet supported. 9 + */ 11 10 12 11 #include <linux/module.h> 13 12 #include <linux/init.h> ··· 19 20 20 21 #define j44(a,b) ((((a>>4)&0x0f)|(b&0xf0))^0x88) 21 22 22 - /* cont = 0 - access the IDE register file 23 - cont = 1 - access the IDE command set 24 - */ 25 - 23 + /* 24 + * cont = 0 - access the IDE register file 25 + * cont = 1 - access the IDE command set 26 + */ 26 27 static int cont_map[2] = { 0x08, 0x20 }; 27 28 28 29 static void aten_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 29 - 30 - { int r; 31 - 32 - r = regr + cont_map[cont] + 0x80; 30 + { 31 + int r = regr + cont_map[cont] + 0x80; 33 32 34 33 w0(r); w2(0xe); w2(6); w0(val); w2(7); w2(6); w2(0xc); 35 34 } 36 35 37 36 static int aten_read_regr(struct pi_adapter *pi, int cont, int regr) 37 + { 38 + int a, b, r; 38 39 39 - { int a, b, r; 40 - 41 - r = regr + cont_map[cont] + 0x40; 40 + r = regr + cont_map[cont] + 0x40; 42 41 43 42 switch (pi->mode) { 44 43 45 - case 0: w0(r); w2(0xe); w2(6); 44 + case 0: 45 + w0(r); w2(0xe); w2(6); 46 46 w2(7); w2(6); w2(0); 47 47 a = r1(); w0(0x10); b = r1(); w2(0xc); 48 48 return j44(a,b); 49 49 50 - case 1: r |= 0x10; 51 - w0(r); w2(0xe); w2(6); w0(0xff); 50 + case 1: 51 + r |= 0x10; 52 + w0(r); w2(0xe); w2(6); w0(0xff); 52 53 w2(0x27); w2(0x26); w2(0x20); 53 54 a = r0(); 54 55 w2(0x26); w2(0xc); ··· 58 59 } 59 60 60 61 static void aten_read_block(struct pi_adapter *pi, char *buf, int count) 61 - 62 - { int k, a, b, c, d; 62 + { 63 + int k, a, b, c, d; 63 64 64 65 switch (pi->mode) { 65 66 66 - case 0: w0(0x48); w2(0xe); w2(6); 67 - for (k=0;k<count/2;k++) { 67 + case 0: 68 + w0(0x48); w2(0xe); w2(6); 69 + for (k = 0; k < count / 2; k++) { 68 70 w2(7); w2(6); w2(2); 69 71 a = r1(); w0(0x58); b = r1(); 70 72 w2(0); d = r1(); w0(0x48); c = r1(); 71 - buf[2*k] = j44(c,d); 72 - buf[2*k+1] = j44(a,b); 73 + buf[2 * k] = j44(c, d); 74 + buf[2 * k + 1] = j44(a, b); 73 75 } 74 76 w2(0xc); 75 77 break; 76 78 77 - case 1: w0(0x58); w2(0xe); w2(6); 78 - for (k=0;k<count/2;k++) { 79 + case 1: 80 + w0(0x58); w2(0xe); w2(6); 81 + for (k = 0; k < count / 2; k++) { 79 82 w2(0x27); w2(0x26); w2(0x22); 80 83 a = r0(); w2(0x20); b = r0(); 81 - buf[2*k] = b; buf[2*k+1] = a; 84 + buf[2 * k] = b; 85 + buf[2 * k + 1] = a; 82 86 } 83 87 w2(0x26); w2(0xc); 84 88 break; ··· 89 87 } 90 88 91 89 static void aten_write_block(struct pi_adapter *pi, char *buf, int count) 92 - 93 - { int k; 90 + { 91 + int k; 94 92 95 93 w0(0x88); w2(0xe); w2(6); 96 - for (k=0;k<count/2;k++) { 97 - w0(buf[2*k+1]); w2(0xe); w2(6); 98 - w0(buf[2*k]); w2(7); w2(6); 94 + for (k = 0; k < count / 2; k++) { 95 + w0(buf[2 * k + 1]); w2(0xe); w2(6); 96 + w0(buf[2 * k]); w2(7); w2(6); 99 97 } 100 98 w2(0xc); 101 99 } 102 100 103 101 static void aten_connect(struct pi_adapter *pi) 104 - 105 - { pi->saved_r0 = r0(); 106 - pi->saved_r2 = r2(); 107 - w2(0xc); 102 + { 103 + pi->saved_r0 = r0(); 104 + pi->saved_r2 = r2(); 105 + w2(0xc); 108 106 } 109 107 110 108 static void aten_disconnect(struct pi_adapter *pi) 111 - 112 - { w0(pi->saved_r0); 113 - w2(pi->saved_r2); 114 - } 109 + { 110 + w0(pi->saved_r0); 111 + w2(pi->saved_r2); 112 + } 115 113 116 114 static void aten_log_adapter(struct pi_adapter *pi) 115 + { 116 + char *mode_string[2] = { "4-bit", "8-bit" }; 117 117 118 - { char *mode_string[2] = {"4-bit","8-bit"}; 119 - 120 - dev_info(&pi->dev, "ATEN EH-100 at 0x%x, mode %d (%s), delay %d\n", 121 - pi->port, pi->mode, mode_string[pi->mode], pi->delay); 118 + dev_info(&pi->dev, 119 + "ATEN EH-100 at 0x%x, mode %d (%s), delay %d\n", 120 + pi->port, pi->mode, mode_string[pi->mode], pi->delay); 122 121 } 123 122 124 123 static struct pi_protocol aten = {
+266 -200
drivers/ata/pata_parport/bpck.c
··· 1 - /* 2 - bpck.c (c) 1996-8 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - bpck.c is a low-level protocol driver for the MicroSolutions 6 - "backpack" parallel port IDE adapter. 7 - 8 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1996-1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * bpck.c is a low-level protocol driver for the MicroSolutions 6 + * "backpack" parallel port IDE adapter. 7 + */ 9 8 10 9 #include <linux/module.h> 11 10 #include <linux/init.h> ··· 28 29 29 30 #define j44(l,h) (((l>>3)&0x7)|((l>>4)&0x8)|((h<<1)&0x70)|(h&0x80)) 30 31 31 - /* cont = 0 - access the IDE register file 32 - cont = 1 - access the IDE command set 33 - cont = 2 - use internal bpck register addressing 34 - */ 35 - 32 + /* 33 + * cont = 0 - access the IDE register file 34 + * cont = 1 - access the IDE command set 35 + * cont = 2 - use internal bpck register addressing 36 + */ 36 37 static int cont_map[3] = { 0x40, 0x48, 0 }; 37 38 38 39 static int bpck_read_regr(struct pi_adapter *pi, int cont, int regr) 39 - 40 - { int r, l, h; 40 + { 41 + int r, l, h; 41 42 42 43 r = regr + cont_map[cont]; 43 44 44 45 switch (pi->mode) { 45 - 46 - case 0: w0(r & 0xf); w0(r); t2(2); t2(4); 46 + case 0: 47 + w0(r & 0xf); w0(r); t2(2); t2(4); 47 48 l = r1(); 48 - t2(4); 49 - h = r1(); 50 - return j44(l,h); 51 - 52 - case 1: w0(r & 0xf); w0(r); t2(2); 53 - e2(); t2(0x20); 49 + t2(4); 50 + h = r1(); 51 + return j44(l, h); 52 + case 1: 53 + w0(r & 0xf); w0(r); t2(2); 54 + e2(); t2(0x20); 54 55 t2(4); h = r0(); 55 - t2(1); t2(0x20); 56 - return h; 57 - 56 + t2(1); t2(0x20); 57 + return h; 58 58 case 2: 59 59 case 3: 60 - case 4: w0(r); w2(9); w2(0); w2(0x20); 60 + case 4: 61 + w0(r); w2(9); w2(0); w2(0x20); 61 62 h = r4(); 62 63 w2(0); 63 64 return h; 64 65 65 66 } 66 67 return -1; 67 - } 68 + } 68 69 69 70 static void bpck_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 70 - 71 - { int r; 71 + { 72 + int r; 72 73 73 74 r = regr + cont_map[cont]; 74 75 75 76 switch (pi->mode) { 76 - 77 77 case 0: 78 78 case 1: w0(r); 79 79 t2(2); 80 80 w0(val); 81 81 o2(); t2(4); t2(1); 82 82 break; 83 - 84 83 case 2: 85 84 case 3: 86 85 case 4: w0(r); w2(9); w2(0); ··· 94 97 #define RR(r) (bpck_read_regr(pi,2,r)) 95 98 96 99 static void bpck_write_block(struct pi_adapter *pi, char *buf, int count) 97 - 98 - { int i; 100 + { 101 + int i; 99 102 100 103 switch (pi->mode) { 101 104 102 - case 0: WR(4,0x40); 105 + case 0: 106 + WR(4, 0x40); 103 107 w0(0x40); t2(2); t2(1); 104 - for (i=0;i<count;i++) { w0(buf[i]); t2(4); } 105 - WR(4,0); 108 + for (i = 0; i < count; i++) { 109 + w0(buf[i]); 110 + t2(4); 111 + } 112 + WR(4, 0); 106 113 break; 107 114 108 - case 1: WR(4,0x50); 109 - w0(0x40); t2(2); t2(1); 110 - for (i=0;i<count;i++) { w0(buf[i]); t2(4); } 111 - WR(4,0x10); 115 + case 1: 116 + WR(4, 0x50); 117 + w0(0x40); t2(2); t2(1); 118 + for (i = 0; i < count; i++) { 119 + w0(buf[i]); 120 + t2(4); 121 + } 122 + WR(4, 0x10); 112 123 break; 113 124 114 - case 2: WR(4,0x48); 125 + case 2: 126 + WR(4, 0x48); 115 127 w0(0x40); w2(9); w2(0); w2(1); 116 - for (i=0;i<count;i++) w4(buf[i]); 128 + for (i = 0; i < count; i++) 129 + w4(buf[i]); 117 130 w2(0); 118 - WR(4,8); 131 + WR(4, 8); 119 132 break; 120 133 121 - case 3: WR(4,0x48); 122 - w0(0x40); w2(9); w2(0); w2(1); 123 - for (i=0;i<count/2;i++) w4w(((u16 *)buf)[i]); 124 - w2(0); 125 - WR(4,8); 126 - break; 127 - 128 - case 4: WR(4,0x48); 129 - w0(0x40); w2(9); w2(0); w2(1); 130 - for (i=0;i<count/4;i++) w4l(((u32 *)buf)[i]); 131 - w2(0); 132 - WR(4,8); 133 - break; 134 + case 3: 135 + WR(4, 0x48); 136 + w0(0x40); w2(9); w2(0); w2(1); 137 + for (i = 0; i < count / 2; i++) 138 + w4w(((u16 *)buf)[i]); 139 + w2(0); 140 + WR(4, 8); 141 + break; 142 + 143 + case 4: 144 + WR(4, 0x48); 145 + w0(0x40); w2(9); w2(0); w2(1); 146 + for (i = 0; i < count / 4; i++) 147 + w4l(((u32 *)buf)[i]); 148 + w2(0); 149 + WR(4, 8); 150 + break; 134 151 } 135 152 } 136 153 137 154 static void bpck_read_block(struct pi_adapter *pi, char *buf, int count) 138 - 139 - { int i, l, h; 155 + { 156 + int i, l, h; 140 157 141 158 switch (pi->mode) { 142 159 143 - case 0: WR(4,0x40); 160 + case 0: 161 + WR(4, 0x40); 144 162 w0(0x40); t2(2); 145 - for (i=0;i<count;i++) { 146 - t2(4); l = r1(); 147 - t2(4); h = r1(); 148 - buf[i] = j44(l,h); 163 + for (i = 0; i < count; i++) { 164 + t2(4); l = r1(); 165 + t2(4); h = r1(); 166 + buf[i] = j44(l, h); 149 167 } 150 - WR(4,0); 168 + WR(4, 0); 151 169 break; 152 170 153 - case 1: WR(4,0x50); 171 + case 1: 172 + WR(4, 0x50); 154 173 w0(0x40); t2(2); t2(0x20); 155 - for(i=0;i<count;i++) { t2(4); buf[i] = r0(); } 156 - t2(1); t2(0x20); 157 - WR(4,0x10); 174 + for (i = 0; i < count; i++) { 175 + t2(4); 176 + buf[i] = r0(); 177 + } 178 + t2(1); t2(0x20); 179 + WR(4, 0x10); 158 180 break; 159 181 160 - case 2: WR(4,0x48); 182 + case 2: 183 + WR(4, 0x48); 161 184 w0(0x40); w2(9); w2(0); w2(0x20); 162 - for (i=0;i<count;i++) buf[i] = r4(); 185 + for (i = 0; i < count; i++) 186 + buf[i] = r4(); 163 187 w2(0); 164 - WR(4,8); 188 + WR(4, 8); 165 189 break; 166 190 167 - case 3: WR(4,0x48); 168 - w0(0x40); w2(9); w2(0); w2(0x20); 169 - for (i=0;i<count/2;i++) ((u16 *)buf)[i] = r4w(); 170 - w2(0); 171 - WR(4,8); 172 - break; 191 + case 3: 192 + WR(4, 0x48); 193 + w0(0x40); w2(9); w2(0); w2(0x20); 194 + for (i = 0; i < count / 2; i++) 195 + ((u16 *)buf)[i] = r4w(); 196 + w2(0); 197 + WR(4, 8); 198 + break; 173 199 174 - case 4: WR(4,0x48); 175 - w0(0x40); w2(9); w2(0); w2(0x20); 176 - for (i=0;i<count/4;i++) ((u32 *)buf)[i] = r4l(); 177 - w2(0); 178 - WR(4,8); 179 - break; 200 + case 4: 201 + WR(4, 0x48); 202 + w0(0x40); w2(9); w2(0); w2(0x20); 203 + for (i = 0; i < count / 4; i++) 204 + ((u32 *)buf)[i] = r4l(); 205 + w2(0); 206 + WR(4, 8); 207 + break; 180 208 181 209 } 182 210 } 183 211 184 212 static int bpck_probe_unit(struct pi_adapter *pi) 185 - 186 - { int o1, o0, f7, id; 213 + { 214 + int o1, o0, f7, id; 187 215 int t, s; 188 216 189 217 id = pi->unit; 190 218 s = 0; 191 - w2(4); w2(0xe); r2(); t2(2); 219 + w2(4); w2(0xe); r2(); t2(2); 192 220 o1 = r1()&0xf8; 193 221 o0 = r0(); 194 222 w0(255-id); w2(4); w0(id); 195 223 t2(8); t2(8); t2(8); 196 224 t2(2); t = r1()&0xf8; 197 225 f7 = ((id % 8) == 7); 198 - if ((f7) || (t != o1)) { t2(2); s = r1()&0xf8; } 226 + if ((f7) || (t != o1)) { 227 + t2(2); 228 + s = r1() & 0xf8; 229 + } 199 230 if ((t == o1) && ((!f7) || (s == o1))) { 200 231 w2(0x4c); w0(o0); 201 - return 0; 232 + return 0; 202 233 } 203 234 t2(8); w0(0); t2(2); w2(0x4c); w0(o0); 204 235 return 1; 205 236 } 206 - 237 + 207 238 static void bpck_connect(struct pi_adapter *pi) 208 - 209 - { pi->saved_r0 = r0(); 239 + { 240 + pi->saved_r0 = r0(); 210 241 w0(0xff-pi->unit); w2(4); w0(pi->unit); 211 - t2(8); t2(8); t2(8); 242 + t2(8); t2(8); t2(8); 212 243 t2(2); t2(2); 213 - 244 + 214 245 switch (pi->mode) { 215 - 216 - case 0: t2(8); WR(4,0); 246 + case 0: 247 + t2(8); WR(4, 0); 217 248 break; 218 - 219 - case 1: t2(8); WR(4,0x10); 249 + case 1: 250 + t2(8); WR(4, 0x10); 220 251 break; 221 - 222 252 case 2: 223 - case 3: 224 - case 4: w2(0); WR(4,8); 253 + case 3: 254 + case 4: 255 + w2(0); WR(4, 8); 225 256 break; 226 - 227 257 } 228 258 229 259 WR(5,8); 230 260 231 - /* if (pi->devtype == PI_PCD) { possibly wrong, purpose unknown */ 232 - WR(0x46,0x10); /* fiddle with ESS logic ??? */ 233 - WR(0x4c,0x38); 234 - WR(0x4d,0x88); 235 - WR(0x46,0xa0); 236 - WR(0x41,0); 237 - WR(0x4e,8); 238 - /* }*/ 261 + /* 262 + * Possibly wrong, purpose unknown (fiddle with ESS logic ???) 263 + * if (pi->devtype == PI_PCD) { 264 + */ 265 + WR(0x46, 0x10); 266 + WR(0x4c, 0x38); 267 + WR(0x4d, 0x88); 268 + WR(0x46, 0xa0); 269 + WR(0x41, 0); 270 + WR(0x4e, 8); 271 + /* } */ 239 272 } 240 273 241 274 static void bpck_disconnect(struct pi_adapter *pi) 242 - 243 - { w0(0); 244 - if (pi->mode >= 2) { w2(9); w2(0); } else t2(2); 275 + { 276 + w0(0); 277 + if (pi->mode >= 2) { 278 + w2(9); w2(0); 279 + } else { 280 + t2(2); 281 + } 245 282 w2(0x4c); w0(pi->saved_r0); 246 - } 283 + } 247 284 248 285 static void bpck_force_spp(struct pi_adapter *pi) 286 + { 287 + /* This fakes the EPP protocol to turn off EPP ... */ 288 + pi->saved_r0 = r0(); 289 + w0(0xff-pi->unit); w2(4); w0(pi->unit); 290 + t2(8); t2(8); t2(8); 291 + t2(2); t2(2); 249 292 250 - /* This fakes the EPP protocol to turn off EPP ... */ 251 - 252 - { pi->saved_r0 = r0(); 253 - w0(0xff-pi->unit); w2(4); w0(pi->unit); 254 - t2(8); t2(8); t2(8); 255 - t2(2); t2(2); 256 - 257 - w2(0); 258 - w0(4); w2(9); w2(0); 259 - w0(0); w2(1); w2(3); w2(0); 260 - w0(0); w2(9); w2(0); 261 - w2(0x4c); w0(pi->saved_r0); 293 + w2(0); 294 + w0(4); w2(9); w2(0); 295 + w0(0); w2(1); w2(3); w2(0); 296 + w0(0); w2(9); w2(0); 297 + w2(0x4c); w0(pi->saved_r0); 262 298 } 263 299 264 300 #define TEST_LEN 16 265 301 266 302 static int bpck_test_proto(struct pi_adapter *pi) 267 - 268 - { int i, e, l, h, om; 303 + { 304 + int i, e, l, h, om; 269 305 char buf[TEST_LEN]; 270 306 271 307 bpck_force_spp(pi); 272 308 273 309 switch (pi->mode) { 274 310 275 - case 0: bpck_connect(pi); 276 - WR(0x13,0x7f); 311 + case 0: 312 + bpck_connect(pi); 313 + WR(0x13, 0x7f); 277 314 w0(0x13); t2(2); 278 - for(i=0;i<TEST_LEN;i++) { 279 - t2(4); l = r1(); 280 - t2(4); h = r1(); 281 - buf[i] = j44(l,h); 315 + for (i = 0; i < TEST_LEN; i++) { 316 + t2(4); l = r1(); 317 + t2(4); h = r1(); 318 + buf[i] = j44(l, h); 282 319 } 283 320 bpck_disconnect(pi); 284 321 break; 285 322 286 - case 1: bpck_connect(pi); 287 - WR(0x13,0x7f); 288 - w0(0x13); t2(2); t2(0x20); 289 - for(i=0;i<TEST_LEN;i++) { t2(4); buf[i] = r0(); } 290 - t2(1); t2(0x20); 323 + case 1: 324 + bpck_connect(pi); 325 + WR(0x13, 0x7f); 326 + w0(0x13); t2(2); t2(0x20); 327 + for (i = 0; i < TEST_LEN; i++) { 328 + t2(4); 329 + buf[i] = r0(); 330 + } 331 + t2(1); t2(0x20); 291 332 bpck_disconnect(pi); 292 333 break; 293 334 294 335 case 2: 295 336 case 3: 296 - case 4: om = pi->mode; 337 + case 4: 338 + om = pi->mode; 297 339 pi->mode = 0; 298 340 bpck_connect(pi); 299 - WR(7,3); 300 - WR(4,8); 341 + WR(7, 3); 342 + WR(4, 8); 301 343 bpck_disconnect(pi); 302 344 303 345 pi->mode = om; ··· 344 308 w0(0x13); w2(9); w2(1); w0(0); w2(3); w2(0); w2(0xe0); 345 309 346 310 switch (pi->mode) { 347 - case 2: for (i=0;i<TEST_LEN;i++) buf[i] = r4(); 348 - break; 349 - case 3: for (i=0;i<TEST_LEN/2;i++) ((u16 *)buf)[i] = r4w(); 350 - break; 351 - case 4: for (i=0;i<TEST_LEN/4;i++) ((u32 *)buf)[i] = r4l(); 352 - break; 311 + case 2: 312 + for (i = 0; i < TEST_LEN; i++) 313 + buf[i] = r4(); 314 + break; 315 + case 3: 316 + for (i = 0; i < TEST_LEN / 2; i++) 317 + ((u16 *)buf)[i] = r4w(); 318 + break; 319 + case 4: 320 + for (i = 0; i < TEST_LEN / 4; i++) 321 + ((u32 *)buf)[i] = r4l(); 322 + break; 353 323 } 354 324 355 325 w2(0); 356 - WR(7,0); 326 + WR(7, 0); 357 327 bpck_disconnect(pi); 358 - 359 328 break; 360 329 361 330 } 362 331 363 332 dev_dbg(&pi->dev, "bpck: 0x%x unit %d mode %d: ", 364 333 pi->port, pi->unit, pi->mode); 365 - print_hex_dump_debug("bpck: ", DUMP_PREFIX_NONE, TEST_LEN, 1, buf, TEST_LEN, false); 334 + print_hex_dump_debug("bpck: ", DUMP_PREFIX_NONE, TEST_LEN, 1, buf, 335 + TEST_LEN, false); 366 336 367 337 e = 0; 368 - for (i=0;i<TEST_LEN;i++) if (buf[i] != (i+1)) e++; 338 + for (i = 0; i < TEST_LEN; i++) { 339 + if (buf[i] != i + 1) 340 + e++; 341 + } 342 + 369 343 return e; 370 344 } 371 345 372 346 static void bpck_read_eeprom(struct pi_adapter *pi, char *buf) 373 - 374 - { int i, j, k, p, v, f, om, od; 347 + { 348 + int i, j, k, p, v, f, om, od; 375 349 376 350 bpck_force_spp(pi); 377 351 ··· 389 343 pi->mode = 0; pi->delay = 6; 390 344 391 345 bpck_connect(pi); 392 - 393 - WR(4,0); 394 - for (i=0;i<64;i++) { 395 - WR(6,8); 396 - WR(6,0xc); 397 - p = 0x100; 398 - for (k=0;k<9;k++) { 399 - f = (((i + 0x180) & p) != 0) * 2; 400 - WR(6,f+0xc); 401 - WR(6,f+0xd); 402 - WR(6,f+0xc); 403 - p = (p >> 1); 404 - } 405 - for (j=0;j<2;j++) { 406 - v = 0; 407 - for (k=0;k<8;k++) { 408 - WR(6,0xc); 409 - WR(6,0xd); 410 - WR(6,0xc); 411 - f = RR(0); 412 - v = 2*v + (f == 0x84); 346 + 347 + WR(4, 0); 348 + for (i = 0; i < 64; i++) { 349 + WR(6, 8); 350 + WR(6, 0xc); 351 + p = 0x100; 352 + for (k = 0; k < 9; k++) { 353 + f = (((i + 0x180) & p) != 0) * 2; 354 + WR(6, f + 0xc); 355 + WR(6, f + 0xd); 356 + WR(6, f + 0xc); 357 + p = (p >> 1); 413 358 } 414 - buf[2*i+1-j] = v; 415 - } 359 + for (j = 0; j < 2; j++) { 360 + v = 0; 361 + for (k = 0; k < 8; k++) { 362 + WR(6, 0xc); 363 + WR(6, 0xd); 364 + WR(6, 0xc); 365 + f = RR(0); 366 + v = 2 * v + (f == 0x84); 367 + } 368 + buf[2 * i + 1 - j] = v; 369 + } 416 370 } 417 - WR(6,8); 418 - WR(6,0); 419 - WR(5,8); 371 + WR(6, 8); 372 + WR(6, 0); 373 + WR(5, 8); 420 374 421 375 bpck_disconnect(pi); 422 376 423 377 if (om >= 2) { 424 - bpck_connect(pi); 425 - WR(7,3); 426 - WR(4,8); 427 - bpck_disconnect(pi); 378 + bpck_connect(pi); 379 + WR(7, 3); 380 + WR(4, 8); 381 + bpck_disconnect(pi); 428 382 } 429 383 430 384 pi->mode = om; pi->delay = od; 431 385 } 432 386 433 - static int bpck_test_port(struct pi_adapter *pi) /* check for 8-bit port */ 387 + static int bpck_test_port(struct pi_adapter *pi) 388 + { 389 + int i, r, m; 434 390 435 - { int i, r, m; 436 - 391 + /* Check for 8-bit port */ 437 392 w2(0x2c); i = r0(); w0(255-i); r = r0(); w0(i); 438 393 m = -1; 439 - if (r == i) m = 2; 440 - if (r == (255-i)) m = 0; 394 + if (r == i) 395 + m = 2; 396 + if (r == (255-i)) 397 + m = 0; 441 398 442 - w2(0xc); i = r0(); w0(255-i); r = r0(); w0(i); 443 - if (r != (255-i)) m = -1; 444 - 445 - if (m == 0) { w2(6); w2(0xc); r = r0(); w0(0xaa); w0(r); w0(0xaa); } 446 - if (m == 2) { w2(0x26); w2(0xc); } 399 + w2(0xc); 400 + i = r0(); 401 + w0(255-i); 402 + r = r0(); 403 + w0(i); 404 + if (r != (255-i)) 405 + m = -1; 447 406 448 - if (m == -1) return 0; 407 + if (m == 0) { 408 + w2(6); 409 + w2(0xc); 410 + r = r0(); 411 + w0(0xaa); 412 + w0(r); 413 + w0(0xaa); 414 + } 415 + if (m == 2) { 416 + w2(0x26); 417 + w2(0xc); 418 + } 419 + 420 + if (m == -1) 421 + return 0; 422 + 449 423 return 5; 450 424 } 451 425 452 426 static void bpck_log_adapter(struct pi_adapter *pi) 453 - 454 - { char *mode_string[5] = { "4-bit","8-bit","EPP-8", 455 - "EPP-16","EPP-32" }; 427 + { 428 + char *mode_str[5] = { "4-bit", "8-bit", "EPP-8", "EPP-16", "EPP-32" }; 456 429 char scratch[128]; 457 430 458 431 bpck_read_eeprom(pi,scratch); 459 432 print_hex_dump_bytes("bpck EEPROM: ", DUMP_PREFIX_NONE, scratch, 128); 460 - dev_info(&pi->dev, "backpack %8.8s unit %d at 0x%x, mode %d (%s), delay %d\n", 433 + dev_info(&pi->dev, 434 + "backpack %8.8s unit %d at 0x%x, mode %d (%s), delay %d\n", 461 435 &scratch[110], pi->unit, pi->port, pi->mode, 462 - mode_string[pi->mode], pi->delay); 436 + mode_str[pi->mode], pi->delay); 463 437 } 464 438 465 439 static struct pi_protocol bpck = {
+35 -32
drivers/ata/pata_parport/bpck6.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 1 2 /* 2 - backpack.c (c) 2001 Micro Solutions Inc. 3 - Released under the terms of the GNU General Public license 4 - 5 - backpack.c is a low-level protocol driver for the Micro Solutions 6 - "BACKPACK" parallel port IDE adapter 7 - (Works on Series 6 drives) 8 - 9 - Written by: Ken Hahn (linux-dev@micro-solutions.com) 10 - Clive Turvey (linux-dev@micro-solutions.com) 11 - 12 - */ 3 + * (c) 2001 Micro Solutions Inc. 4 + * 5 + * backpack.c is a low-level protocol driver for the Micro Solutions 6 + * "BACKPACK" parallel port IDE adapter (works on Series 6 drives). 7 + * 8 + * Written by: Ken Hahn (linux-dev@micro-solutions.com) 9 + * Clive Turvey (linux-dev@micro-solutions.com) 10 + */ 13 11 14 12 #include <linux/module.h> 15 13 #include <linux/init.h> ··· 324 326 if (j != k) 325 327 goto fail; 326 328 327 - if (i & 4) // EPP 329 + if (i & 4) { 330 + /* EPP */ 328 331 parport_frob_control(pi->pardev->port, 329 332 PARPORT_CONTROL_SELECT | PARPORT_CONTROL_INIT, 0); 330 - else // PPC/ECP 333 + } else { 334 + /* PPC/ECP */ 331 335 parport_frob_control(pi->pardev->port, PARPORT_CONTROL_SELECT, 0); 336 + } 332 337 333 338 pi->private = 0; 334 339 ··· 348 347 parport_write_control(pi->pardev->port, pi->saved_r2); 349 348 parport_write_data(pi->pardev->port, pi->saved_r0); 350 349 351 - return 0; // FAIL 350 + return 0; 352 351 } 353 352 354 353 static void bpck6_deselect(struct pi_adapter *pi) 355 354 { 356 - if (mode_map[pi->mode] & 4) // EPP 355 + if (mode_map[pi->mode] & 4) { 356 + /* EPP */ 357 357 parport_frob_control(pi->pardev->port, PARPORT_CONTROL_INIT, 358 - PARPORT_CONTROL_INIT); 359 - else // PPC/ECP 358 + PARPORT_CONTROL_INIT); 359 + } else { 360 + /* PPC/ECP */ 360 361 parport_frob_control(pi->pardev->port, PARPORT_CONTROL_SELECT, 361 - PARPORT_CONTROL_SELECT); 362 + PARPORT_CONTROL_SELECT); 363 + } 362 364 363 365 parport_write_data(pi->pardev->port, pi->saved_r0); 364 366 parport_write_control(pi->pardev->port, ··· 390 386 bpck6_deselect(pi); 391 387 } 392 388 393 - static int bpck6_test_port(struct pi_adapter *pi) /* check for 8-bit port */ 389 + /* check for 8-bit port */ 390 + static int bpck6_test_port(struct pi_adapter *pi) 394 391 { 395 392 dev_dbg(&pi->dev, "PARPORT indicates modes=%x for lp=0x%lx\n", 396 393 pi->pardev->port->modes, pi->pardev->port->base); ··· 418 413 419 414 dev_dbg(&pi->dev, "ppc_open returned %2x\n", out); 420 415 421 - if(out) 422 - { 416 + if (out) { 423 417 bpck6_deselect(pi); 424 418 dev_dbg(&pi->dev, "leaving probe\n"); 425 419 pi->mode = saved_mode; 426 - return(1); 420 + return 1; 427 421 } 428 - else 429 - { 430 - dev_dbg(&pi->dev, "Failed open\n"); 431 - pi->mode = saved_mode; 432 - return(0); 433 - } 422 + 423 + dev_dbg(&pi->dev, "Failed open\n"); 424 + pi->mode = saved_mode; 425 + 426 + return 0; 434 427 } 435 428 436 429 static void bpck6_log_adapter(struct pi_adapter *pi) 437 430 { 438 - char *mode_string[5]= 439 - {"4-bit","8-bit","EPP-8","EPP-16","EPP-32"}; 431 + char *mode_string[5] = { "4-bit", "8-bit", "EPP-8", "EPP-16", "EPP-32" }; 440 432 441 - dev_info(&pi->dev, "Micro Solutions BACKPACK Drive unit %d at 0x%x, mode:%d (%s), delay %d\n", 442 - pi->unit, pi->port, pi->mode, mode_string[pi->mode], pi->delay); 433 + dev_info(&pi->dev, 434 + "Micro Solutions BACKPACK Drive unit %d at 0x%x, mode:%d (%s), delay %d\n", 435 + pi->unit, pi->port, pi->mode, mode_string[pi->mode], pi->delay); 443 436 } 444 437 445 438 static struct pi_protocol bpck6 = {
+120 -114
drivers/ata/pata_parport/comm.c
··· 1 - /* 2 - comm.c (c) 1997-8 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - comm.c is a low-level protocol driver for some older models 6 - of the DataStor "Commuter" parallel to IDE adapter. Some of 7 - the parallel port devices marketed by Arista currently 8 - use this adapter. 9 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1997-1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * comm.c is a low-level protocol driver for some older models of the DataStor 6 + * "Commuter" parallel to IDE adapter. Some of the parallel port devices 7 + * marketed by Arista currently use this adapter. 8 + */ 10 9 11 10 #include <linux/module.h> 12 11 #include <linux/init.h> ··· 16 17 #include <asm/io.h> 17 18 #include "pata_parport.h" 18 19 19 - /* mode codes: 0 nybble reads, 8-bit writes 20 - 1 8-bit reads and writes 21 - 2 8-bit EPP mode 22 - */ 20 + /* 21 + * mode codes: 0 nybble reads, 8-bit writes 22 + * 1 8-bit reads and writes 23 + * 2 8-bit EPP mode 24 + */ 23 25 24 - #define j44(a,b) (((a>>3)&0x0f)|((b<<1)&0xf0)) 26 + #define j44(a, b) (((a >> 3) & 0x0f) | ((b << 1) & 0xf0)) 25 27 26 28 #define P1 w2(5);w2(0xd);w2(0xd);w2(5);w2(4); 27 29 #define P2 w2(5);w2(7);w2(7);w2(5);w2(4); 28 30 29 - /* cont = 0 - access the IDE register file 30 - cont = 1 - access the IDE command set 31 - */ 32 - 31 + /* 32 + * cont = 0 - access the IDE register file 33 + * cont = 1 - access the IDE command set 34 + */ 33 35 static int cont_map[2] = { 0x08, 0x10 }; 34 36 35 37 static int comm_read_regr(struct pi_adapter *pi, int cont, int regr) 36 - 37 - { int l, h, r; 38 + { 39 + int l, h, r; 38 40 39 41 r = regr + cont_map[cont]; 40 42 41 - switch (pi->mode) { 43 + switch (pi->mode) { 44 + case 0: 45 + w0(r); P1; w0(0); 46 + w2(6); l = r1(); w0(0x80); h = r1(); w2(4); 47 + return j44(l, h); 42 48 43 - case 0: w0(r); P1; w0(0); 44 - w2(6); l = r1(); w0(0x80); h = r1(); w2(4); 45 - return j44(l,h); 46 - 47 - case 1: w0(r+0x20); P1; 48 - w0(0); w2(0x26); h = r0(); w2(4); 49 - return h; 49 + case 1: 50 + w0(r+0x20); P1; 51 + w0(0); w2(0x26); h = r0(); w2(4); 52 + return h; 50 53 51 54 case 2: 52 55 case 3: 53 - case 4: w3(r+0x20); (void)r1(); 54 - w2(0x24); h = r4(); w2(4); 55 - return h; 56 + case 4: 57 + w3(r+0x20); (void)r1(); 58 + w2(0x24); h = r4(); w2(4); 59 + return h; 60 + } 56 61 57 - } 58 - return -1; 59 - } 62 + return -1; 63 + } 60 64 61 65 static void comm_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 66 + { 67 + int r = regr + cont_map[cont]; 62 68 63 - { int r; 64 - 65 - r = regr + cont_map[cont]; 66 - 67 - switch (pi->mode) { 68 - 69 - case 0: 70 - case 1: w0(r); P1; w0(val); P2; 69 + switch (pi->mode) { 70 + case 0: 71 + case 1: 72 + w0(r); P1; w0(val); P2; 71 73 break; 72 - 73 74 case 2: 74 75 case 3: 75 - case 4: w3(r); (void)r1(); w4(val); 76 - break; 77 - } 76 + case 4: 77 + w3(r); (void)r1(); w4(val); 78 + break; 79 + } 78 80 } 79 81 80 82 static void comm_connect(struct pi_adapter *pi) 81 - 82 - { pi->saved_r0 = r0(); 83 - pi->saved_r2 = r2(); 84 - w2(4); w0(0xff); w2(6); 85 - w2(4); w0(0xaa); w2(6); 86 - w2(4); w0(0x00); w2(6); 87 - w2(4); w0(0x87); w2(6); 88 - w2(4); w0(0xe0); w2(0xc); w2(0xc); w2(4); 83 + { 84 + pi->saved_r0 = r0(); 85 + pi->saved_r2 = r2(); 86 + w2(4); w0(0xff); w2(6); 87 + w2(4); w0(0xaa); w2(6); 88 + w2(4); w0(0x00); w2(6); 89 + w2(4); w0(0x87); w2(6); 90 + w2(4); w0(0xe0); w2(0xc); w2(0xc); w2(4); 89 91 } 90 92 91 93 static void comm_disconnect(struct pi_adapter *pi) 92 94 93 - { w2(0); w2(0); w2(0); w2(4); 95 + { 96 + w2(0); w2(0); w2(0); w2(4); 94 97 w0(pi->saved_r0); 95 - w2(pi->saved_r2); 96 - } 98 + w2(pi->saved_r2); 99 + } 97 100 98 101 static void comm_read_block(struct pi_adapter *pi, char *buf, int count) 102 + { 103 + int i, l, h; 99 104 100 - { int i, l, h; 101 - 102 - switch (pi->mode) { 103 - 104 - case 0: w0(0x48); P1; 105 - for(i=0;i<count;i++) { 106 - w0(0); w2(6); l = r1(); 107 - w0(0x80); h = r1(); w2(4); 108 - buf[i] = j44(l,h); 109 - } 110 - break; 111 - 112 - case 1: w0(0x68); P1; w0(0); 113 - for(i=0;i<count;i++) { 114 - w2(0x26); buf[i] = r0(); w2(0x24); 115 - } 105 + switch (pi->mode) { 106 + case 0: 107 + w0(0x48); P1; 108 + for (i = 0; i < count; i++) { 109 + w0(0); w2(6); l = r1(); 110 + w0(0x80); h = r1(); w2(4); 111 + buf[i] = j44(l, h); 112 + } 113 + break; 114 + case 1: 115 + w0(0x68); P1; w0(0); 116 + for (i = 0; i < count; i++) { 117 + w2(0x26); 118 + buf[i] = r0(); 119 + w2(0x24); 120 + } 116 121 w2(4); 117 122 break; 118 - 119 - case 2: w3(0x68); (void)r1(); w2(0x24); 120 - for (i=0;i<count;i++) buf[i] = r4(); 123 + case 2: 124 + w3(0x68); (void)r1(); w2(0x24); 125 + for (i = 0; i < count; i++) 126 + buf[i] = r4(); 121 127 w2(4); 122 128 break; 123 - 124 - case 3: w3(0x68); (void)r1(); w2(0x24); 125 - for (i=0;i<count/2;i++) ((u16 *)buf)[i] = r4w(); 126 - w2(4); 127 - break; 128 - 129 - case 4: w3(0x68); (void)r1(); w2(0x24); 130 - for (i=0;i<count/4;i++) ((u32 *)buf)[i] = r4l(); 131 - w2(4); 132 - break; 133 - 129 + case 3: 130 + w3(0x68); (void)r1(); w2(0x24); 131 + for (i = 0; i < count / 2; i++) 132 + ((u16 *)buf)[i] = r4w(); 133 + w2(4); 134 + break; 135 + case 4: 136 + w3(0x68); (void)r1(); w2(0x24); 137 + for (i = 0; i < count / 4; i++) 138 + ((u32 *)buf)[i] = r4l(); 139 + w2(4); 140 + break; 134 141 } 135 142 } 136 143 137 144 /* NB: Watch out for the byte swapped writes ! */ 138 - 139 145 static void comm_write_block(struct pi_adapter *pi, char *buf, int count) 146 + { 147 + int k; 140 148 141 - { int k; 142 - 143 - switch (pi->mode) { 144 - 145 - case 0: 146 - case 1: w0(0x68); P1; 147 - for (k=0;k<count;k++) { 148 - w2(5); w0(buf[k^1]); w2(7); 149 - } 150 - w2(5); w2(4); 151 - break; 152 - 153 - case 2: w3(0x48); (void)r1(); 154 - for (k=0;k<count;k++) w4(buf[k^1]); 155 - break; 156 - 157 - case 3: w3(0x48); (void)r1(); 149 + switch (pi->mode) { 150 + case 0: 151 + case 1: 152 + w0(0x68); P1; 153 + for (k = 0; k < count; k++) { 154 + w2(5); 155 + w0(buf[k ^ 1]); 156 + w2(7); 157 + } 158 + w2(5); w2(4); 159 + break; 160 + case 2: 161 + w3(0x48); (void)r1(); 162 + for (k = 0; k < count; k++) 163 + w4(buf[k ^ 1]); 164 + break; 165 + case 3: 166 + w3(0x48); (void)r1(); 158 167 for (k = 0; k < count / 2; k++) 159 168 w4w(swab16(((u16 *)buf)[k])); 160 - break; 161 - 162 - case 4: w3(0x48); (void)r1(); 169 + break; 170 + case 4: 171 + w3(0x48); (void)r1(); 163 172 for (k = 0; k < count / 4; k++) 164 173 w4l(swab16(((u16 *)buf)[2 * k]) | 165 174 swab16(((u16 *)buf)[2 * k + 1]) << 16); 166 - break; 167 - 168 - 175 + break; 169 176 } 170 177 } 171 178 172 179 static void comm_log_adapter(struct pi_adapter *pi) 173 180 174 - { char *mode_string[5] = {"4-bit","8-bit","EPP-8","EPP-16","EPP-32"}; 181 + { char *mode_string[5] = { "4-bit", "8-bit", "EPP-8", "EPP-16", "EPP-32" }; 175 182 176 - dev_info(&pi->dev, "DataStor Commuter at 0x%x, mode %d (%s), delay %d\n", 177 - pi->port, pi->mode, mode_string[pi->mode], pi->delay); 183 + dev_info(&pi->dev, 184 + "DataStor Commuter at 0x%x, mode %d (%s), delay %d\n", 185 + pi->port, pi->mode, mode_string[pi->mode], pi->delay); 178 186 } 179 187 180 188 static struct pi_protocol comm = {
+162 -139
drivers/ata/pata_parport/dstr.c
··· 1 - /* 2 - dstr.c (c) 1997-8 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - dstr.c is a low-level protocol driver for the 6 - DataStor EP2000 parallel to IDE adapter chip. 7 - 8 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1997-1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * dstr.c is a low-level protocol driver for the DataStor EP2000 parallel 6 + * to IDE adapter chip. 7 + */ 9 8 10 9 #include <linux/module.h> 11 10 #include <linux/init.h> ··· 15 16 #include <asm/io.h> 16 17 #include "pata_parport.h" 17 18 18 - /* mode codes: 0 nybble reads, 8-bit writes 19 - 1 8-bit reads and writes 20 - 2 8-bit EPP mode 21 - 3 EPP-16 22 - 4 EPP-32 23 - */ 19 + /* 20 + * mode codes: 0 nybble reads, 8-bit writes 21 + * 1 8-bit reads and writes 22 + * 2 8-bit EPP mode 23 + * 3 EPP-16 24 + * 4 EPP-32 25 + */ 24 26 25 - #define j44(a,b) (((a>>3)&0x07)|((~a>>4)&0x08)|((b<<1)&0x70)|((~b)&0x80)) 27 + #define j44(a, b) (((a >> 3) & 0x07) | ((~a >> 4) & 0x08) | \ 28 + ((b << 1) & 0x70) | ((~b) & 0x80)) 26 29 27 30 #define P1 w2(5);w2(0xd);w2(5);w2(4); 28 31 #define P2 w2(5);w2(7);w2(5);w2(4); 29 32 #define P3 w2(6);w2(4);w2(6);w2(4); 30 33 31 - /* cont = 0 - access the IDE register file 32 - cont = 1 - access the IDE command set 33 - */ 34 - 34 + /* 35 + * cont = 0 - access the IDE register file 36 + * cont = 1 - access the IDE command set 37 + */ 35 38 static int cont_map[2] = { 0x20, 0x40 }; 36 39 37 40 static int dstr_read_regr(struct pi_adapter *pi, int cont, int regr) 41 + { 42 + int a, b, r; 38 43 39 - { int a, b, r; 40 - 41 - r = regr + cont_map[cont]; 44 + r = regr + cont_map[cont]; 42 45 43 46 w0(0x81); P1; 44 - if (pi->mode) { w0(0x11); } else { w0(1); } 47 + if (pi->mode) 48 + w0(0x11); 49 + else 50 + w0(1); 45 51 P2; w0(r); P1; 46 52 47 - switch (pi->mode) { 48 - 49 - case 0: w2(6); a = r1(); w2(4); w2(6); b = r1(); w2(4); 50 - return j44(a,b); 51 - 52 - case 1: w0(0); w2(0x26); a = r0(); w2(4); 53 - return a; 54 - 53 + switch (pi->mode) { 54 + case 0: 55 + w2(6); a = r1(); w2(4); w2(6); b = r1(); w2(4); 56 + return j44(a, b); 57 + case 1: 58 + w0(0); w2(0x26); a = r0(); w2(4); 59 + return a; 55 60 case 2: 56 61 case 3: 57 - case 4: w2(0x24); a = r4(); w2(4); 58 - return a; 62 + case 4: 63 + w2(0x24); a = r4(); w2(4); 64 + return a; 65 + } 59 66 60 - } 61 - return -1; 62 - } 63 - 64 - static void dstr_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 65 - 66 - { int r; 67 - 68 - r = regr + cont_map[cont]; 69 - 70 - w0(0x81); P1; 71 - if (pi->mode >= 2) { w0(0x11); } else { w0(1); } 72 - P2; w0(r); P1; 73 - 74 - switch (pi->mode) { 75 - 76 - case 0: 77 - case 1: w0(val); w2(5); w2(7); w2(5); w2(4); 78 - break; 79 - 80 - case 2: 81 - case 3: 82 - case 4: w4(val); 83 - break; 84 - } 67 + return -1; 85 68 } 86 69 87 - #define CCP(x) w0(0xff);w2(0xc);w2(4);\ 88 - w0(0xaa);w0(0x55);w0(0);w0(0xff);w0(0x87);w0(0x78);\ 89 - w0(x);w2(5);w2(4); 70 + static void dstr_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 71 + { 72 + int r = regr + cont_map[cont]; 73 + 74 + w0(0x81); P1; 75 + if (pi->mode >= 2) 76 + w0(0x11); 77 + else 78 + w0(1); 79 + P2; w0(r); P1; 80 + 81 + switch (pi->mode) { 82 + case 0: 83 + case 1: 84 + w0(val); w2(5); w2(7); w2(5); w2(4); 85 + break; 86 + case 2: 87 + case 3: 88 + case 4: 89 + w4(val); 90 + break; 91 + } 92 + } 93 + 94 + #define CCP(x) \ 95 + do { \ 96 + w0(0xff); w2(0xc); w2(4); \ 97 + w0(0xaa); w0(0x55); w0(0); w0(0xff); \ 98 + w0(0x87); w0(0x78); \ 99 + w0(x); w2(5); w2(4); \ 100 + } while (0) 90 101 91 102 static void dstr_connect(struct pi_adapter *pi) 92 - 93 - { pi->saved_r0 = r0(); 94 - pi->saved_r2 = r2(); 95 - w2(4); CCP(0xe0); w0(0xff); 103 + { 104 + pi->saved_r0 = r0(); 105 + pi->saved_r2 = r2(); 106 + w2(4); CCP(0xe0); w0(0xff); 96 107 } 97 108 98 109 static void dstr_disconnect(struct pi_adapter *pi) 99 - 100 - { CCP(0x30); 101 - w0(pi->saved_r0); 102 - w2(pi->saved_r2); 103 - } 110 + { 111 + CCP(0x30); 112 + w0(pi->saved_r0); 113 + w2(pi->saved_r2); 114 + } 104 115 105 116 static void dstr_read_block(struct pi_adapter *pi, char *buf, int count) 106 - 107 - { int k, a, b; 117 + { 118 + int k, a, b; 108 119 109 120 w0(0x81); P1; 110 - if (pi->mode) { w0(0x19); } else { w0(9); } 121 + if (pi->mode) 122 + w0(0x19); 123 + else 124 + w0(9); 111 125 P2; w0(0x82); P1; P3; w0(0x20); P1; 112 126 113 - switch (pi->mode) { 114 - 115 - case 0: for (k=0;k<count;k++) { 116 - w2(6); a = r1(); w2(4); 117 - w2(6); b = r1(); w2(4); 118 - buf[k] = j44(a,b); 119 - } 120 - break; 121 - 122 - case 1: w0(0); 123 - for (k=0;k<count;k++) { 124 - w2(0x26); buf[k] = r0(); w2(0x24); 125 - } 126 - w2(4); 127 - break; 128 - 129 - case 2: w2(0x24); 130 - for (k=0;k<count;k++) buf[k] = r4(); 131 - w2(4); 132 - break; 133 - 134 - case 3: w2(0x24); 135 - for (k=0;k<count/2;k++) ((u16 *)buf)[k] = r4w(); 136 - w2(4); 137 - break; 138 - 139 - case 4: w2(0x24); 140 - for (k=0;k<count/4;k++) ((u32 *)buf)[k] = r4l(); 141 - w2(4); 142 - break; 143 - 144 - } 127 + switch (pi->mode) { 128 + case 0: 129 + for (k = 0; k < count; k++) { 130 + w2(6); a = r1(); w2(4); 131 + w2(6); b = r1(); w2(4); 132 + buf[k] = j44(a, b); 133 + } 134 + break; 135 + case 1: 136 + w0(0); 137 + for (k = 0; k < count; k++) { 138 + w2(0x26); 139 + buf[k] = r0(); 140 + w2(0x24); 141 + } 142 + w2(4); 143 + break; 144 + case 2: 145 + w2(0x24); 146 + for (k = 0; k < count; k++) 147 + buf[k] = r4(); 148 + w2(4); 149 + break; 150 + case 3: 151 + w2(0x24); 152 + for (k = 0; k < count / 2; k++) 153 + ((u16 *)buf)[k] = r4w(); 154 + w2(4); 155 + break; 156 + case 4: 157 + w2(0x24); 158 + for (k = 0; k < count / 4; k++) 159 + ((u32 *)buf)[k] = r4l(); 160 + w2(4); 161 + break; 162 + } 145 163 } 146 164 147 165 static void dstr_write_block(struct pi_adapter *pi, char *buf, int count) 166 + { 167 + int k; 148 168 149 - { int k; 169 + w0(0x81); P1; 170 + if (pi->mode) 171 + w0(0x19); 172 + else 173 + w0(9); 174 + P2; w0(0x82); P1; P3; w0(0x20); P1; 150 175 151 - w0(0x81); P1; 152 - if (pi->mode) { w0(0x19); } else { w0(9); } 153 - P2; w0(0x82); P1; P3; w0(0x20); P1; 154 - 155 - switch (pi->mode) { 156 - 157 - case 0: 158 - case 1: for (k=0;k<count;k++) { 159 - w2(5); w0(buf[k]); w2(7); 160 - } 161 - w2(5); w2(4); 162 - break; 163 - 164 - case 2: w2(0xc5); 165 - for (k=0;k<count;k++) w4(buf[k]); 176 + switch (pi->mode) { 177 + case 0: 178 + case 1: 179 + for (k = 0; k < count; k++) { 180 + w2(5); 181 + w0(buf[k]); 182 + w2(7); 183 + } 184 + w2(5); w2(4); 185 + break; 186 + case 2: 187 + w2(0xc5); 188 + for (k = 0; k < count; k++) 189 + w4(buf[k]); 166 190 w2(0xc4); 167 - break; 168 - 169 - case 3: w2(0xc5); 170 - for (k=0;k<count/2;k++) w4w(((u16 *)buf)[k]); 171 - w2(0xc4); 172 - break; 173 - 174 - case 4: w2(0xc5); 175 - for (k=0;k<count/4;k++) w4l(((u32 *)buf)[k]); 176 - w2(0xc4); 177 - break; 178 - 179 - } 191 + break; 192 + case 3: 193 + w2(0xc5); 194 + for (k = 0; k < count / 2; k++) 195 + w4w(((u16 *)buf)[k]); 196 + w2(0xc4); 197 + break; 198 + case 4: 199 + w2(0xc5); 200 + for (k = 0; k < count / 4; k++) 201 + w4l(((u32 *)buf)[k]); 202 + w2(0xc4); 203 + break; 204 + } 180 205 } 181 - 182 206 183 207 static void dstr_log_adapter(struct pi_adapter *pi) 184 208 185 - { char *mode_string[5] = {"4-bit","8-bit","EPP-8", 186 - "EPP-16","EPP-32"}; 209 + { 210 + char *mode_string[5] = { "4-bit", "8-bit", "EPP-8", "EPP-16", "EPP-32" }; 187 211 188 - dev_info(&pi->dev, "DataStor EP2000 at 0x%x, mode %d (%s), delay %d\n", 189 - pi->port, pi->mode, mode_string[pi->mode], pi->delay); 212 + dev_info(&pi->dev, 213 + "DataStor EP2000 at 0x%x, mode %d (%s), delay %d\n", 214 + pi->port, pi->mode, mode_string[pi->mode], pi->delay); 190 215 } 191 216 192 217 static struct pi_protocol dstr = {
+186 -150
drivers/ata/pata_parport/epat.c
··· 1 - /* 2 - epat.c (c) 1997-8 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - This is the low level protocol driver for the EPAT parallel 6 - to IDE adapter from Shuttle Technologies. This adapter is 7 - used in many popular parallel port disk products such as the 8 - SyQuest EZ drives, the Avatar Shark and the Imation SuperDisk. 9 - 10 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1997-1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * This is the low level protocol driver for the EPAT parallel 6 + * to IDE adapter from Shuttle Technologies. This adapter is 7 + * used in many popular parallel port disk products such as the 8 + * SyQuest EZ drives, the Avatar Shark and the Imation SuperDisk. 9 + */ 11 10 12 11 #include <linux/module.h> 13 12 #include <linux/init.h> ··· 17 18 #include <asm/io.h> 18 19 #include "pata_parport.h" 19 20 20 - #define j44(a,b) (((a>>4)&0x0f)+(b&0xf0)) 21 - #define j53(a,b) (((a>>3)&0x1f)+((b<<4)&0xe0)) 21 + #define j44(a, b) (((a >> 4) & 0x0f) + (b & 0xf0)) 22 + #define j53(a, b) (((a >> 3) & 0x1f) + ((b << 4) & 0xe0)) 22 23 23 24 static int epatc8; 24 25 25 26 module_param(epatc8, int, 0); 26 - MODULE_PARM_DESC(epatc8, "support for the Shuttle EP1284 chip, " 27 - "used in any recent Imation SuperDisk (LS-120) drive."); 27 + MODULE_PARM_DESC(epatc8, 28 + "support for the Shuttle EP1284 chip, " 29 + "used in any recent Imation SuperDisk (LS-120) drive."); 28 30 29 - /* cont = 0 IDE register file 30 - cont = 1 IDE control registers 31 - cont = 2 internal EPAT registers 32 - */ 33 - 31 + /* 32 + * cont = 0 IDE register file 33 + * cont = 1 IDE control registers 34 + * cont = 2 internal EPAT registers 35 + */ 34 36 static int cont_map[3] = { 0x18, 0x10, 0 }; 35 37 36 38 static void epat_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 39 + { 40 + int r = regr + cont_map[cont]; 37 41 38 - { int r; 42 + switch (pi->mode) { 43 + case 0: 44 + case 1: 45 + case 2: 46 + w0(0x60+r); w2(1); w0(val); w2(4); 47 + break; 48 + case 3: 49 + case 4: 50 + case 5: 51 + w3(0x40+r); w4(val); 52 + break; 53 + } 54 + } 55 + 56 + static int epat_read_regr(struct pi_adapter *pi, int cont, int regr) 57 + { 58 + int a, b, r; 39 59 40 60 r = regr + cont_map[cont]; 41 61 42 62 switch (pi->mode) { 43 63 44 64 case 0: 45 - case 1: 46 - case 2: w0(0x60+r); w2(1); w0(val); w2(4); 47 - break; 48 - 49 - case 3: 50 - case 4: 51 - case 5: w3(0x40+r); w4(val); 52 - break; 53 - 54 - } 55 - } 56 - 57 - static int epat_read_regr(struct pi_adapter *pi, int cont, int regr) 58 - 59 - { int a, b, r; 60 - 61 - r = regr + cont_map[cont]; 62 - 63 - switch (pi->mode) { 64 - 65 - case 0: w0(r); w2(1); w2(3); 65 + w0(r); w2(1); w2(3); 66 66 a = r1(); w2(4); b = r1(); 67 - return j44(a,b); 68 - 69 - case 1: w0(0x40+r); w2(1); w2(4); 67 + return j44(a, b); 68 + case 1: 69 + w0(0x40+r); w2(1); w2(4); 70 70 a = r1(); b = r2(); w0(0xff); 71 - return j53(a,b); 72 - 73 - case 2: w0(0x20+r); w2(1); w2(0x25); 71 + return j53(a, b); 72 + case 2: 73 + w0(0x20+r); w2(1); w2(0x25); 74 74 a = r0(); w2(4); 75 75 return a; 76 - 77 76 case 3: 78 77 case 4: 79 - case 5: w3(r); w2(0x24); a = r4(); w2(4); 78 + case 5: 79 + w3(r); w2(0x24); a = r4(); w2(4); 80 80 return a; 81 - 82 81 } 82 + 83 83 return -1; /* never gets here */ 84 84 } 85 85 86 86 static void epat_read_block(struct pi_adapter *pi, char *buf, int count) 87 - 88 - { int k, ph, a, b; 87 + { 88 + int k, ph, a, b; 89 89 90 90 switch (pi->mode) { 91 91 92 - case 0: w0(7); w2(1); w2(3); w0(0xff); 92 + case 0: 93 + w0(7); w2(1); w2(3); w0(0xff); 93 94 ph = 0; 94 - for(k=0;k<count;k++) { 95 - if (k == count-1) w0(0xfd); 96 - w2(6+ph); a = r1(); 97 - if (a & 8) b = a; 98 - else { w2(4+ph); b = r1(); } 99 - buf[k] = j44(a,b); 95 + for (k = 0; k < count; k++) { 96 + if (k == count-1) 97 + w0(0xfd); 98 + w2(6 + ph); a = r1(); 99 + if (a & 8) { 100 + b = a; 101 + } else { 102 + w2(4+ph); b = r1(); 103 + } 104 + buf[k] = j44(a, b); 100 105 ph = 1 - ph; 101 106 } 102 107 w0(0); w2(4); 103 108 break; 104 109 105 - case 1: w0(0x47); w2(1); w2(5); w0(0xff); 110 + case 1: 111 + w0(0x47); w2(1); w2(5); w0(0xff); 106 112 ph = 0; 107 - for(k=0;k<count;k++) { 108 - if (k == count-1) w0(0xfd); 109 - w2(4+ph); 113 + for (k = 0; k < count; k++) { 114 + if (k == count - 1) 115 + w0(0xfd); 116 + w2(4 + ph); 110 117 a = r1(); b = r2(); 111 - buf[k] = j53(a,b); 118 + buf[k] = j53(a, b); 112 119 ph = 1 - ph; 113 120 } 114 121 w0(0); w2(4); 115 122 break; 116 123 117 - case 2: w0(0x27); w2(1); w2(0x25); w0(0); 124 + case 2: 125 + w0(0x27); w2(1); w2(0x25); w0(0); 118 126 ph = 0; 119 - for(k=0;k<count-1;k++) { 120 - w2(0x24+ph); 127 + for (k = 0; k < count - 1; k++) { 128 + w2(0x24 + ph); 121 129 buf[k] = r0(); 122 130 ph = 1 - ph; 123 131 } 124 - w2(0x26); w2(0x27); buf[count-1] = r0(); 132 + w2(0x26); w2(0x27); 133 + buf[count - 1] = r0(); 125 134 w2(0x25); w2(4); 126 135 break; 127 136 128 - case 3: w3(0x80); w2(0x24); 129 - for(k=0;k<count-1;k++) buf[k] = r4(); 130 - w2(4); w3(0xa0); w2(0x24); buf[count-1] = r4(); 137 + case 3: 138 + w3(0x80); w2(0x24); 139 + for (k = 0; k < count - 1; k++) 140 + buf[k] = r4(); 141 + w2(4); w3(0xa0); w2(0x24); 142 + buf[count - 1] = r4(); 131 143 w2(4); 132 144 break; 133 145 134 - case 4: w3(0x80); w2(0x24); 135 - for(k=0;k<(count/2)-1;k++) ((u16 *)buf)[k] = r4w(); 136 - buf[count-2] = r4(); 137 - w2(4); w3(0xa0); w2(0x24); buf[count-1] = r4(); 146 + case 4: 147 + w3(0x80); w2(0x24); 148 + for (k = 0; k < count / 2 - 1; k++) 149 + ((u16 *)buf)[k] = r4w(); 150 + buf[count - 2] = r4(); 151 + w2(4); w3(0xa0); w2(0x24); 152 + buf[count - 1] = r4(); 138 153 w2(4); 139 154 break; 140 155 141 - case 5: w3(0x80); w2(0x24); 142 - for(k=0;k<(count/4)-1;k++) ((u32 *)buf)[k] = r4l(); 143 - for(k=count-4;k<count-1;k++) buf[k] = r4(); 144 - w2(4); w3(0xa0); w2(0x24); buf[count-1] = r4(); 156 + case 5: 157 + w3(0x80); w2(0x24); 158 + for (k = 0; k < count / 4 - 1; k++) 159 + ((u32 *)buf)[k] = r4l(); 160 + for (k = count - 4; k < count - 1; k++) 161 + buf[k] = r4(); 162 + w2(4); w3(0xa0); w2(0x24); 163 + buf[count - 1] = r4(); 145 164 w2(4); 146 165 break; 147 - 148 166 } 149 167 } 150 168 151 169 static void epat_write_block(struct pi_adapter *pi, char *buf, int count) 152 - 153 - { int ph, k; 170 + { 171 + int ph, k; 154 172 155 173 switch (pi->mode) { 156 - 157 174 case 0: 158 175 case 1: 159 - case 2: w0(0x67); w2(1); w2(5); 176 + case 2: 177 + w0(0x67); w2(1); w2(5); 160 178 ph = 0; 161 - for(k=0;k<count;k++) { 179 + for (k = 0; k < count; k++) { 162 180 w0(buf[k]); 163 - w2(4+ph); 181 + w2(4 + ph); 164 182 ph = 1 - ph; 165 183 } 166 184 w2(7); w2(4); 167 185 break; 168 - 169 - case 3: w3(0xc0); 170 - for(k=0;k<count;k++) w4(buf[k]); 186 + case 3: 187 + w3(0xc0); 188 + for (k = 0; k < count; k++) 189 + w4(buf[k]); 171 190 w2(4); 172 191 break; 173 - 174 - case 4: w3(0xc0); 175 - for(k=0;k<(count/2);k++) w4w(((u16 *)buf)[k]); 192 + case 4: 193 + w3(0xc0); 194 + for (k = 0; k < count / 2; k++) 195 + w4w(((u16 *)buf)[k]); 176 196 w2(4); 177 197 break; 178 - 179 - case 5: w3(0xc0); 180 - for(k=0;k<(count/4);k++) w4l(((u32 *)buf)[k]); 198 + case 5: 199 + w3(0xc0); 200 + for (k = 0; k < count / 4; k++) 201 + w4l(((u32 *)buf)[k]); 181 202 w2(4); 182 203 break; 183 - 184 204 } 185 205 } 186 206 187 207 /* these macros access the EPAT registers in native addressing */ 188 208 189 - #define WR(r,v) epat_write_regr(pi,2,r,v) 190 - #define RR(r) (epat_read_regr(pi,2,r)) 209 + #define WR(r, v) epat_write_regr(pi, 2, r, v) 210 + #define RR(r) epat_read_regr(pi, 2, r) 191 211 192 212 /* and these access the IDE task file */ 193 213 194 - #define WRi(r,v) epat_write_regr(pi,0,r,v) 195 - #define RRi(r) (epat_read_regr(pi,0,r)) 214 + #define WRi(r, v) epat_write_regr(pi, 0, r, v) 215 + #define RRi(r) epat_read_regr(pi, 0, r) 196 216 197 217 /* FIXME: the CPP stuff should be fixed to handle multiple EPATs on a chain */ 198 218 199 - #define CPP(x) w2(4);w0(0x22);w0(0xaa);w0(0x55);w0(0);w0(0xff);\ 200 - w0(0x87);w0(0x78);w0(x);w2(4);w2(5);w2(4);w0(0xff); 219 + #define CPP(x) \ 220 + do { \ 221 + w2(4); w0(0x22); w0(0xaa); \ 222 + w0(0x55); w0(0); w0(0xff); \ 223 + w0(0x87); w0(0x78); w0(x); \ 224 + w2(4); w2(5); w2(4); w0(0xff); \ 225 + } while (0) 201 226 202 227 static void epat_connect(struct pi_adapter *pi) 203 - 204 - { pi->saved_r0 = r0(); 205 - pi->saved_r2 = r2(); 228 + { 229 + pi->saved_r0 = r0(); 230 + pi->saved_r2 = r2(); 206 231 207 232 /* Initialize the chip */ 208 233 CPP(0); 209 234 210 235 if (epatc8) { 211 - CPP(0x40);CPP(0xe0); 212 - w0(0);w2(1);w2(4); 213 - WR(0x8,0x12);WR(0xc,0x14);WR(0x12,0x10); 214 - WR(0xe,0xf);WR(0xf,4); 236 + CPP(0x40); CPP(0xe0); 237 + w0(0); w2(1); w2(4); 238 + WR(0x8, 0x12); 239 + WR(0xc, 0x14); 240 + WR(0x12, 0x10); 241 + WR(0xe, 0xf); 242 + WR(0xf, 4); 215 243 /* WR(0xe,0xa);WR(0xf,4); */ 216 - WR(0xe,0xd);WR(0xf,0); 244 + WR(0xe, 0xd); 245 + WR(0xf, 0); 217 246 /* CPP(0x30); */ 218 247 } 219 248 220 249 /* Connect to the chip */ 221 250 CPP(0xe0); 222 - w0(0);w2(1);w2(4); /* Idle into SPP */ 251 + w0(0); w2(1); w2(4); /* Idle into SPP */ 223 252 if (pi->mode >= 3) { 224 - w0(0);w2(1);w2(4);w2(0xc); 225 - /* Request EPP */ 226 - w0(0x40);w2(6);w2(7);w2(4);w2(0xc);w2(4); 253 + w0(0); w2(1); w2(4); w2(0xc); 254 + /* Request EPP */ 255 + w0(0x40); w2(6); w2(7); w2(4); w2(0xc); w2(4); 227 256 } 228 257 229 258 if (!epatc8) { 230 - WR(8,0x10); WR(0xc,0x14); WR(0xa,0x38); WR(0x12,0x10); 259 + WR(8, 0x10); 260 + WR(0xc, 0x14); 261 + WR(0xa, 0x38); 262 + WR(0x12, 0x10); 231 263 } 232 264 } 233 265 234 266 static void epat_disconnect(struct pi_adapter *pi) 235 - { CPP(0x30); 267 + { 268 + CPP(0x30); 236 269 w0(pi->saved_r0); 237 270 w2(pi->saved_r2); 238 271 } 239 272 240 273 static int epat_test_proto(struct pi_adapter *pi) 241 - 242 - { int k, j, f, cc; 243 - int e[2] = {0,0}; 274 + { 275 + int k, j, f, cc; 276 + int e[2] = { 0, 0 }; 244 277 char scratch[512]; 245 278 246 - epat_connect(pi); 279 + epat_connect(pi); 247 280 cc = RR(0xd); 248 281 epat_disconnect(pi); 249 282 250 283 epat_connect(pi); 251 284 for (j=0;j<2;j++) { 252 - WRi(6,0xa0+j*0x10); 253 - for (k=0;k<256;k++) { 254 - WRi(2,k^0xaa); 255 - WRi(3,k^0x55); 256 - if (RRi(2) != (k^0xaa)) e[j]++; 257 - } 258 - } 259 - epat_disconnect(pi); 285 + WRi(6, 0xa0 + j * 0x10); 286 + for (k = 0; k < 256; k++) { 287 + WRi(2, k ^ 0xaa); 288 + WRi(3, k ^ 0x55); 289 + if (RRi(2) != (k ^ 0xaa)) 290 + e[j]++; 291 + } 292 + } 293 + epat_disconnect(pi); 260 294 261 - f = 0; 262 - epat_connect(pi); 263 - WR(0x13,1); WR(0x13,0); WR(0xa,0x11); 264 - epat_read_block(pi,scratch,512); 265 - 266 - for (k=0;k<256;k++) { 267 - if ((scratch[2*k] & 0xff) != k) f++; 268 - if ((scratch[2*k+1] & 0xff) != (0xff-k)) f++; 269 - } 270 - epat_disconnect(pi); 295 + f = 0; 296 + epat_connect(pi); 297 + WR(0x13, 1); WR(0x13, 0); WR(0xa, 0x11); 298 + epat_read_block(pi, scratch, 512); 271 299 272 - dev_dbg(&pi->dev, "epat: port 0x%x, mode %d, ccr %x, test=(%d,%d,%d)\n", 273 - pi->port, pi->mode, cc, e[0], e[1], f); 274 - 275 - return (e[0] && e[1]) || f; 300 + for (k = 0; k < 256; k++) { 301 + if ((scratch[2 * k] & 0xff) != k) 302 + f++; 303 + if ((scratch[2 * k + 1] & 0xff) != 0xff - k) 304 + f++; 305 + } 306 + epat_disconnect(pi); 307 + 308 + dev_dbg(&pi->dev, 309 + "epat: port 0x%x, mode %d, ccr %x, test=(%d,%d,%d)\n", 310 + pi->port, pi->mode, cc, e[0], e[1], f); 311 + 312 + return (e[0] && e[1]) || f; 276 313 } 277 314 278 315 static void epat_log_adapter(struct pi_adapter *pi) 279 - 280 - { int ver; 281 - char *mode_string[6] = 282 - {"4-bit","5/3","8-bit","EPP-8","EPP-16","EPP-32"}; 316 + { 317 + int ver; 318 + char *mode_string[6] = 319 + { "4-bit", "5/3", "8-bit", "EPP-8", "EPP-16", "EPP-32" }; 283 320 284 321 epat_connect(pi); 285 - WR(0xa,0x38); /* read the version code */ 286 - ver = RR(0xb); 287 - epat_disconnect(pi); 322 + WR(0xa, 0x38); /* read the version code */ 323 + ver = RR(0xb); 324 + epat_disconnect(pi); 288 325 289 - dev_info(&pi->dev, "Shuttle EPAT chip %x at 0x%x, mode %d (%s), delay %d\n", 326 + dev_info(&pi->dev, 327 + "Shuttle EPAT chip %x at 0x%x, mode %d (%s), delay %d\n", 290 328 ver, pi->port, pi->mode, mode_string[pi->mode], pi->delay); 291 329 } 292 330
+231 -213
drivers/ata/pata_parport/epia.c
··· 1 - /* 2 - epia.c (c) 1997-8 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - epia.c is a low-level protocol driver for Shuttle Technologies 6 - EPIA parallel to IDE adapter chip. This device is now obsolete 7 - and has been replaced with the EPAT chip, which is supported 8 - by epat.c, however, some devices based on EPIA are still 9 - available. 10 - 11 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1997-1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * epia.c is a low-level protocol driver for Shuttle Technologies 6 + * EPIA parallel to IDE adapter chip. This device is now obsolete 7 + * and has been replaced with the EPAT chip, which is supported 8 + * by epat.c, however, some devices based on EPIA are still 9 + * available. 10 + */ 12 11 13 12 #include <linux/module.h> 14 13 #include <linux/init.h> ··· 18 19 #include <asm/io.h> 19 20 #include "pata_parport.h" 20 21 21 - /* mode codes: 0 nybble reads on port 1, 8-bit writes 22 - 1 5/3 reads on ports 1 & 2, 8-bit writes 23 - 2 8-bit reads and writes 24 - 3 8-bit EPP mode 25 - 4 16-bit EPP 26 - 5 32-bit EPP 27 - */ 22 + /* 23 + * mode codes: 0 nybble reads on port 1, 8-bit writes 24 + * 1 5/3 reads on ports 1 & 2, 8-bit writes 25 + * 2 8-bit reads and writes 26 + * 3 8-bit EPP mode 27 + * 4 16-bit EPP 28 + * 5 32-bit EPP 29 + */ 28 30 29 - #define j44(a,b) (((a>>4)&0x0f)+(b&0xf0)) 30 - #define j53(a,b) (((a>>3)&0x1f)+((b<<4)&0xe0)) 31 + #define j44(a, b) (((a >> 4) & 0x0f) + (b & 0xf0)) 32 + #define j53(a, b) (((a >> 3) & 0x1f) + ((b << 4) & 0xe0)) 31 33 32 - /* cont = 0 IDE register file 33 - cont = 1 IDE control registers 34 - */ 35 - 34 + /* 35 + * cont = 0 IDE register file 36 + * cont = 1 IDE control registers 37 + */ 36 38 static int cont_map[2] = { 0, 0x80 }; 37 39 38 40 static int epia_read_regr(struct pi_adapter *pi, int cont, int regr) 39 - 40 - { int a, b, r; 41 - 42 - regr += cont_map[cont]; 43 - 44 - switch (pi->mode) { 45 - 46 - case 0: r = regr^0x39; 47 - w0(r); w2(1); w2(3); w0(r); 48 - a = r1(); w2(1); b = r1(); w2(4); 49 - return j44(a,b); 50 - 51 - case 1: r = regr^0x31; 52 - w0(r); w2(1); w0(r&0x37); 53 - w2(3); w2(5); w0(r|0xf0); 54 - a = r1(); b = r2(); w2(4); 55 - return j53(a,b); 56 - 57 - case 2: r = regr^0x29; 58 - w0(r); w2(1); w2(0X21); w2(0x23); 59 - a = r0(); w2(4); 60 - return a; 61 - 62 - case 3: 63 - case 4: 64 - case 5: w3(regr); w2(0x24); a = r4(); w2(4); 65 - return a; 66 - 67 - } 68 - return -1; 69 - } 70 - 71 - static void epia_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 72 - 73 - { int r; 41 + { 42 + int a, b, r; 74 43 75 44 regr += cont_map[cont]; 76 45 77 - switch (pi->mode) { 78 - 79 - case 0: 80 - case 1: 81 - case 2: r = regr^0x19; 82 - w0(r); w2(1); w0(val); w2(3); w2(4); 83 - break; 84 - 46 + switch (pi->mode) { 47 + case 0: 48 + r = regr ^ 0x39; 49 + w0(r); w2(1); w2(3); w0(r); 50 + a = r1(); w2(1); b = r1(); w2(4); 51 + return j44(a, b); 52 + case 1: 53 + r = regr ^ 0x31; 54 + w0(r); w2(1); w0(r & 0x37); 55 + w2(3); w2(5); w0(r | 0xf0); 56 + a = r1(); b = r2(); w2(4); 57 + return j53(a, b); 58 + case 2: 59 + r = regr^0x29; 60 + w0(r); w2(1); w2(0X21); w2(0x23); 61 + a = r0(); w2(4); 62 + return a; 85 63 case 3: 86 64 case 4: 87 - case 5: r = regr^0x40; 88 - w3(r); w4(val); w2(4); 89 - break; 90 - } 65 + case 5: 66 + w3(regr); w2(0x24); a = r4(); w2(4); 67 + return a; 68 + } 69 + 70 + return -1; 91 71 } 92 72 93 - #define WR(r,v) epia_write_regr(pi,0,r,v) 94 - #define RR(r) (epia_read_regr(pi,0,r)) 73 + static void epia_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 74 + { 75 + int r; 95 76 96 - /* The use of register 0x84 is entirely unclear - it seems to control 97 - some EPP counters ... currently we know about 3 different block 98 - sizes: the standard 512 byte reads and writes, 12 byte writes and 99 - 2048 byte reads (the last two being used in the CDrom drivers. 100 - */ 77 + regr += cont_map[cont]; 101 78 79 + switch (pi->mode) { 80 + case 0: 81 + case 1: 82 + case 2: 83 + r = regr ^ 0x19; 84 + w0(r); w2(1); w0(val); w2(3); w2(4); 85 + break; 86 + case 3: 87 + case 4: 88 + case 5: 89 + r = regr ^ 0x40; 90 + w3(r); w4(val); w2(4); 91 + break; 92 + } 93 + } 94 + 95 + #define WR(r, v) epia_write_regr(pi, 0, r, v) 96 + #define RR(r) epia_read_regr(pi, 0, r) 97 + 98 + /* 99 + * The use of register 0x84 is entirely unclear - it seems to control 100 + * some EPP counters ... currently we know about 3 different block 101 + * sizes: the standard 512 byte reads and writes, 12 byte writes and 102 + * 2048 byte reads (the last two being used in the CDrom drivers. 103 + */ 102 104 static void epia_connect(struct pi_adapter *pi) 105 + { 106 + pi->saved_r0 = r0(); 107 + pi->saved_r2 = r2(); 103 108 104 - { pi->saved_r0 = r0(); 105 - pi->saved_r2 = r2(); 106 - 107 - w2(4); w0(0xa0); w0(0x50); w0(0xc0); w0(0x30); w0(0xa0); w0(0); 108 - w2(1); w2(4); 109 - if (pi->mode >= 3) { 110 - w0(0xa); w2(1); w2(4); w0(0x82); w2(4); w2(0xc); w2(4); 111 - w2(0x24); w2(0x26); w2(4); 112 - } 113 - WR(0x86,8); 109 + w2(4); w0(0xa0); w0(0x50); w0(0xc0); w0(0x30); w0(0xa0); w0(0); 110 + w2(1); w2(4); 111 + if (pi->mode >= 3) { 112 + w0(0xa); w2(1); w2(4); w0(0x82); w2(4); w2(0xc); w2(4); 113 + w2(0x24); w2(0x26); w2(4); 114 + } 115 + WR(0x86, 8); 114 116 } 115 117 116 118 static void epia_disconnect(struct pi_adapter *pi) 117 - 118 - { /* WR(0x84,0x10); */ 119 - w0(pi->saved_r0); 120 - w2(1); w2(4); 121 - w0(pi->saved_r0); 122 - w2(pi->saved_r2); 123 - } 119 + { 120 + /* WR(0x84,0x10); */ 121 + w0(pi->saved_r0); 122 + w2(1); w2(4); 123 + w0(pi->saved_r0); 124 + w2(pi->saved_r2); 125 + } 124 126 125 127 static void epia_read_block(struct pi_adapter *pi, char *buf, int count) 126 128 127 - { int k, ph, a, b; 129 + { 130 + int k, ph, a, b; 128 131 129 - switch (pi->mode) { 130 - 131 - case 0: w0(0x81); w2(1); w2(3); w0(0xc1); 132 - ph = 1; 133 - for (k=0;k<count;k++) { 134 - w2(2+ph); a = r1(); 135 - w2(4+ph); b = r1(); 136 - buf[k] = j44(a,b); 137 - ph = 1 - ph; 138 - } 139 - w0(0); w2(4); 140 - break; 141 - 142 - case 1: w0(0x91); w2(1); w0(0x10); w2(3); 143 - w0(0x51); w2(5); w0(0xd1); 144 - ph = 1; 145 - for (k=0;k<count;k++) { 146 - w2(4+ph); 147 - a = r1(); b = r2(); 148 - buf[k] = j53(a,b); 149 - ph = 1 - ph; 150 - } 151 - w0(0); w2(4); 152 - break; 153 - 154 - case 2: w0(0x89); w2(1); w2(0x23); w2(0x21); 155 - ph = 1; 156 - for (k=0;k<count;k++) { 157 - w2(0x24+ph); 158 - buf[k] = r0(); 159 - ph = 1 - ph; 160 - } 161 - w2(6); w2(4); 162 - break; 163 - 164 - case 3: if (count > 512) WR(0x84,3); 132 + switch (pi->mode) { 133 + case 0: 134 + w0(0x81); w2(1); w2(3); w0(0xc1); 135 + ph = 1; 136 + for (k = 0; k < count; k++) { 137 + w2(2+ph); a = r1(); 138 + w2(4+ph); b = r1(); 139 + buf[k] = j44(a, b); 140 + ph = 1 - ph; 141 + } 142 + w0(0); w2(4); 143 + break; 144 + case 1: 145 + w0(0x91); w2(1); w0(0x10); w2(3); 146 + w0(0x51); w2(5); w0(0xd1); 147 + ph = 1; 148 + for (k = 0; k < count; k++) { 149 + w2(4 + ph); 150 + a = r1(); b = r2(); 151 + buf[k] = j53(a, b); 152 + ph = 1 - ph; 153 + } 154 + w0(0); w2(4); 155 + break; 156 + case 2: 157 + w0(0x89); w2(1); w2(0x23); w2(0x21); 158 + ph = 1; 159 + for (k = 0; k < count; k++) { 160 + w2(0x24 + ph); 161 + buf[k] = r0(); 162 + ph = 1 - ph; 163 + } 164 + w2(6); w2(4); 165 + break; 166 + case 3: 167 + if (count > 512) 168 + WR(0x84, 3); 165 169 w3(0); w2(0x24); 166 - for (k=0;k<count;k++) buf[k] = r4(); 167 - w2(4); WR(0x84,0); 168 - break; 169 - 170 - case 4: if (count > 512) WR(0x84,3); 170 + for (k = 0; k < count; k++) 171 + buf[k] = r4(); 172 + w2(4); WR(0x84, 0); 173 + break; 174 + case 4: 175 + if (count > 512) 176 + WR(0x84, 3); 171 177 w3(0); w2(0x24); 172 - for (k=0;k<count/2;k++) ((u16 *)buf)[k] = r4w(); 173 - w2(4); WR(0x84,0); 174 - break; 175 - 176 - case 5: if (count > 512) WR(0x84,3); 178 + for (k = 0; k < count / 2; k++) 179 + ((u16 *)buf)[k] = r4w(); 180 + w2(4); WR(0x84, 0); 181 + break; 182 + case 5: 183 + if (count > 512) 184 + WR(0x84, 3); 177 185 w3(0); w2(0x24); 178 - for (k=0;k<count/4;k++) ((u32 *)buf)[k] = r4l(); 179 - w2(4); WR(0x84,0); 180 - break; 181 - 182 - } 186 + for (k = 0; k < count / 4; k++) 187 + ((u32 *)buf)[k] = r4l(); 188 + w2(4); WR(0x84, 0); 189 + break; 190 + } 183 191 } 184 192 185 193 static void epia_write_block(struct pi_adapter *pi, char *buf, int count) 194 + { 195 + int ph, k, last, d; 186 196 187 - { int ph, k, last, d; 188 - 189 - switch (pi->mode) { 190 - 191 - case 0: 192 - case 1: 193 - case 2: w0(0xa1); w2(1); w2(3); w2(1); w2(5); 194 - ph = 0; last = 0x8000; 195 - for (k=0;k<count;k++) { 196 - d = buf[k]; 197 - if (d != last) { last = d; w0(d); } 198 - w2(4+ph); 199 - ph = 1 - ph; 200 - } 201 - w2(7); w2(4); 202 - break; 203 - 204 - case 3: if (count < 512) WR(0x84,1); 197 + switch (pi->mode) { 198 + case 0: 199 + case 1: 200 + case 2: 201 + w0(0xa1); w2(1); w2(3); w2(1); w2(5); 202 + ph = 0; last = 0x8000; 203 + for (k = 0; k < count; k++) { 204 + d = buf[k]; 205 + if (d != last) { 206 + last = d; 207 + w0(d); 208 + } 209 + w2(4 + ph); 210 + ph = 1 - ph; 211 + } 212 + w2(7); w2(4); 213 + break; 214 + case 3: 215 + if (count < 512) 216 + WR(0x84, 1); 205 217 w3(0x40); 206 - for (k=0;k<count;k++) w4(buf[k]); 207 - if (count < 512) WR(0x84,0); 208 - break; 209 - 210 - case 4: if (count < 512) WR(0x84,1); 218 + for (k = 0; k < count; k++) 219 + w4(buf[k]); 220 + if (count < 512) 221 + WR(0x84, 0); 222 + break; 223 + case 4: 224 + if (count < 512) 225 + WR(0x84, 1); 211 226 w3(0x40); 212 - for (k=0;k<count/2;k++) w4w(((u16 *)buf)[k]); 213 - if (count < 512) WR(0x84,0); 214 - break; 215 - 216 - case 5: if (count < 512) WR(0x84,1); 227 + for (k = 0; k < count / 2; k++) 228 + w4w(((u16 *)buf)[k]); 229 + if (count < 512) 230 + WR(0x84, 0); 231 + break; 232 + case 5: 233 + if (count < 512) 234 + WR(0x84, 1); 217 235 w3(0x40); 218 - for (k=0;k<count/4;k++) w4l(((u32 *)buf)[k]); 219 - if (count < 512) WR(0x84,0); 220 - break; 221 - 222 - } 223 - 236 + for (k = 0; k < count / 4; k++) 237 + w4l(((u32 *)buf)[k]); 238 + if (count < 512) 239 + WR(0x84, 0); 240 + break; 241 + } 224 242 } 225 243 226 244 static int epia_test_proto(struct pi_adapter *pi) 227 - 228 - { int j, k, f; 229 - int e[2] = {0,0}; 245 + { 246 + int j, k, f; 247 + int e[2] = { 0, 0 }; 230 248 char scratch[512]; 231 249 232 - epia_connect(pi); 233 - for (j=0;j<2;j++) { 234 - WR(6,0xa0+j*0x10); 235 - for (k=0;k<256;k++) { 236 - WR(2,k^0xaa); 237 - WR(3,k^0x55); 238 - if (RR(2) != (k^0xaa)) e[j]++; 239 - } 240 - WR(2,1); WR(3,1); 241 - } 242 - epia_disconnect(pi); 250 + epia_connect(pi); 251 + for (j = 0; j < 2; j++) { 252 + WR(6, 0xa0 + j * 0x10); 253 + for (k = 0; k < 256; k++) { 254 + WR(2, k ^ 0xaa); 255 + WR(3, k ^ 0x55); 256 + if (RR(2) != (k ^ 0xaa)) 257 + e[j]++; 258 + } 259 + WR(2, 1); WR(3, 1); 260 + } 261 + epia_disconnect(pi); 243 262 244 - f = 0; 245 - epia_connect(pi); 246 - WR(0x84,8); 247 - epia_read_block(pi,scratch,512); 248 - for (k=0;k<256;k++) { 249 - if ((scratch[2*k] & 0xff) != ((k+1) & 0xff)) f++; 250 - if ((scratch[2*k+1] & 0xff) != ((-2-k) & 0xff)) f++; 251 - } 252 - WR(0x84,0); 253 - epia_disconnect(pi); 263 + f = 0; 264 + epia_connect(pi); 265 + WR(0x84, 8); 266 + epia_read_block(pi, scratch, 512); 267 + for (k = 0; k < 256; k++) { 268 + if ((scratch[2 * k] & 0xff) != ((k + 1) & 0xff)) 269 + f++; 270 + if ((scratch[2 * k + 1] & 0xff) != ((-2 - k) & 0xff)) 271 + f++; 272 + } 273 + WR(0x84, 0); 274 + epia_disconnect(pi); 254 275 255 276 dev_dbg(&pi->dev, "epia: port 0x%x, mode %d, test=(%d,%d,%d)\n", 256 - pi->port, pi->mode, e[0], e[1], f); 257 - 258 - return (e[0] && e[1]) || f; 277 + pi->port, pi->mode, e[0], e[1], f); 259 278 279 + return (e[0] && e[1]) || f; 260 280 } 261 281 262 282 263 283 static void epia_log_adapter(struct pi_adapter *pi) 284 + { 285 + char *mode[6] = { "4-bit", "5/3", "8-bit", "EPP-8", "EPP-16", "EPP-32"}; 264 286 265 - { char *mode_string[6] = {"4-bit","5/3","8-bit", 266 - "EPP-8","EPP-16","EPP-32"}; 267 - 268 - dev_info(&pi->dev, "Shuttle EPIA at 0x%x, mode %d (%s), delay %d\n", 269 - pi->port, pi->mode, mode_string[pi->mode], pi->delay); 287 + dev_info(&pi->dev, 288 + "Shuttle EPIA at 0x%x, mode %d (%s), delay %d\n", 289 + pi->port, pi->mode, mode[pi->mode], pi->delay); 270 290 } 271 291 272 292 static struct pi_protocol epia = {
+64 -67
drivers/ata/pata_parport/fit2.c
··· 1 - /* 2 - fit2.c (c) 1998 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - fit2.c is a low-level protocol driver for the older version 6 - of the Fidelity International Technology parallel port adapter. 7 - This adapter is used in their TransDisk 2000 and older TransDisk 8 - 3000 portable hard-drives. As far as I can tell, this device 9 - supports 4-bit mode _only_. 10 - 11 - Newer models of the FIT products use an enhanced protocol. 12 - The "fit3" protocol module should support current drives. 13 - 14 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * fit2.c is a low-level protocol driver for the older version 6 + * of the Fidelity International Technology parallel port adapter. 7 + * This adapter is used in their TransDisk 2000 and older TransDisk 8 + * 3000 portable hard-drives. As far as I can tell, this device 9 + * supports 4-bit mode _only_. 10 + * 11 + * Newer models of the FIT products use an enhanced protocol. 12 + * The "fit3" protocol module should support current drives. 13 + */ 15 14 16 15 #include <linux/module.h> 17 16 #include <linux/init.h> ··· 21 22 #include <asm/io.h> 22 23 #include "pata_parport.h" 23 24 24 - #define j44(a,b) (((a>>4)&0x0f)|(b&0xf0)) 25 + #define j44(a, b) (((a >> 4) & 0x0f) | (b & 0xf0)) 25 26 26 - /* cont = 0 - access the IDE register file 27 - cont = 1 - access the IDE command set 28 - 29 - NB: The FIT adapter does not appear to use the control registers. 30 - So, we map ALT_STATUS to STATUS and NO-OP writes to the device 31 - control register - this means that IDE reset will not work on these 32 - devices. 33 - 34 - */ 27 + /* 28 + * cont = 0 - access the IDE register file 29 + * cont = 1 - access the IDE command set 30 + * 31 + * NB: The FIT adapter does not appear to use the control registers. 32 + * So, we map ALT_STATUS to STATUS and NO-OP writes to the device 33 + * control register - this means that IDE reset will not work on these 34 + * devices. 35 + */ 35 36 36 37 static void fit2_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 37 - 38 - { if (cont == 1) return; 38 + { 39 + if (cont == 1) 40 + return; 39 41 w2(0xc); w0(regr); w2(4); w0(val); w2(5); w0(0); w2(4); 40 42 } 41 43 42 44 static int fit2_read_regr(struct pi_adapter *pi, int cont, int regr) 43 - 44 - { int a, b, r; 45 + { 46 + int a, b, r; 45 47 46 48 if (cont) { 47 - if (regr != 6) return 0xff; 48 - r = 7; 49 - } else r = regr + 0x10; 49 + if (regr != 6) 50 + return 0xff; 51 + r = 7; 52 + } else { 53 + r = regr + 0x10; 54 + } 50 55 51 - w2(0xc); w0(r); w2(4); w2(5); 52 - w0(0); a = r1(); 53 - w0(1); b = r1(); 56 + w2(0xc); w0(r); w2(4); w2(5); 57 + w0(0); a = r1(); 58 + w0(1); b = r1(); 54 59 w2(4); 55 60 56 - return j44(a,b); 57 - 61 + return j44(a, b); 58 62 } 59 63 60 64 static void fit2_read_block(struct pi_adapter *pi, char *buf, int count) 61 - 62 - { int k, a, b, c, d; 65 + { 66 + int k, a, b, c, d; 63 67 64 68 w2(0xc); w0(0x10); 65 69 66 - for (k=0;k<count/4;k++) { 67 - 70 + for (k = 0; k < count / 4; k++) { 68 71 w2(4); w2(5); 69 72 w0(0); a = r1(); w0(1); b = r1(); 70 - w0(3); c = r1(); w0(2); d = r1(); 71 - buf[4*k+0] = j44(a,b); 72 - buf[4*k+1] = j44(d,c); 73 + w0(3); c = r1(); w0(2); d = r1(); 74 + buf[4 * k + 0] = j44(a, b); 75 + buf[4 * k + 1] = j44(d, c); 73 76 74 - w2(4); w2(5); 75 - a = r1(); w0(3); b = r1(); 76 - w0(1); c = r1(); w0(0); d = r1(); 77 - buf[4*k+2] = j44(d,c); 78 - buf[4*k+3] = j44(a,b); 79 - 77 + w2(4); w2(5); 78 + a = r1(); w0(3); b = r1(); 79 + w0(1); c = r1(); w0(0); d = r1(); 80 + buf[4 * k + 2] = j44(d, c); 81 + buf[4 * k + 3] = j44(a, b); 80 82 } 81 83 82 84 w2(4); 83 - 84 85 } 85 86 86 87 static void fit2_write_block(struct pi_adapter *pi, char *buf, int count) 88 + { 89 + int k; 87 90 88 - { int k; 89 - 90 - 91 - w2(0xc); w0(0); 92 - for (k=0;k<count/2;k++) { 93 - w2(4); w0(buf[2*k]); 94 - w2(5); w0(buf[2*k+1]); 91 + w2(0xc); w0(0); 92 + for (k = 0; k < count / 2; k++) { 93 + w2(4); w0(buf[2 * k]); 94 + w2(5); w0(buf[2 * k + 1]); 95 95 } 96 96 w2(4); 97 97 } 98 98 99 99 static void fit2_connect(struct pi_adapter *pi) 100 - 101 - { pi->saved_r0 = r0(); 102 - pi->saved_r2 = r2(); 103 - w2(0xcc); 100 + { 101 + pi->saved_r0 = r0(); 102 + pi->saved_r2 = r2(); 103 + w2(0xcc); 104 104 } 105 105 106 106 static void fit2_disconnect(struct pi_adapter *pi) 107 - 108 - { w0(pi->saved_r0); 109 - w2(pi->saved_r2); 110 - } 107 + { 108 + w0(pi->saved_r0); 109 + w2(pi->saved_r2); 110 + } 111 111 112 112 static void fit2_log_adapter(struct pi_adapter *pi) 113 - 114 113 { 115 114 dev_info(&pi->dev, "FIT 2000 adapter at 0x%x, delay %d\n", 116 - pi->port, pi->delay); 115 + pi->port, pi->delay); 117 116 118 117 } 119 118
+106 -104
drivers/ata/pata_parport/fit3.c
··· 1 - /* 2 - fit3.c (c) 1998 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - fit3.c is a low-level protocol driver for newer models 6 - of the Fidelity International Technology parallel port adapter. 7 - This adapter is used in their TransDisk 3000 portable 8 - hard-drives, as well as CD-ROM, PD-CD and other devices. 9 - 10 - The TD-2000 and certain older devices use a different protocol. 11 - Try the fit2 protocol module with them. 12 - 13 - NB: The FIT adapters do not appear to support the control 14 - registers. So, we map ALT_STATUS to STATUS and NO-OP writes 15 - to the device control register - this means that IDE reset 16 - will not work on these devices. 17 - 18 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * fit3.c is a low-level protocol driver for newer models 6 + * of the Fidelity International Technology parallel port adapter. 7 + * This adapter is used in their TransDisk 3000 portable 8 + * hard-drives, as well as CD-ROM, PD-CD and other devices. 9 + * 10 + * The TD-2000 and certain older devices use a different protocol. 11 + * Try the fit2 protocol module with them. 12 + * 13 + * NB: The FIT adapters do not appear to support the control 14 + * registers. So, we map ALT_STATUS to STATUS and NO-OP writes 15 + * to the device control register - this means that IDE reset 16 + * will not work on these devices. 17 + */ 19 18 20 19 #include <linux/module.h> 21 20 #include <linux/init.h> ··· 25 26 #include <asm/io.h> 26 27 #include "pata_parport.h" 27 28 28 - #define j44(a,b) (((a>>3)&0x0f)|((b<<1)&0xf0)) 29 + #define j44(a, b) (((a >> 3) & 0x0f) | ((b << 1) & 0xf0)) 29 30 30 - #define w7(byte) {out_p(7,byte);} 31 - #define r7() (in_p(7) & 0xff) 31 + #define w7(byte) out_p(7, byte) 32 + #define r7() (in_p(7) & 0xff) 32 33 33 - /* cont = 0 - access the IDE register file 34 - cont = 1 - access the IDE command set 35 - 36 - */ 34 + /* 35 + * cont = 0 - access the IDE register file 36 + * cont = 1 - access the IDE command set 37 + */ 37 38 38 39 static void fit3_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 39 - 40 - { if (cont == 1) return; 40 + { 41 + if (cont == 1) 42 + return; 41 43 42 44 switch (pi->mode) { 43 - 44 45 case 0: 45 - case 1: w2(0xc); w0(regr); w2(0x8); w2(0xc); 46 - w0(val); w2(0xd); 46 + case 1: 47 + w2(0xc); w0(regr); w2(0x8); w2(0xc); 48 + w0(val); w2(0xd); 47 49 w0(0); w2(0xc); 48 50 break; 49 - 50 - case 2: w2(0xc); w0(regr); w2(0x8); w2(0xc); 51 + case 2: 52 + w2(0xc); w0(regr); w2(0x8); w2(0xc); 51 53 w4(val); w4(0); 52 54 w2(0xc); 53 55 break; 54 - 55 56 } 56 57 } 57 58 58 59 static int fit3_read_regr(struct pi_adapter *pi, int cont, int regr) 59 - 60 - { int a, b; 60 + { 61 + int a, b; 61 62 62 63 if (cont) { 63 - if (regr != 6) return 0xff; 64 - regr = 7; 65 - } 64 + if (regr != 6) 65 + return 0xff; 66 + regr = 7; 67 + } 66 68 67 69 switch (pi->mode) { 68 - 69 - case 0: w2(0xc); w0(regr + 0x10); w2(0x8); w2(0xc); 70 + case 0: 71 + w2(0xc); w0(regr + 0x10); w2(0x8); w2(0xc); 70 72 w2(0xd); a = r1(); 71 - w2(0xf); b = r1(); 73 + w2(0xf); b = r1(); 72 74 w2(0xc); 73 - return j44(a,b); 74 - 75 - case 1: w2(0xc); w0(regr + 0x90); w2(0x8); w2(0xc); 76 - w2(0xec); w2(0xee); w2(0xef); a = r0(); 77 - w2(0xc); 78 - return a; 79 - 80 - case 2: w2(0xc); w0(regr + 0x90); w2(0x8); w2(0xc); 81 - w2(0xec); 82 - a = r4(); b = r4(); 75 + return j44(a, b); 76 + case 1: 77 + w2(0xc); w0(regr + 0x90); w2(0x8); w2(0xc); 78 + w2(0xec); w2(0xee); w2(0xef); a = r0(); 83 79 w2(0xc); 84 80 return a; 85 - 81 + case 2: 82 + w2(0xc); w0(regr + 0x90); w2(0x8); w2(0xc); 83 + w2(0xec); 84 + a = r4(); b = r4(); 85 + w2(0xc); 86 + return a; 86 87 } 87 - return -1; 88 88 89 + return -1; 89 90 } 90 91 91 92 static void fit3_read_block(struct pi_adapter *pi, char *buf, int count) 92 - 93 - { int k, a, b, c, d; 93 + { 94 + int k, a, b, c, d; 94 95 95 96 switch (pi->mode) { 96 - 97 - case 0: w2(0xc); w0(0x10); w2(0x8); w2(0xc); 98 - for (k=0;k<count/2;k++) { 99 - w2(0xd); a = r1(); 100 - w2(0xf); b = r1(); 101 - w2(0xc); c = r1(); 102 - w2(0xe); d = r1(); 103 - buf[2*k ] = j44(a,b); 104 - buf[2*k+1] = j44(c,d); 97 + case 0: 98 + w2(0xc); w0(0x10); w2(0x8); w2(0xc); 99 + for (k = 0; k < count / 2; k++) { 100 + w2(0xd); a = r1(); 101 + w2(0xf); b = r1(); 102 + w2(0xc); c = r1(); 103 + w2(0xe); d = r1(); 104 + buf[2 * k] = j44(a, b); 105 + buf[2 * k + 1] = j44(c, d); 105 106 } 106 107 w2(0xc); 107 108 break; 108 - 109 - case 1: w2(0xc); w0(0x90); w2(0x8); w2(0xc); 109 + case 1: 110 + w2(0xc); w0(0x90); w2(0x8); w2(0xc); 110 111 w2(0xec); w2(0xee); 111 - for (k=0;k<count/2;k++) { 112 - w2(0xef); a = r0(); 113 - w2(0xee); b = r0(); 114 - buf[2*k ] = a; 115 - buf[2*k+1] = b; 112 + for (k = 0; k < count / 2; k++) { 113 + w2(0xef); a = r0(); 114 + w2(0xee); b = r0(); 115 + buf[2 * k] = a; 116 + buf[2 * k + 1] = b; 116 117 } 117 - w2(0xec); 118 + w2(0xec); 118 119 w2(0xc); 119 120 break; 120 - 121 - case 2: w2(0xc); w0(0x90); w2(0x8); w2(0xc); 122 - w2(0xec); 123 - for (k=0;k<count;k++) buf[k] = r4(); 124 - w2(0xc); 121 + case 2: 122 + w2(0xc); w0(0x90); w2(0x8); w2(0xc); 123 + w2(0xec); 124 + for (k = 0; k < count; k++) 125 + buf[k] = r4(); 126 + w2(0xc); 125 127 break; 126 - 127 128 } 128 129 } 129 130 130 131 static void fit3_write_block(struct pi_adapter *pi, char *buf, int count) 132 + { 133 + int k; 131 134 132 - { int k; 133 - 134 - switch (pi->mode) { 135 - 135 + switch (pi->mode) { 136 136 case 0: 137 - case 1: w2(0xc); w0(0); w2(0x8); w2(0xc); 138 - for (k=0;k<count/2;k++) { 139 - w0(buf[2*k ]); w2(0xd); 140 - w0(buf[2*k+1]); w2(0xc); 137 + case 1: 138 + w2(0xc); w0(0); w2(0x8); w2(0xc); 139 + for (k = 0; k < count / 2; k++) { 140 + w0(buf[2 * k]); w2(0xd); 141 + w0(buf[2 * k + 1]); w2(0xc); 141 142 } 142 143 break; 143 - 144 - case 2: w2(0xc); w0(0); w2(0x8); w2(0xc); 145 - for (k=0;k<count;k++) w4(buf[k]); 146 - w2(0xc); 144 + case 2: 145 + w2(0xc); w0(0); w2(0x8); w2(0xc); 146 + for (k = 0; k < count; k++) 147 + w4(buf[k]); 148 + w2(0xc); 147 149 break; 148 150 } 149 151 } 150 152 151 153 static void fit3_connect(struct pi_adapter *pi) 152 - 153 - { pi->saved_r0 = r0(); 154 - pi->saved_r2 = r2(); 154 + { 155 + pi->saved_r0 = r0(); 156 + pi->saved_r2 = r2(); 155 157 w2(0xc); w0(0); w2(0xa); 156 - if (pi->mode == 2) { 157 - w2(0xc); w0(0x9); w2(0x8); w2(0xc); 158 - } 158 + if (pi->mode == 2) { 159 + w2(0xc); w0(0x9); 160 + w2(0x8); w2(0xc); 161 + } 159 162 } 160 163 161 164 static void fit3_disconnect(struct pi_adapter *pi) 162 - 163 - { w2(0xc); w0(0xa); w2(0x8); w2(0xc); 165 + { 166 + w2(0xc); w0(0xa); w2(0x8); w2(0xc); 164 167 w0(pi->saved_r0); 165 - w2(pi->saved_r2); 166 - } 168 + w2(pi->saved_r2); 169 + } 167 170 168 171 static void fit3_log_adapter(struct pi_adapter *pi) 172 + { 173 + char *mode_string[3] = { "4-bit", "8-bit", "EPP"}; 169 174 170 - { char *mode_string[3] = {"4-bit","8-bit","EPP"}; 171 - 172 - dev_info(&pi->dev, "FIT 3000 adapter at 0x%x, mode %d (%s), delay %d\n", 173 - pi->port, pi->mode, mode_string[pi->mode], pi->delay); 175 + dev_info(&pi->dev, 176 + "FIT 3000 adapter at 0x%x, mode %d (%s), delay %d\n", 177 + pi->port, pi->mode, mode_string[pi->mode], pi->delay); 174 178 } 175 179 176 180 static struct pi_protocol fit3 = {
+160 -152
drivers/ata/pata_parport/friq.c
··· 1 - /* 2 - friq.c (c) 1998 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License 4 - 5 - friq.c is a low-level protocol driver for the Freecom "IQ" 6 - parallel port IDE adapter. Early versions of this adapter 7 - use the 'frpw' protocol. 8 - 9 - Freecom uses this adapter in a battery powered external 10 - CD-ROM drive. It is also used in LS-120 drives by 11 - Maxell and Panasonic, and other devices. 12 - 13 - The battery powered drive requires software support to 14 - control the power to the drive. This module enables the 15 - drive power when the high level driver (pcd) is loaded 16 - and disables it when the module is unloaded. Note, if 17 - the friq module is built in to the kernel, the power 18 - will never be switched off, so other means should be 19 - used to conserve battery power. 20 - 21 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * friq.c is a low-level protocol driver for the Freecom "IQ" 6 + * parallel port IDE adapter. Early versions of this adapter 7 + * use the 'frpw' protocol. 8 + * 9 + * Freecom uses this adapter in a battery powered external 10 + * CD-ROM drive. It is also used in LS-120 drives by 11 + * Maxell and Panasonic, and other devices. 12 + * 13 + * The battery powered drive requires software support to 14 + * control the power to the drive. This module enables the 15 + * drive power when the high level driver (pcd) is loaded 16 + * and disables it when the module is unloaded. Note, if 17 + * the friq module is built in to the kernel, the power 18 + * will never be switched off, so other means should be 19 + * used to conserve battery power. 20 + */ 22 21 23 22 #include <linux/module.h> 24 23 #include <linux/init.h> ··· 28 29 #include <asm/io.h> 29 30 #include "pata_parport.h" 30 31 31 - #define CMD(x) w2(4);w0(0xff);w0(0xff);w0(0x73);w0(0x73);\ 32 - w0(0xc9);w0(0xc9);w0(0x26);w0(0x26);w0(x);w0(x); 32 + #define CMD(x) \ 33 + do { \ 34 + w2(4); w0(0xff); w0(0xff); w0(0x73); w0(0x73); \ 35 + w0(0xc9); w0(0xc9); w0(0x26); \ 36 + w0(0x26); w0(x); w0(x); \ 37 + } while (0) 33 38 34 - #define j44(l,h) (((l>>4)&0x0f)|(h&0xf0)) 39 + #define j44(l, h) (((l >> 4) & 0x0f) | (h & 0xf0)) 35 40 36 - /* cont = 0 - access the IDE register file 37 - cont = 1 - access the IDE command set 38 - */ 39 - 40 - static int cont_map[2] = { 0x08, 0x10 }; 41 + /* 42 + * cont = 0 - access the IDE register file 43 + * cont = 1 - access the IDE command set 44 + */ 45 + static int cont_map[2] = { 0x08, 0x10 }; 41 46 42 47 static int friq_read_regr(struct pi_adapter *pi, int cont, int regr) 43 - 44 - { int h,l,r; 48 + { 49 + int h, l, r; 45 50 46 51 r = regr + cont_map[cont]; 47 52 48 53 CMD(r); 49 54 w2(6); l = r1(); 50 55 w2(4); h = r1(); 51 - w2(4); 56 + w2(4); 52 57 53 - return j44(l,h); 54 - 58 + return j44(l, h); 55 59 } 56 60 57 61 static void friq_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 58 - 59 - { int r; 60 - 61 - r = regr + cont_map[cont]; 62 + { 63 + int r = regr + cont_map[cont]; 62 64 63 65 CMD(r); 64 66 w0(val); 65 - w2(5);w2(7);w2(5);w2(4); 67 + w2(5); w2(7); w2(5); w2(4); 66 68 } 67 69 68 70 static void friq_read_block_int(struct pi_adapter *pi, char *buf, int count, int regr) 71 + { 72 + int h, l, k, ph; 69 73 70 - { int h, l, k, ph; 71 - 72 - switch(pi->mode) { 73 - 74 - case 0: CMD(regr); 75 - for (k=0;k<count;k++) { 76 - w2(6); l = r1(); 77 - w2(4); h = r1(); 78 - buf[k] = j44(l,h); 79 - } 80 - w2(4); 81 - break; 82 - 83 - case 1: ph = 2; 84 - CMD(regr+0xc0); 85 - w0(0xff); 86 - for (k=0;k<count;k++) { 87 - w2(0xa4 + ph); 88 - buf[k] = r0(); 89 - ph = 2 - ph; 90 - } 91 - w2(0xac); w2(0xa4); w2(4); 92 - break; 93 - 94 - case 2: CMD(regr+0x80); 95 - for (k=0;k<count-2;k++) buf[k] = r4(); 96 - w2(0xac); w2(0xa4); 97 - buf[count-2] = r4(); 98 - buf[count-1] = r4(); 99 - w2(4); 100 - break; 101 - 102 - case 3: CMD(regr+0x80); 103 - for (k=0;k<(count/2)-1;k++) ((u16 *)buf)[k] = r4w(); 104 - w2(0xac); w2(0xa4); 105 - buf[count-2] = r4(); 106 - buf[count-1] = r4(); 107 - w2(4); 108 - break; 109 - 110 - case 4: CMD(regr+0x80); 111 - for (k=0;k<(count/4)-1;k++) ((u32 *)buf)[k] = r4l(); 112 - buf[count-4] = r4(); 113 - buf[count-3] = r4(); 114 - w2(0xac); w2(0xa4); 115 - buf[count-2] = r4(); 116 - buf[count-1] = r4(); 117 - w2(4); 118 - break; 119 - 120 - } 121 - } 122 - 123 - static void friq_read_block(struct pi_adapter *pi, char *buf, int count) 124 - 125 - { friq_read_block_int(pi,buf,count,0x08); 126 - } 127 - 128 - static void friq_write_block(struct pi_adapter *pi, char *buf, int count) 129 - 130 - { int k; 131 - 132 - switch(pi->mode) { 133 - 74 + switch (pi->mode) { 134 75 case 0: 135 - case 1: CMD(8); w2(5); 136 - for (k=0;k<count;k++) { 137 - w0(buf[k]); 138 - w2(7);w2(5); 76 + CMD(regr); 77 + for (k = 0; k < count; k++) { 78 + w2(6); l = r1(); 79 + w2(4); h = r1(); 80 + buf[k] = j44(l, h); 139 81 } 140 82 w2(4); 141 83 break; 142 - 143 - case 2: CMD(0xc8); w2(5); 144 - for (k=0;k<count;k++) w4(buf[k]); 84 + case 1: 85 + ph = 2; 86 + CMD(regr + 0xc0); 87 + w0(0xff); 88 + for (k = 0; k < count; k++) { 89 + w2(0xa4 + ph); 90 + buf[k] = r0(); 91 + ph = 2 - ph; 92 + } 93 + w2(0xac); w2(0xa4); w2(4); 94 + break; 95 + case 2: 96 + CMD(regr + 0x80); 97 + for (k = 0; k < count - 2; k++) 98 + buf[k] = r4(); 99 + w2(0xac); w2(0xa4); 100 + buf[count - 2] = r4(); 101 + buf[count - 1] = r4(); 145 102 w2(4); 146 103 break; 147 - 148 - case 3: CMD(0xc8); w2(5); 149 - for (k=0;k<count/2;k++) w4w(((u16 *)buf)[k]); 150 - w2(4); 151 - break; 152 - 153 - case 4: CMD(0xc8); w2(5); 154 - for (k=0;k<count/4;k++) w4l(((u32 *)buf)[k]); 155 - w2(4); 156 - break; 104 + case 3: 105 + CMD(regr + 0x80); 106 + for (k = 0; k < count / 2 - 1; k++) 107 + ((u16 *)buf)[k] = r4w(); 108 + w2(0xac); w2(0xa4); 109 + buf[count - 2] = r4(); 110 + buf[count - 1] = r4(); 111 + w2(4); 112 + break; 113 + case 4: 114 + CMD(regr + 0x80); 115 + for (k = 0; k < count / 4 - 1; k++) 116 + ((u32 *)buf)[k] = r4l(); 117 + buf[count - 4] = r4(); 118 + buf[count - 3] = r4(); 119 + w2(0xac); w2(0xa4); 120 + buf[count - 2] = r4(); 121 + buf[count - 1] = r4(); 122 + w2(4); 123 + break; 157 124 } 158 125 } 159 126 160 - static void friq_connect(struct pi_adapter *pi) 127 + static void friq_read_block(struct pi_adapter *pi, char *buf, int count) 128 + { 129 + friq_read_block_int(pi, buf, count, 0x08); 130 + } 161 131 162 - { pi->saved_r0 = r0(); 163 - pi->saved_r2 = r2(); 132 + static void friq_write_block(struct pi_adapter *pi, char *buf, int count) 133 + { 134 + int k; 135 + 136 + switch (pi->mode) { 137 + case 0: 138 + case 1: 139 + CMD(8); w2(5); 140 + for (k = 0; k < count; k++) { 141 + w0(buf[k]); 142 + w2(7); w2(5); 143 + } 144 + w2(4); 145 + break; 146 + case 2: 147 + CMD(0xc8); w2(5); 148 + for (k = 0; k < count; k++) 149 + w4(buf[k]); 150 + w2(4); 151 + break; 152 + case 3: 153 + CMD(0xc8); w2(5); 154 + for (k = 0; k < count / 2; k++) 155 + w4w(((u16 *)buf)[k]); 156 + w2(4); 157 + break; 158 + case 4: 159 + CMD(0xc8); w2(5); 160 + for (k = 0; k < count / 4; k++) 161 + w4l(((u32 *)buf)[k]); 162 + w2(4); 163 + break; 164 + } 165 + } 166 + 167 + static void friq_connect(struct pi_adapter *pi) 168 + { 169 + pi->saved_r0 = r0(); 170 + pi->saved_r2 = r2(); 164 171 w2(4); 165 172 } 166 173 167 174 static void friq_disconnect(struct pi_adapter *pi) 168 - 169 - { CMD(0x20); 175 + { 176 + CMD(0x20); 170 177 w0(pi->saved_r0); 171 - w2(pi->saved_r2); 172 - } 178 + w2(pi->saved_r2); 179 + } 173 180 174 181 static int friq_test_proto(struct pi_adapter *pi) 175 - 176 - { int j, k, r; 177 - int e[2] = {0,0}; 182 + { 183 + int j, k, r; 184 + int e[2] = { 0, 0 }; 178 185 char scratch[512]; 179 186 180 - pi->saved_r0 = r0(); 187 + pi->saved_r0 = r0(); 181 188 w0(0xff); udelay(20); CMD(0x3d); /* turn the power on */ 182 189 udelay(500); 183 190 w0(pi->saved_r0); 184 191 185 192 friq_connect(pi); 186 - for (j=0;j<2;j++) { 187 - friq_write_regr(pi,0,6,0xa0+j*0x10); 188 - for (k=0;k<256;k++) { 189 - friq_write_regr(pi,0,2,k^0xaa); 190 - friq_write_regr(pi,0,3,k^0x55); 191 - if (friq_read_regr(pi,0,2) != (k^0xaa)) e[j]++; 192 - } 193 - } 193 + for (j = 0; j < 2; j++) { 194 + friq_write_regr(pi, 0, 6, 0xa0 + j * 0x10); 195 + for (k = 0; k < 256; k++) { 196 + friq_write_regr(pi, 0, 2, k ^ 0xaa); 197 + friq_write_regr(pi, 0, 3, k ^ 0x55); 198 + if (friq_read_regr(pi, 0, 2) != (k ^ 0xaa)) 199 + e[j]++; 200 + } 201 + } 194 202 friq_disconnect(pi); 195 203 196 204 friq_connect(pi); 197 - friq_read_block_int(pi,scratch,512,0x10); 198 - r = 0; 199 - for (k=0;k<128;k++) if (scratch[k] != k) r++; 205 + friq_read_block_int(pi, scratch, 512, 0x10); 206 + r = 0; 207 + for (k = 0; k < 128; k++) { 208 + if (scratch[k] != k) 209 + r++; 210 + } 200 211 friq_disconnect(pi); 201 212 202 - dev_dbg(&pi->dev, "friq: port 0x%x, mode %d, test=(%d,%d,%d)\n", 203 - pi->port, pi->mode, e[0], e[1], r); 213 + dev_dbg(&pi->dev, 214 + "friq: port 0x%x, mode %d, test=(%d,%d,%d)\n", 215 + pi->port, pi->mode, e[0], e[1], r); 204 216 205 - return (r || (e[0] && e[1])); 217 + return r || (e[0] && e[1]); 206 218 } 207 219 208 - 209 220 static void friq_log_adapter(struct pi_adapter *pi) 221 + { 222 + char *mode_string[6] = { "4-bit", "8-bit", "EPP-8", "EPP-16", "EPP-32"}; 210 223 211 - { char *mode_string[6] = {"4-bit","8-bit", 212 - "EPP-8","EPP-16","EPP-32"}; 213 - 214 - dev_info(&pi->dev, "Freecom IQ ASIC-2 adapter at 0x%x, mode %d (%s), delay %d\n", 215 - pi->port, pi->mode, mode_string[pi->mode], pi->delay); 224 + dev_info(&pi->dev, 225 + "Freecom IQ ASIC-2 adapter at 0x%x, mode %d (%s), delay %d\n", 226 + pi->port, pi->mode, mode_string[pi->mode], pi->delay); 216 227 217 228 pi->private = 1; 218 229 friq_connect(pi); 219 230 CMD(0x9e); /* disable sleep timer */ 220 231 friq_disconnect(pi); 221 - 222 232 } 223 233 224 234 static void friq_release_proto(struct pi_adapter *pi)
+198 -184
drivers/ata/pata_parport/frpw.c
··· 1 - /* 2 - frpw.c (c) 1996-8 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License 4 - 5 - frpw.c is a low-level protocol driver for the Freecom "Power" 6 - parallel port IDE adapter. 7 - 8 - Some applications of this adapter may require a "printer" reset 9 - prior to loading the driver. This can be done by loading and 10 - unloading the "lp" driver, or it can be done by this driver 11 - if you define FRPW_HARD_RESET. The latter is not recommended 12 - as it may upset devices on other ports. 13 - 14 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1996-1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * frpw.c is a low-level protocol driver for the Freecom "Power" parallel port 6 + * IDE adapter. 7 + * 8 + * Some applications of this adapter may require a "printer" reset prior to 9 + * loading the driver. This can be done by loading and unloading the "lp" 10 + * driver, or it can be done by this driver if you define FRPW_HARD_RESET. 11 + * The latter is not recommended as it may upset devices on other ports. 12 + */ 15 13 16 14 #include <linux/module.h> 17 15 #include <linux/init.h> ··· 23 25 #define cec4 w2(0xc);w2(0xe);w2(0xe);w2(0xc);w2(4);w2(4);w2(4); 24 26 #define j44(l,h) (((l>>4)&0x0f)|(h&0xf0)) 25 27 26 - /* cont = 0 - access the IDE register file 27 - cont = 1 - access the IDE command set 28 - */ 29 - 28 + /* 29 + * cont = 0 - access the IDE register file 30 + * cont = 1 - access the IDE command set 31 + */ 30 32 static int cont_map[2] = { 0x08, 0x10 }; 31 33 32 34 static int frpw_read_regr(struct pi_adapter *pi, int cont, int regr) 33 - 34 - { int h,l,r; 35 + { 36 + int h, l, r; 35 37 36 38 r = regr + cont_map[cont]; 37 39 ··· 39 41 w0(r); cec4; 40 42 w2(6); l = r1(); 41 43 w2(4); h = r1(); 42 - w2(4); 44 + w2(4); 43 45 44 - return j44(l,h); 45 - 46 + return j44(l, h); 46 47 } 47 48 48 49 static void frpw_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 50 + { 51 + int r = regr + cont_map[cont]; 49 52 50 - { int r; 51 - 52 - r = regr + cont_map[cont]; 53 - 54 - w2(4); w0(r); cec4; 53 + w2(4); w0(r); cec4; 55 54 w0(val); 56 - w2(5);w2(7);w2(5);w2(4); 55 + w2(5); w2(7); w2(5); w2(4); 57 56 } 58 57 59 - static void frpw_read_block_int(struct pi_adapter *pi, char *buf, int count, int regr) 58 + static void frpw_read_block_int(struct pi_adapter *pi, char *buf, int count, 59 + int regr) 60 + { 61 + int h, l, k, ph; 60 62 61 - { int h, l, k, ph; 62 - 63 - switch(pi->mode) { 64 - 65 - case 0: w2(4); w0(regr); cec4; 66 - for (k=0;k<count;k++) { 67 - w2(6); l = r1(); 68 - w2(4); h = r1(); 69 - buf[k] = j44(l,h); 70 - } 71 - w2(4); 72 - break; 73 - 74 - case 1: ph = 2; 75 - w2(4); w0(regr + 0xc0); cec4; 76 - w0(0xff); 77 - for (k=0;k<count;k++) { 78 - w2(0xa4 + ph); 79 - buf[k] = r0(); 80 - ph = 2 - ph; 81 - } 82 - w2(0xac); w2(0xa4); w2(4); 83 - break; 84 - 85 - case 2: w2(4); w0(regr + 0x80); cec4; 86 - for (k=0;k<count;k++) buf[k] = r4(); 87 - w2(0xac); w2(0xa4); 88 - w2(4); 89 - break; 90 - 91 - case 3: w2(4); w0(regr + 0x80); cec4; 92 - for (k=0;k<count-2;k++) buf[k] = r4(); 93 - w2(0xac); w2(0xa4); 94 - buf[count-2] = r4(); 95 - buf[count-1] = r4(); 96 - w2(4); 97 - break; 98 - 99 - case 4: w2(4); w0(regr + 0x80); cec4; 100 - for (k=0;k<(count/2)-1;k++) ((u16 *)buf)[k] = r4w(); 101 - w2(0xac); w2(0xa4); 102 - buf[count-2] = r4(); 103 - buf[count-1] = r4(); 104 - w2(4); 105 - break; 106 - 107 - case 5: w2(4); w0(regr + 0x80); cec4; 108 - for (k=0;k<(count/4)-1;k++) ((u32 *)buf)[k] = r4l(); 109 - buf[count-4] = r4(); 110 - buf[count-3] = r4(); 111 - w2(0xac); w2(0xa4); 112 - buf[count-2] = r4(); 113 - buf[count-1] = r4(); 114 - w2(4); 115 - break; 116 - 117 - } 118 - } 119 - 120 - static void frpw_read_block(struct pi_adapter *pi, char *buf, int count) 121 - 122 - { frpw_read_block_int(pi,buf,count,0x08); 123 - } 124 - 125 - static void frpw_write_block(struct pi_adapter *pi, char *buf, int count) 126 - 127 - { int k; 128 - 129 - switch(pi->mode) { 130 - 63 + switch (pi->mode) { 131 64 case 0: 132 - case 1: 133 - case 2: w2(4); w0(8); cec4; w2(5); 134 - for (k=0;k<count;k++) { 135 - w0(buf[k]); 136 - w2(7);w2(5); 65 + w2(4); w0(regr); cec4; 66 + for (k = 0; k < count; k++) { 67 + w2(6); l = r1(); 68 + w2(4); h = r1(); 69 + buf[k] = j44(l, h); 137 70 } 138 71 w2(4); 139 72 break; 140 73 141 - case 3: w2(4); w0(0xc8); cec4; w2(5); 142 - for (k=0;k<count;k++) w4(buf[k]); 74 + case 1: 75 + ph = 2; 76 + w2(4); w0(regr + 0xc0); cec4; 77 + w0(0xff); 78 + for (k = 0; k < count; k++) { 79 + w2(0xa4 + ph); 80 + buf[k] = r0(); 81 + ph = 2 - ph; 82 + } 83 + w2(0xac); w2(0xa4); w2(4); 84 + break; 85 + 86 + case 2: 87 + w2(4); w0(regr + 0x80); cec4; 88 + for (k = 0; k < count; k++) 89 + buf[k] = r4(); 90 + w2(0xac); w2(0xa4); 143 91 w2(4); 144 92 break; 145 93 146 - case 4: w2(4); w0(0xc8); cec4; w2(5); 147 - for (k=0;k<count/2;k++) w4w(((u16 *)buf)[k]); 148 - w2(4); 149 - break; 94 + case 3: 95 + w2(4); w0(regr + 0x80); cec4; 96 + for (k = 0; k < count - 2; k++) 97 + buf[k] = r4(); 98 + w2(0xac); w2(0xa4); 99 + buf[count - 2] = r4(); 100 + buf[count - 1] = r4(); 101 + w2(4); 102 + break; 150 103 151 - case 5: w2(4); w0(0xc8); cec4; w2(5); 152 - for (k=0;k<count/4;k++) w4l(((u32 *)buf)[k]); 153 - w2(4); 154 - break; 104 + case 4: 105 + w2(4); w0(regr + 0x80); cec4; 106 + for (k = 0; k < count / 2 - 1; k++) 107 + ((u16 *)buf)[k] = r4w(); 108 + w2(0xac); w2(0xa4); 109 + buf[count - 2] = r4(); 110 + buf[count - 1] = r4(); 111 + w2(4); 112 + break; 113 + 114 + case 5: 115 + w2(4); w0(regr + 0x80); cec4; 116 + for (k = 0; k < count / 4 - 1; k++) 117 + ((u32 *)buf)[k] = r4l(); 118 + buf[count - 4] = r4(); 119 + buf[count - 3] = r4(); 120 + w2(0xac); w2(0xa4); 121 + buf[count - 2] = r4(); 122 + buf[count - 1] = r4(); 123 + w2(4); 124 + break; 125 + } 126 + } 127 + 128 + static void frpw_read_block(struct pi_adapter *pi, char *buf, int count) 129 + { 130 + frpw_read_block_int(pi, buf, count, 0x08); 131 + } 132 + 133 + static void frpw_write_block(struct pi_adapter *pi, char *buf, int count) 134 + { 135 + int k; 136 + 137 + switch (pi->mode) { 138 + case 0: 139 + case 1: 140 + case 2: 141 + w2(4); w0(8); cec4; w2(5); 142 + for (k = 0; k < count; k++) { 143 + w0(buf[k]); 144 + w2(7); w2(5); 145 + } 146 + w2(4); 147 + break; 148 + 149 + case 3: 150 + w2(4); w0(0xc8); cec4; w2(5); 151 + for (k = 0; k < count; k++) 152 + w4(buf[k]); 153 + w2(4); 154 + break; 155 + 156 + case 4: 157 + w2(4); w0(0xc8); cec4; w2(5); 158 + for (k = 0; k < count / 2; k++) 159 + w4w(((u16 *)buf)[k]); 160 + w2(4); 161 + break; 162 + 163 + case 5: 164 + w2(4); w0(0xc8); cec4; w2(5); 165 + for (k = 0; k < count / 4; k++) 166 + w4l(((u32 *)buf)[k]); 167 + w2(4); 168 + break; 155 169 } 156 170 } 157 171 158 172 static void frpw_connect(struct pi_adapter *pi) 159 - 160 - { pi->saved_r0 = r0(); 161 - pi->saved_r2 = r2(); 173 + { 174 + pi->saved_r0 = r0(); 175 + pi->saved_r2 = r2(); 162 176 w2(4); 163 177 } 164 178 165 179 static void frpw_disconnect(struct pi_adapter *pi) 166 - 167 - { w2(4); w0(0x20); cec4; 180 + { 181 + w2(4); w0(0x20); cec4; 168 182 w0(pi->saved_r0); 169 - w2(pi->saved_r2); 170 - } 183 + w2(pi->saved_r2); 184 + } 171 185 172 - /* Stub logic to see if PNP string is available - used to distinguish 173 - between the Xilinx and ASIC implementations of the Freecom adapter. 174 - */ 175 - 186 + /* 187 + * Stub logic to see if PNP string is available - used to distinguish 188 + * between the Xilinx and ASIC implementations of the Freecom adapter. 189 + * returns chip_type: 0 = Xilinx, 1 = ASIC 190 + */ 176 191 static int frpw_test_pnp(struct pi_adapter *pi) 177 - 178 - /* returns chip_type: 0 = Xilinx, 1 = ASIC */ 179 - 180 - { int olddelay, a, b; 192 + { 193 + int olddelay, a, b; 181 194 182 195 #ifdef FRPW_HARD_RESET 183 196 w0(0); w2(8); udelay(50); w2(0xc); /* parallel bus reset */ ··· 200 191 201 192 pi->saved_r0 = r0(); 202 193 pi->saved_r2 = r2(); 203 - 194 + 204 195 w2(4); w0(4); w2(6); w2(7); 205 196 a = r1() & 0xff; w2(4); b = r1() & 0xff; 206 197 w2(0xc); w2(0xe); w2(4); ··· 209 200 w0(pi->saved_r0); 210 201 w2(pi->saved_r2); 211 202 212 - return ((~a&0x40) && (b&0x40)); 213 - } 214 - 215 - /* We use the pi->private to remember the result of the PNP test. 216 - To make this work, private = port*2 + chip. Yes, I know it's 217 - a hack :-( 218 - */ 219 - 220 - static int frpw_test_proto(struct pi_adapter *pi) 221 - 222 - { int j, k, r; 223 - int e[2] = {0,0}; 224 - char scratch[512]; 225 - 226 - if ((pi->private>>1) != pi->port) 227 - pi->private = frpw_test_pnp(pi) + 2*pi->port; 228 - 229 - if (((pi->private%2) == 0) && (pi->mode > 2)) { 230 - dev_dbg(&pi->dev, "frpw: Xilinx does not support mode %d\n", pi->mode); 231 - return 1; 232 - } 233 - 234 - if (((pi->private%2) == 1) && (pi->mode == 2)) { 235 - dev_dbg(&pi->dev, "frpw: ASIC does not support mode 2\n"); 236 - return 1; 237 - } 238 - 239 - frpw_connect(pi); 240 - for (j=0;j<2;j++) { 241 - frpw_write_regr(pi,0,6,0xa0+j*0x10); 242 - for (k=0;k<256;k++) { 243 - frpw_write_regr(pi,0,2,k^0xaa); 244 - frpw_write_regr(pi,0,3,k^0x55); 245 - if (frpw_read_regr(pi,0,2) != (k^0xaa)) e[j]++; 246 - } 247 - } 248 - frpw_disconnect(pi); 249 - 250 - frpw_connect(pi); 251 - frpw_read_block_int(pi,scratch,512,0x10); 252 - r = 0; 253 - for (k=0;k<128;k++) if (scratch[k] != k) r++; 254 - frpw_disconnect(pi); 255 - 256 - dev_dbg(&pi->dev, "frpw: port 0x%x, chip %ld, mode %d, test=(%d,%d,%d)\n", 257 - pi->port, (pi->private%2), pi->mode, e[0], e[1], r); 258 - 259 - return (r || (e[0] && e[1])); 203 + return ((~a & 0x40) && (b & 0x40)); 260 204 } 261 205 206 + /* 207 + * We use the pi->private to remember the result of the PNP test. 208 + * To make this work, private = port*2 + chip. Yes, I know it's a hack :-( 209 + */ 210 + static int frpw_test_proto(struct pi_adapter *pi) 211 + { 212 + int j, k, r; 213 + int e[2] = { 0, 0 }; 214 + char scratch[512]; 215 + 216 + if ((pi->private >> 1) != pi->port) 217 + pi->private = frpw_test_pnp(pi) + 2*pi->port; 218 + 219 + if (((pi->private & 0x1) == 0) && (pi->mode > 2)) { 220 + dev_dbg(&pi->dev, 221 + "frpw: Xilinx does not support mode %d\n", pi->mode); 222 + return 1; 223 + } 224 + 225 + if (((pi->private & 0x1) == 1) && (pi->mode == 2)) { 226 + dev_dbg(&pi->dev, "frpw: ASIC does not support mode 2\n"); 227 + return 1; 228 + } 229 + 230 + frpw_connect(pi); 231 + for (j = 0; j < 2; j++) { 232 + frpw_write_regr(pi, 0, 6, 0xa0 + j * 0x10); 233 + for (k = 0; k < 256; k++) { 234 + frpw_write_regr(pi, 0, 2, k ^ 0xaa); 235 + frpw_write_regr(pi, 0, 3, k ^ 0x55); 236 + if (frpw_read_regr(pi, 0, 2) != (k ^ 0xaa)) 237 + e[j]++; 238 + } 239 + } 240 + frpw_disconnect(pi); 241 + 242 + frpw_connect(pi); 243 + frpw_read_block_int(pi, scratch, 512, 0x10); 244 + r = 0; 245 + for (k = 0; k < 128; k++) { 246 + if (scratch[k] != k) 247 + r++; 248 + } 249 + frpw_disconnect(pi); 250 + 251 + dev_dbg(&pi->dev, 252 + "frpw: port 0x%x, chip %ld, mode %d, test=(%d,%d,%d)\n", 253 + pi->port, (pi->private%2), pi->mode, e[0], e[1], r); 254 + 255 + return r || (e[0] && e[1]); 256 + } 262 257 263 258 static void frpw_log_adapter(struct pi_adapter *pi) 264 259 265 - { char *mode_string[6] = {"4-bit","8-bit","EPP", 266 - "EPP-8","EPP-16","EPP-32"}; 260 + { 261 + char *mode[6] = { "4-bit", "8-bit", "EPP", "EPP-8", "EPP-16", "EPP-32"}; 267 262 268 - dev_info(&pi->dev, "Freecom (%s) adapter at 0x%x, mode %d (%s), delay %d\n", 269 - ((pi->private % 2) == 0) ? "Xilinx" : "ASIC", 270 - pi->port, pi->mode, mode_string[pi->mode], pi->delay); 263 + dev_info(&pi->dev, 264 + "Freecom (%s) adapter at 0x%x, mode %d (%s), delay %d\n", 265 + ((pi->private & 0x1) == 0) ? "Xilinx" : "ASIC", 266 + pi->port, pi->mode, mode[pi->mode], pi->delay); 271 267 } 272 268 273 269 static struct pi_protocol frpw = {
+162 -152
drivers/ata/pata_parport/kbic.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 1 2 /* 2 - kbic.c (c) 1997-8 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - This is a low-level driver for the KBIC-951A and KBIC-971A 6 - parallel to IDE adapter chips from KingByte Information Systems. 7 - 8 - The chips are almost identical, however, the wakeup code 9 - required for the 971A interferes with the correct operation of 10 - the 951A, so this driver registers itself twice, once for 11 - each chip. 12 - 13 - */ 3 + * (c) 1997-1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * This is a low-level driver for the KBIC-951A and KBIC-971A 6 + * parallel to IDE adapter chips from KingByte Information Systems. 7 + * 8 + * The chips are almost identical, however, the wakeup code 9 + * required for the 971A interferes with the correct operation of 10 + * the 951A, so this driver registers itself twice, once for 11 + * each chip. 12 + */ 14 13 15 14 #include <linux/module.h> 16 15 #include <linux/init.h> ··· 20 21 #include <asm/io.h> 21 22 #include "pata_parport.h" 22 23 23 - #define r12w() (delay_p,inw(pi->port+1)&0xffff) 24 + #define r12w() (delay_p, inw(pi->port + 1) & 0xffff) 24 25 25 - #define j44(a,b) ((((a>>4)&0x0f)|(b&0xf0))^0x88) 26 - #define j53(w) (((w>>3)&0x1f)|((w>>4)&0xe0)) 26 + #define j44(a, b) ((((a >> 4) & 0x0f) | (b & 0xf0)) ^ 0x88) 27 + #define j53(w) (((w >> 3) & 0x1f) | ((w >> 4) & 0xe0)) 27 28 28 29 29 - /* cont = 0 - access the IDE register file 30 - cont = 1 - access the IDE command set 31 - */ 32 - 33 - static int cont_map[2] = { 0x80, 0x40 }; 30 + /* 31 + * cont = 0 - access the IDE register file 32 + * cont = 1 - access the IDE command set 33 + */ 34 + static int cont_map[2] = { 0x80, 0x40 }; 34 35 35 36 static int kbic_read_regr(struct pi_adapter *pi, int cont, int regr) 37 + { 38 + int a, b, s; 36 39 37 - { int a, b, s; 38 - 39 - s = cont_map[cont]; 40 + s = cont_map[cont]; 40 41 41 42 switch (pi->mode) { 42 - 43 - case 0: w0(regr|0x18|s); w2(4); w2(6); w2(4); w2(1); w0(8); 44 - a = r1(); w0(0x28); b = r1(); w2(4); 45 - return j44(a,b); 46 - 47 - case 1: w0(regr|0x38|s); w2(4); w2(6); w2(4); w2(5); w0(8); 43 + case 0: 44 + w0(regr | 0x18 | s); w2(4); w2(6); w2(4); w2(1); w0(8); 45 + a = r1(); w0(0x28); b = r1(); w2(4); 46 + return j44(a, b); 47 + case 1: 48 + w0(regr|0x38 | s); w2(4); w2(6); w2(4); w2(5); w0(8); 48 49 a = r12w(); w2(4); 49 50 return j53(a); 50 - 51 - case 2: w0(regr|0x08|s); w2(4); w2(6); w2(4); w2(0xa5); w2(0xa1); 51 + case 2: 52 + w0(regr | 0x08 | s); w2(4); w2(6); w2(4); w2(0xa5); w2(0xa1); 52 53 a = r0(); w2(4); 53 - return a; 54 - 54 + return a; 55 55 case 3: 56 56 case 4: 57 - case 5: w0(0x20|s); w2(4); w2(6); w2(4); w3(regr); 57 + case 5: 58 + w0(0x20 | s); w2(4); w2(6); w2(4); w3(regr); 58 59 a = r4(); b = r4(); w2(4); w2(0); w2(4); 59 60 return a; 60 - 61 61 } 62 + 62 63 return -1; 63 - } 64 + } 64 65 65 66 static void kbic_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 67 + { 68 + int s = cont_map[cont]; 66 69 67 - { int s; 68 - 69 - s = cont_map[cont]; 70 - 71 - switch (pi->mode) { 72 - 73 - case 0: 74 - case 1: 75 - case 2: w0(regr|0x10|s); w2(4); w2(6); w2(4); 70 + switch (pi->mode) { 71 + case 0: 72 + case 1: 73 + case 2: 74 + w0(regr | 0x10 | s); w2(4); w2(6); w2(4); 76 75 w0(val); w2(5); w2(4); 77 76 break; 78 - 79 77 case 3: 80 78 case 4: 81 - case 5: w0(0x20|s); w2(4); w2(6); w2(4); w3(regr); 79 + case 5: 80 + w0(0x20 | s); w2(4); w2(6); w2(4); w3(regr); 82 81 w4(val); w4(val); 83 82 w2(4); w2(0); w2(4); 84 - break; 85 - 83 + break; 86 84 } 87 85 } 88 86 89 87 static void k951_connect(struct pi_adapter *pi) 90 - 91 - { pi->saved_r0 = r0(); 92 - pi->saved_r2 = r2(); 93 - w2(4); 88 + { 89 + pi->saved_r0 = r0(); 90 + pi->saved_r2 = r2(); 91 + w2(4); 94 92 } 95 93 96 94 static void k951_disconnect(struct pi_adapter *pi) 97 - 98 - { w0(pi->saved_r0); 99 - w2(pi->saved_r2); 95 + { 96 + w0(pi->saved_r0); 97 + w2(pi->saved_r2); 100 98 } 101 99 102 - #define CCP(x) w2(0xc4);w0(0xaa);w0(0x55);w0(0);w0(0xff);w0(0x87);\ 103 - w0(0x78);w0(x);w2(0xc5);w2(0xc4);w0(0xff); 100 + #define CCP(x) \ 101 + do { \ 102 + w2(0xc4); w0(0xaa); w0(0x55); \ 103 + w0(0); w0(0xff); w0(0x87); \ 104 + w0(0x78); w0(x); w2(0xc5); \ 105 + w2(0xc4); w0(0xff); \ 106 + } while (0) 104 107 105 108 static void k971_connect(struct pi_adapter *pi) 106 - 107 - { pi->saved_r0 = r0(); 108 - pi->saved_r2 = r2(); 109 + { 110 + pi->saved_r0 = r0(); 111 + pi->saved_r2 = r2(); 109 112 CCP(0x20); 110 - w2(4); 113 + w2(4); 111 114 } 112 115 113 116 static void k971_disconnect(struct pi_adapter *pi) 114 - 115 - { CCP(0x30); 117 + { 118 + CCP(0x30); 116 119 w0(pi->saved_r0); 117 - w2(pi->saved_r2); 120 + w2(pi->saved_r2); 118 121 } 119 122 120 - /* counts must be congruent to 0 MOD 4, but all known applications 121 - have this property. 122 - */ 123 - 123 + /* 124 + * count must be congruent to 0 MOD 4, but all known applications 125 + *have this property. 126 + */ 124 127 static void kbic_read_block(struct pi_adapter *pi, char *buf, int count) 128 + { 129 + int k, a, b; 125 130 126 - { int k, a, b; 127 - 128 - switch (pi->mode) { 129 - 130 - case 0: w0(0x98); w2(4); w2(6); w2(4); 131 - for (k=0;k<count/2;k++) { 132 - w2(1); w0(8); a = r1(); 133 - w0(0x28); b = r1(); 134 - buf[2*k] = j44(a,b); 135 - w2(5); b = r1(); 136 - w0(8); a = r1(); 137 - buf[2*k+1] = j44(a,b); 131 + switch (pi->mode) { 132 + case 0: 133 + w0(0x98); w2(4); w2(6); w2(4); 134 + for (k = 0; k < count / 2; k++) { 135 + w2(1); w0(8); 136 + a = r1(); 137 + w0(0x28); 138 + b = r1(); 139 + buf[2 * k] = j44(a, b); 140 + w2(5); 141 + b = r1(); 142 + w0(8); 143 + a = r1(); 144 + buf[2 * k + 1] = j44(a, b); 138 145 w2(4); 139 - } 140 - break; 141 - 142 - case 1: w0(0xb8); w2(4); w2(6); w2(4); 143 - for (k=0;k<count/4;k++) { 144 - w0(0xb8); 145 - w2(4); w2(5); 146 - w0(8); buf[4*k] = j53(r12w()); 147 - w0(0xb8); buf[4*k+1] = j53(r12w()); 146 + } 147 + break; 148 + case 1: 149 + w0(0xb8); w2(4); w2(6); w2(4); 150 + for (k = 0; k < count / 4; k++) { 151 + w0(0xb8); 148 152 w2(4); w2(5); 149 - buf[4*k+3] = j53(r12w()); 150 - w0(8); buf[4*k+2] = j53(r12w()); 151 - } 152 - w2(4); 153 - break; 154 - 155 - case 2: w0(0x88); w2(4); w2(6); w2(4); 156 - for (k=0;k<count/2;k++) { 157 - w2(0xa0); w2(0xa1); buf[2*k] = r0(); 158 - w2(0xa5); buf[2*k+1] = r0(); 159 - } 160 - w2(4); 161 - break; 162 - 163 - case 3: w0(0xa0); w2(4); w2(6); w2(4); w3(0); 164 - for (k=0;k<count;k++) buf[k] = r4(); 165 - w2(4); w2(0); w2(4); 166 - break; 167 - 168 - case 4: w0(0xa0); w2(4); w2(6); w2(4); w3(0); 169 - for (k=0;k<count/2;k++) ((u16 *)buf)[k] = r4w(); 170 - w2(4); w2(0); w2(4); 171 - break; 172 - 173 - case 5: w0(0xa0); w2(4); w2(6); w2(4); w3(0); 174 - for (k=0;k<count/4;k++) ((u32 *)buf)[k] = r4l(); 175 - w2(4); w2(0); w2(4); 176 - break; 177 - 178 - 179 - } 153 + w0(8); 154 + buf[4 * k] = j53(r12w()); 155 + w0(0xb8); 156 + buf[4 * k + 1] = j53(r12w()); 157 + w2(4); w2(5); 158 + buf[4 * k + 3] = j53(r12w()); 159 + w0(8); 160 + buf[4 * k + 2] = j53(r12w()); 161 + } 162 + w2(4); 163 + break; 164 + case 2: 165 + w0(0x88); w2(4); w2(6); w2(4); 166 + for (k = 0; k < count / 2; k++) { 167 + w2(0xa0); w2(0xa1); 168 + buf[2 * k] = r0(); 169 + w2(0xa5); 170 + buf[2 * k + 1] = r0(); 171 + } 172 + w2(4); 173 + break; 174 + case 3: 175 + w0(0xa0); w2(4); w2(6); w2(4); w3(0); 176 + for (k = 0; k < count; k++) 177 + buf[k] = r4(); 178 + w2(4); w2(0); w2(4); 179 + break; 180 + case 4: 181 + w0(0xa0); w2(4); w2(6); w2(4); w3(0); 182 + for (k = 0; k < count / 2; k++) 183 + ((u16 *)buf)[k] = r4w(); 184 + w2(4); w2(0); w2(4); 185 + break; 186 + case 5: 187 + w0(0xa0); w2(4); w2(6); w2(4); w3(0); 188 + for (k = 0; k < count / 4; k++) 189 + ((u32 *)buf)[k] = r4l(); 190 + w2(4); w2(0); w2(4); 191 + break; 192 + } 180 193 } 181 194 182 195 static void kbic_write_block(struct pi_adapter *pi, char *buf, int count) 196 + { 197 + int k; 183 198 184 - { int k; 185 - 186 - switch (pi->mode) { 187 - 188 - case 0: 189 - case 1: 190 - case 2: w0(0x90); w2(4); w2(6); w2(4); 191 - for(k=0;k<count/2;k++) { 192 - w0(buf[2*k+1]); w2(0); w2(4); 193 - w0(buf[2*k]); w2(5); w2(4); 199 + switch (pi->mode) { 200 + case 0: 201 + case 1: 202 + case 2: 203 + w0(0x90); w2(4); w2(6); w2(4); 204 + for (k = 0; k < count / 2; k++) { 205 + w0(buf[2 * k + 1]); 206 + w2(0); w2(4); 207 + w0(buf[2 * k]); 208 + w2(5); w2(4); 194 209 } 195 210 break; 196 - 197 - case 3: w0(0xa0); w2(4); w2(6); w2(4); w3(0); 198 - for(k=0;k<count/2;k++) { 199 - w4(buf[2*k+1]); 200 - w4(buf[2*k]); 201 - } 211 + case 3: 212 + w0(0xa0); w2(4); w2(6); w2(4); w3(0); 213 + for (k = 0; k < count / 2; k++) { 214 + w4(buf[2 * k + 1]); 215 + w4(buf[2 * k]); 216 + } 202 217 w2(4); w2(0); w2(4); 203 218 break; 204 - 205 - case 4: w0(0xa0); w2(4); w2(6); w2(4); w3(0); 219 + case 4: 220 + w0(0xa0); w2(4); w2(6); w2(4); w3(0); 206 221 for (k = 0; k < count / 2; k++) 207 222 w4w(swab16(((u16 *)buf)[k])); 208 - w2(4); w2(0); w2(4); 209 - break; 210 - 211 - case 5: w0(0xa0); w2(4); w2(6); w2(4); w3(0); 223 + w2(4); w2(0); w2(4); 224 + break; 225 + case 5: 226 + w0(0xa0); w2(4); w2(6); w2(4); w3(0); 212 227 for (k = 0; k < count / 4; k++) 213 228 w4l(swab16(((u16 *)buf)[2 * k]) | 214 229 swab16(((u16 *)buf)[2 * k + 1]) << 16); 215 - w2(4); w2(0); w2(4); 216 - break; 217 - 218 - } 219 - 230 + w2(4); w2(0); w2(4); 231 + break; 232 + } 220 233 } 221 234 222 235 static void kbic_log_adapter(struct pi_adapter *pi, char *chip) 223 - 224 - { char *mode_string[6] = {"4-bit","5/3","8-bit", 225 - "EPP-8","EPP_16","EPP-32"}; 236 + { 237 + char *mode[6] = { "4-bit", "5/3", "8-bit", "EPP-8", "EPP_16", "EPP-32"}; 226 238 227 239 dev_info(&pi->dev, "KingByte %s at 0x%x, mode %d (%s), delay %d\n", 228 - chip, pi->port, pi->mode, mode_string[pi->mode], pi->delay); 240 + chip, pi->port, pi->mode, mode[pi->mode], pi->delay); 229 241 } 230 242 231 243 static void k951_log_adapter(struct pi_adapter *pi)
+40 -45
drivers/ata/pata_parport/ktti.c
··· 1 - /* 2 - ktti.c (c) 1998 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - ktti.c is a low-level protocol driver for the KT Technology 6 - parallel port adapter. This adapter is used in the "PHd" 7 - portable hard-drives. As far as I can tell, this device 8 - supports 4-bit mode _only_. 9 - 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * ktti.c is a low-level protocol driver for the KT Technology 6 + * parallel port adapter. This adapter is used in the "PHd" 7 + * portable hard-drives. As far as I can tell, this device 8 + * supports 4-bit mode _only_. 10 9 */ 11 10 12 11 #include <linux/module.h> ··· 17 18 #include <asm/io.h> 18 19 #include "pata_parport.h" 19 20 20 - #define j44(a,b) (((a>>4)&0x0f)|(b&0xf0)) 21 + #define j44(a, b) (((a >> 4) & 0x0f) | (b & 0xf0)) 21 22 22 - /* cont = 0 - access the IDE register file 23 - cont = 1 - access the IDE command set 24 - */ 25 - 26 - static int cont_map[2] = { 0x10, 0x08 }; 23 + /* 24 + * cont = 0 - access the IDE register file 25 + * cont = 1 - access the IDE command set 26 + */ 27 + static int cont_map[2] = { 0x10, 0x08 }; 27 28 28 29 static void ktti_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 30 + { 31 + int r = regr + cont_map[cont]; 29 32 30 - { int r; 31 - 32 - r = regr + cont_map[cont]; 33 - 34 - w0(r); w2(0xb); w2(0xa); w2(3); w2(6); 33 + w0(r); w2(0xb); w2(0xa); w2(3); w2(6); 35 34 w0(val); w2(3); w0(0); w2(6); w2(0xb); 36 35 } 37 36 38 37 static int ktti_read_regr(struct pi_adapter *pi, int cont, int regr) 39 - 40 - { int a, b, r; 38 + { 39 + int a, b, r; 41 40 42 41 r = regr + cont_map[cont]; 43 42 44 - w0(r); w2(0xb); w2(0xa); w2(9); w2(0xc); w2(9); 43 + w0(r); w2(0xb); w2(0xa); w2(9); w2(0xc); w2(9); 45 44 a = r1(); w2(0xc); b = r1(); w2(9); w2(0xc); w2(9); 46 - return j44(a,b); 47 - 45 + return j44(a, b); 48 46 } 49 47 50 48 static void ktti_read_block(struct pi_adapter *pi, char *buf, int count) 49 + { 50 + int k, a, b; 51 51 52 - { int k, a, b; 53 - 54 - for (k=0;k<count/2;k++) { 52 + for (k = 0; k < count / 2; k++) { 55 53 w0(0x10); w2(0xb); w2(0xa); w2(9); w2(0xc); w2(9); 56 54 a = r1(); w2(0xc); b = r1(); w2(9); 57 - buf[2*k] = j44(a,b); 55 + buf[2*k] = j44(a, b); 58 56 a = r1(); w2(0xc); b = r1(); w2(9); 59 - buf[2*k+1] = j44(a,b); 57 + buf[2*k+1] = j44(a, b); 60 58 } 61 59 } 62 60 63 61 static void ktti_write_block(struct pi_adapter *pi, char *buf, int count) 62 + { 63 + int k; 64 64 65 - { int k; 66 - 67 - for (k=0;k<count/2;k++) { 65 + for (k = 0; k < count / 2; k++) { 68 66 w0(0x10); w2(0xb); w2(0xa); w2(3); w2(6); 69 - w0(buf[2*k]); w2(3); 70 - w0(buf[2*k+1]); w2(6); 67 + w0(buf[2 * k]); w2(3); 68 + w0(buf[2 * k + 1]); w2(6); 71 69 w2(0xb); 72 70 } 73 71 } 74 72 75 73 static void ktti_connect(struct pi_adapter *pi) 76 - 77 - { pi->saved_r0 = r0(); 78 - pi->saved_r2 = r2(); 79 - w2(0xb); w2(0xa); w0(0); w2(3); w2(6); 74 + { 75 + pi->saved_r0 = r0(); 76 + pi->saved_r2 = r2(); 77 + w2(0xb); w2(0xa); w0(0); w2(3); w2(6); 80 78 } 81 79 82 80 static void ktti_disconnect(struct pi_adapter *pi) 83 - 84 - { w2(0xb); w2(0xa); w0(0xa0); w2(3); w2(4); 81 + { 82 + w2(0xb); w2(0xa); w0(0xa0); w2(3); w2(4); 85 83 w0(pi->saved_r0); 86 - w2(pi->saved_r2); 87 - } 84 + w2(pi->saved_r2); 85 + } 88 86 89 87 static void ktti_log_adapter(struct pi_adapter *pi) 90 - 91 88 { 92 89 dev_info(&pi->dev, "KT adapter at 0x%x, delay %d\n", 93 - pi->port, pi->delay); 90 + pi->port, pi->delay); 94 91 } 95 92 96 93 static struct pi_protocol ktti = {
+78 -63
drivers/ata/pata_parport/on20.c
··· 1 - /* 2 - on20.c (c) 1996-8 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - on20.c is a low-level protocol driver for the 6 - Onspec 90c20 parallel to IDE adapter. 7 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1996-1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * on20.c is a low-level protocol driver for the 6 + * Onspec 90c20 parallel to IDE adapter. 7 + */ 8 8 9 9 #include <linux/module.h> 10 10 #include <linux/init.h> ··· 15 15 #include <asm/io.h> 16 16 #include "pata_parport.h" 17 17 18 - #define op(f) w2(4);w0(f);w2(5);w2(0xd);w2(5);w2(0xd);w2(5);w2(4); 19 - #define vl(v) w2(4);w0(v);w2(5);w2(7);w2(5);w2(4); 18 + #define op(f) \ 19 + do { \ 20 + w2(4); w0(f); w2(5); w2(0xd); \ 21 + w2(5); w2(0xd); w2(5); w2(4); \ 22 + } while (0) 20 23 21 - #define j44(a,b) (((a>>4)&0x0f)|(b&0xf0)) 24 + #define vl(v) \ 25 + do { \ 26 + w2(4); w0(v); w2(5); \ 27 + w2(7); w2(5); w2(4); \ 28 + } while (0) 22 29 23 - /* cont = 0 - access the IDE register file 24 - cont = 1 - access the IDE command set 25 - */ 30 + #define j44(a, b) (((a >> 4) & 0x0f) | (b & 0xf0)) 31 + 32 + /* 33 + * cont = 0 - access the IDE register file 34 + * cont = 1 - access the IDE command set 35 + */ 26 36 27 37 static int on20_read_regr(struct pi_adapter *pi, int cont, int regr) 38 + { 39 + int h, l, r; 28 40 29 - { int h,l, r ; 41 + r = (regr << 2) + 1 + cont; 30 42 31 - r = (regr<<2) + 1 + cont; 43 + op(1); vl(r); op(0); 32 44 33 - op(1); vl(r); op(0); 34 - 35 - switch (pi->mode) { 36 - 37 - case 0: w2(4); w2(6); l = r1(); 38 - w2(4); w2(6); h = r1(); 39 - w2(4); w2(6); w2(4); w2(6); w2(4); 40 - return j44(l,h); 41 - 42 - case 1: w2(4); w2(0x26); r = r0(); 43 - w2(4); w2(0x26); w2(4); 44 - return r; 45 - 45 + switch (pi->mode) { 46 + case 0: 47 + w2(4); w2(6); l = r1(); 48 + w2(4); w2(6); h = r1(); 49 + w2(4); w2(6); w2(4); w2(6); w2(4); 50 + return j44(l, h); 51 + case 1: 52 + w2(4); w2(0x26); r = r0(); 53 + w2(4); w2(0x26); w2(4); 54 + return r; 46 55 } 56 + 47 57 return -1; 48 - } 58 + } 49 59 50 60 static void on20_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 61 + { 62 + int r = (regr << 2) + 1 + cont; 51 63 52 - { int r; 53 - 54 - r = (regr<<2) + 1 + cont; 55 - 56 - op(1); vl(r); 57 - op(0); vl(val); 64 + op(1); vl(r); 65 + op(0); vl(val); 58 66 op(0); vl(val); 59 67 } 60 68 61 69 static void on20_connect(struct pi_adapter *pi) 70 + { 71 + pi->saved_r0 = r0(); 72 + pi->saved_r2 = r2(); 62 73 63 - { pi->saved_r0 = r0(); 64 - pi->saved_r2 = r2(); 65 - 66 - w2(4);w0(0);w2(0xc);w2(4);w2(6);w2(4);w2(6);w2(4); 67 - if (pi->mode) { op(2); vl(8); op(2); vl(9); } 68 - else { op(2); vl(0); op(2); vl(8); } 74 + w2(4); w0(0); w2(0xc); w2(4); w2(6); w2(4); w2(6); w2(4); 75 + if (pi->mode) { 76 + op(2); vl(8); op(2); vl(9); 77 + } else { 78 + op(2); vl(0); op(2); vl(8); 79 + } 69 80 } 70 81 71 82 static void on20_disconnect(struct pi_adapter *pi) 72 - 73 - { w2(4);w0(7);w2(4);w2(0xc);w2(4); 74 - w0(pi->saved_r0); 75 - w2(pi->saved_r2); 76 - } 83 + { 84 + w2(4); w0(7); w2(4); w2(0xc); w2(4); 85 + w0(pi->saved_r0); 86 + w2(pi->saved_r2); 87 + } 77 88 78 89 static void on20_read_block(struct pi_adapter *pi, char *buf, int count) 79 - 80 - { int k, l, h; 90 + { 91 + int k, l, h; 81 92 82 93 op(1); vl(1); op(0); 83 94 84 - for (k=0;k<count;k++) 85 - if (pi->mode) { 86 - w2(4); w2(0x26); buf[k] = r0(); 87 - } else { 88 - w2(6); l = r1(); w2(4); 89 - w2(6); h = r1(); w2(4); 90 - buf[k] = j44(l,h); 91 - } 95 + for (k = 0; k < count; k++) { 96 + if (pi->mode) { 97 + w2(4); w2(0x26); buf[k] = r0(); 98 + } else { 99 + w2(6); l = r1(); w2(4); 100 + w2(6); h = r1(); w2(4); 101 + buf[k] = j44(l, h); 102 + } 103 + } 92 104 w2(4); 93 105 } 94 106 95 107 static void on20_write_block(struct pi_adapter *pi, char *buf, int count) 96 - 97 - { int k; 108 + { 109 + int k; 98 110 99 111 op(1); vl(1); op(0); 100 112 101 - for (k=0;k<count;k++) { w2(5); w0(buf[k]); w2(7); } 113 + for (k = 0; k < count; k++) { 114 + w2(5); w0(buf[k]); w2(7); 115 + } 102 116 w2(4); 103 117 } 104 118 105 119 static void on20_log_adapter(struct pi_adapter *pi) 120 + { 121 + char *mode_string[2] = { "4-bit", "8-bit" }; 106 122 107 - { char *mode_string[2] = {"4-bit","8-bit"}; 108 - 109 - dev_info(&pi->dev, "OnSpec 90c20 at 0x%x, mode %d (%s), delay %d\n", 110 - pi->port, pi->mode, mode_string[pi->mode], pi->delay); 123 + dev_info(&pi->dev, 124 + "OnSpec 90c20 at 0x%x, mode %d (%s), delay %d\n", 125 + pi->port, pi->mode, mode_string[pi->mode], pi->delay); 111 126 } 112 127 113 128 static struct pi_protocol on20 = {
+216 -196
drivers/ata/pata_parport/on26.c
··· 1 - /* 2 - on26.c (c) 1997-8 Grant R. Guenther <grant@torque.net> 3 - Under the terms of the GNU General Public License. 4 - 5 - on26.c is a low-level protocol driver for the 6 - OnSpec 90c26 parallel to IDE adapter chip. 7 - 8 - */ 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * (c) 1997-1998 Grant R. Guenther <grant@torque.net> 4 + * 5 + * on26.c is a low-level protocol driver for the 6 + * OnSpec 90c26 parallel to IDE adapter chip. 7 + */ 9 8 10 9 #include <linux/module.h> 11 10 #include <linux/init.h> ··· 15 16 #include <asm/io.h> 16 17 #include "pata_parport.h" 17 18 18 - /* mode codes: 0 nybble reads, 8-bit writes 19 - 1 8-bit reads and writes 20 - 2 8-bit EPP mode 21 - 3 EPP-16 22 - 4 EPP-32 23 - */ 19 + /* 20 + * mode codes: 0 nybble reads, 8-bit writes 21 + * 1 8-bit reads and writes 22 + * 2 8-bit EPP mode 23 + * 3 EPP-16 24 + * 4 EPP-32 25 + */ 24 26 25 - #define j44(a,b) (((a>>4)&0x0f)|(b&0xf0)) 27 + #define j44(a, b) (((a >> 4) & 0x0f) | (b & 0xf0)) 26 28 27 - #define P1 w2(5);w2(0xd);w2(5);w2(0xd);w2(5);w2(4); 28 - #define P2 w2(5);w2(7);w2(5);w2(4); 29 + #define P1 \ 30 + do { \ 31 + w2(5); w2(0xd); w2(5); w2(0xd); w2(5); w2(4); \ 32 + } while (0) 29 33 30 - /* cont = 0 - access the IDE register file 31 - cont = 1 - access the IDE command set 32 - */ 34 + #define P2 \ 35 + do { \ 36 + w2(5); w2(7); w2(5); w2(4); \ 37 + } while (0) 38 + 39 + /* 40 + * cont = 0 - access the IDE register file 41 + * cont = 1 - access the IDE command set 42 + */ 33 43 34 44 static int on26_read_regr(struct pi_adapter *pi, int cont, int regr) 45 + { 46 + int a, b, r; 35 47 36 - { int a, b, r; 48 + r = (regr << 2) + 1 + cont; 37 49 38 - r = (regr<<2) + 1 + cont; 39 - 40 - switch (pi->mode) { 41 - 42 - case 0: w0(1); P1; w0(r); P2; w0(0); P1; 50 + switch (pi->mode) { 51 + case 0: 52 + w0(1); P1; w0(r); P2; w0(0); P1; 43 53 w2(6); a = r1(); w2(4); 44 54 w2(6); b = r1(); w2(4); 45 55 w2(6); w2(4); w2(6); w2(4); 46 - return j44(a,b); 47 - 48 - case 1: w0(1); P1; w0(r); P2; w0(0); P1; 56 + return j44(a, b); 57 + case 1: 58 + w0(1); P1; w0(r); P2; w0(0); P1; 49 59 w2(0x26); a = r0(); w2(4); w2(0x26); w2(4); 50 - return a; 51 - 60 + return a; 52 61 case 2: 53 62 case 3: 54 - case 4: w3(1); w3(1); w2(5); w4(r); w2(4); 63 + case 4: 64 + w3(1); w3(1); w2(5); w4(r); w2(4); 55 65 w3(0); w3(0); w2(0x24); a = r4(); w2(4); 56 66 w2(0x24); (void)r4(); w2(4); 57 - return a; 67 + return a; 68 + } 58 69 59 - } 60 - return -1; 61 - } 62 - 63 - static void on26_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 64 - 65 - { int r; 66 - 67 - r = (regr<<2) + 1 + cont; 68 - 69 - switch (pi->mode) { 70 - 71 - case 0: 72 - case 1: w0(1); P1; w0(r); P2; w0(0); P1; 73 - w0(val); P2; w0(val); P2; 74 - break; 75 - 76 - case 2: 77 - case 3: 78 - case 4: w3(1); w3(1); w2(5); w4(r); w2(4); 79 - w3(0); w3(0); 80 - w2(5); w4(val); w2(4); 81 - w2(5); w4(val); w2(4); 82 - break; 83 - } 70 + return -1; 84 71 } 85 72 86 - #define CCP(x) w0(0xfe);w0(0xaa);w0(0x55);w0(0);w0(0xff);\ 87 - w0(0x87);w0(0x78);w0(x);w2(4);w2(5);w2(4);w0(0xff); 73 + static void on26_write_regr(struct pi_adapter *pi, int cont, int regr, int val) 74 + { 75 + int r = (regr << 2) + 1 + cont; 76 + 77 + switch (pi->mode) { 78 + case 0: 79 + case 1: 80 + w0(1); P1; w0(r); P2; w0(0); P1; 81 + w0(val); P2; w0(val); P2; 82 + break; 83 + case 2: 84 + case 3: 85 + case 4: 86 + w3(1); w3(1); w2(5); w4(r); w2(4); 87 + w3(0); w3(0); 88 + w2(5); w4(val); w2(4); 89 + w2(5); w4(val); w2(4); 90 + break; 91 + } 92 + } 93 + 94 + #define CCP(x) \ 95 + do { \ 96 + w0(0xfe); w0(0xaa); w0(0x55); w0(0); \ 97 + w0(0xff); w0(0x87); w0(0x78); w0(x); \ 98 + w2(4); w2(5); w2(4); w0(0xff); \ 99 + } while (0) 88 100 89 101 static void on26_connect(struct pi_adapter *pi) 90 - 91 - { int x; 102 + { 103 + int x; 92 104 93 105 pi->saved_r0 = r0(); 94 - pi->saved_r2 = r2(); 106 + pi->saved_r2 = r2(); 95 107 96 - CCP(0x20); 97 - x = 8; if (pi->mode) x = 9; 108 + CCP(0x20); 109 + if (pi->mode) 110 + x = 9; 111 + else 112 + x = 8; 98 113 99 114 w0(2); P1; w0(8); P2; 100 115 w0(2); P1; w0(x); P2; 101 116 } 102 117 103 118 static void on26_disconnect(struct pi_adapter *pi) 104 - 105 - { if (pi->mode >= 2) { w3(4); w3(4); w3(4); w3(4); } 106 - else { w0(4); P1; w0(4); P1; } 119 + { 120 + if (pi->mode >= 2) { 121 + w3(4); w3(4); w3(4); w3(4); 122 + } else { 123 + w0(4); P1; w0(4); P1; 124 + } 107 125 CCP(0x30); 108 - w0(pi->saved_r0); 109 - w2(pi->saved_r2); 110 - } 126 + w0(pi->saved_r0); 127 + w2(pi->saved_r2); 128 + } 111 129 112 130 #define RESET_WAIT 200 113 131 114 - static int on26_test_port(struct pi_adapter *pi) /* hard reset */ 132 + /* hard reset */ 133 + static int on26_test_port(struct pi_adapter *pi) 134 + { 135 + int i, m, d, x = 0, y = 0; 115 136 116 - { int i, m, d, x=0, y=0; 137 + pi->saved_r0 = r0(); 138 + pi->saved_r2 = r2(); 117 139 118 - pi->saved_r0 = r0(); 119 - pi->saved_r2 = r2(); 140 + d = pi->delay; 141 + m = pi->mode; 142 + pi->delay = 5; 143 + pi->mode = 0; 120 144 121 - d = pi->delay; 122 - m = pi->mode; 123 - pi->delay = 5; 124 - pi->mode = 0; 145 + w2(0xc); 125 146 126 - w2(0xc); 147 + CCP(0x30); CCP(0); 127 148 128 - CCP(0x30); CCP(0); 149 + w0(0xfe); w0(0xaa); w0(0x55); w0(0); w0(0xff); 150 + i = ((r1() & 0xf0) << 4); w0(0x87); 151 + i |= (r1() & 0xf0); w0(0x78); 152 + w0(0x20); w2(4); w2(5); 153 + i |= ((r1() & 0xf0) >> 4); 154 + w2(4); w0(0xff); 129 155 130 - w0(0xfe);w0(0xaa);w0(0x55);w0(0);w0(0xff); 131 - i = ((r1() & 0xf0) << 4); w0(0x87); 132 - i |= (r1() & 0xf0); w0(0x78); 133 - w0(0x20);w2(4);w2(5); 134 - i |= ((r1() & 0xf0) >> 4); 135 - w2(4);w0(0xff); 156 + if (i == 0xb5f) { 157 + w0(2); P1; w0(0); P2; 158 + w0(3); P1; w0(0); P2; 159 + w0(2); P1; w0(8); P2; udelay(100); 160 + w0(2); P1; w0(0xa); P2; udelay(100); 161 + w0(2); P1; w0(8); P2; udelay(1000); 136 162 137 - if (i == 0xb5f) { 163 + on26_write_regr(pi, 0, 6, 0xa0); 138 164 139 - w0(2); P1; w0(0); P2; 140 - w0(3); P1; w0(0); P2; 141 - w0(2); P1; w0(8); P2; udelay(100); 142 - w0(2); P1; w0(0xa); P2; udelay(100); 143 - w0(2); P1; w0(8); P2; udelay(1000); 144 - 145 - on26_write_regr(pi,0,6,0xa0); 165 + for (i = 0; i < RESET_WAIT; i++) { 166 + on26_write_regr(pi, 0, 6, 0xa0); 167 + x = on26_read_regr(pi, 0, 7); 168 + on26_write_regr(pi, 0, 6, 0xb0); 169 + y = on26_read_regr(pi, 0, 7); 170 + if (!((x & 0x80) || (y & 0x80))) 171 + break; 172 + mdelay(100); 173 + } 146 174 147 - for (i=0;i<RESET_WAIT;i++) { 148 - on26_write_regr(pi,0,6,0xa0); 149 - x = on26_read_regr(pi,0,7); 150 - on26_write_regr(pi,0,6,0xb0); 151 - y = on26_read_regr(pi,0,7); 152 - if (!((x&0x80)||(y&0x80))) break; 153 - mdelay(100); 154 - } 175 + if (i == RESET_WAIT) 176 + dev_err(&pi->dev, 177 + "on26: Device reset failed (%x,%x)\n", x, y); 155 178 156 - if (i == RESET_WAIT) 157 - dev_err(&pi->dev, "on26: Device reset failed (%x,%x)\n", x, y); 179 + w0(4); P1; w0(4); P1; 180 + } 158 181 159 - w0(4); P1; w0(4); P1; 160 - } 182 + CCP(0x30); 161 183 162 - CCP(0x30); 184 + pi->delay = d; 185 + pi->mode = m; 186 + w0(pi->saved_r0); 187 + w2(pi->saved_r2); 163 188 164 - pi->delay = d; 165 - pi->mode = m; 166 - w0(pi->saved_r0); 167 - w2(pi->saved_r2); 168 - 169 - return 5; 189 + return 5; 170 190 } 171 191 172 - 173 192 static void on26_read_block(struct pi_adapter *pi, char *buf, int count) 193 + { 194 + int k, a, b; 174 195 175 - { int k, a, b; 176 - 177 - switch (pi->mode) { 178 - 179 - case 0: w0(1); P1; w0(1); P2; w0(2); P1; w0(0x18); P2; w0(0); P1; 196 + switch (pi->mode) { 197 + case 0: 198 + w0(1); P1; w0(1); P2; w0(2); P1; w0(0x18); P2; w0(0); P1; 180 199 udelay(10); 181 - for (k=0;k<count;k++) { 182 - w2(6); a = r1(); 183 - w2(4); b = r1(); 184 - buf[k] = j44(a,b); 185 - } 186 - w0(2); P1; w0(8); P2; 187 - break; 188 - 189 - case 1: w0(1); P1; w0(1); P2; w0(2); P1; w0(0x19); P2; w0(0); P1; 200 + for (k = 0; k < count; k++) { 201 + w2(6); a = r1(); 202 + w2(4); b = r1(); 203 + buf[k] = j44(a, b); 204 + } 205 + w0(2); P1; w0(8); P2; 206 + break; 207 + case 1: 208 + w0(1); P1; w0(1); P2; w0(2); P1; w0(0x19); P2; w0(0); P1; 190 209 udelay(10); 191 - for (k=0;k<count/2;k++) { 192 - w2(0x26); buf[2*k] = r0(); 193 - w2(0x24); buf[2*k+1] = r0(); 194 - } 195 - w0(2); P1; w0(9); P2; 196 - break; 197 - 198 - case 2: w3(1); w3(1); w2(5); w4(1); w2(4); 210 + for (k = 0; k < count / 2; k++) { 211 + w2(0x26); buf[2 * k] = r0(); 212 + w2(0x24); buf[2 * k + 1] = r0(); 213 + } 214 + w0(2); P1; w0(9); P2; 215 + break; 216 + case 2: 217 + w3(1); w3(1); w2(5); w4(1); w2(4); 199 218 w3(0); w3(0); w2(0x24); 200 219 udelay(10); 201 - for (k=0;k<count;k++) buf[k] = r4(); 202 - w2(4); 203 - break; 204 - 205 - case 3: w3(1); w3(1); w2(5); w4(1); w2(4); 206 - w3(0); w3(0); w2(0x24); 207 - udelay(10); 208 - for (k=0;k<count/2;k++) ((u16 *)buf)[k] = r4w(); 209 - w2(4); 210 - break; 211 - 212 - case 4: w3(1); w3(1); w2(5); w4(1); w2(4); 213 - w3(0); w3(0); w2(0x24); 214 - udelay(10); 215 - for (k=0;k<count/4;k++) ((u32 *)buf)[k] = r4l(); 216 - w2(4); 217 - break; 218 - 219 - } 220 + for (k = 0; k < count; k++) 221 + buf[k] = r4(); 222 + w2(4); 223 + break; 224 + case 3: 225 + w3(1); w3(1); w2(5); w4(1); w2(4); 226 + w3(0); w3(0); w2(0x24); 227 + udelay(10); 228 + for (k = 0; k < count / 2; k++) 229 + ((u16 *)buf)[k] = r4w(); 230 + w2(4); 231 + break; 232 + case 4: 233 + w3(1); w3(1); w2(5); w4(1); w2(4); 234 + w3(0); w3(0); w2(0x24); 235 + udelay(10); 236 + for (k = 0; k < count / 4; k++) 237 + ((u32 *)buf)[k] = r4l(); 238 + w2(4); 239 + break; 240 + } 220 241 } 221 242 222 243 static void on26_write_block(struct pi_adapter *pi, char *buf, int count) 244 + { 245 + int k; 223 246 224 - { int k; 225 - 226 - switch (pi->mode) { 227 - 228 - case 0: 229 - case 1: w0(1); P1; w0(1); P2; 230 - w0(2); P1; w0(0x18+pi->mode); P2; w0(0); P1; 247 + switch (pi->mode) { 248 + case 0: 249 + case 1: 250 + w0(1); P1; w0(1); P2; 251 + w0(2); P1; w0(0x18 + pi->mode); P2; w0(0); P1; 231 252 udelay(10); 232 - for (k=0;k<count/2;k++) { 233 - w2(5); w0(buf[2*k]); 234 - w2(7); w0(buf[2*k+1]); 235 - } 236 - w2(5); w2(4); 237 - w0(2); P1; w0(8+pi->mode); P2; 238 - break; 239 - 240 - case 2: w3(1); w3(1); w2(5); w4(1); w2(4); 253 + for (k = 0; k < count / 2; k++) { 254 + w2(5); w0(buf[2 * k]); 255 + w2(7); w0(buf[2 * k + 1]); 256 + } 257 + w2(5); w2(4); 258 + w0(2); P1; w0(8 + pi->mode); P2; 259 + break; 260 + case 2: 261 + w3(1); w3(1); w2(5); w4(1); w2(4); 241 262 w3(0); w3(0); w2(0xc5); 242 263 udelay(10); 243 - for (k=0;k<count;k++) w4(buf[k]); 264 + for (k = 0; k < count; k++) 265 + w4(buf[k]); 244 266 w2(0xc4); 245 - break; 246 - 247 - case 3: w3(1); w3(1); w2(5); w4(1); w2(4); 248 - w3(0); w3(0); w2(0xc5); 249 - udelay(10); 250 - for (k=0;k<count/2;k++) w4w(((u16 *)buf)[k]); 251 - w2(0xc4); 252 - break; 253 - 254 - case 4: w3(1); w3(1); w2(5); w4(1); w2(4); 255 - w3(0); w3(0); w2(0xc5); 256 - udelay(10); 257 - for (k=0;k<count/4;k++) w4l(((u32 *)buf)[k]); 258 - w2(0xc4); 259 - break; 260 - 261 - } 262 - 267 + break; 268 + case 3: 269 + w3(1); w3(1); w2(5); w4(1); w2(4); 270 + w3(0); w3(0); w2(0xc5); 271 + udelay(10); 272 + for (k = 0; k < count / 2; k++) 273 + w4w(((u16 *)buf)[k]); 274 + w2(0xc4); 275 + break; 276 + case 4: 277 + w3(1); w3(1); w2(5); w4(1); w2(4); 278 + w3(0); w3(0); w2(0xc5); 279 + udelay(10); 280 + for (k = 0; k < count / 4; k++) 281 + w4l(((u32 *)buf)[k]); 282 + w2(0xc4); 283 + break; 284 + } 263 285 } 264 286 265 287 static void on26_log_adapter(struct pi_adapter *pi) 288 + { 289 + char *mode_string[5] = { "4-bit", "8-bit", "EPP-8", "EPP-16", "EPP-32" }; 266 290 267 - { char *mode_string[5] = {"4-bit","8-bit","EPP-8", 268 - "EPP-16","EPP-32"}; 269 - 270 - dev_info(&pi->dev, "OnSpec 90c26 at 0x%x, mode %d (%s), delay %d\n", 271 - pi->port, pi->mode, mode_string[pi->mode], pi->delay); 291 + dev_info(&pi->dev, 292 + "OnSpec 90c26 at 0x%x, mode %d (%s), delay %d\n", 293 + pi->port, pi->mode, mode_string[pi->mode], pi->delay); 272 294 } 273 295 274 296 static struct pi_protocol on26 = {
+1 -1
drivers/ata/pata_platform.c
··· 223 223 224 224 static struct platform_driver pata_platform_driver = { 225 225 .probe = pata_platform_probe, 226 - .remove = ata_platform_remove_one, 226 + .remove_new = ata_platform_remove_one, 227 227 .driver = { 228 228 .name = DRV_NAME, 229 229 },
+1 -1
drivers/ata/sata_highbank.c
··· 614 614 ahci_highbank_suspend, ahci_highbank_resume); 615 615 616 616 static struct platform_driver ahci_highbank_driver = { 617 - .remove = ata_platform_remove_one, 617 + .remove_new = ata_platform_remove_one, 618 618 .driver = { 619 619 .name = "highbank-ahci", 620 620 .of_match_table = ahci_of_match,
+5 -3
drivers/ata/sata_svw.c
··· 32 32 #include <scsi/scsi.h> 33 33 #include <linux/libata.h> 34 34 #include <linux/of.h> 35 + #include <linux/of_address.h> 35 36 36 37 #define DRV_NAME "sata_svw" 37 38 #define DRV_VERSION "2.3" ··· 320 319 /* Match it to a port node */ 321 320 index = (ap == ap->host->ports[0]) ? 0 : 1; 322 321 for (np = np->child; np != NULL; np = np->sibling) { 323 - const u32 *reg = of_get_property(np, "reg", NULL); 324 - if (!reg) 322 + u64 reg; 323 + 324 + if (of_property_read_reg(np, 0, &reg, NULL)) 325 325 continue; 326 - if (index == *reg) { 326 + if (index == reg) { 327 327 seq_printf(m, "devspec: %pOF\n", np); 328 328 break; 329 329 }
+1 -2
drivers/scsi/libsas/sas_scsi_host.c
··· 872 872 struct domain_device *dev = sdev_to_domain_dev(sdev); 873 873 874 874 if (dev_is_sata(dev)) 875 - return ata_change_queue_depth(dev->sata_dev.ap, 876 - sas_to_ata_dev(dev), sdev, depth); 875 + return ata_change_queue_depth(dev->sata_dev.ap, sdev, depth); 877 876 878 877 if (!sdev->tagged_supported) 879 878 depth = 1;
+3 -3
include/linux/libata.h
··· 1144 1144 extern void ata_scsi_slave_destroy(struct scsi_device *sdev); 1145 1145 extern int ata_scsi_change_queue_depth(struct scsi_device *sdev, 1146 1146 int queue_depth); 1147 - extern int ata_change_queue_depth(struct ata_port *ap, struct ata_device *dev, 1148 - struct scsi_device *sdev, int queue_depth); 1147 + extern int ata_change_queue_depth(struct ata_port *ap, struct scsi_device *sdev, 1148 + int queue_depth); 1149 1149 extern struct ata_device *ata_dev_pair(struct ata_device *adev); 1150 1150 extern int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev); 1151 1151 extern void ata_scsi_port_error_handler(struct Scsi_Host *host, struct ata_port *ap); ··· 1276 1276 1277 1277 struct platform_device; 1278 1278 1279 - extern int ata_platform_remove_one(struct platform_device *pdev); 1279 + extern void ata_platform_remove_one(struct platform_device *pdev); 1280 1280 1281 1281 /* 1282 1282 * ACPI - drivers/ata/libata-acpi.c