Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch '20250903-msm8937-v9-1-a097c91c5801@mainlining.org' into clk-for-6.18

Merge the MSM8937 global clock controller binding through a topic branch
to allow merging the constants into the DeviceTree branch as well.

+27 -3
+8 -3
Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml
··· 9 9 maintainers: 10 10 - Adam Skladowski <a_skl39@protonmail.com> 11 11 - Sireesh Kodali <sireeshkodali@protonmail.com> 12 + - Barnabas Czeman <barnabas.czeman@mainlining.org> 12 13 13 14 description: | 14 15 Qualcomm global clock control module provides the clocks, resets and power 15 - domains on MSM8953. 16 + domains on MSM8937 or MSM8953. 16 17 17 - See also: include/dt-bindings/clock/qcom,gcc-msm8953.h 18 + See also:: 19 + include/dt-bindings/clock/qcom,gcc-msm8917.h 20 + include/dt-bindings/clock/qcom,gcc-msm8953.h 18 21 19 22 properties: 20 23 compatible: 21 - const: qcom,gcc-msm8953 24 + enum: 25 + - qcom,gcc-msm8937 26 + - qcom,gcc-msm8953 22 27 23 28 clocks: 24 29 items:
+19
include/dt-bindings/clock/qcom,gcc-msm8917.h
··· 170 170 #define VFE1_CLK_SRC 163 171 171 #define VSYNC_CLK_SRC 164 172 172 #define GPLL0_SLEEP_CLK_SRC 165 173 + /* Addtional MSM8937-specific clocks */ 174 + #define MSM8937_BLSP1_QUP1_I2C_APPS_CLK_SRC 166 175 + #define MSM8937_BLSP1_QUP1_SPI_APPS_CLK_SRC 167 176 + #define MSM8937_BLSP2_QUP4_I2C_APPS_CLK_SRC 168 177 + #define MSM8937_BLSP2_QUP4_SPI_APPS_CLK_SRC 169 178 + #define MSM8937_BYTE1_CLK_SRC 170 179 + #define MSM8937_ESC1_CLK_SRC 171 180 + #define MSM8937_PCLK1_CLK_SRC 172 181 + #define MSM8937_GCC_BLSP1_QUP1_I2C_APPS_CLK 173 182 + #define MSM8937_GCC_BLSP1_QUP1_SPI_APPS_CLK 174 183 + #define MSM8937_GCC_BLSP2_QUP4_I2C_APPS_CLK 175 184 + #define MSM8937_GCC_BLSP2_QUP4_SPI_APPS_CLK 176 185 + #define MSM8937_GCC_MDSS_BYTE1_CLK 177 186 + #define MSM8937_GCC_MDSS_ESC1_CLK 178 187 + #define MSM8937_GCC_MDSS_PCLK1_CLK 179 188 + #define MSM8937_GCC_OXILI_AON_CLK 180 189 + #define MSM8937_GCC_OXILI_TIMER_CLK 181 173 190 174 191 /* GCC block resets */ 175 192 #define GCC_CAMSS_MICRO_BCR 0 ··· 204 187 #define VENUS_GDSC 5 205 188 #define VFE0_GDSC 6 206 189 #define VFE1_GDSC 7 190 + /* Additional MSM8937-specific GDSCs */ 191 + #define MSM8937_OXILI_CX_GDSC 8 207 192 208 193 #endif