tjh.dev / kernel
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ARM: imx: set cache line size to 64 bytes for i.MX5

The core of i.MX5 series is cortex-A8, its cache line size is 64 bytes
instead of 32 bytes. Refer to the OMAP3's selection, we choose 64
bytes for i.MX5, this can increase a little bit performance when
perform cache operations.

Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

authored by Jason Wang and committed by Sascha Hauer 14f0f512 7f67bff5

+1
unified split
+1
arch/arm/plat-mxc/Kconfig
··· 43 config ARCH_MX5 44 bool "MX5-based" 45 select CPU_V7 46 help 47 This enables support for systems based on the Freescale i.MX51 family 48
··· 43 config ARCH_MX5 44 bool "MX5-based" 45 select CPU_V7 46 + select ARM_L1_CACHE_SHIFT_6 47 help 48 This enables support for systems based on the Freescale i.MX51 family 49