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ARM: dts: sun8i-r40: add opp table for cpu
OPP table value is get from allwinner lichee linux-3.10 kernel driver
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220517013607.2252-3-qianfanguijin@163.com
authored by
qianfan Zhao
and committed by
Jernej Skrabec
14dbef67
6d5f3f67
+64
+1
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+1
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+52
arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi
+52
arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi
···
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+
/{
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+
cpu0_opp_table: opp-table-cpu {
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+
compatible = "operating-points-v2";
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opp-shared;
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+
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opp-720000000 {
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opp-hz = /bits/ 64 <720000000>;
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opp-microvolt = <1000000 1000000 1300000>;
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clock-latency-ns = <2000000>;
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};
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opp-912000000 {
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opp-hz = /bits/ 64 <912000000>;
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opp-microvolt = <1100000 1100000 1300000>;
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+
clock-latency-ns = <2000000>;
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};
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+
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opp-1008000000 {
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opp-hz = /bits/ 64 <1008000000>;
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opp-microvolt = <1160000 1160000 1300000>;
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clock-latency-ns = <2000000>;
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};
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+
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+
opp-1104000000 {
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opp-hz = /bits/ 64 <1104000000>;
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opp-microvolt = <1240000 1240000 1300000>;
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clock-latency-ns = <2000000>;
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};
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+
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opp-1200000000 {
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opp-hz = /bits/ 64 <1200000000>;
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opp-microvolt = <1300000 1300000 1300000>;
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clock-latency-ns = <2000000>;
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};
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};
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};
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&cpu0 {
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operating-points-v2 = <&cpu0_opp_table>;
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};
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&cpu1 {
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operating-points-v2 = <&cpu0_opp_table>;
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};
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&cpu2 {
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operating-points-v2 = <&cpu0_opp_table>;
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};
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&cpu3 {
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operating-points-v2 = <&cpu0_opp_table>;
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+
};
+1
arch/arm/boot/dts/sun8i-r40-feta40i.dtsi
+1
arch/arm/boot/dts/sun8i-r40-feta40i.dtsi
+8
arch/arm/boot/dts/sun8i-r40.dtsi
+8
arch/arm/boot/dts/sun8i-r40.dtsi
···
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <0>;
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clocks = <&ccu CLK_CPU>;
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+
clock-names = "cpu";
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};
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cpu1: cpu@1 {
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <1>;
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+
clocks = <&ccu CLK_CPU>;
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+
clock-names = "cpu";
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};
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cpu2: cpu@2 {
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <2>;
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+
clocks = <&ccu CLK_CPU>;
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+
clock-names = "cpu";
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};
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cpu3: cpu@3 {
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <3>;
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+
clocks = <&ccu CLK_CPU>;
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+
clock-names = "cpu";
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};
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};
108
116
+1
arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts
+1
arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts