Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

One conflict in the BPF samples Makefile, some fixes in 'net' whilst
we were converting over to Makefile.target rules in 'net-next'.

Signed-off-by: David S. Miller <davem@davemloft.net>

+2206 -943
+4
Documentation/networking/tls-offload.rst
··· 436 436 encryption. 437 437 * ``tx_tls_ooo`` - number of TX packets which were part of a TLS stream 438 438 but did not arrive in the expected order. 439 + * ``tx_tls_skip_no_sync_data`` - number of TX packets which were part of 440 + a TLS stream and arrived out-of-order, but skipped the HW offload routine 441 + and went to the regular transmit flow as they were retransmissions of the 442 + connection handshake. 439 443 * ``tx_tls_drop_no_sync_data`` - number of TX packets which were part of 440 444 a TLS stream dropped, because they arrived out of order and associated 441 445 record could not be found.
+6
MAINTAINERS
··· 3060 3060 R: Martin KaFai Lau <kafai@fb.com> 3061 3061 R: Song Liu <songliubraving@fb.com> 3062 3062 R: Yonghong Song <yhs@fb.com> 3063 + R: Andrii Nakryiko <andriin@fb.com> 3063 3064 L: netdev@vger.kernel.org 3064 3065 L: bpf@vger.kernel.org 3065 3066 T: git git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf.git ··· 10534 10533 F: Documentation/core-api/boot-time-mm.rst 10535 10534 10536 10535 MEMORY MANAGEMENT 10536 + M: Andrew Morton <akpm@linux-foundation.org> 10537 10537 L: linux-mm@kvack.org 10538 10538 W: http://www.linux-mm.org 10539 + T: quilt https://ozlabs.org/~akpm/mmotm/ 10540 + T: quilt https://ozlabs.org/~akpm/mmots/ 10541 + T: git git://github.com/hnaz/linux-mm.git 10539 10542 S: Maintained 10540 10543 F: include/linux/mm.h 10541 10544 F: include/linux/gfp.h ··· 18053 18048 ZSWAP COMPRESSED SWAP CACHING 18054 18049 M: Seth Jennings <sjenning@redhat.com> 18055 18050 M: Dan Streetman <ddstreet@ieee.org> 18051 + M: Vitaly Wool <vitaly.wool@konsulko.com> 18056 18052 L: linux-mm@kvack.org 18057 18053 S: Maintained 18058 18054 F: mm/zswap.c
+1 -1
Makefile
··· 2 2 VERSION = 5 3 3 PATCHLEVEL = 4 4 4 SUBLEVEL = 0 5 - EXTRAVERSION = -rc5 5 + EXTRAVERSION = -rc6 6 6 NAME = Kleptomaniac Octopus 7 7 8 8 # *DOCUMENTATION*
-17
arch/arm64/include/asm/pgtable.h
··· 283 283 set_pte(ptep, pte); 284 284 } 285 285 286 - #define __HAVE_ARCH_PTE_SAME 287 - static inline int pte_same(pte_t pte_a, pte_t pte_b) 288 - { 289 - pteval_t lhs, rhs; 290 - 291 - lhs = pte_val(pte_a); 292 - rhs = pte_val(pte_b); 293 - 294 - if (pte_present(pte_a)) 295 - lhs &= ~PTE_RDONLY; 296 - 297 - if (pte_present(pte_b)) 298 - rhs &= ~PTE_RDONLY; 299 - 300 - return (lhs == rhs); 301 - } 302 - 303 286 /* 304 287 * Huge pte definitions. 305 288 */
+1
arch/powerpc/include/asm/book3s/32/kup.h
··· 91 91 92 92 static inline void kuap_update_sr(u32 sr, u32 addr, u32 end) 93 93 { 94 + addr &= 0xf0000000; /* align addr to start of segment */ 94 95 barrier(); /* make sure thread.kuap is updated before playing with SRs */ 95 96 while (addr < end) { 96 97 mtsrin(sr, addr);
+3
arch/powerpc/include/asm/elf.h
··· 175 175 ARCH_DLINFO_CACHE_GEOMETRY; \ 176 176 } while (0) 177 177 178 + /* Relocate the kernel image to @final_address */ 179 + void relocate(unsigned long final_address); 180 + 178 181 #endif /* _ASM_POWERPC_ELF_H */
+13
arch/powerpc/kernel/prom_init.c
··· 3249 3249 /* Switch to secure mode. */ 3250 3250 prom_printf("Switching to secure mode.\n"); 3251 3251 3252 + /* 3253 + * The ultravisor will do an integrity check of the kernel image but we 3254 + * relocated it so the check will fail. Restore the original image by 3255 + * relocating it back to the kernel virtual base address. 3256 + */ 3257 + if (IS_ENABLED(CONFIG_RELOCATABLE)) 3258 + relocate(KERNELBASE); 3259 + 3252 3260 ret = enter_secure_mode(kbase, fdt); 3261 + 3262 + /* Relocate the kernel again. */ 3263 + if (IS_ENABLED(CONFIG_RELOCATABLE)) 3264 + relocate(kbase); 3265 + 3253 3266 if (ret != U_SUCCESS) { 3254 3267 prom_printf("Returned %d from switching to secure mode.\n", ret); 3255 3268 prom_rtas_os_term("Switch to secure mode failed.\n");
+2 -1
arch/powerpc/kernel/prom_init_check.sh
··· 26 26 __secondary_hold_acknowledge __secondary_hold_spinloop __start 27 27 logo_linux_clut224 btext_prepare_BAT 28 28 reloc_got2 kernstart_addr memstart_addr linux_banner _stext 29 - __prom_init_toc_start __prom_init_toc_end btext_setup_display TOC." 29 + __prom_init_toc_start __prom_init_toc_end btext_setup_display TOC. 30 + relocate" 30 31 31 32 NM="$1" 32 33 OBJ="$2"
+13
arch/powerpc/net/bpf_jit_comp64.c
··· 1142 1142 } 1143 1143 1144 1144 /* 1145 + * If we have seen a tail call, we need a second pass. 1146 + * This is because bpf_jit_emit_common_epilogue() is called 1147 + * from bpf_jit_emit_tail_call() with a not yet stable ctx->seen. 1148 + */ 1149 + if (cgctx.seen & SEEN_TAILCALL) { 1150 + cgctx.idx = 0; 1151 + if (bpf_jit_build_body(fp, 0, &cgctx, addrs, false)) { 1152 + fp = org_fp; 1153 + goto out_addrs; 1154 + } 1155 + } 1156 + 1157 + /* 1145 1158 * Pretend to build prologue, given the features we've seen. This will 1146 1159 * update ctgtx.idx as it pretends to output instructions, then we can 1147 1160 * calculate total size from idx.
+1 -1
arch/powerpc/platforms/powernv/eeh-powernv.c
··· 42 42 { 43 43 struct pci_dn *pdn = pci_get_pdn(pdev); 44 44 45 - if (eeh_has_flag(EEH_FORCE_DISABLED)) 45 + if (!pdn || eeh_has_flag(EEH_FORCE_DISABLED)) 46 46 return; 47 47 48 48 dev_dbg(&pdev->dev, "EEH: Setting up device\n");
+37 -16
arch/powerpc/platforms/powernv/smp.c
··· 146 146 return 0; 147 147 } 148 148 149 + static void pnv_flush_interrupts(void) 150 + { 151 + if (cpu_has_feature(CPU_FTR_ARCH_300)) { 152 + if (xive_enabled()) 153 + xive_flush_interrupt(); 154 + else 155 + icp_opal_flush_interrupt(); 156 + } else { 157 + icp_native_flush_interrupt(); 158 + } 159 + } 160 + 149 161 static void pnv_smp_cpu_kill_self(void) 150 162 { 163 + unsigned long srr1, unexpected_mask, wmask; 151 164 unsigned int cpu; 152 - unsigned long srr1, wmask; 153 165 u64 lpcr_val; 154 166 155 167 /* Standard hot unplug procedure */ 156 - /* 157 - * This hard disables local interurpts, ensuring we have no lazy 158 - * irqs pending. 159 - */ 160 - WARN_ON(irqs_disabled()); 161 - hard_irq_disable(); 162 - WARN_ON(lazy_irq_pending()); 163 168 164 169 idle_task_exit(); 165 170 current->active_mm = NULL; /* for sanity */ ··· 176 171 wmask = SRR1_WAKEMASK; 177 172 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 178 173 wmask = SRR1_WAKEMASK_P8; 174 + 175 + /* 176 + * This turns the irq soft-disabled state we're called with, into a 177 + * hard-disabled state with pending irq_happened interrupts cleared. 178 + * 179 + * PACA_IRQ_DEC - Decrementer should be ignored. 180 + * PACA_IRQ_HMI - Can be ignored, processing is done in real mode. 181 + * PACA_IRQ_DBELL, EE, PMI - Unexpected. 182 + */ 183 + hard_irq_disable(); 184 + if (generic_check_cpu_restart(cpu)) 185 + goto out; 186 + 187 + unexpected_mask = ~(PACA_IRQ_DEC | PACA_IRQ_HMI | PACA_IRQ_HARD_DIS); 188 + if (local_paca->irq_happened & unexpected_mask) { 189 + if (local_paca->irq_happened & PACA_IRQ_EE) 190 + pnv_flush_interrupts(); 191 + DBG("CPU%d Unexpected exit while offline irq_happened=%lx!\n", 192 + cpu, local_paca->irq_happened); 193 + } 194 + local_paca->irq_happened = PACA_IRQ_HARD_DIS; 179 195 180 196 /* 181 197 * We don't want to take decrementer interrupts while we are ··· 223 197 224 198 srr1 = pnv_cpu_offline(cpu); 225 199 200 + WARN_ON_ONCE(!irqs_disabled()); 226 201 WARN_ON(lazy_irq_pending()); 227 202 228 203 /* ··· 239 212 */ 240 213 if (((srr1 & wmask) == SRR1_WAKEEE) || 241 214 ((srr1 & wmask) == SRR1_WAKEHVI)) { 242 - if (cpu_has_feature(CPU_FTR_ARCH_300)) { 243 - if (xive_enabled()) 244 - xive_flush_interrupt(); 245 - else 246 - icp_opal_flush_interrupt(); 247 - } else 248 - icp_native_flush_interrupt(); 215 + pnv_flush_interrupts(); 249 216 } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) { 250 217 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 251 218 asm volatile(PPC_MSGCLR(%0) : : "r" (msg)); ··· 287 266 */ 288 267 lpcr_val = mfspr(SPRN_LPCR) | (u64)LPCR_PECE1; 289 268 pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val); 290 - 269 + out: 291 270 DBG("CPU%d coming online...\n", cpu); 292 271 } 293 272
+1
arch/s390/include/asm/unwind.h
··· 35 35 struct task_struct *task; 36 36 struct pt_regs *regs; 37 37 unsigned long sp, ip; 38 + bool reuse_sp; 38 39 int graph_idx; 39 40 bool reliable; 40 41 bool error;
+22 -7
arch/s390/kernel/idle.c
··· 69 69 static ssize_t show_idle_time(struct device *dev, 70 70 struct device_attribute *attr, char *buf) 71 71 { 72 + unsigned long long now, idle_time, idle_enter, idle_exit, in_idle; 72 73 struct s390_idle_data *idle = &per_cpu(s390_idle, dev->id); 73 - unsigned long long now, idle_time, idle_enter, idle_exit; 74 74 unsigned int seq; 75 75 76 76 do { 77 - now = get_tod_clock(); 78 77 seq = read_seqcount_begin(&idle->seqcount); 79 78 idle_time = READ_ONCE(idle->idle_time); 80 79 idle_enter = READ_ONCE(idle->clock_idle_enter); 81 80 idle_exit = READ_ONCE(idle->clock_idle_exit); 82 81 } while (read_seqcount_retry(&idle->seqcount, seq)); 83 - idle_time += idle_enter ? ((idle_exit ? : now) - idle_enter) : 0; 82 + in_idle = 0; 83 + now = get_tod_clock(); 84 + if (idle_enter) { 85 + if (idle_exit) { 86 + in_idle = idle_exit - idle_enter; 87 + } else if (now > idle_enter) { 88 + in_idle = now - idle_enter; 89 + } 90 + } 91 + idle_time += in_idle; 84 92 return sprintf(buf, "%llu\n", idle_time >> 12); 85 93 } 86 94 DEVICE_ATTR(idle_time_us, 0444, show_idle_time, NULL); ··· 96 88 u64 arch_cpu_idle_time(int cpu) 97 89 { 98 90 struct s390_idle_data *idle = &per_cpu(s390_idle, cpu); 99 - unsigned long long now, idle_enter, idle_exit; 91 + unsigned long long now, idle_enter, idle_exit, in_idle; 100 92 unsigned int seq; 101 93 102 94 do { 103 - now = get_tod_clock(); 104 95 seq = read_seqcount_begin(&idle->seqcount); 105 96 idle_enter = READ_ONCE(idle->clock_idle_enter); 106 97 idle_exit = READ_ONCE(idle->clock_idle_exit); 107 98 } while (read_seqcount_retry(&idle->seqcount, seq)); 108 - 109 - return cputime_to_nsecs(idle_enter ? ((idle_exit ?: now) - idle_enter) : 0); 99 + in_idle = 0; 100 + now = get_tod_clock(); 101 + if (idle_enter) { 102 + if (idle_exit) { 103 + in_idle = idle_exit - idle_enter; 104 + } else if (now > idle_enter) { 105 + in_idle = now - idle_enter; 106 + } 107 + } 108 + return cputime_to_nsecs(in_idle); 110 109 } 111 110 112 111 void arch_cpu_idle_enter(void)
+13 -5
arch/s390/kernel/unwind_bc.c
··· 46 46 47 47 regs = state->regs; 48 48 if (unlikely(regs)) { 49 - sp = READ_ONCE_NOCHECK(regs->gprs[15]); 50 - if (unlikely(outside_of_stack(state, sp))) { 51 - if (!update_stack_info(state, sp)) 52 - goto out_err; 49 + if (state->reuse_sp) { 50 + sp = state->sp; 51 + state->reuse_sp = false; 52 + } else { 53 + sp = READ_ONCE_NOCHECK(regs->gprs[15]); 54 + if (unlikely(outside_of_stack(state, sp))) { 55 + if (!update_stack_info(state, sp)) 56 + goto out_err; 57 + } 53 58 } 54 59 sf = (struct stack_frame *) sp; 55 60 ip = READ_ONCE_NOCHECK(sf->gprs[8]); ··· 112 107 { 113 108 struct stack_info *info = &state->stack_info; 114 109 unsigned long *mask = &state->stack_mask; 110 + bool reliable, reuse_sp; 115 111 struct stack_frame *sf; 116 112 unsigned long ip; 117 - bool reliable; 118 113 119 114 memset(state, 0, sizeof(*state)); 120 115 state->task = task; ··· 139 134 if (regs) { 140 135 ip = READ_ONCE_NOCHECK(regs->psw.addr); 141 136 reliable = true; 137 + reuse_sp = true; 142 138 } else { 143 139 sf = (struct stack_frame *) sp; 144 140 ip = READ_ONCE_NOCHECK(sf->gprs[8]); 145 141 reliable = false; 142 + reuse_sp = false; 146 143 } 147 144 148 145 #ifdef CONFIG_FUNCTION_GRAPH_TRACER ··· 158 151 state->sp = sp; 159 152 state->ip = ip; 160 153 state->reliable = reliable; 154 + state->reuse_sp = reuse_sp; 161 155 } 162 156 EXPORT_SYMBOL_GPL(__unwind_start);
+6 -6
arch/s390/mm/cmm.c
··· 298 298 } 299 299 300 300 if (write) { 301 - len = *lenp; 302 - if (copy_from_user(buf, buffer, 303 - len > sizeof(buf) ? sizeof(buf) : len)) 301 + len = min(*lenp, sizeof(buf)); 302 + if (copy_from_user(buf, buffer, len)) 304 303 return -EFAULT; 305 - buf[sizeof(buf) - 1] = '\0'; 304 + buf[len - 1] = '\0'; 306 305 cmm_skip_blanks(buf, &p); 307 306 nr = simple_strtoul(p, &p, 0); 308 307 cmm_skip_blanks(p, &p); 309 308 seconds = simple_strtoul(p, &p, 0); 310 309 cmm_set_timeout(nr, seconds); 310 + *ppos += *lenp; 311 311 } else { 312 312 len = sprintf(buf, "%ld %ld\n", 313 313 cmm_timeout_pages, cmm_timeout_seconds); ··· 315 315 len = *lenp; 316 316 if (copy_to_user(buffer, buf, len)) 317 317 return -EFAULT; 318 + *lenp = len; 319 + *ppos += len; 318 320 } 319 - *lenp = len; 320 - *ppos += len; 321 321 return 0; 322 322 } 323 323
+8 -5
block/blk-cgroup.c
··· 934 934 int i; 935 935 bool has_stats = false; 936 936 937 + spin_lock_irq(&blkg->q->queue_lock); 938 + 939 + if (!blkg->online) 940 + goto skip; 941 + 937 942 dname = blkg_dev_name(blkg); 938 943 if (!dname) 939 - continue; 944 + goto skip; 940 945 941 946 /* 942 947 * Hooray string manipulation, count is the size written NOT ··· 950 945 * the \0 so we only add count to buf. 951 946 */ 952 947 off += scnprintf(buf+off, size-off, "%s ", dname); 953 - 954 - spin_lock_irq(&blkg->q->queue_lock); 955 948 956 949 blkg_rwstat_recursive_sum(blkg, NULL, 957 950 offsetof(struct blkcg_gq, stat_bytes), &rwstat); ··· 962 959 rios = rwstat.cnt[BLKG_RWSTAT_READ]; 963 960 wios = rwstat.cnt[BLKG_RWSTAT_WRITE]; 964 961 dios = rwstat.cnt[BLKG_RWSTAT_DISCARD]; 965 - 966 - spin_unlock_irq(&blkg->q->queue_lock); 967 962 968 963 if (rbytes || wbytes || rios || wios) { 969 964 has_stats = true; ··· 1000 999 seq_commit(sf, -1); 1001 1000 } 1002 1001 } 1002 + skip: 1003 + spin_unlock_irq(&blkg->q->queue_lock); 1003 1004 } 1004 1005 1005 1006 rcu_read_unlock();
-1
drivers/block/drbd/drbd_main.c
··· 786 786 787 787 if (nc->tentative && connection->agreed_pro_version < 92) { 788 788 rcu_read_unlock(); 789 - mutex_unlock(&sock->mutex); 790 789 drbd_err(connection, "--dry-run is not supported by peer"); 791 790 return -EOPNOTSUPP; 792 791 }
+4 -1
drivers/clk/at91/clk-main.c
··· 297 297 regmap_read(regmap, AT91_CKGR_MCFR, &mcfr); 298 298 if (mcfr & AT91_PMC_MAINRDY) 299 299 return 0; 300 - usleep_range(MAINF_LOOP_MIN_WAIT, MAINF_LOOP_MAX_WAIT); 300 + if (system_state < SYSTEM_RUNNING) 301 + udelay(MAINF_LOOP_MIN_WAIT); 302 + else 303 + usleep_range(MAINF_LOOP_MIN_WAIT, MAINF_LOOP_MAX_WAIT); 301 304 } while (time_before(prep_time, timeout)); 302 305 303 306 return -ETIMEDOUT;
+1
drivers/clk/at91/sam9x60.c
··· 43 43 }; 44 44 45 45 static const struct clk_programmable_layout sam9x60_programmable_layout = { 46 + .pres_mask = 0xff, 46 47 .pres_shift = 8, 47 48 .css_mask = 0x1f, 48 49 .have_slck_mck = 0,
+16 -4
drivers/clk/at91/sckc.c
··· 76 76 77 77 writel(tmp | osc->bits->cr_osc32en, sckcr); 78 78 79 - usleep_range(osc->startup_usec, osc->startup_usec + 1); 79 + if (system_state < SYSTEM_RUNNING) 80 + udelay(osc->startup_usec); 81 + else 82 + usleep_range(osc->startup_usec, osc->startup_usec + 1); 80 83 81 84 return 0; 82 85 } ··· 190 187 191 188 writel(readl(sckcr) | osc->bits->cr_rcen, sckcr); 192 189 193 - usleep_range(osc->startup_usec, osc->startup_usec + 1); 190 + if (system_state < SYSTEM_RUNNING) 191 + udelay(osc->startup_usec); 192 + else 193 + usleep_range(osc->startup_usec, osc->startup_usec + 1); 194 194 195 195 return 0; 196 196 } ··· 294 288 295 289 writel(tmp, sckcr); 296 290 297 - usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1); 291 + if (system_state < SYSTEM_RUNNING) 292 + udelay(SLOWCK_SW_TIME_USEC); 293 + else 294 + usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1); 298 295 299 296 return 0; 300 297 } ··· 542 533 return 0; 543 534 } 544 535 545 - usleep_range(osc->startup_usec, osc->startup_usec + 1); 536 + if (system_state < SYSTEM_RUNNING) 537 + udelay(osc->startup_usec); 538 + else 539 + usleep_range(osc->startup_usec, osc->startup_usec + 1); 546 540 osc->prepared = true; 547 541 548 542 return 0;
+4 -3
drivers/clk/clk-ast2600.c
··· 266 266 267 267 /* Enable clock */ 268 268 if (gate->flags & CLK_GATE_SET_TO_DISABLE) { 269 - regmap_write(gate->map, get_clock_reg(gate), clk); 270 - } else { 271 - /* Use set to clear register */ 269 + /* Clock is clear to enable, so use set to clear register */ 272 270 regmap_write(gate->map, get_clock_reg(gate) + 0x04, clk); 271 + } else { 272 + /* Clock is set to enable, so use write to set register */ 273 + regmap_write(gate->map, get_clock_reg(gate), clk); 273 274 } 274 275 275 276 if (gate->reset_idx >= 0) {
+1 -1
drivers/clk/imx/clk-imx8mm.c
··· 638 638 clks[IMX8MM_CLK_A53_DIV], 639 639 clks[IMX8MM_CLK_A53_SRC], 640 640 clks[IMX8MM_ARM_PLL_OUT], 641 - clks[IMX8MM_CLK_24M]); 641 + clks[IMX8MM_SYS_PLL1_800M]); 642 642 643 643 imx_check_clocks(clks, ARRAY_SIZE(clks)); 644 644
+1 -1
drivers/clk/imx/clk-imx8mn.c
··· 610 610 clks[IMX8MN_CLK_A53_DIV], 611 611 clks[IMX8MN_CLK_A53_SRC], 612 612 clks[IMX8MN_ARM_PLL_OUT], 613 - clks[IMX8MN_CLK_24M]); 613 + clks[IMX8MN_SYS_PLL1_800M]); 614 614 615 615 imx_check_clocks(clks, ARRAY_SIZE(clks)); 616 616
+11 -2
drivers/clk/meson/g12a.c
··· 343 343 .offset = HHI_SYS_CPU_CLK_CNTL0, 344 344 .mask = 0x3, 345 345 .shift = 0, 346 + .flags = CLK_MUX_ROUND_CLOSEST, 346 347 }, 347 348 .hw.init = &(struct clk_init_data){ 348 349 .name = "cpu_clk_dyn0_sel", ··· 354 353 { .hw = &g12a_fclk_div3.hw }, 355 354 }, 356 355 .num_parents = 3, 357 - /* This sub-tree is used a parking clock */ 358 - .flags = CLK_SET_RATE_NO_REPARENT, 356 + .flags = CLK_SET_RATE_PARENT, 359 357 }, 360 358 }; 361 359 ··· 410 410 .offset = HHI_SYS_CPU_CLK_CNTL0, 411 411 .mask = 0x1, 412 412 .shift = 2, 413 + .flags = CLK_MUX_ROUND_CLOSEST, 413 414 }, 414 415 .hw.init = &(struct clk_init_data){ 415 416 .name = "cpu_clk_dyn0", ··· 467 466 .offset = HHI_SYS_CPU_CLK_CNTL0, 468 467 .mask = 0x1, 469 468 .shift = 10, 469 + .flags = CLK_MUX_ROUND_CLOSEST, 470 470 }, 471 471 .hw.init = &(struct clk_init_data){ 472 472 .name = "cpu_clk_dyn", ··· 487 485 .offset = HHI_SYS_CPU_CLK_CNTL0, 488 486 .mask = 0x1, 489 487 .shift = 11, 488 + .flags = CLK_MUX_ROUND_CLOSEST, 490 489 }, 491 490 .hw.init = &(struct clk_init_data){ 492 491 .name = "cpu_clk", ··· 507 504 .offset = HHI_SYS_CPU_CLK_CNTL0, 508 505 .mask = 0x1, 509 506 .shift = 11, 507 + .flags = CLK_MUX_ROUND_CLOSEST, 510 508 }, 511 509 .hw.init = &(struct clk_init_data){ 512 510 .name = "cpu_clk", ··· 527 523 .offset = HHI_SYS_CPUB_CLK_CNTL, 528 524 .mask = 0x3, 529 525 .shift = 0, 526 + .flags = CLK_MUX_ROUND_CLOSEST, 530 527 }, 531 528 .hw.init = &(struct clk_init_data){ 532 529 .name = "cpub_clk_dyn0_sel", ··· 538 533 { .hw = &g12a_fclk_div3.hw }, 539 534 }, 540 535 .num_parents = 3, 536 + .flags = CLK_SET_RATE_PARENT, 541 537 }, 542 538 }; 543 539 ··· 573 567 .offset = HHI_SYS_CPUB_CLK_CNTL, 574 568 .mask = 0x1, 575 569 .shift = 2, 570 + .flags = CLK_MUX_ROUND_CLOSEST, 576 571 }, 577 572 .hw.init = &(struct clk_init_data){ 578 573 .name = "cpub_clk_dyn0", ··· 651 644 .offset = HHI_SYS_CPUB_CLK_CNTL, 652 645 .mask = 0x1, 653 646 .shift = 10, 647 + .flags = CLK_MUX_ROUND_CLOSEST, 654 648 }, 655 649 .hw.init = &(struct clk_init_data){ 656 650 .name = "cpub_clk_dyn", ··· 671 663 .offset = HHI_SYS_CPUB_CLK_CNTL, 672 664 .mask = 0x1, 673 665 .shift = 11, 666 + .flags = CLK_MUX_ROUND_CLOSEST, 674 667 }, 675 668 .hw.init = &(struct clk_init_data){ 676 669 .name = "cpub_clk",
+1
drivers/clk/meson/gxbb.c
··· 935 935 &gxbb_sar_adc_clk_sel.hw 936 936 }, 937 937 .num_parents = 1, 938 + .flags = CLK_SET_RATE_PARENT, 938 939 }, 939 940 }; 940 941
+25 -2
drivers/clk/samsung/clk-exynos5420.c
··· 165 165 GATE_BUS_CPU, 166 166 GATE_SCLK_CPU, 167 167 CLKOUT_CMU_CPU, 168 + CPLL_CON0, 169 + DPLL_CON0, 168 170 EPLL_CON0, 169 171 EPLL_CON1, 170 172 EPLL_CON2, 171 173 RPLL_CON0, 172 174 RPLL_CON1, 173 175 RPLL_CON2, 176 + IPLL_CON0, 177 + SPLL_CON0, 178 + VPLL_CON0, 179 + MPLL_CON0, 174 180 SRC_TOP0, 175 181 SRC_TOP1, 176 182 SRC_TOP2, ··· 1178 1172 GATE(CLK_SCLK_ISP_SENSOR2, "sclk_isp_sensor2", "dout_isp_sensor2", 1179 1173 GATE_TOP_SCLK_ISP, 12, CLK_SET_RATE_PARENT, 0), 1180 1174 1181 - GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0), 1182 - 1183 1175 /* CDREX */ 1184 1176 GATE(CLK_CLKM_PHY0, "clkm_phy0", "dout_sclk_cdrex", 1185 1177 GATE_BUS_CDREX0, 0, 0, 0), ··· 1252 1248 { DIV2_RATIO0, 0, 0x30 }, /* DIV dout_gscl_blk_300 */ 1253 1249 }; 1254 1250 1251 + static const struct samsung_gate_clock exynos5x_g3d_gate_clks[] __initconst = { 1252 + GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0), 1253 + }; 1254 + 1255 + static struct exynos5_subcmu_reg_dump exynos5x_g3d_suspend_regs[] = { 1256 + { GATE_IP_G3D, 0x3ff, 0x3ff }, /* G3D gates */ 1257 + { SRC_TOP5, 0, BIT(16) }, /* MUX mout_user_aclk_g3d */ 1258 + }; 1259 + 1255 1260 static const struct samsung_div_clock exynos5x_mfc_div_clks[] __initconst = { 1256 1261 DIV(0, "dout_mfc_blk", "mout_user_aclk333", DIV4_RATIO, 0, 2), 1257 1262 }; ··· 1333 1320 .pd_name = "GSC", 1334 1321 }; 1335 1322 1323 + static const struct exynos5_subcmu_info exynos5x_g3d_subcmu = { 1324 + .gate_clks = exynos5x_g3d_gate_clks, 1325 + .nr_gate_clks = ARRAY_SIZE(exynos5x_g3d_gate_clks), 1326 + .suspend_regs = exynos5x_g3d_suspend_regs, 1327 + .nr_suspend_regs = ARRAY_SIZE(exynos5x_g3d_suspend_regs), 1328 + .pd_name = "G3D", 1329 + }; 1330 + 1336 1331 static const struct exynos5_subcmu_info exynos5x_mfc_subcmu = { 1337 1332 .div_clks = exynos5x_mfc_div_clks, 1338 1333 .nr_div_clks = ARRAY_SIZE(exynos5x_mfc_div_clks), ··· 1372 1351 static const struct exynos5_subcmu_info *exynos5x_subcmus[] = { 1373 1352 &exynos5x_disp_subcmu, 1374 1353 &exynos5x_gsc_subcmu, 1354 + &exynos5x_g3d_subcmu, 1375 1355 &exynos5x_mfc_subcmu, 1376 1356 &exynos5x_mscl_subcmu, 1377 1357 }; ··· 1380 1358 static const struct exynos5_subcmu_info *exynos5800_subcmus[] = { 1381 1359 &exynos5x_disp_subcmu, 1382 1360 &exynos5x_gsc_subcmu, 1361 + &exynos5x_g3d_subcmu, 1383 1362 &exynos5x_mfc_subcmu, 1384 1363 &exynos5x_mscl_subcmu, 1385 1364 &exynos5800_mau_subcmu,
+12 -2
drivers/clk/samsung/clk-exynos5433.c
··· 13 13 #include <linux/of_device.h> 14 14 #include <linux/platform_device.h> 15 15 #include <linux/pm_runtime.h> 16 + #include <linux/slab.h> 16 17 17 18 #include <dt-bindings/clock/exynos5433.h> 18 19 ··· 5585 5584 5586 5585 data->clk_save = samsung_clk_alloc_reg_dump(info->clk_regs, 5587 5586 info->nr_clk_regs); 5587 + if (!data->clk_save) 5588 + return -ENOMEM; 5588 5589 data->nr_clk_save = info->nr_clk_regs; 5589 5590 data->clk_suspend = info->suspend_regs; 5590 5591 data->nr_clk_suspend = info->nr_suspend_regs; ··· 5595 5592 if (data->nr_pclks > 0) { 5596 5593 data->pclks = devm_kcalloc(dev, sizeof(struct clk *), 5597 5594 data->nr_pclks, GFP_KERNEL); 5598 - 5595 + if (!data->pclks) { 5596 + kfree(data->clk_save); 5597 + return -ENOMEM; 5598 + } 5599 5599 for (i = 0; i < data->nr_pclks; i++) { 5600 5600 struct clk *clk = of_clk_get(dev->of_node, i); 5601 5601 5602 - if (IS_ERR(clk)) 5602 + if (IS_ERR(clk)) { 5603 + kfree(data->clk_save); 5604 + while (--i >= 0) 5605 + clk_put(data->pclks[i]); 5603 5606 return PTR_ERR(clk); 5607 + } 5604 5608 data->pclks[i] = clk; 5605 5609 } 5606 5610 }
+1 -1
drivers/clk/sunxi-ng/ccu-sun9i-a80.c
··· 1224 1224 1225 1225 /* Enforce d1 = 0, d2 = 0 for Audio PLL */ 1226 1226 val = readl(reg + SUN9I_A80_PLL_AUDIO_REG); 1227 - val &= (BIT(16) & BIT(18)); 1227 + val &= ~(BIT(16) | BIT(18)); 1228 1228 writel(val, reg + SUN9I_A80_PLL_AUDIO_REG); 1229 1229 1230 1230 /* Enforce P = 1 for both CPU cluster PLLs */
+2 -2
drivers/clk/sunxi/clk-sunxi.c
··· 1080 1080 rate_hw, rate_ops, 1081 1081 gate_hw, &clk_gate_ops, 1082 1082 clkflags | 1083 - data->div[i].critical ? 1084 - CLK_IS_CRITICAL : 0); 1083 + (data->div[i].critical ? 1084 + CLK_IS_CRITICAL : 0)); 1085 1085 1086 1086 WARN_ON(IS_ERR(clk_data->clks[i])); 1087 1087 }
-6
drivers/clk/ti/clk-dra7-atl.c
··· 174 174 struct clk_init_data init = { NULL }; 175 175 const char **parent_names = NULL; 176 176 struct clk *clk; 177 - int ret; 178 177 179 178 clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL); 180 179 if (!clk_hw) { ··· 206 207 clk = ti_clk_register(NULL, &clk_hw->hw, node->name); 207 208 208 209 if (!IS_ERR(clk)) { 209 - ret = ti_clk_add_alias(NULL, clk, node->name); 210 - if (ret) { 211 - clk_unregister(clk); 212 - goto cleanup; 213 - } 214 210 of_clk_add_provider(node, of_clk_src_simple_get, clk); 215 211 kfree(parent_names); 216 212 return;
+3 -2
drivers/clk/ti/clkctrl.c
··· 100 100 * can be from a timer that requires pm_runtime access, which 101 101 * will eventually bring us here with timekeeping_suspended, 102 102 * during both suspend entry and resume paths. This happens 103 - * at least on am43xx platform. 103 + * at least on am43xx platform. Account for flakeyness 104 + * with udelay() by multiplying the timeout value by 2. 104 105 */ 105 106 if (unlikely(_early_timeout || timekeeping_suspended)) { 106 107 if (time->cycles++ < timeout) { 107 - udelay(1); 108 + udelay(1 * 2); 108 109 return false; 109 110 } 110 111 } else {
+1 -3
drivers/cpufreq/intel_pstate.c
··· 847 847 value |= HWP_MAX_PERF(min_perf); 848 848 value |= HWP_MIN_PERF(min_perf); 849 849 850 - /* Set EPP/EPB to min */ 850 + /* Set EPP to min */ 851 851 if (boot_cpu_has(X86_FEATURE_HWP_EPP)) 852 852 value |= HWP_ENERGY_PERF_PREFERENCE(HWP_EPP_POWERSAVE); 853 - else 854 - intel_pstate_set_epb(cpu, HWP_EPP_BALANCE_POWERSAVE); 855 853 856 854 wrmsrl_on_cpu(cpu, MSR_HWP_REQUEST, value); 857 855 }
+13 -20
drivers/gpio/gpio-merrifield.c
··· 362 362 chained_irq_exit(irqchip, desc); 363 363 } 364 364 365 - static int mrfld_irq_init_hw(struct gpio_chip *chip) 365 + static void mrfld_irq_init_hw(struct mrfld_gpio *priv) 366 366 { 367 - struct mrfld_gpio *priv = gpiochip_get_data(chip); 368 367 void __iomem *reg; 369 368 unsigned int base; 370 369 ··· 375 376 reg = gpio_reg(&priv->chip, base, GFER); 376 377 writel(0, reg); 377 378 } 378 - 379 - return 0; 380 379 } 381 380 382 381 static const char *mrfld_gpio_get_pinctrl_dev_name(struct mrfld_gpio *priv) ··· 397 400 { 398 401 const struct mrfld_gpio_pinrange *range; 399 402 const char *pinctrl_dev_name; 400 - struct gpio_irq_chip *girq; 401 403 struct mrfld_gpio *priv; 402 404 u32 gpio_base, irq_base; 403 405 void __iomem *base; ··· 444 448 445 449 raw_spin_lock_init(&priv->lock); 446 450 447 - girq = &priv->chip.irq; 448 - girq->chip = &mrfld_irqchip; 449 - girq->init_hw = mrfld_irq_init_hw; 450 - girq->parent_handler = mrfld_irq_handler; 451 - girq->num_parents = 1; 452 - girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents, 453 - sizeof(*girq->parents), 454 - GFP_KERNEL); 455 - if (!girq->parents) 456 - return -ENOMEM; 457 - girq->parents[0] = pdev->irq; 458 - girq->first = irq_base; 459 - girq->default_type = IRQ_TYPE_NONE; 460 - girq->handler = handle_bad_irq; 461 - 462 451 pci_set_drvdata(pdev, priv); 463 452 retval = devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv); 464 453 if (retval) { ··· 464 483 return retval; 465 484 } 466 485 } 486 + 487 + retval = gpiochip_irqchip_add(&priv->chip, &mrfld_irqchip, irq_base, 488 + handle_bad_irq, IRQ_TYPE_NONE); 489 + if (retval) { 490 + dev_err(&pdev->dev, "could not connect irqchip to gpiochip\n"); 491 + return retval; 492 + } 493 + 494 + mrfld_irq_init_hw(priv); 495 + 496 + gpiochip_set_chained_irqchip(&priv->chip, &mrfld_irqchip, pdev->irq, 497 + mrfld_irq_handler); 467 498 468 499 return 0; 469 500 }
+4 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
··· 604 604 continue; 605 605 } 606 606 607 - for (i = 0; i < num_entities; i++) 607 + for (i = 0; i < num_entities; i++) { 608 + mutex_lock(&ctx->adev->lock_reset); 608 609 drm_sched_entity_fini(&ctx->entities[0][i].entity); 610 + mutex_unlock(&ctx->adev->lock_reset); 611 + } 609 612 } 610 613 } 611 614
+7
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
··· 2885 2885 DRM_INFO("amdgpu: acceleration disabled, skipping benchmarks\n"); 2886 2886 } 2887 2887 2888 + /* 2889 + * Register gpu instance before amdgpu_device_enable_mgpu_fan_boost. 2890 + * Otherwise the mgpu fan boost feature will be skipped due to the 2891 + * gpu instance is counted less. 2892 + */ 2893 + amdgpu_register_gpu_instance(adev); 2894 + 2888 2895 /* enable clockgating, etc. after ib tests, etc. since some blocks require 2889 2896 * explicit gating rather than handling it automatically. 2890 2897 */
+1
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
··· 1016 1016 {0x1002, 0x7340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14|AMD_EXP_HW_SUPPORT}, 1017 1017 {0x1002, 0x7341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14|AMD_EXP_HW_SUPPORT}, 1018 1018 {0x1002, 0x7347, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14|AMD_EXP_HW_SUPPORT}, 1019 + {0x1002, 0x734F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14|AMD_EXP_HW_SUPPORT}, 1019 1020 1020 1021 /* Renoir */ 1021 1022 {0x1002, 0x1636, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR|AMD_IS_APU|AMD_EXP_HW_SUPPORT},
+1
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
··· 289 289 uint32_t mec2_feature_version; 290 290 bool mec_fw_write_wait; 291 291 bool me_fw_write_wait; 292 + bool cp_fw_write_wait; 292 293 struct amdgpu_ring gfx_ring[AMDGPU_MAX_GFX_RINGS]; 293 294 unsigned num_gfx_rings; 294 295 struct amdgpu_ring compute_ring[AMDGPU_MAX_COMPUTE_RINGS];
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
··· 190 190 pm_runtime_put_autosuspend(dev->dev); 191 191 } 192 192 193 - amdgpu_register_gpu_instance(adev); 194 193 out: 195 194 if (r) { 196 195 /* balance pm_runtime_get_sync in amdgpu_driver_unload_kms */
+48
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
··· 564 564 kfree(adev->gfx.rlc.register_list_format); 565 565 } 566 566 567 + static void gfx_v10_0_check_fw_write_wait(struct amdgpu_device *adev) 568 + { 569 + adev->gfx.cp_fw_write_wait = false; 570 + 571 + switch (adev->asic_type) { 572 + case CHIP_NAVI10: 573 + case CHIP_NAVI12: 574 + case CHIP_NAVI14: 575 + if ((adev->gfx.me_fw_version >= 0x00000046) && 576 + (adev->gfx.me_feature_version >= 27) && 577 + (adev->gfx.pfp_fw_version >= 0x00000068) && 578 + (adev->gfx.pfp_feature_version >= 27) && 579 + (adev->gfx.mec_fw_version >= 0x0000005b) && 580 + (adev->gfx.mec_feature_version >= 27)) 581 + adev->gfx.cp_fw_write_wait = true; 582 + break; 583 + default: 584 + break; 585 + } 586 + 587 + if (adev->gfx.cp_fw_write_wait == false) 588 + DRM_WARN_ONCE("Warning: check cp_fw_version and update it to realize \ 589 + GRBM requires 1-cycle delay in cp firmware\n"); 590 + } 591 + 592 + 567 593 static void gfx_v10_0_init_rlc_ext_microcode(struct amdgpu_device *adev) 568 594 { 569 595 const struct rlc_firmware_header_v2_1 *rlc_hdr; ··· 858 832 } 859 833 } 860 834 835 + gfx_v10_0_check_fw_write_wait(adev); 861 836 out: 862 837 if (err) { 863 838 dev_err(adev->dev, ··· 4792 4765 gfx_v10_0_wait_reg_mem(ring, 0, 0, 0, reg, 0, val, mask, 0x20); 4793 4766 } 4794 4767 4768 + static void gfx_v10_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring, 4769 + uint32_t reg0, uint32_t reg1, 4770 + uint32_t ref, uint32_t mask) 4771 + { 4772 + int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX); 4773 + struct amdgpu_device *adev = ring->adev; 4774 + bool fw_version_ok = false; 4775 + 4776 + fw_version_ok = adev->gfx.cp_fw_write_wait; 4777 + 4778 + if (fw_version_ok) 4779 + gfx_v10_0_wait_reg_mem(ring, usepfp, 0, 1, reg0, reg1, 4780 + ref, mask, 0x20); 4781 + else 4782 + amdgpu_ring_emit_reg_write_reg_wait_helper(ring, reg0, reg1, 4783 + ref, mask); 4784 + } 4785 + 4795 4786 static void 4796 4787 gfx_v10_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, 4797 4788 uint32_t me, uint32_t pipe, ··· 5200 5155 .emit_tmz = gfx_v10_0_ring_emit_tmz, 5201 5156 .emit_wreg = gfx_v10_0_ring_emit_wreg, 5202 5157 .emit_reg_wait = gfx_v10_0_ring_emit_reg_wait, 5158 + .emit_reg_write_reg_wait = gfx_v10_0_ring_emit_reg_write_reg_wait, 5203 5159 }; 5204 5160 5205 5161 static const struct amdgpu_ring_funcs gfx_v10_0_ring_funcs_compute = { ··· 5234 5188 .pad_ib = amdgpu_ring_generic_pad_ib, 5235 5189 .emit_wreg = gfx_v10_0_ring_emit_wreg, 5236 5190 .emit_reg_wait = gfx_v10_0_ring_emit_reg_wait, 5191 + .emit_reg_write_reg_wait = gfx_v10_0_ring_emit_reg_write_reg_wait, 5237 5192 }; 5238 5193 5239 5194 static const struct amdgpu_ring_funcs gfx_v10_0_ring_funcs_kiq = { ··· 5265 5218 .emit_rreg = gfx_v10_0_ring_emit_rreg, 5266 5219 .emit_wreg = gfx_v10_0_ring_emit_wreg, 5267 5220 .emit_reg_wait = gfx_v10_0_ring_emit_reg_wait, 5221 + .emit_reg_write_reg_wait = gfx_v10_0_ring_emit_reg_write_reg_wait, 5268 5222 }; 5269 5223 5270 5224 static void gfx_v10_0_set_ring_funcs(struct amdgpu_device *adev)
+13
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
··· 973 973 adev->gfx.me_fw_write_wait = false; 974 974 adev->gfx.mec_fw_write_wait = false; 975 975 976 + if ((adev->gfx.mec_fw_version < 0x000001a5) || 977 + (adev->gfx.mec_feature_version < 46) || 978 + (adev->gfx.pfp_fw_version < 0x000000b7) || 979 + (adev->gfx.pfp_feature_version < 46)) 980 + DRM_WARN_ONCE("Warning: check cp_fw_version and update it to realize \ 981 + GRBM requires 1-cycle delay in cp firmware\n"); 982 + 976 983 switch (adev->asic_type) { 977 984 case CHIP_VEGA10: 978 985 if ((adev->gfx.me_fw_version >= 0x0000009c) && ··· 1046 1039 !adev->gfx.rlc.is_rlc_v2_1)) 1047 1040 adev->pm.pp_feature &= ~PP_GFXOFF_MASK; 1048 1041 1042 + if (adev->pm.pp_feature & PP_GFXOFF_MASK) 1043 + adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG | 1044 + AMD_PG_SUPPORT_CP | 1045 + AMD_PG_SUPPORT_RLC_SMU_HS; 1046 + break; 1047 + case CHIP_RENOIR: 1049 1048 if (adev->pm.pp_feature & PP_GFXOFF_MASK) 1050 1049 adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG | 1051 1050 AMD_PG_SUPPORT_CP |
+3 -5
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
··· 344 344 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + (2 * vmid), 345 345 upper_32_bits(pd_addr)); 346 346 347 - amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_req + eng, req); 348 - 349 - /* wait for the invalidate to complete */ 350 - amdgpu_ring_emit_reg_wait(ring, hub->vm_inv_eng0_ack + eng, 351 - 1 << vmid, 1 << vmid); 347 + amdgpu_ring_emit_reg_write_reg_wait(ring, hub->vm_inv_eng0_req + eng, 348 + hub->vm_inv_eng0_ack + eng, 349 + req, 1 << vmid); 352 350 353 351 return pd_addr; 354 352 }
+9
drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
··· 219 219 hubid * MMHUB_INSTANCE_REGISTER_OFFSET, tmp); 220 220 221 221 tmp = mmVML2PF0_VM_L2_CNTL3_DEFAULT; 222 + if (adev->gmc.translate_further) { 223 + tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL3, BANK_SELECT, 12); 224 + tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL3, 225 + L2_CACHE_BIGK_FRAGMENT_SIZE, 9); 226 + } else { 227 + tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL3, BANK_SELECT, 9); 228 + tmp = REG_SET_FIELD(tmp, VML2PF0_VM_L2_CNTL3, 229 + L2_CACHE_BIGK_FRAGMENT_SIZE, 6); 230 + } 222 231 WREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL3, 223 232 hubid * MMHUB_INSTANCE_REGISTER_OFFSET, tmp); 224 233
+12 -1
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
··· 1173 1173 SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(10)); 1174 1174 } 1175 1175 1176 + static void sdma_v5_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring, 1177 + uint32_t reg0, uint32_t reg1, 1178 + uint32_t ref, uint32_t mask) 1179 + { 1180 + amdgpu_ring_emit_wreg(ring, reg0, ref); 1181 + /* wait for a cycle to reset vm_inv_eng*_ack */ 1182 + amdgpu_ring_emit_reg_wait(ring, reg0, 0, 0); 1183 + amdgpu_ring_emit_reg_wait(ring, reg1, mask, mask); 1184 + } 1185 + 1176 1186 static int sdma_v5_0_early_init(void *handle) 1177 1187 { 1178 1188 struct amdgpu_device *adev = (struct amdgpu_device *)handle; ··· 1598 1588 6 + /* sdma_v5_0_ring_emit_pipeline_sync */ 1599 1589 /* sdma_v5_0_ring_emit_vm_flush */ 1600 1590 SOC15_FLUSH_GPU_TLB_NUM_WREG * 3 + 1601 - SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 6 + 1591 + SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 6 * 2 + 1602 1592 10 + 10 + 10, /* sdma_v5_0_ring_emit_fence x3 for user fence, vm fence */ 1603 1593 .emit_ib_size = 7 + 6, /* sdma_v5_0_ring_emit_ib */ 1604 1594 .emit_ib = sdma_v5_0_ring_emit_ib, ··· 1612 1602 .pad_ib = sdma_v5_0_ring_pad_ib, 1613 1603 .emit_wreg = sdma_v5_0_ring_emit_wreg, 1614 1604 .emit_reg_wait = sdma_v5_0_ring_emit_reg_wait, 1605 + .emit_reg_write_reg_wait = sdma_v5_0_ring_emit_reg_write_reg_wait, 1615 1606 .init_cond_exec = sdma_v5_0_ring_init_cond_exec, 1616 1607 .patch_cond_exec = sdma_v5_0_ring_patch_cond_exec, 1617 1608 .preempt_ib = sdma_v5_0_ring_preempt_ib,
-5
drivers/gpu/drm/amd/amdgpu/soc15.c
··· 1186 1186 AMD_PG_SUPPORT_VCN | 1187 1187 AMD_PG_SUPPORT_VCN_DPG; 1188 1188 adev->external_rev_id = adev->rev_id + 0x91; 1189 - 1190 - if (adev->pm.pp_feature & PP_GFXOFF_MASK) 1191 - adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG | 1192 - AMD_PG_SUPPORT_CP | 1193 - AMD_PG_SUPPORT_RLC_SMU_HS; 1194 1189 break; 1195 1190 default: 1196 1191 /* FIXME: not supported yet */
-9
drivers/gpu/drm/amd/display/dc/core/dc_link.c
··· 2767 2767 CONTROLLER_DP_TEST_PATTERN_VIDEOMODE, 2768 2768 COLOR_DEPTH_UNDEFINED); 2769 2769 2770 - /* This second call is needed to reconfigure the DIG 2771 - * as a workaround for the incorrect value being applied 2772 - * from transmitter control. 2773 - */ 2774 - if (!dc_is_virtual_signal(pipe_ctx->stream->signal)) 2775 - stream->link->link_enc->funcs->setup( 2776 - stream->link->link_enc, 2777 - pipe_ctx->stream->signal); 2778 - 2779 2770 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT 2780 2771 if (pipe_ctx->stream->timing.flags.DSC) { 2781 2772 if (dc_is_dp_signal(pipe_ctx->stream->signal) ||
+5
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
··· 1107 1107 if (!enc1) 1108 1108 return NULL; 1109 1109 1110 + if (ASICREV_IS_NAVI14_M(ctx->asic_id.hw_internal_rev)) { 1111 + if (eng_id >= ENGINE_ID_DIGD) 1112 + eng_id++; 1113 + } 1114 + 1110 1115 dcn20_stream_encoder_construct(enc1, ctx, ctx->dc_bios, eng_id, 1111 1116 &stream_enc_regs[eng_id], 1112 1117 &se_shift, &se_mask);
+1 -1
drivers/gpu/drm/amd/powerplay/navi10_ppt.c
··· 205 205 WORKLOAD_MAP(PP_SMC_POWER_PROFILE_POWERSAVING, WORKLOAD_PPLIB_POWER_SAVING_BIT), 206 206 WORKLOAD_MAP(PP_SMC_POWER_PROFILE_VIDEO, WORKLOAD_PPLIB_VIDEO_BIT), 207 207 WORKLOAD_MAP(PP_SMC_POWER_PROFILE_VR, WORKLOAD_PPLIB_VR_BIT), 208 - WORKLOAD_MAP(PP_SMC_POWER_PROFILE_COMPUTE, WORKLOAD_PPLIB_CUSTOM_BIT), 208 + WORKLOAD_MAP(PP_SMC_POWER_PROFILE_COMPUTE, WORKLOAD_PPLIB_COMPUTE_BIT), 209 209 WORKLOAD_MAP(PP_SMC_POWER_PROFILE_CUSTOM, WORKLOAD_PPLIB_CUSTOM_BIT), 210 210 }; 211 211
+1 -1
drivers/gpu/drm/amd/powerplay/vega20_ppt.c
··· 219 219 WORKLOAD_MAP(PP_SMC_POWER_PROFILE_POWERSAVING, WORKLOAD_PPLIB_POWER_SAVING_BIT), 220 220 WORKLOAD_MAP(PP_SMC_POWER_PROFILE_VIDEO, WORKLOAD_PPLIB_VIDEO_BIT), 221 221 WORKLOAD_MAP(PP_SMC_POWER_PROFILE_VR, WORKLOAD_PPLIB_VR_BIT), 222 - WORKLOAD_MAP(PP_SMC_POWER_PROFILE_COMPUTE, WORKLOAD_PPLIB_CUSTOM_BIT), 222 + WORKLOAD_MAP(PP_SMC_POWER_PROFILE_COMPUTE, WORKLOAD_PPLIB_COMPUTE_BIT), 223 223 WORKLOAD_MAP(PP_SMC_POWER_PROFILE_CUSTOM, WORKLOAD_PPLIB_CUSTOM_BIT), 224 224 }; 225 225
+14 -1
drivers/gpu/drm/drm_atomic_helper.c
··· 1581 1581 { 1582 1582 struct drm_device *dev = old_state->dev; 1583 1583 const struct drm_mode_config_helper_funcs *funcs; 1584 + struct drm_crtc_state *new_crtc_state; 1585 + struct drm_crtc *crtc; 1584 1586 ktime_t start; 1585 1587 s64 commit_time_ms; 1588 + unsigned int i, new_self_refresh_mask = 0; 1586 1589 1587 1590 funcs = dev->mode_config.helper_private; 1588 1591 ··· 1605 1602 1606 1603 drm_atomic_helper_wait_for_dependencies(old_state); 1607 1604 1605 + /* 1606 + * We cannot safely access new_crtc_state after 1607 + * drm_atomic_helper_commit_hw_done() so figure out which crtc's have 1608 + * self-refresh active beforehand: 1609 + */ 1610 + for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) 1611 + if (new_crtc_state->self_refresh_active) 1612 + new_self_refresh_mask |= BIT(i); 1613 + 1608 1614 if (funcs && funcs->atomic_commit_tail) 1609 1615 funcs->atomic_commit_tail(old_state); 1610 1616 else ··· 1622 1610 commit_time_ms = ktime_ms_delta(ktime_get(), start); 1623 1611 if (commit_time_ms > 0) 1624 1612 drm_self_refresh_helper_update_avg_times(old_state, 1625 - (unsigned long)commit_time_ms); 1613 + (unsigned long)commit_time_ms, 1614 + new_self_refresh_mask); 1626 1615 1627 1616 drm_atomic_helper_commit_cleanup_done(old_state); 1628 1617
+11 -7
drivers/gpu/drm/drm_self_refresh_helper.c
··· 133 133 * drm_self_refresh_helper_update_avg_times - Updates a crtc's SR time averages 134 134 * @state: the state which has just been applied to hardware 135 135 * @commit_time_ms: the amount of time in ms that this commit took to complete 136 + * @new_self_refresh_mask: bitmask of crtc's that have self_refresh_active in 137 + * new state 136 138 * 137 139 * Called after &drm_mode_config_funcs.atomic_commit_tail, this function will 138 140 * update the average entry/exit self refresh times on self refresh transitions. 139 141 * These averages will be used when calculating how long to delay before 140 142 * entering self refresh mode after activity. 141 143 */ 142 - void drm_self_refresh_helper_update_avg_times(struct drm_atomic_state *state, 143 - unsigned int commit_time_ms) 144 + void 145 + drm_self_refresh_helper_update_avg_times(struct drm_atomic_state *state, 146 + unsigned int commit_time_ms, 147 + unsigned int new_self_refresh_mask) 144 148 { 145 149 struct drm_crtc *crtc; 146 - struct drm_crtc_state *old_crtc_state, *new_crtc_state; 150 + struct drm_crtc_state *old_crtc_state; 147 151 int i; 148 152 149 - for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, 150 - new_crtc_state, i) { 153 + for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) { 154 + bool new_self_refresh_active = new_self_refresh_mask & BIT(i); 151 155 struct drm_self_refresh_data *sr_data = crtc->self_refresh_data; 152 156 struct ewma_psr_time *time; 153 157 154 158 if (old_crtc_state->self_refresh_active == 155 - new_crtc_state->self_refresh_active) 159 + new_self_refresh_active) 156 160 continue; 157 161 158 - if (new_crtc_state->self_refresh_active) 162 + if (new_self_refresh_active) 159 163 time = &sr_data->entry_avg_ms; 160 164 else 161 165 time = &sr_data->exit_avg_ms;
+7
drivers/gpu/drm/i915/display/intel_crt.c
··· 864 864 865 865 out: 866 866 intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref); 867 + 868 + /* 869 + * Make sure the refs for power wells enabled during detect are 870 + * dropped to avoid a new detect cycle triggered by HPD polling. 871 + */ 872 + intel_display_power_flush_work(dev_priv); 873 + 867 874 return status; 868 875 } 869 876
+11 -1
drivers/gpu/drm/i915/display/intel_dp.c
··· 1256 1256 u32 unused) 1257 1257 { 1258 1258 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); 1259 + struct drm_i915_private *i915 = 1260 + to_i915(intel_dig_port->base.base.dev); 1261 + enum phy phy = intel_port_to_phy(i915, intel_dig_port->base.port); 1259 1262 u32 ret; 1260 1263 1261 1264 ret = DP_AUX_CH_CTL_SEND_BUSY | ··· 1271 1268 DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) | 1272 1269 DP_AUX_CH_CTL_SYNC_PULSE_SKL(32); 1273 1270 1274 - if (intel_dig_port->tc_mode == TC_PORT_TBT_ALT) 1271 + if (intel_phy_is_tc(i915, phy) && 1272 + intel_dig_port->tc_mode == TC_PORT_TBT_ALT) 1275 1273 ret |= DP_AUX_CH_CTL_TBT_IO; 1276 1274 1277 1275 return ret; ··· 5439 5435 out: 5440 5436 if (status != connector_status_connected && !intel_dp->is_mst) 5441 5437 intel_dp_unset_edid(intel_dp); 5438 + 5439 + /* 5440 + * Make sure the refs for power wells enabled during detect are 5441 + * dropped to avoid a new detect cycle triggered by HPD polling. 5442 + */ 5443 + intel_display_power_flush_work(dev_priv); 5442 5444 5443 5445 return status; 5444 5446 }
+6
drivers/gpu/drm/i915/display/intel_hdmi.c
··· 2565 2565 if (status != connector_status_connected) 2566 2566 cec_notifier_phys_addr_invalidate(intel_hdmi->cec_notifier); 2567 2567 2568 + /* 2569 + * Make sure the refs for power wells enabled during detect are 2570 + * dropped to avoid a new detect cycle triggered by HPD polling. 2571 + */ 2572 + intel_display_power_flush_work(dev_priv); 2573 + 2568 2574 return status; 2569 2575 } 2570 2576
+1
drivers/gpu/drm/radeon/si_dpm.c
··· 1958 1958 case 0x682C: 1959 1959 si_pi->cac_weights = cac_weights_cape_verde_pro; 1960 1960 si_pi->dte_data = dte_data_sun_xt; 1961 + update_dte_from_pl2 = true; 1961 1962 break; 1962 1963 case 0x6825: 1963 1964 case 0x6827:
+4
drivers/hid/i2c-hid/i2c-hid-core.c
··· 447 447 if (ret) { 448 448 dev_err(&client->dev, "failed to reset device.\n"); 449 449 i2c_hid_set_power(client, I2C_HID_PWR_SLEEP); 450 + goto out_unlock; 450 451 } 452 + 453 + /* At least some SIS devices need this after reset */ 454 + ret = i2c_hid_set_power(client, I2C_HID_PWR_ON); 451 455 452 456 out_unlock: 453 457 mutex_unlock(&ihid->reset_lock);
+15
drivers/hid/wacom.h
··· 202 202 } 203 203 } 204 204 205 + /* 206 + * Convert a signed 32-bit integer to an unsigned n-bit integer. Undoes 207 + * the normally-helpful work of 'hid_snto32' for fields that use signed 208 + * ranges for questionable reasons. 209 + */ 210 + static inline __u32 wacom_s32tou(s32 value, __u8 n) 211 + { 212 + switch (n) { 213 + case 8: return ((__u8)value); 214 + case 16: return ((__u16)value); 215 + case 32: return ((__u32)value); 216 + } 217 + return value & (1 << (n - 1)) ? value & (~(~0U << n)) : value; 218 + } 219 + 205 220 extern const struct hid_device_id wacom_ids[]; 206 221 207 222 void wacom_wac_irq(struct wacom_wac *wacom_wac, size_t len);
+6 -4
drivers/hid/wacom_wac.c
··· 2303 2303 case HID_DG_TOOLSERIALNUMBER: 2304 2304 if (value) { 2305 2305 wacom_wac->serial[0] = (wacom_wac->serial[0] & ~0xFFFFFFFFULL); 2306 - wacom_wac->serial[0] |= (__u32)value; 2306 + wacom_wac->serial[0] |= wacom_s32tou(value, field->report_size); 2307 2307 } 2308 2308 return; 2309 2309 case HID_DG_TWIST: ··· 2319 2319 return; 2320 2320 case WACOM_HID_WD_SERIALHI: 2321 2321 if (value) { 2322 + __u32 raw_value = wacom_s32tou(value, field->report_size); 2323 + 2322 2324 wacom_wac->serial[0] = (wacom_wac->serial[0] & 0xFFFFFFFF); 2323 - wacom_wac->serial[0] |= ((__u64)value) << 32; 2325 + wacom_wac->serial[0] |= ((__u64)raw_value) << 32; 2324 2326 /* 2325 2327 * Non-USI EMR devices may contain additional tool type 2326 2328 * information here. See WACOM_HID_WD_TOOLTYPE case for 2327 2329 * more details. 2328 2330 */ 2329 2331 if (value >> 20 == 1) { 2330 - wacom_wac->id[0] |= value & 0xFFFFF; 2332 + wacom_wac->id[0] |= raw_value & 0xFFFFF; 2331 2333 } 2332 2334 } 2333 2335 return; ··· 2341 2339 * bitwise OR so the complete value can be built 2342 2340 * up over time :( 2343 2341 */ 2344 - wacom_wac->id[0] |= value; 2342 + wacom_wac->id[0] |= wacom_s32tou(value, field->report_size); 2345 2343 return; 2346 2344 case WACOM_HID_WD_OFFSETLEFT: 2347 2345 if (features->offset_left && value != features->offset_left)
+1 -1
drivers/hwmon/ina3221.c
··· 170 170 171 171 /* Polling the CVRF bit to make sure read data is ready */ 172 172 return regmap_field_read_poll_timeout(ina->fields[F_CVRF], 173 - cvrf, cvrf, wait, 100000); 173 + cvrf, cvrf, wait, wait * 2); 174 174 } 175 175 176 176 static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
+12 -3
drivers/hwmon/nct7904.c
··· 82 82 #define FANCTL1_FMR_REG 0x00 /* Bank 3; 1 reg per channel */ 83 83 #define FANCTL1_OUT_REG 0x10 /* Bank 3; 1 reg per channel */ 84 84 85 + #define VOLT_MONITOR_MODE 0x0 86 + #define THERMAL_DIODE_MODE 0x1 87 + #define THERMISTOR_MODE 0x3 88 + 85 89 #define ENABLE_TSI BIT(1) 86 90 87 91 static const unsigned short normal_i2c[] = { ··· 939 935 for (i = 0; i < 4; i++) { 940 936 val = (ret >> (i * 2)) & 0x03; 941 937 bit = (1 << i); 942 - if (val == 0) { 938 + if (val == VOLT_MONITOR_MODE) { 943 939 data->tcpu_mask &= ~bit; 940 + } else if (val == THERMAL_DIODE_MODE && i < 2) { 941 + data->temp_mode |= bit; 942 + data->vsen_mask &= ~(0x06 << (i * 2)); 943 + } else if (val == THERMISTOR_MODE) { 944 + data->vsen_mask &= ~(0x02 << (i * 2)); 944 945 } else { 945 - if (val == 0x1 || val == 0x2) 946 - data->temp_mode |= bit; 946 + /* Reserved */ 947 + data->tcpu_mask &= ~bit; 947 948 data->vsen_mask &= ~(0x06 << (i * 2)); 948 949 } 949 950 }
+22 -22
drivers/net/bonding/bond_main.c
··· 2128 2128 ignore_updelay = !rcu_dereference(bond->curr_active_slave); 2129 2129 2130 2130 bond_for_each_slave_rcu(bond, slave, iter) { 2131 - slave->new_link = BOND_LINK_NOCHANGE; 2132 - slave->link_new_state = slave->link; 2131 + bond_propose_link_state(slave, BOND_LINK_NOCHANGE); 2133 2132 2134 2133 link_state = bond_check_dev_link(bond, slave->dev, 0); 2135 2134 ··· 2162 2163 } 2163 2164 2164 2165 if (slave->delay <= 0) { 2165 - slave->new_link = BOND_LINK_DOWN; 2166 + bond_propose_link_state(slave, BOND_LINK_DOWN); 2166 2167 commit++; 2167 2168 continue; 2168 2169 } ··· 2199 2200 slave->delay = 0; 2200 2201 2201 2202 if (slave->delay <= 0) { 2202 - slave->new_link = BOND_LINK_UP; 2203 + bond_propose_link_state(slave, BOND_LINK_UP); 2203 2204 commit++; 2204 2205 ignore_updelay = false; 2205 2206 continue; ··· 2237 2238 struct slave *slave, *primary; 2238 2239 2239 2240 bond_for_each_slave(bond, slave, iter) { 2240 - switch (slave->new_link) { 2241 + switch (slave->link_new_state) { 2241 2242 case BOND_LINK_NOCHANGE: 2242 2243 /* For 802.3ad mode, check current slave speed and 2243 2244 * duplex again in case its port was disabled after ··· 2309 2310 2310 2311 default: 2311 2312 slave_err(bond->dev, slave->dev, "invalid new link %d on slave\n", 2312 - slave->new_link); 2313 - slave->new_link = BOND_LINK_NOCHANGE; 2313 + slave->link_new_state); 2314 + bond_propose_link_state(slave, BOND_LINK_NOCHANGE); 2314 2315 2315 2316 continue; 2316 2317 } ··· 2718 2719 bond_for_each_slave_rcu(bond, slave, iter) { 2719 2720 unsigned long trans_start = dev_trans_start(slave->dev); 2720 2721 2721 - slave->new_link = BOND_LINK_NOCHANGE; 2722 + bond_propose_link_state(slave, BOND_LINK_NOCHANGE); 2722 2723 2723 2724 if (slave->link != BOND_LINK_UP) { 2724 2725 if (bond_time_in_interval(bond, trans_start, 1) && 2725 2726 bond_time_in_interval(bond, slave->last_rx, 1)) { 2726 2727 2727 - slave->new_link = BOND_LINK_UP; 2728 + bond_propose_link_state(slave, BOND_LINK_UP); 2728 2729 slave_state_changed = 1; 2729 2730 2730 2731 /* primary_slave has no meaning in round-robin ··· 2749 2750 if (!bond_time_in_interval(bond, trans_start, 2) || 2750 2751 !bond_time_in_interval(bond, slave->last_rx, 2)) { 2751 2752 2752 - slave->new_link = BOND_LINK_DOWN; 2753 + bond_propose_link_state(slave, BOND_LINK_DOWN); 2753 2754 slave_state_changed = 1; 2754 2755 2755 2756 if (slave->link_failure_count < UINT_MAX) ··· 2780 2781 goto re_arm; 2781 2782 2782 2783 bond_for_each_slave(bond, slave, iter) { 2783 - if (slave->new_link != BOND_LINK_NOCHANGE) 2784 - slave->link = slave->new_link; 2784 + if (slave->link_new_state != BOND_LINK_NOCHANGE) 2785 + slave->link = slave->link_new_state; 2785 2786 } 2786 2787 2787 2788 if (slave_state_changed) { ··· 2804 2805 } 2805 2806 2806 2807 /* Called to inspect slaves for active-backup mode ARP monitor link state 2807 - * changes. Sets new_link in slaves to specify what action should take 2808 - * place for the slave. Returns 0 if no changes are found, >0 if changes 2809 - * to link states must be committed. 2808 + * changes. Sets proposed link state in slaves to specify what action 2809 + * should take place for the slave. Returns 0 if no changes are found, >0 2810 + * if changes to link states must be committed. 2810 2811 * 2811 2812 * Called with rcu_read_lock held. 2812 2813 */ ··· 2818 2819 int commit = 0; 2819 2820 2820 2821 bond_for_each_slave_rcu(bond, slave, iter) { 2821 - slave->new_link = BOND_LINK_NOCHANGE; 2822 + bond_propose_link_state(slave, BOND_LINK_NOCHANGE); 2822 2823 last_rx = slave_last_rx(bond, slave); 2823 2824 2824 2825 if (slave->link != BOND_LINK_UP) { 2825 2826 if (bond_time_in_interval(bond, last_rx, 1)) { 2826 - slave->new_link = BOND_LINK_UP; 2827 + bond_propose_link_state(slave, BOND_LINK_UP); 2827 2828 commit++; 2828 2829 } 2829 2830 continue; ··· 2851 2852 if (!bond_is_active_slave(slave) && 2852 2853 !rcu_access_pointer(bond->current_arp_slave) && 2853 2854 !bond_time_in_interval(bond, last_rx, 3)) { 2854 - slave->new_link = BOND_LINK_DOWN; 2855 + bond_propose_link_state(slave, BOND_LINK_DOWN); 2855 2856 commit++; 2856 2857 } 2857 2858 ··· 2864 2865 if (bond_is_active_slave(slave) && 2865 2866 (!bond_time_in_interval(bond, trans_start, 2) || 2866 2867 !bond_time_in_interval(bond, last_rx, 2))) { 2867 - slave->new_link = BOND_LINK_DOWN; 2868 + bond_propose_link_state(slave, BOND_LINK_DOWN); 2868 2869 commit++; 2869 2870 } 2870 2871 } ··· 2884 2885 struct slave *slave; 2885 2886 2886 2887 bond_for_each_slave(bond, slave, iter) { 2887 - switch (slave->new_link) { 2888 + switch (slave->link_new_state) { 2888 2889 case BOND_LINK_NOCHANGE: 2889 2890 continue; 2890 2891 ··· 2934 2935 continue; 2935 2936 2936 2937 default: 2937 - slave_err(bond->dev, slave->dev, "impossible: new_link %d on slave\n", 2938 - slave->new_link); 2938 + slave_err(bond->dev, slave->dev, 2939 + "impossible: link_new_state %d on slave\n", 2940 + slave->link_new_state); 2939 2941 continue; 2940 2942 } 2941 2943
+64 -7
drivers/net/can/c_can/c_can.c
··· 52 52 #define CONTROL_EX_PDR BIT(8) 53 53 54 54 /* control register */ 55 + #define CONTROL_SWR BIT(15) 55 56 #define CONTROL_TEST BIT(7) 56 57 #define CONTROL_CCE BIT(6) 57 58 #define CONTROL_DISABLE_AR BIT(5) ··· 97 96 #define BTR_TSEG1_MASK (0xf << BTR_TSEG1_SHIFT) 98 97 #define BTR_TSEG2_SHIFT 12 99 98 #define BTR_TSEG2_MASK (0x7 << BTR_TSEG2_SHIFT) 99 + 100 + /* interrupt register */ 101 + #define INT_STS_PENDING 0x8000 100 102 101 103 /* brp extension register */ 102 104 #define BRP_EXT_BRPE_MASK 0x0f ··· 573 569 IF_MCONT_RCV_EOB); 574 570 } 575 571 572 + static int c_can_software_reset(struct net_device *dev) 573 + { 574 + struct c_can_priv *priv = netdev_priv(dev); 575 + int retry = 0; 576 + 577 + if (priv->type != BOSCH_D_CAN) 578 + return 0; 579 + 580 + priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_SWR | CONTROL_INIT); 581 + while (priv->read_reg(priv, C_CAN_CTRL_REG) & CONTROL_SWR) { 582 + msleep(20); 583 + if (retry++ > 100) { 584 + netdev_err(dev, "CCTRL: software reset failed\n"); 585 + return -EIO; 586 + } 587 + } 588 + 589 + return 0; 590 + } 591 + 576 592 /* 577 593 * Configure C_CAN chip: 578 594 * - enable/disable auto-retransmission ··· 602 578 static int c_can_chip_config(struct net_device *dev) 603 579 { 604 580 struct c_can_priv *priv = netdev_priv(dev); 581 + int err; 582 + 583 + err = c_can_software_reset(dev); 584 + if (err) 585 + return err; 605 586 606 587 /* enable automatic retransmission */ 607 588 priv->write_reg(priv, C_CAN_CTRL_REG, CONTROL_ENABLE_AR); ··· 915 886 struct can_berr_counter bec; 916 887 917 888 switch (error_type) { 889 + case C_CAN_NO_ERROR: 890 + priv->can.state = CAN_STATE_ERROR_ACTIVE; 891 + break; 918 892 case C_CAN_ERROR_WARNING: 919 893 /* error warning state */ 920 894 priv->can.can_stats.error_warning++; ··· 948 916 ERR_CNT_RP_SHIFT; 949 917 950 918 switch (error_type) { 919 + case C_CAN_NO_ERROR: 920 + /* error warning state */ 921 + cf->can_id |= CAN_ERR_CRTL; 922 + cf->data[1] = CAN_ERR_CRTL_ACTIVE; 923 + cf->data[6] = bec.txerr; 924 + cf->data[7] = bec.rxerr; 925 + break; 951 926 case C_CAN_ERROR_WARNING: 952 927 /* error warning state */ 953 928 cf->can_id |= CAN_ERR_CRTL; ··· 1068 1029 u16 curr, last = priv->last_status; 1069 1030 int work_done = 0; 1070 1031 1071 - priv->last_status = curr = priv->read_reg(priv, C_CAN_STS_REG); 1072 - /* Ack status on C_CAN. D_CAN is self clearing */ 1073 - if (priv->type != BOSCH_D_CAN) 1074 - priv->write_reg(priv, C_CAN_STS_REG, LEC_UNUSED); 1032 + /* Only read the status register if a status interrupt was pending */ 1033 + if (atomic_xchg(&priv->sie_pending, 0)) { 1034 + priv->last_status = curr = priv->read_reg(priv, C_CAN_STS_REG); 1035 + /* Ack status on C_CAN. D_CAN is self clearing */ 1036 + if (priv->type != BOSCH_D_CAN) 1037 + priv->write_reg(priv, C_CAN_STS_REG, LEC_UNUSED); 1038 + } else { 1039 + /* no change detected ... */ 1040 + curr = last; 1041 + } 1075 1042 1076 1043 /* handle state changes */ 1077 1044 if ((curr & STATUS_EWARN) && (!(last & STATUS_EWARN))) { ··· 1099 1054 /* handle bus recovery events */ 1100 1055 if ((!(curr & STATUS_BOFF)) && (last & STATUS_BOFF)) { 1101 1056 netdev_dbg(dev, "left bus off state\n"); 1102 - priv->can.state = CAN_STATE_ERROR_ACTIVE; 1057 + work_done += c_can_handle_state_change(dev, C_CAN_ERROR_PASSIVE); 1103 1058 } 1059 + 1104 1060 if ((!(curr & STATUS_EPASS)) && (last & STATUS_EPASS)) { 1105 1061 netdev_dbg(dev, "left error passive state\n"); 1106 - priv->can.state = CAN_STATE_ERROR_ACTIVE; 1062 + work_done += c_can_handle_state_change(dev, C_CAN_ERROR_WARNING); 1063 + } 1064 + 1065 + if ((!(curr & STATUS_EWARN)) && (last & STATUS_EWARN)) { 1066 + netdev_dbg(dev, "left error warning state\n"); 1067 + work_done += c_can_handle_state_change(dev, C_CAN_NO_ERROR); 1107 1068 } 1108 1069 1109 1070 /* handle lec errors on the bus */ ··· 1134 1083 { 1135 1084 struct net_device *dev = (struct net_device *)dev_id; 1136 1085 struct c_can_priv *priv = netdev_priv(dev); 1086 + int reg_int; 1137 1087 1138 - if (!priv->read_reg(priv, C_CAN_INT_REG)) 1088 + reg_int = priv->read_reg(priv, C_CAN_INT_REG); 1089 + if (!reg_int) 1139 1090 return IRQ_NONE; 1091 + 1092 + /* save for later use */ 1093 + if (reg_int & INT_STS_PENDING) 1094 + atomic_set(&priv->sie_pending, 1); 1140 1095 1141 1096 /* disable all interrupts and schedule the NAPI */ 1142 1097 c_can_irq_control(priv, false);
+1
drivers/net/can/c_can/c_can.h
··· 198 198 struct net_device *dev; 199 199 struct device *device; 200 200 atomic_t tx_active; 201 + atomic_t sie_pending; 201 202 unsigned long tx_dir; 202 203 int last_status; 203 204 u16 (*read_reg) (const struct c_can_priv *priv, enum reg index);
+1
drivers/net/can/dev.c
··· 848 848 return; 849 849 850 850 ret = of_property_read_u32(dn, "max-bitrate", &priv->bitrate_max); 851 + of_node_put(dn); 851 852 if ((ret && ret != -EINVAL) || (!ret && !priv->bitrate_max)) 852 853 netdev_warn(dev, "Invalid value for transceiver max bitrate. Ignoring bitrate limit.\n"); 853 854 }
+9 -2
drivers/net/can/flexcan.c
··· 677 677 struct can_frame *cf; 678 678 bool rx_errors = false, tx_errors = false; 679 679 u32 timestamp; 680 + int err; 680 681 681 682 timestamp = priv->read(&regs->timer) << 16; 682 683 ··· 726 725 if (tx_errors) 727 726 dev->stats.tx_errors++; 728 727 729 - can_rx_offload_queue_sorted(&priv->offload, skb, timestamp); 728 + err = can_rx_offload_queue_sorted(&priv->offload, skb, timestamp); 729 + if (err) 730 + dev->stats.rx_fifo_errors++; 730 731 } 731 732 732 733 static void flexcan_irq_state(struct net_device *dev, u32 reg_esr) ··· 741 738 int flt; 742 739 struct can_berr_counter bec; 743 740 u32 timestamp; 741 + int err; 744 742 745 743 timestamp = priv->read(&regs->timer) << 16; 746 744 ··· 773 769 if (unlikely(new_state == CAN_STATE_BUS_OFF)) 774 770 can_bus_off(dev); 775 771 776 - can_rx_offload_queue_sorted(&priv->offload, skb, timestamp); 772 + err = can_rx_offload_queue_sorted(&priv->offload, skb, timestamp); 773 + if (err) 774 + dev->stats.rx_fifo_errors++; 777 775 } 778 776 779 777 static inline struct flexcan_priv *rx_offload_to_priv(struct can_rx_offload *offload) ··· 1194 1188 reg_mecr = priv->read(&regs->mecr); 1195 1189 reg_mecr &= ~FLEXCAN_MECR_ECRWRDIS; 1196 1190 priv->write(reg_mecr, &regs->mecr); 1191 + reg_mecr |= FLEXCAN_MECR_ECCDIS; 1197 1192 reg_mecr &= ~(FLEXCAN_MECR_NCEFAFRZ | FLEXCAN_MECR_HANCEI_MSK | 1198 1193 FLEXCAN_MECR_FANCEI_MSK); 1199 1194 priv->write(reg_mecr, &regs->mecr);
+85 -17
drivers/net/can/rx-offload.c
··· 107 107 return cb_b->timestamp - cb_a->timestamp; 108 108 } 109 109 110 - static struct sk_buff *can_rx_offload_offload_one(struct can_rx_offload *offload, unsigned int n) 110 + /** 111 + * can_rx_offload_offload_one() - Read one CAN frame from HW 112 + * @offload: pointer to rx_offload context 113 + * @n: number of mailbox to read 114 + * 115 + * The task of this function is to read a CAN frame from mailbox @n 116 + * from the device and return the mailbox's content as a struct 117 + * sk_buff. 118 + * 119 + * If the struct can_rx_offload::skb_queue exceeds the maximal queue 120 + * length (struct can_rx_offload::skb_queue_len_max) or no skb can be 121 + * allocated, the mailbox contents is discarded by reading it into an 122 + * overflow buffer. This way the mailbox is marked as free by the 123 + * driver. 124 + * 125 + * Return: A pointer to skb containing the CAN frame on success. 126 + * 127 + * NULL if the mailbox @n is empty. 128 + * 129 + * ERR_PTR() in case of an error 130 + */ 131 + static struct sk_buff * 132 + can_rx_offload_offload_one(struct can_rx_offload *offload, unsigned int n) 111 133 { 112 - struct sk_buff *skb = NULL; 134 + struct sk_buff *skb = NULL, *skb_error = NULL; 113 135 struct can_rx_offload_cb *cb; 114 136 struct can_frame *cf; 115 137 int ret; 116 138 117 - /* If queue is full or skb not available, read to discard mailbox */ 118 - if (likely(skb_queue_len(&offload->skb_queue) <= 119 - offload->skb_queue_len_max)) 139 + if (likely(skb_queue_len(&offload->skb_queue) < 140 + offload->skb_queue_len_max)) { 120 141 skb = alloc_can_skb(offload->dev, &cf); 142 + if (unlikely(!skb)) 143 + skb_error = ERR_PTR(-ENOMEM); /* skb alloc failed */ 144 + } else { 145 + skb_error = ERR_PTR(-ENOBUFS); /* skb_queue is full */ 146 + } 121 147 122 - if (!skb) { 148 + /* If queue is full or skb not available, drop by reading into 149 + * overflow buffer. 150 + */ 151 + if (unlikely(skb_error)) { 123 152 struct can_frame cf_overflow; 124 153 u32 timestamp; 125 154 126 155 ret = offload->mailbox_read(offload, &cf_overflow, 127 156 &timestamp, n); 128 - if (ret) 129 - offload->dev->stats.rx_dropped++; 130 157 131 - return NULL; 158 + /* Mailbox was empty. */ 159 + if (unlikely(!ret)) 160 + return NULL; 161 + 162 + /* Mailbox has been read and we're dropping it or 163 + * there was a problem reading the mailbox. 164 + * 165 + * Increment error counters in any case. 166 + */ 167 + offload->dev->stats.rx_dropped++; 168 + offload->dev->stats.rx_fifo_errors++; 169 + 170 + /* There was a problem reading the mailbox, propagate 171 + * error value. 172 + */ 173 + if (unlikely(ret < 0)) 174 + return ERR_PTR(ret); 175 + 176 + return skb_error; 132 177 } 133 178 134 179 cb = can_rx_offload_get_cb(skb); 135 180 ret = offload->mailbox_read(offload, cf, &cb->timestamp, n); 136 - if (!ret) { 181 + 182 + /* Mailbox was empty. */ 183 + if (unlikely(!ret)) { 137 184 kfree_skb(skb); 138 185 return NULL; 139 186 } 140 187 188 + /* There was a problem reading the mailbox, propagate error value. */ 189 + if (unlikely(ret < 0)) { 190 + kfree_skb(skb); 191 + 192 + offload->dev->stats.rx_dropped++; 193 + offload->dev->stats.rx_fifo_errors++; 194 + 195 + return ERR_PTR(ret); 196 + } 197 + 198 + /* Mailbox was read. */ 141 199 return skb; 142 200 } 143 201 ··· 215 157 continue; 216 158 217 159 skb = can_rx_offload_offload_one(offload, i); 218 - if (!skb) 219 - break; 160 + if (IS_ERR_OR_NULL(skb)) 161 + continue; 220 162 221 163 __skb_queue_add_sort(&skb_queue, skb, can_rx_offload_compare); 222 164 } ··· 246 188 struct sk_buff *skb; 247 189 int received = 0; 248 190 249 - while ((skb = can_rx_offload_offload_one(offload, 0))) { 191 + while (1) { 192 + skb = can_rx_offload_offload_one(offload, 0); 193 + if (IS_ERR(skb)) 194 + continue; 195 + if (!skb) 196 + break; 197 + 250 198 skb_queue_tail(&offload->skb_queue, skb); 251 199 received++; 252 200 } ··· 271 207 unsigned long flags; 272 208 273 209 if (skb_queue_len(&offload->skb_queue) > 274 - offload->skb_queue_len_max) 275 - return -ENOMEM; 210 + offload->skb_queue_len_max) { 211 + kfree_skb(skb); 212 + return -ENOBUFS; 213 + } 276 214 277 215 cb = can_rx_offload_get_cb(skb); 278 216 cb->timestamp = timestamp; ··· 316 250 struct sk_buff *skb) 317 251 { 318 252 if (skb_queue_len(&offload->skb_queue) > 319 - offload->skb_queue_len_max) 320 - return -ENOMEM; 253 + offload->skb_queue_len_max) { 254 + kfree_skb(skb); 255 + return -ENOBUFS; 256 + } 321 257 322 258 skb_queue_tail(&offload->skb_queue, skb); 323 259 can_rx_offload_schedule(offload);
+1 -1
drivers/net/can/spi/mcp251x.c
··· 717 717 if (priv->after_suspend) { 718 718 mcp251x_hw_reset(spi); 719 719 mcp251x_setup(net, spi); 720 + priv->force_quit = 0; 720 721 if (priv->after_suspend & AFTER_SUSPEND_RESTART) { 721 722 mcp251x_set_normal_mode(spi); 722 723 } else if (priv->after_suspend & AFTER_SUSPEND_UP) { ··· 729 728 mcp251x_hw_sleep(spi); 730 729 } 731 730 priv->after_suspend = 0; 732 - priv->force_quit = 0; 733 731 } 734 732 735 733 if (priv->restart_tx) {
+150 -86
drivers/net/can/ti_hecc.c
··· 73 73 */ 74 74 #define HECC_MAX_RX_MBOX (HECC_MAX_MAILBOXES - HECC_MAX_TX_MBOX) 75 75 #define HECC_RX_FIRST_MBOX (HECC_MAX_MAILBOXES - 1) 76 + #define HECC_RX_LAST_MBOX (HECC_MAX_TX_MBOX) 76 77 77 78 /* TI HECC module registers */ 78 79 #define HECC_CANME 0x0 /* Mailbox enable */ ··· 83 82 #define HECC_CANTA 0x10 /* Transmission acknowledge */ 84 83 #define HECC_CANAA 0x14 /* Abort acknowledge */ 85 84 #define HECC_CANRMP 0x18 /* Receive message pending */ 86 - #define HECC_CANRML 0x1C /* Remote message lost */ 85 + #define HECC_CANRML 0x1C /* Receive message lost */ 87 86 #define HECC_CANRFP 0x20 /* Remote frame pending */ 88 87 #define HECC_CANGAM 0x24 /* SECC only:Global acceptance mask */ 89 88 #define HECC_CANMC 0x28 /* Master control */ ··· 150 149 #define HECC_BUS_ERROR (HECC_CANES_FE | HECC_CANES_BE |\ 151 150 HECC_CANES_CRCE | HECC_CANES_SE |\ 152 151 HECC_CANES_ACKE) 152 + #define HECC_CANES_FLAGS (HECC_BUS_ERROR | HECC_CANES_BO |\ 153 + HECC_CANES_EP | HECC_CANES_EW) 153 154 154 155 #define HECC_CANMCF_RTR BIT(4) /* Remote transmit request */ 155 156 ··· 385 382 hecc_set_bit(priv, HECC_CANMIM, mbx_mask); 386 383 } 387 384 388 - /* Prevent message over-write & Enable interrupts */ 389 - hecc_write(priv, HECC_CANOPC, HECC_SET_REG); 385 + /* Enable tx interrupts */ 386 + hecc_set_bit(priv, HECC_CANMIM, BIT(HECC_MAX_TX_MBOX) - 1); 387 + 388 + /* Prevent message over-write to create a rx fifo, but not for 389 + * the lowest priority mailbox, since that allows detecting 390 + * overflows instead of the hardware silently dropping the 391 + * messages. 392 + */ 393 + mbx_mask = ~BIT(HECC_RX_LAST_MBOX); 394 + hecc_write(priv, HECC_CANOPC, mbx_mask); 395 + 396 + /* Enable interrupts */ 390 397 if (priv->use_hecc1int) { 391 398 hecc_write(priv, HECC_CANMIL, HECC_SET_REG); 392 399 hecc_write(priv, HECC_CANGIM, HECC_CANGIM_DEF_MASK | ··· 412 399 static void ti_hecc_stop(struct net_device *ndev) 413 400 { 414 401 struct ti_hecc_priv *priv = netdev_priv(ndev); 402 + 403 + /* Disable the CPK; stop sending, erroring and acking */ 404 + hecc_set_bit(priv, HECC_CANMC, HECC_CANMC_CCR); 415 405 416 406 /* Disable interrupts and disable mailboxes */ 417 407 hecc_write(priv, HECC_CANGIM, 0); ··· 524 508 hecc_set_bit(priv, HECC_CANME, mbx_mask); 525 509 spin_unlock_irqrestore(&priv->mbx_lock, flags); 526 510 527 - hecc_clear_bit(priv, HECC_CANMD, mbx_mask); 528 - hecc_set_bit(priv, HECC_CANMIM, mbx_mask); 529 511 hecc_write(priv, HECC_CANTRS, mbx_mask); 530 512 531 513 return NETDEV_TX_OK; ··· 540 526 u32 *timestamp, unsigned int mbxno) 541 527 { 542 528 struct ti_hecc_priv *priv = rx_offload_to_priv(offload); 543 - u32 data; 529 + u32 data, mbx_mask; 530 + int ret = 1; 544 531 532 + mbx_mask = BIT(mbxno); 545 533 data = hecc_read_mbx(priv, mbxno, HECC_CANMID); 546 534 if (data & HECC_CANMID_IDE) 547 535 cf->can_id = (data & CAN_EFF_MASK) | CAN_EFF_FLAG; ··· 564 548 565 549 *timestamp = hecc_read_stamp(priv, mbxno); 566 550 567 - return 1; 551 + /* Check for FIFO overrun. 552 + * 553 + * All but the last RX mailbox have activated overwrite 554 + * protection. So skip check for overrun, if we're not 555 + * handling the last RX mailbox. 556 + * 557 + * As the overwrite protection for the last RX mailbox is 558 + * disabled, the CAN core might update while we're reading 559 + * it. This means the skb might be inconsistent. 560 + * 561 + * Return an error to let rx-offload discard this CAN frame. 562 + */ 563 + if (unlikely(mbxno == HECC_RX_LAST_MBOX && 564 + hecc_read(priv, HECC_CANRML) & mbx_mask)) 565 + ret = -ENOBUFS; 566 + 567 + hecc_write(priv, HECC_CANRMP, mbx_mask); 568 + 569 + return ret; 568 570 } 569 571 570 572 static int ti_hecc_error(struct net_device *ndev, int int_status, ··· 592 558 struct can_frame *cf; 593 559 struct sk_buff *skb; 594 560 u32 timestamp; 595 - 596 - /* propagate the error condition to the can stack */ 597 - skb = alloc_can_err_skb(ndev, &cf); 598 - if (!skb) { 599 - if (printk_ratelimit()) 600 - netdev_err(priv->ndev, 601 - "%s: alloc_can_err_skb() failed\n", 602 - __func__); 603 - return -ENOMEM; 604 - } 605 - 606 - if (int_status & HECC_CANGIF_WLIF) { /* warning level int */ 607 - if ((int_status & HECC_CANGIF_BOIF) == 0) { 608 - priv->can.state = CAN_STATE_ERROR_WARNING; 609 - ++priv->can.can_stats.error_warning; 610 - cf->can_id |= CAN_ERR_CRTL; 611 - if (hecc_read(priv, HECC_CANTEC) > 96) 612 - cf->data[1] |= CAN_ERR_CRTL_TX_WARNING; 613 - if (hecc_read(priv, HECC_CANREC) > 96) 614 - cf->data[1] |= CAN_ERR_CRTL_RX_WARNING; 615 - } 616 - hecc_set_bit(priv, HECC_CANES, HECC_CANES_EW); 617 - netdev_dbg(priv->ndev, "Error Warning interrupt\n"); 618 - hecc_clear_bit(priv, HECC_CANMC, HECC_CANMC_CCR); 619 - } 620 - 621 - if (int_status & HECC_CANGIF_EPIF) { /* error passive int */ 622 - if ((int_status & HECC_CANGIF_BOIF) == 0) { 623 - priv->can.state = CAN_STATE_ERROR_PASSIVE; 624 - ++priv->can.can_stats.error_passive; 625 - cf->can_id |= CAN_ERR_CRTL; 626 - if (hecc_read(priv, HECC_CANTEC) > 127) 627 - cf->data[1] |= CAN_ERR_CRTL_TX_PASSIVE; 628 - if (hecc_read(priv, HECC_CANREC) > 127) 629 - cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE; 630 - } 631 - hecc_set_bit(priv, HECC_CANES, HECC_CANES_EP); 632 - netdev_dbg(priv->ndev, "Error passive interrupt\n"); 633 - hecc_clear_bit(priv, HECC_CANMC, HECC_CANMC_CCR); 634 - } 635 - 636 - /* Need to check busoff condition in error status register too to 637 - * ensure warning interrupts don't hog the system 638 - */ 639 - if ((int_status & HECC_CANGIF_BOIF) || (err_status & HECC_CANES_BO)) { 640 - priv->can.state = CAN_STATE_BUS_OFF; 641 - cf->can_id |= CAN_ERR_BUSOFF; 642 - hecc_set_bit(priv, HECC_CANES, HECC_CANES_BO); 643 - hecc_clear_bit(priv, HECC_CANMC, HECC_CANMC_CCR); 644 - /* Disable all interrupts in bus-off to avoid int hog */ 645 - hecc_write(priv, HECC_CANGIM, 0); 646 - ++priv->can.can_stats.bus_off; 647 - can_bus_off(ndev); 648 - } 561 + int err; 649 562 650 563 if (err_status & HECC_BUS_ERROR) { 564 + /* propagate the error condition to the can stack */ 565 + skb = alloc_can_err_skb(ndev, &cf); 566 + if (!skb) { 567 + if (net_ratelimit()) 568 + netdev_err(priv->ndev, 569 + "%s: alloc_can_err_skb() failed\n", 570 + __func__); 571 + return -ENOMEM; 572 + } 573 + 651 574 ++priv->can.can_stats.bus_error; 652 575 cf->can_id |= CAN_ERR_BUSERROR | CAN_ERR_PROT; 653 - if (err_status & HECC_CANES_FE) { 654 - hecc_set_bit(priv, HECC_CANES, HECC_CANES_FE); 576 + if (err_status & HECC_CANES_FE) 655 577 cf->data[2] |= CAN_ERR_PROT_FORM; 656 - } 657 - if (err_status & HECC_CANES_BE) { 658 - hecc_set_bit(priv, HECC_CANES, HECC_CANES_BE); 578 + if (err_status & HECC_CANES_BE) 659 579 cf->data[2] |= CAN_ERR_PROT_BIT; 660 - } 661 - if (err_status & HECC_CANES_SE) { 662 - hecc_set_bit(priv, HECC_CANES, HECC_CANES_SE); 580 + if (err_status & HECC_CANES_SE) 663 581 cf->data[2] |= CAN_ERR_PROT_STUFF; 664 - } 665 - if (err_status & HECC_CANES_CRCE) { 666 - hecc_set_bit(priv, HECC_CANES, HECC_CANES_CRCE); 582 + if (err_status & HECC_CANES_CRCE) 667 583 cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ; 668 - } 669 - if (err_status & HECC_CANES_ACKE) { 670 - hecc_set_bit(priv, HECC_CANES, HECC_CANES_ACKE); 584 + if (err_status & HECC_CANES_ACKE) 671 585 cf->data[3] = CAN_ERR_PROT_LOC_ACK; 672 - } 586 + 587 + timestamp = hecc_read(priv, HECC_CANLNT); 588 + err = can_rx_offload_queue_sorted(&priv->offload, skb, 589 + timestamp); 590 + if (err) 591 + ndev->stats.rx_fifo_errors++; 592 + } 593 + 594 + hecc_write(priv, HECC_CANES, HECC_CANES_FLAGS); 595 + 596 + return 0; 597 + } 598 + 599 + static void ti_hecc_change_state(struct net_device *ndev, 600 + enum can_state rx_state, 601 + enum can_state tx_state) 602 + { 603 + struct ti_hecc_priv *priv = netdev_priv(ndev); 604 + struct can_frame *cf; 605 + struct sk_buff *skb; 606 + u32 timestamp; 607 + int err; 608 + 609 + skb = alloc_can_err_skb(priv->ndev, &cf); 610 + if (unlikely(!skb)) { 611 + priv->can.state = max(tx_state, rx_state); 612 + return; 613 + } 614 + 615 + can_change_state(priv->ndev, cf, tx_state, rx_state); 616 + 617 + if (max(tx_state, rx_state) != CAN_STATE_BUS_OFF) { 618 + cf->data[6] = hecc_read(priv, HECC_CANTEC); 619 + cf->data[7] = hecc_read(priv, HECC_CANREC); 673 620 } 674 621 675 622 timestamp = hecc_read(priv, HECC_CANLNT); 676 - can_rx_offload_queue_sorted(&priv->offload, skb, timestamp); 677 - 678 - return 0; 623 + err = can_rx_offload_queue_sorted(&priv->offload, skb, timestamp); 624 + if (err) 625 + ndev->stats.rx_fifo_errors++; 679 626 } 680 627 681 628 static irqreturn_t ti_hecc_interrupt(int irq, void *dev_id) ··· 666 651 struct net_device_stats *stats = &ndev->stats; 667 652 u32 mbxno, mbx_mask, int_status, err_status, stamp; 668 653 unsigned long flags, rx_pending; 654 + u32 handled = 0; 669 655 670 656 int_status = hecc_read(priv, 671 657 priv->use_hecc1int ? ··· 676 660 return IRQ_NONE; 677 661 678 662 err_status = hecc_read(priv, HECC_CANES); 679 - if (err_status & (HECC_BUS_ERROR | HECC_CANES_BO | 680 - HECC_CANES_EP | HECC_CANES_EW)) 663 + if (unlikely(err_status & HECC_CANES_FLAGS)) 681 664 ti_hecc_error(ndev, int_status, err_status); 665 + 666 + if (unlikely(int_status & HECC_CANGIM_DEF_MASK)) { 667 + enum can_state rx_state, tx_state; 668 + u32 rec = hecc_read(priv, HECC_CANREC); 669 + u32 tec = hecc_read(priv, HECC_CANTEC); 670 + 671 + if (int_status & HECC_CANGIF_WLIF) { 672 + handled |= HECC_CANGIF_WLIF; 673 + rx_state = rec >= tec ? CAN_STATE_ERROR_WARNING : 0; 674 + tx_state = rec <= tec ? CAN_STATE_ERROR_WARNING : 0; 675 + netdev_dbg(priv->ndev, "Error Warning interrupt\n"); 676 + ti_hecc_change_state(ndev, rx_state, tx_state); 677 + } 678 + 679 + if (int_status & HECC_CANGIF_EPIF) { 680 + handled |= HECC_CANGIF_EPIF; 681 + rx_state = rec >= tec ? CAN_STATE_ERROR_PASSIVE : 0; 682 + tx_state = rec <= tec ? CAN_STATE_ERROR_PASSIVE : 0; 683 + netdev_dbg(priv->ndev, "Error passive interrupt\n"); 684 + ti_hecc_change_state(ndev, rx_state, tx_state); 685 + } 686 + 687 + if (int_status & HECC_CANGIF_BOIF) { 688 + handled |= HECC_CANGIF_BOIF; 689 + rx_state = CAN_STATE_BUS_OFF; 690 + tx_state = CAN_STATE_BUS_OFF; 691 + netdev_dbg(priv->ndev, "Bus off interrupt\n"); 692 + 693 + /* Disable all interrupts */ 694 + hecc_write(priv, HECC_CANGIM, 0); 695 + can_bus_off(ndev); 696 + ti_hecc_change_state(ndev, rx_state, tx_state); 697 + } 698 + } else if (unlikely(priv->can.state != CAN_STATE_ERROR_ACTIVE)) { 699 + enum can_state new_state, tx_state, rx_state; 700 + u32 rec = hecc_read(priv, HECC_CANREC); 701 + u32 tec = hecc_read(priv, HECC_CANTEC); 702 + 703 + if (rec >= 128 || tec >= 128) 704 + new_state = CAN_STATE_ERROR_PASSIVE; 705 + else if (rec >= 96 || tec >= 96) 706 + new_state = CAN_STATE_ERROR_WARNING; 707 + else 708 + new_state = CAN_STATE_ERROR_ACTIVE; 709 + 710 + if (new_state < priv->can.state) { 711 + rx_state = rec >= tec ? new_state : 0; 712 + tx_state = rec <= tec ? new_state : 0; 713 + ti_hecc_change_state(ndev, rx_state, tx_state); 714 + } 715 + } 682 716 683 717 if (int_status & HECC_CANGIF_GMIF) { 684 718 while (priv->tx_tail - priv->tx_head > 0) { ··· 736 670 mbx_mask = BIT(mbxno); 737 671 if (!(mbx_mask & hecc_read(priv, HECC_CANTA))) 738 672 break; 739 - hecc_clear_bit(priv, HECC_CANMIM, mbx_mask); 740 673 hecc_write(priv, HECC_CANTA, mbx_mask); 741 674 spin_lock_irqsave(&priv->mbx_lock, flags); 742 675 hecc_clear_bit(priv, HECC_CANME, mbx_mask); ··· 760 695 while ((rx_pending = hecc_read(priv, HECC_CANRMP))) { 761 696 can_rx_offload_irq_offload_timestamp(&priv->offload, 762 697 rx_pending); 763 - hecc_write(priv, HECC_CANRMP, rx_pending); 764 698 } 765 699 } 766 700 767 701 /* clear all interrupt conditions - read back to avoid spurious ints */ 768 702 if (priv->use_hecc1int) { 769 - hecc_write(priv, HECC_CANGIF1, HECC_SET_REG); 703 + hecc_write(priv, HECC_CANGIF1, handled); 770 704 int_status = hecc_read(priv, HECC_CANGIF1); 771 705 } else { 772 - hecc_write(priv, HECC_CANGIF0, HECC_SET_REG); 706 + hecc_write(priv, HECC_CANGIF0, handled); 773 707 int_status = hecc_read(priv, HECC_CANGIF0); 774 708 } 775 709 ··· 941 877 942 878 priv->offload.mailbox_read = ti_hecc_mailbox_read; 943 879 priv->offload.mb_first = HECC_RX_FIRST_MBOX; 944 - priv->offload.mb_last = HECC_MAX_TX_MBOX; 880 + priv->offload.mb_last = HECC_RX_LAST_MBOX; 945 881 err = can_rx_offload_add_timestamp(ndev, &priv->offload); 946 882 if (err) { 947 883 dev_err(&pdev->dev, "can_rx_offload_add_timestamp() failed\n");
+1
drivers/net/can/usb/gs_usb.c
··· 623 623 rc); 624 624 625 625 usb_unanchor_urb(urb); 626 + usb_free_urb(urb); 626 627 break; 627 628 } 628 629
+1 -2
drivers/net/can/usb/mcba_usb.c
··· 876 876 netdev_info(priv->netdev, "device disconnected\n"); 877 877 878 878 unregister_candev(priv->netdev); 879 - free_candev(priv->netdev); 880 - 881 879 mcba_urb_unlink(priv); 880 + free_candev(priv->netdev); 882 881 } 883 882 884 883 static struct usb_driver mcba_usb_driver = {
+22 -10
drivers/net/can/usb/peak_usb/pcan_usb.c
··· 100 100 u8 *end; 101 101 u8 rec_cnt; 102 102 u8 rec_idx; 103 - u8 rec_data_idx; 103 + u8 rec_ts_idx; 104 104 struct net_device *netdev; 105 105 struct pcan_usb *pdev; 106 106 }; ··· 436 436 } 437 437 if ((n & PCAN_USB_ERROR_BUS_LIGHT) == 0) { 438 438 /* no error (back to active state) */ 439 - mc->pdev->dev.can.state = CAN_STATE_ERROR_ACTIVE; 440 - return 0; 439 + new_state = CAN_STATE_ERROR_ACTIVE; 440 + break; 441 441 } 442 442 break; 443 443 ··· 460 460 } 461 461 462 462 if ((n & PCAN_USB_ERROR_BUS_HEAVY) == 0) { 463 - /* no error (back to active state) */ 464 - mc->pdev->dev.can.state = CAN_STATE_ERROR_ACTIVE; 465 - return 0; 463 + /* no error (back to warning state) */ 464 + new_state = CAN_STATE_ERROR_WARNING; 465 + break; 466 466 } 467 467 break; 468 468 ··· 499 499 cf->data[1] |= CAN_ERR_CRTL_TX_WARNING | 500 500 CAN_ERR_CRTL_RX_WARNING; 501 501 mc->pdev->dev.can.can_stats.error_warning++; 502 + break; 503 + 504 + case CAN_STATE_ERROR_ACTIVE: 505 + cf->can_id |= CAN_ERR_CRTL; 506 + cf->data[1] = CAN_ERR_CRTL_ACTIVE; 502 507 break; 503 508 504 509 default: ··· 552 547 mc->ptr += PCAN_USB_CMD_ARGS; 553 548 554 549 if (status_len & PCAN_USB_STATUSLEN_TIMESTAMP) { 555 - int err = pcan_usb_decode_ts(mc, !mc->rec_idx); 550 + int err = pcan_usb_decode_ts(mc, !mc->rec_ts_idx); 556 551 557 552 if (err) 558 553 return err; 554 + 555 + /* Next packet in the buffer will have a timestamp on a single 556 + * byte 557 + */ 558 + mc->rec_ts_idx++; 559 559 } 560 560 561 561 switch (f) { ··· 642 632 643 633 cf->can_dlc = get_can_dlc(rec_len); 644 634 645 - /* first data packet timestamp is a word */ 646 - if (pcan_usb_decode_ts(mc, !mc->rec_data_idx)) 635 + /* Only first packet timestamp is a word */ 636 + if (pcan_usb_decode_ts(mc, !mc->rec_ts_idx)) 647 637 goto decode_failed; 638 + 639 + /* Next packet in the buffer will have a timestamp on a single byte */ 640 + mc->rec_ts_idx++; 648 641 649 642 /* read data */ 650 643 memset(cf->data, 0x0, sizeof(cf->data)); ··· 701 688 /* handle normal can frames here */ 702 689 } else { 703 690 err = pcan_usb_decode_data(&mc, sl); 704 - mc.rec_data_idx++; 705 691 } 706 692 } 707 693
+1 -1
drivers/net/can/usb/peak_usb/pcan_usb_core.c
··· 750 750 dev = netdev_priv(netdev); 751 751 752 752 /* allocate a buffer large enough to send commands */ 753 - dev->cmd_buf = kmalloc(PCAN_USB_MAX_CMD_LEN, GFP_KERNEL); 753 + dev->cmd_buf = kzalloc(PCAN_USB_MAX_CMD_LEN, GFP_KERNEL); 754 754 if (!dev->cmd_buf) { 755 755 err = -ENOMEM; 756 756 goto lbl_free_candev;
+1 -2
drivers/net/can/usb/usb_8dev.c
··· 996 996 netdev_info(priv->netdev, "device disconnected\n"); 997 997 998 998 unregister_netdev(priv->netdev); 999 - free_candev(priv->netdev); 1000 - 1001 999 unlink_all_urbs(priv); 1000 + free_candev(priv->netdev); 1002 1001 } 1003 1002 1004 1003 }
-1
drivers/net/can/xilinx_can.c
··· 1599 1599 1600 1600 static const struct xcan_devtype_data xcan_axi_data = { 1601 1601 .cantype = XAXI_CAN, 1602 - .flags = XCAN_FLAG_TXFEMP, 1603 1602 .bittiming_const = &xcan_bittiming_const, 1604 1603 .btr_ts2_shift = XCAN_BTR_TS2_SHIFT, 1605 1604 .btr_sjw_shift = XCAN_BTR_SJW_SHIFT,
+2 -2
drivers/net/dsa/bcm_sf2.c
··· 1236 1236 struct bcm_sf2_priv *priv = platform_get_drvdata(pdev); 1237 1237 1238 1238 priv->wol_ports_mask = 0; 1239 + /* Disable interrupts */ 1240 + bcm_sf2_intr_disable(priv); 1239 1241 dsa_unregister_switch(priv->dev->ds); 1240 1242 bcm_sf2_cfp_exit(priv->dev->ds); 1241 - /* Disable all ports and interrupts */ 1242 - bcm_sf2_sw_suspend(priv->dev->ds); 1243 1243 bcm_sf2_mdio_unregister(priv); 1244 1244 if (priv->type == BCM7278_DEVICE_ID && !IS_ERR(priv->rcdev)) 1245 1245 reset_control_assert(priv->rcdev);
+15 -20
drivers/net/ethernet/broadcom/genet/bcmgenet.c
··· 1996 1996 1997 1997 /* issue soft reset with (rg)mii loopback to ensure a stable rxclk */ 1998 1998 bcmgenet_umac_writel(priv, CMD_SW_RESET | CMD_LCL_LOOP_EN, UMAC_CMD); 1999 - udelay(2); 2000 - bcmgenet_umac_writel(priv, 0, UMAC_CMD); 2001 1999 } 2002 2000 2003 2001 static void bcmgenet_intr_disable(struct bcmgenet_priv *priv) ··· 2612 2614 spin_unlock_irq(&priv->lock); 2613 2615 2614 2616 if (status & UMAC_IRQ_PHY_DET_R && 2615 - priv->dev->phydev->autoneg != AUTONEG_ENABLE) 2617 + priv->dev->phydev->autoneg != AUTONEG_ENABLE) { 2616 2618 phy_init_hw(priv->dev->phydev); 2619 + genphy_config_aneg(priv->dev->phydev); 2620 + } 2617 2621 2618 2622 /* Link UP/DOWN event */ 2619 2623 if (status & UMAC_IRQ_LINK_EVENT) ··· 2879 2879 if (priv->internal_phy) 2880 2880 bcmgenet_power_up(priv, GENET_POWER_PASSIVE); 2881 2881 2882 - ret = bcmgenet_mii_connect(dev); 2883 - if (ret) { 2884 - netdev_err(dev, "failed to connect to PHY\n"); 2885 - goto err_clk_disable; 2886 - } 2887 - 2888 2882 /* take MAC out of reset */ 2889 2883 bcmgenet_umac_reset(priv); 2890 2884 ··· 2887 2893 /* Make sure we reflect the value of CRC_CMD_FWD */ 2888 2894 reg = bcmgenet_umac_readl(priv, UMAC_CMD); 2889 2895 priv->crc_fwd_en = !!(reg & CMD_CRC_FWD); 2890 - 2891 - ret = bcmgenet_mii_config(dev, true); 2892 - if (ret) { 2893 - netdev_err(dev, "unsupported PHY\n"); 2894 - goto err_disconnect_phy; 2895 - } 2896 2896 2897 2897 bcmgenet_set_hw_addr(priv, dev->dev_addr); 2898 2898 ··· 2903 2915 ret = bcmgenet_init_dma(priv); 2904 2916 if (ret) { 2905 2917 netdev_err(dev, "failed to initialize DMA\n"); 2906 - goto err_disconnect_phy; 2918 + goto err_clk_disable; 2907 2919 } 2908 2920 2909 2921 /* Always enable ring 16 - descriptor ring */ ··· 2926 2938 goto err_irq0; 2927 2939 } 2928 2940 2941 + ret = bcmgenet_mii_probe(dev); 2942 + if (ret) { 2943 + netdev_err(dev, "failed to connect to PHY\n"); 2944 + goto err_irq1; 2945 + } 2946 + 2929 2947 bcmgenet_netif_start(dev); 2930 2948 2931 2949 netif_tx_start_all_queues(dev); 2932 2950 2933 2951 return 0; 2934 2952 2953 + err_irq1: 2954 + free_irq(priv->irq1, priv); 2935 2955 err_irq0: 2936 2956 free_irq(priv->irq0, priv); 2937 2957 err_fini_dma: 2938 2958 bcmgenet_dma_teardown(priv); 2939 2959 bcmgenet_fini_dma(priv); 2940 - err_disconnect_phy: 2941 - phy_disconnect(dev->phydev); 2942 2960 err_clk_disable: 2943 2961 if (priv->internal_phy) 2944 2962 bcmgenet_power_down(priv, GENET_POWER_PASSIVE); ··· 3629 3635 if (priv->internal_phy) 3630 3636 bcmgenet_power_up(priv, GENET_POWER_PASSIVE); 3631 3637 3632 - phy_init_hw(dev->phydev); 3633 - 3634 3638 bcmgenet_umac_reset(priv); 3635 3639 3636 3640 init_umac(priv); ··· 3637 3645 if (priv->wolopts) 3638 3646 clk_disable_unprepare(priv->clk_wol); 3639 3647 3648 + phy_init_hw(dev->phydev); 3649 + 3640 3650 /* Speed settings must be restored */ 3651 + genphy_config_aneg(dev->phydev); 3641 3652 bcmgenet_mii_config(priv->dev, false); 3642 3653 3643 3654 bcmgenet_set_hw_addr(priv, dev->dev_addr);
+1 -1
drivers/net/ethernet/broadcom/genet/bcmgenet.h
··· 720 720 721 721 /* MDIO routines */ 722 722 int bcmgenet_mii_init(struct net_device *dev); 723 - int bcmgenet_mii_connect(struct net_device *dev); 724 723 int bcmgenet_mii_config(struct net_device *dev, bool init); 724 + int bcmgenet_mii_probe(struct net_device *dev); 725 725 void bcmgenet_mii_exit(struct net_device *dev); 726 726 void bcmgenet_phy_power_set(struct net_device *dev, bool enable); 727 727 void bcmgenet_mii_setup(struct net_device *dev);
+95 -52
drivers/net/ethernet/broadcom/genet/bcmmii.c
··· 173 173 bcmgenet_fixed_phy_link_update); 174 174 } 175 175 176 - int bcmgenet_mii_connect(struct net_device *dev) 177 - { 178 - struct bcmgenet_priv *priv = netdev_priv(dev); 179 - struct device_node *dn = priv->pdev->dev.of_node; 180 - struct phy_device *phydev; 181 - u32 phy_flags = 0; 182 - int ret; 183 - 184 - /* Communicate the integrated PHY revision */ 185 - if (priv->internal_phy) 186 - phy_flags = priv->gphy_rev; 187 - 188 - /* Initialize link state variables that bcmgenet_mii_setup() uses */ 189 - priv->old_link = -1; 190 - priv->old_speed = -1; 191 - priv->old_duplex = -1; 192 - priv->old_pause = -1; 193 - 194 - if (dn) { 195 - phydev = of_phy_connect(dev, priv->phy_dn, bcmgenet_mii_setup, 196 - phy_flags, priv->phy_interface); 197 - if (!phydev) { 198 - pr_err("could not attach to PHY\n"); 199 - return -ENODEV; 200 - } 201 - } else { 202 - phydev = dev->phydev; 203 - phydev->dev_flags = phy_flags; 204 - 205 - ret = phy_connect_direct(dev, phydev, bcmgenet_mii_setup, 206 - priv->phy_interface); 207 - if (ret) { 208 - pr_err("could not attach to PHY\n"); 209 - return -ENODEV; 210 - } 211 - } 212 - 213 - return 0; 214 - } 215 - 216 176 int bcmgenet_mii_config(struct net_device *dev, bool init) 217 177 { 218 178 struct bcmgenet_priv *priv = netdev_priv(dev); ··· 181 221 const char *phy_name = NULL; 182 222 u32 id_mode_dis = 0; 183 223 u32 port_ctrl; 224 + int bmcr = -1; 225 + int ret; 184 226 u32 reg; 227 + 228 + /* MAC clocking workaround during reset of umac state machines */ 229 + reg = bcmgenet_umac_readl(priv, UMAC_CMD); 230 + if (reg & CMD_SW_RESET) { 231 + /* An MII PHY must be isolated to prevent TXC contention */ 232 + if (priv->phy_interface == PHY_INTERFACE_MODE_MII) { 233 + ret = phy_read(phydev, MII_BMCR); 234 + if (ret >= 0) { 235 + bmcr = ret; 236 + ret = phy_write(phydev, MII_BMCR, 237 + bmcr | BMCR_ISOLATE); 238 + } 239 + if (ret) { 240 + netdev_err(dev, "failed to isolate PHY\n"); 241 + return ret; 242 + } 243 + } 244 + /* Switch MAC clocking to RGMII generated clock */ 245 + bcmgenet_sys_writel(priv, PORT_MODE_EXT_GPHY, SYS_PORT_CTRL); 246 + /* Ensure 5 clks with Rx disabled 247 + * followed by 5 clks with Reset asserted 248 + */ 249 + udelay(4); 250 + reg &= ~(CMD_SW_RESET | CMD_LCL_LOOP_EN); 251 + bcmgenet_umac_writel(priv, reg, UMAC_CMD); 252 + /* Ensure 5 more clocks before Rx is enabled */ 253 + udelay(2); 254 + } 185 255 186 256 priv->ext_phy = !priv->internal_phy && 187 257 (priv->phy_interface != PHY_INTERFACE_MODE_MOCA); ··· 244 254 phy_set_max_speed(phydev, SPEED_100); 245 255 bcmgenet_sys_writel(priv, 246 256 PORT_MODE_EXT_EPHY, SYS_PORT_CTRL); 257 + /* Restore the MII PHY after isolation */ 258 + if (bmcr >= 0) 259 + phy_write(phydev, MII_BMCR, bmcr); 247 260 break; 248 261 249 262 case PHY_INTERFACE_MODE_REVMII: ··· 299 306 bcmgenet_ext_writel(priv, reg, EXT_RGMII_OOB_CTRL); 300 307 } 301 308 302 - if (init) { 303 - linkmode_copy(phydev->advertising, phydev->supported); 304 - 305 - /* The internal PHY has its link interrupts routed to the 306 - * Ethernet MAC ISRs. On GENETv5 there is a hardware issue 307 - * that prevents the signaling of link UP interrupts when 308 - * the link operates at 10Mbps, so fallback to polling for 309 - * those versions of GENET. 310 - */ 311 - if (priv->internal_phy && !GENET_IS_V5(priv)) 312 - phydev->irq = PHY_IGNORE_INTERRUPT; 313 - 309 + if (init) 314 310 dev_info(kdev, "configuring instance for %s\n", phy_name); 311 + 312 + return 0; 313 + } 314 + 315 + int bcmgenet_mii_probe(struct net_device *dev) 316 + { 317 + struct bcmgenet_priv *priv = netdev_priv(dev); 318 + struct device_node *dn = priv->pdev->dev.of_node; 319 + struct phy_device *phydev; 320 + u32 phy_flags = 0; 321 + int ret; 322 + 323 + /* Communicate the integrated PHY revision */ 324 + if (priv->internal_phy) 325 + phy_flags = priv->gphy_rev; 326 + 327 + /* Initialize link state variables that bcmgenet_mii_setup() uses */ 328 + priv->old_link = -1; 329 + priv->old_speed = -1; 330 + priv->old_duplex = -1; 331 + priv->old_pause = -1; 332 + 333 + if (dn) { 334 + phydev = of_phy_connect(dev, priv->phy_dn, bcmgenet_mii_setup, 335 + phy_flags, priv->phy_interface); 336 + if (!phydev) { 337 + pr_err("could not attach to PHY\n"); 338 + return -ENODEV; 339 + } 340 + } else { 341 + phydev = dev->phydev; 342 + phydev->dev_flags = phy_flags; 343 + 344 + ret = phy_connect_direct(dev, phydev, bcmgenet_mii_setup, 345 + priv->phy_interface); 346 + if (ret) { 347 + pr_err("could not attach to PHY\n"); 348 + return -ENODEV; 349 + } 315 350 } 351 + 352 + /* Configure port multiplexer based on what the probed PHY device since 353 + * reading the 'max-speed' property determines the maximum supported 354 + * PHY speed which is needed for bcmgenet_mii_config() to configure 355 + * things appropriately. 356 + */ 357 + ret = bcmgenet_mii_config(dev, true); 358 + if (ret) { 359 + phy_disconnect(dev->phydev); 360 + return ret; 361 + } 362 + 363 + linkmode_copy(phydev->advertising, phydev->supported); 364 + 365 + /* The internal PHY has its link interrupts routed to the 366 + * Ethernet MAC ISRs. On GENETv5 there is a hardware issue 367 + * that prevents the signaling of link UP interrupts when 368 + * the link operates at 10Mbps, so fallback to polling for 369 + * those versions of GENET. 370 + */ 371 + if (priv->internal_phy && !GENET_IS_V5(priv)) 372 + dev->phydev->irq = PHY_IGNORE_INTERRUPT; 316 373 317 374 return 0; 318 375 }
+1 -1
drivers/net/ethernet/cavium/octeon/octeon_mgmt.c
··· 1499 1499 netdev->ethtool_ops = &octeon_mgmt_ethtool_ops; 1500 1500 1501 1501 netdev->min_mtu = 64 - OCTEON_MGMT_RX_HEADROOM; 1502 - netdev->max_mtu = 16383 - OCTEON_MGMT_RX_HEADROOM; 1502 + netdev->max_mtu = 16383 - OCTEON_MGMT_RX_HEADROOM - VLAN_HLEN; 1503 1503 1504 1504 mac = of_get_mac_address(pdev->dev.of_node); 1505 1505
+2
drivers/net/ethernet/freescale/fec_main.c
··· 3645 3645 regulator_disable(fep->reg_phy); 3646 3646 pm_runtime_put(&pdev->dev); 3647 3647 pm_runtime_disable(&pdev->dev); 3648 + clk_disable_unprepare(fep->clk_ahb); 3649 + clk_disable_unprepare(fep->clk_ipg); 3648 3650 if (of_phy_is_fixed_link(np)) 3649 3651 of_phy_deregister_fixed_link(np); 3650 3652 of_node_put(fep->phy_node);
-1
drivers/net/ethernet/hisilicon/hns/hnae.c
··· 199 199 200 200 ring->q = q; 201 201 ring->flags = flags; 202 - spin_lock_init(&ring->lock); 203 202 ring->coal_param = q->handle->coal_param; 204 203 assert(!ring->desc && !ring->desc_cb && !ring->desc_dma_addr); 205 204
-3
drivers/net/ethernet/hisilicon/hns/hnae.h
··· 274 274 /* statistic */ 275 275 struct ring_stats stats; 276 276 277 - /* ring lock for poll one */ 278 - spinlock_t lock; 279 - 280 277 dma_addr_t desc_dma_addr; 281 278 u32 buf_size; /* size for hnae_desc->addr, preset by AE */ 282 279 u16 desc_num; /* total number of desc */
+1 -21
drivers/net/ethernet/hisilicon/hns/hns_enet.c
··· 943 943 return u > c ? (h > c && h <= u) : (h > c || h <= u); 944 944 } 945 945 946 - /* netif_tx_lock will turn down the performance, set only when necessary */ 947 - #ifdef CONFIG_NET_POLL_CONTROLLER 948 - #define NETIF_TX_LOCK(ring) spin_lock(&(ring)->lock) 949 - #define NETIF_TX_UNLOCK(ring) spin_unlock(&(ring)->lock) 950 - #else 951 - #define NETIF_TX_LOCK(ring) 952 - #define NETIF_TX_UNLOCK(ring) 953 - #endif 954 - 955 946 /* reclaim all desc in one budget 956 947 * return error or number of desc left 957 948 */ ··· 956 965 int head; 957 966 int bytes, pkts; 958 967 959 - NETIF_TX_LOCK(ring); 960 - 961 968 head = readl_relaxed(ring->io_base + RCB_REG_HEAD); 962 969 rmb(); /* make sure head is ready before touch any data */ 963 970 964 - if (is_ring_empty(ring) || head == ring->next_to_clean) { 965 - NETIF_TX_UNLOCK(ring); 971 + if (is_ring_empty(ring) || head == ring->next_to_clean) 966 972 return 0; /* no data to poll */ 967 - } 968 973 969 974 if (!is_valid_clean_head(ring, head)) { 970 975 netdev_err(ndev, "wrong head (%d, %d-%d)\n", head, 971 976 ring->next_to_use, ring->next_to_clean); 972 977 ring->stats.io_err_cnt++; 973 - NETIF_TX_UNLOCK(ring); 974 978 return -EIO; 975 979 } 976 980 ··· 979 993 /* update tx ring statistics. */ 980 994 ring->stats.tx_pkts += pkts; 981 995 ring->stats.tx_bytes += bytes; 982 - 983 - NETIF_TX_UNLOCK(ring); 984 996 985 997 dev_queue = netdev_get_tx_queue(ndev, ring_data->queue_index); 986 998 netdev_tx_completed_queue(dev_queue, pkts, bytes); ··· 1039 1055 int head; 1040 1056 int bytes, pkts; 1041 1057 1042 - NETIF_TX_LOCK(ring); 1043 - 1044 1058 head = ring->next_to_use; /* ntu :soft setted ring position*/ 1045 1059 bytes = 0; 1046 1060 pkts = 0; 1047 1061 while (head != ring->next_to_clean) 1048 1062 hns_nic_reclaim_one_desc(ring, &bytes, &pkts); 1049 - 1050 - NETIF_TX_UNLOCK(ring); 1051 1063 1052 1064 dev_queue = netdev_get_tx_queue(ndev, ring_data->queue_index); 1053 1065 netdev_tx_reset_queue(dev_queue);
+1 -1
drivers/net/ethernet/hisilicon/hns3/hnae3.h
··· 1 - // SPDX-License-Identifier: GPL-2.0+ 1 + /* SPDX-License-Identifier: GPL-2.0+ */ 2 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 3 4 4 #ifndef __HNAE3_H
+1 -1
drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
··· 1 - // SPDX-License-Identifier: GPL-2.0+ 1 + /* SPDX-License-Identifier: GPL-2.0+ */ 2 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 3 4 4 #ifndef __HNS3_ENET_H
+1 -1
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
··· 1 - // SPDX-License-Identifier: GPL-2.0+ 1 + /* SPDX-License-Identifier: GPL-2.0+ */ 2 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 3 4 4 #ifndef __HCLGE_CMD_H
+1 -1
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.h
··· 1 - // SPDX-License-Identifier: GPL-2.0+ 1 + /* SPDX-License-Identifier: GPL-2.0+ */ 2 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 3 4 4 #ifndef __HCLGE_DCB_H__
+17 -1
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
··· 3679 3679 { 3680 3680 struct hclge_pf_rst_done_cmd *req; 3681 3681 struct hclge_desc desc; 3682 + int ret; 3682 3683 3683 3684 req = (struct hclge_pf_rst_done_cmd *)desc.data; 3684 3685 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_PF_RST_DONE, false); 3685 3686 req->pf_rst_done |= HCLGE_PF_RESET_DONE_BIT; 3686 3687 3687 - return hclge_cmd_send(&hdev->hw, &desc, 1); 3688 + ret = hclge_cmd_send(&hdev->hw, &desc, 1); 3689 + /* To be compatible with the old firmware, which does not support 3690 + * command HCLGE_OPC_PF_RST_DONE, just print a warning and 3691 + * return success 3692 + */ 3693 + if (ret == -EOPNOTSUPP) { 3694 + dev_warn(&hdev->pdev->dev, 3695 + "current firmware does not support command(0x%x)!\n", 3696 + HCLGE_OPC_PF_RST_DONE); 3697 + return 0; 3698 + } else if (ret) { 3699 + dev_err(&hdev->pdev->dev, "assert PF reset done fail %d!\n", 3700 + ret); 3701 + } 3702 + 3703 + return ret; 3688 3704 } 3689 3705 3690 3706 static int hclge_reset_prepare_up(struct hclge_dev *hdev)
+1 -1
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
··· 1 - // SPDX-License-Identifier: GPL-2.0+ 1 + /* SPDX-License-Identifier: GPL-2.0+ */ 2 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 3 4 4 #ifndef __HCLGE_MAIN_H
+1 -1
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h
··· 1 - // SPDX-License-Identifier: GPL-2.0+ 1 + /* SPDX-License-Identifier: GPL-2.0+ */ 2 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 3 4 4 #ifndef __HCLGE_MDIO_H
+1 -1
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
··· 1 - // SPDX-License-Identifier: GPL-2.0+ 1 + /* SPDX-License-Identifier: GPL-2.0+ */ 2 2 // Copyright (c) 2016-2017 Hisilicon Limited. 3 3 4 4 #ifndef __HCLGE_TM_H
+2
drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
··· 20 20 21 21 /* API version 1.7 implements additional link and PHY-specific APIs */ 22 22 #define I40E_MINOR_VER_GET_LINK_INFO_XL710 0x0007 23 + /* API version 1.9 for X722 implements additional link and PHY-specific APIs */ 24 + #define I40E_MINOR_VER_GET_LINK_INFO_X722 0x0009 23 25 /* API version 1.6 for X722 devices adds ability to stop FW LLDP agent */ 24 26 #define I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722 0x0006 25 27
+2 -1
drivers/net/ethernet/intel/i40e/i40e_common.c
··· 1896 1896 hw->aq.fw_min_ver < 40)) && hw_link_info->phy_type == 0xE) 1897 1897 hw_link_info->phy_type = I40E_PHY_TYPE_10GBASE_SFPP_CU; 1898 1898 1899 - if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) { 1899 + if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE && 1900 + hw->mac.type != I40E_MAC_X722) { 1900 1901 __le32 tmp; 1901 1902 1902 1903 memcpy(&tmp, resp->link_type, sizeof(tmp));
+2 -8
drivers/net/ethernet/intel/i40e/i40e_xsk.c
··· 689 689 i40e_xdp_ring_update_tail(xdp_ring); 690 690 691 691 xsk_umem_consume_tx_done(xdp_ring->xsk_umem); 692 - if (xsk_umem_uses_need_wakeup(xdp_ring->xsk_umem)) 693 - xsk_clear_tx_need_wakeup(xdp_ring->xsk_umem); 694 692 } 695 693 696 694 return !!budget && work_done; ··· 767 769 i40e_update_tx_stats(tx_ring, completed_frames, total_bytes); 768 770 769 771 out_xmit: 770 - if (xsk_umem_uses_need_wakeup(tx_ring->xsk_umem)) { 771 - if (tx_ring->next_to_clean == tx_ring->next_to_use) 772 - xsk_set_tx_need_wakeup(tx_ring->xsk_umem); 773 - else 774 - xsk_clear_tx_need_wakeup(tx_ring->xsk_umem); 775 - } 772 + if (xsk_umem_uses_need_wakeup(tx_ring->xsk_umem)) 773 + xsk_set_tx_need_wakeup(tx_ring->xsk_umem); 776 774 777 775 xmit_done = i40e_xmit_zc(tx_ring, budget); 778 776
+2 -2
drivers/net/ethernet/intel/iavf/iavf_main.c
··· 314 314 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); 315 315 q_vector->ring_mask |= BIT(r_idx); 316 316 wr32(hw, IAVF_VFINT_ITRN1(IAVF_RX_ITR, q_vector->reg_idx), 317 - q_vector->rx.current_itr); 317 + q_vector->rx.current_itr >> 1); 318 318 q_vector->rx.current_itr = q_vector->rx.target_itr; 319 319 } 320 320 ··· 340 340 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); 341 341 q_vector->num_ringpairs++; 342 342 wr32(hw, IAVF_VFINT_ITRN1(IAVF_TX_ITR, q_vector->reg_idx), 343 - q_vector->tx.target_itr); 343 + q_vector->tx.target_itr >> 1); 344 344 q_vector->tx.current_itr = q_vector->tx.target_itr; 345 345 } 346 346
+1 -1
drivers/net/ethernet/intel/ice/ice_sched.c
··· 1204 1204 struct ice_aqc_query_txsched_res_resp *buf; 1205 1205 enum ice_status status = 0; 1206 1206 __le16 max_sibl; 1207 - u8 i; 1207 + u16 i; 1208 1208 1209 1209 if (hw->layer_info) 1210 1210 return status;
+2 -2
drivers/net/ethernet/intel/igb/igb_main.c
··· 5677 5677 * should have been handled by the upper layers. 5678 5678 */ 5679 5679 if (tx_ring->launchtime_enable) { 5680 - ts = ns_to_timespec64(first->skb->tstamp); 5681 - first->skb->tstamp = 0; 5680 + ts = ktime_to_timespec64(first->skb->tstamp); 5681 + first->skb->tstamp = ktime_set(0, 0); 5682 5682 context_desc->seqnum_seed = cpu_to_le32(ts.tv_nsec / 32); 5683 5683 } else { 5684 5684 context_desc->seqnum_seed = 0;
+2 -2
drivers/net/ethernet/intel/igc/igc_main.c
··· 862 862 * should have been handled by the upper layers. 863 863 */ 864 864 if (tx_ring->launchtime_enable) { 865 - ts = ns_to_timespec64(first->skb->tstamp); 866 - first->skb->tstamp = 0; 865 + ts = ktime_to_timespec64(first->skb->tstamp); 866 + first->skb->tstamp = ktime_set(0, 0); 867 867 context_desc->launch_time = cpu_to_le32(ts.tv_nsec / 32); 868 868 } else { 869 869 context_desc->launch_time = 0;
+2 -8
drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c
··· 622 622 if (tx_desc) { 623 623 ixgbe_xdp_ring_update_tail(xdp_ring); 624 624 xsk_umem_consume_tx_done(xdp_ring->xsk_umem); 625 - if (xsk_umem_uses_need_wakeup(xdp_ring->xsk_umem)) 626 - xsk_clear_tx_need_wakeup(xdp_ring->xsk_umem); 627 625 } 628 626 629 627 return !!budget && work_done; ··· 689 691 if (xsk_frames) 690 692 xsk_umem_complete_tx(umem, xsk_frames); 691 693 692 - if (xsk_umem_uses_need_wakeup(tx_ring->xsk_umem)) { 693 - if (tx_ring->next_to_clean == tx_ring->next_to_use) 694 - xsk_set_tx_need_wakeup(tx_ring->xsk_umem); 695 - else 696 - xsk_clear_tx_need_wakeup(tx_ring->xsk_umem); 697 - } 694 + if (xsk_umem_uses_need_wakeup(tx_ring->xsk_umem)) 695 + xsk_set_tx_need_wakeup(tx_ring->xsk_umem); 698 696 699 697 return ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit); 700 698 }
+1 -2
drivers/net/ethernet/mellanox/mlx4/main.c
··· 514 514 dev->caps.max_rq_desc_sz = dev_cap->max_rq_desc_sz; 515 515 /* 516 516 * Subtract 1 from the limit because we need to allocate a 517 - * spare CQE so the HCA HW can tell the difference between an 518 - * empty CQ and a full CQ. 517 + * spare CQE to enable resizing the CQ. 519 518 */ 520 519 dev->caps.max_cqes = dev_cap->max_cq_sz - 1; 521 520 dev->caps.reserved_cqs = dev_cap->reserved_cqs;
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
··· 1079 1079 MLX5_CAP_GEN(dev, max_flow_counter_15_0); 1080 1080 fdb_max = 1 << MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size); 1081 1081 1082 - esw_debug(dev, "Create offloads FDB table, min (max esw size(2^%d), max counters(%d), groups(%d), max flow table size(2^%d))\n", 1082 + esw_debug(dev, "Create offloads FDB table, min (max esw size(2^%d), max counters(%d), groups(%d), max flow table size(%d))\n", 1083 1083 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size), 1084 1084 max_flow_counter, ESW_OFFLOADS_NUM_GROUPS, 1085 1085 fdb_max);
+2 -1
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads_termtbl.c
··· 183 183 u32 port_mask, port_value; 184 184 185 185 if (MLX5_CAP_ESW_FLOWTABLE(esw->dev, flow_source)) 186 - return spec->flow_context.flow_source == MLX5_VPORT_UPLINK; 186 + return spec->flow_context.flow_source == 187 + MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK; 187 188 188 189 port_mask = MLX5_GET(fte_match_param, spec->match_criteria, 189 190 misc_parameters.source_port);
+1
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c
··· 1577 1577 break; 1578 1578 case DR_ACTION_TYP_MODIFY_HDR: 1579 1579 mlx5dr_icm_free_chunk(action->rewrite.chunk); 1580 + kfree(action->rewrite.data); 1580 1581 refcount_dec(&action->rewrite.dmn->refcount); 1581 1582 break; 1582 1583 default:
+2
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c
··· 1097 1097 if (htbl) 1098 1098 mlx5dr_htbl_put(htbl); 1099 1099 1100 + kfree(hw_ste_arr); 1101 + 1100 1102 return 0; 1101 1103 1102 1104 free_ste:
+5 -4
drivers/net/ethernet/mscc/ocelot.c
··· 1680 1680 struct ocelot_port *ocelot_port = netdev_priv(dev); 1681 1681 int err = 0; 1682 1682 1683 - if (!ocelot_netdevice_dev_check(dev)) 1684 - return 0; 1685 - 1686 1683 switch (event) { 1687 1684 case NETDEV_CHANGEUPPER: 1688 1685 if (netif_is_bridge_master(info->upper_dev)) { ··· 1716 1719 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 1717 1720 int ret = 0; 1718 1721 1722 + if (!ocelot_netdevice_dev_check(dev)) 1723 + return 0; 1724 + 1719 1725 if (event == NETDEV_PRECHANGEUPPER && 1720 1726 netif_is_lag_master(info->upper_dev)) { 1721 1727 struct netdev_lag_upper_info *lag_upper_info = info->upper_info; 1722 1728 struct netlink_ext_ack *extack; 1723 1729 1724 - if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH) { 1730 + if (lag_upper_info && 1731 + lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH) { 1725 1732 extack = netdev_notifier_info_to_extack(&info->info); 1726 1733 NL_SET_ERR_MSG_MOD(extack, "LAG device using unsupported Tx type"); 1727 1734
+1 -1
drivers/net/ethernet/mscc/ocelot.h
··· 523 523 #define ocelot_write_rix(ocelot, val, reg, ri) __ocelot_write_ix(ocelot, val, reg, reg##_RSZ * (ri)) 524 524 #define ocelot_write(ocelot, val, reg) __ocelot_write_ix(ocelot, val, reg, 0) 525 525 526 - void __ocelot_rmw_ix(struct ocelot *ocelot, u32 val, u32 reg, u32 mask, 526 + void __ocelot_rmw_ix(struct ocelot *ocelot, u32 val, u32 mask, u32 reg, 527 527 u32 offset); 528 528 #define ocelot_rmw_ix(ocelot, val, m, reg, gi, ri) __ocelot_rmw_ix(ocelot, val, m, reg, reg##_GSZ * (gi) + reg##_RSZ * (ri)) 529 529 #define ocelot_rmw_gix(ocelot, val, m, reg, gi) __ocelot_rmw_ix(ocelot, val, m, reg, reg##_GSZ * (gi))
+10 -2
drivers/net/ethernet/qlogic/qede/qede_main.c
··· 1208 1208 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) 1209 1209 { 1210 1210 struct net_device *ndev = pci_get_drvdata(pdev); 1211 - struct qede_dev *edev = netdev_priv(ndev); 1212 - struct qed_dev *cdev = edev->cdev; 1211 + struct qede_dev *edev; 1212 + struct qed_dev *cdev; 1213 + 1214 + if (!ndev) { 1215 + dev_info(&pdev->dev, "Device has already been removed\n"); 1216 + return; 1217 + } 1218 + 1219 + edev = netdev_priv(ndev); 1220 + cdev = edev->cdev; 1213 1221 1214 1222 DP_INFO(edev, "Starting qede_remove\n"); 1215 1223
+2 -2
drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c
··· 57 57 if (port->nr_rmnet_devs) 58 58 return -EINVAL; 59 59 60 - kfree(port); 61 - 62 60 netdev_rx_handler_unregister(real_dev); 61 + 62 + kfree(port); 63 63 64 64 /* release reference on real_dev */ 65 65 dev_put(real_dev);
+3
drivers/net/ethernet/realtek/r8169_main.c
··· 910 910 911 911 static int r8168g_mdio_read(struct rtl8169_private *tp, int reg) 912 912 { 913 + if (reg == 0x1f) 914 + return tp->ocp_base == OCP_STD_PHY_BASE ? 0 : tp->ocp_base >> 4; 915 + 913 916 if (tp->ocp_base != OCP_STD_PHY_BASE) 914 917 reg -= 0x10; 915 918
+1 -1
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
··· 432 432 * bits used depends on the hardware configuration 433 433 * selected at core configuration time. 434 434 */ 435 - int bit_nr = bitrev32(~crc32_le(~0, ha->addr, 435 + u32 bit_nr = bitrev32(~crc32_le(~0, ha->addr, 436 436 ETH_ALEN)) >> (32 - mcbitslog2); 437 437 /* The most significant bit determines the register to 438 438 * use (H/L) while the other 5 bits determine the bit
+2 -1
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
··· 224 224 writel(low_credit, ioaddr + XGMAC_MTL_TCx_LOCREDIT(queue)); 225 225 226 226 value = readl(ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(queue)); 227 + value &= ~XGMAC_TSA; 227 228 value |= XGMAC_CC | XGMAC_CBS; 228 229 writel(value, ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(queue)); 229 230 } ··· 464 463 value |= XGMAC_FILTER_HMC; 465 464 466 465 netdev_for_each_mc_addr(ha, dev) { 467 - int nr = (bitrev32(~crc32_le(~0, ha->addr, 6)) >> 466 + u32 nr = (bitrev32(~crc32_le(~0, ha->addr, 6)) >> 468 467 (32 - mcbitslog2)); 469 468 mc_filter[nr >> 5] |= (1 << (nr & 0x1F)); 470 469 }
+2 -1
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c
··· 288 288 289 289 static int dwxgmac2_get_rx_header_len(struct dma_desc *p, unsigned int *len) 290 290 { 291 - *len = le32_to_cpu(p->des2) & XGMAC_RDES2_HL; 291 + if (le32_to_cpu(p->des3) & XGMAC_RDES3_L34T) 292 + *len = le32_to_cpu(p->des2) & XGMAC_RDES2_HL; 292 293 return 0; 293 294 } 294 295
+3 -1
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
··· 372 372 dma_cap->eee = (hw_cap & XGMAC_HWFEAT_EEESEL) >> 13; 373 373 dma_cap->atime_stamp = (hw_cap & XGMAC_HWFEAT_TSSEL) >> 12; 374 374 dma_cap->av = (hw_cap & XGMAC_HWFEAT_AVSEL) >> 11; 375 - dma_cap->av &= !(hw_cap & XGMAC_HWFEAT_RAVSEL) >> 10; 375 + dma_cap->av &= !((hw_cap & XGMAC_HWFEAT_RAVSEL) >> 10); 376 376 dma_cap->arpoffsel = (hw_cap & XGMAC_HWFEAT_ARPOFFSEL) >> 9; 377 377 dma_cap->rmon = (hw_cap & XGMAC_HWFEAT_MMCSEL) >> 8; 378 378 dma_cap->pmt_magic_frame = (hw_cap & XGMAC_HWFEAT_MGKSEL) >> 7; ··· 473 473 static void dwxgmac2_qmode(void __iomem *ioaddr, u32 channel, u8 qmode) 474 474 { 475 475 u32 value = readl(ioaddr + XGMAC_MTL_TXQ_OPMODE(channel)); 476 + u32 flow = readl(ioaddr + XGMAC_RX_FLOW_CTRL); 476 477 477 478 value &= ~XGMAC_TXQEN; 478 479 if (qmode != MTL_QUEUE_AVB) { ··· 481 480 writel(0, ioaddr + XGMAC_MTL_TCx_ETS_CONTROL(channel)); 482 481 } else { 483 482 value |= 0x1 << XGMAC_TXQEN_SHIFT; 483 + writel(flow & (~XGMAC_RFE), ioaddr + XGMAC_RX_FLOW_CTRL); 484 484 } 485 485 486 486 writel(value, ioaddr + XGMAC_MTL_TXQ_OPMODE(channel));
+4 -2
drivers/net/ethernet/stmicro/stmmac/mmc_core.c
··· 176 176 #define MMC_XGMAC_RX_PKT_SMD_ERR 0x22c 177 177 #define MMC_XGMAC_RX_PKT_ASSEMBLY_OK 0x230 178 178 #define MMC_XGMAC_RX_FPE_FRAG 0x234 179 + #define MMC_XGMAC_RX_IPC_INTR_MASK 0x25c 179 180 180 181 static void dwmac_mmc_ctrl(void __iomem *mmcaddr, unsigned int mode) 181 182 { ··· 334 333 335 334 static void dwxgmac_mmc_intr_all_mask(void __iomem *mmcaddr) 336 335 { 337 - writel(MMC_DEFAULT_MASK, mmcaddr + MMC_RX_INTR_MASK); 338 - writel(MMC_DEFAULT_MASK, mmcaddr + MMC_TX_INTR_MASK); 336 + writel(0x0, mmcaddr + MMC_RX_INTR_MASK); 337 + writel(0x0, mmcaddr + MMC_TX_INTR_MASK); 338 + writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_RX_IPC_INTR_MASK); 339 339 } 340 340 341 341 static void dwxgmac_read_mmc_reg(void __iomem *addr, u32 reg, u32 *dest)
+38 -32
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
··· 2996 2996 stmmac_set_desc_addr(priv, first, des); 2997 2997 tmp_pay_len = pay_len; 2998 2998 des += proto_hdr_len; 2999 + pay_len = 0; 2999 3000 } 3000 3001 3001 3002 stmmac_tso_allocator(priv, des, tmp_pay_len, (nfrags == 0), queue); ··· 3024 3023 /* Only the last descriptor gets to point to the skb. */ 3025 3024 tx_q->tx_skbuff[tx_q->cur_tx] = skb; 3026 3025 3026 + /* Manage tx mitigation */ 3027 + tx_q->tx_count_frames += nfrags + 1; 3028 + if (likely(priv->tx_coal_frames > tx_q->tx_count_frames) && 3029 + !((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 3030 + priv->hwts_tx_en)) { 3031 + stmmac_tx_timer_arm(priv, queue); 3032 + } else { 3033 + desc = &tx_q->dma_tx[tx_q->cur_tx]; 3034 + tx_q->tx_count_frames = 0; 3035 + stmmac_set_tx_ic(priv, desc); 3036 + priv->xstats.tx_set_ic_bit++; 3037 + } 3038 + 3027 3039 /* We've used all descriptors we need for this skb, however, 3028 3040 * advance cur_tx so that it references a fresh descriptor. 3029 3041 * ndo_start_xmit will fill this descriptor the next time it's ··· 3053 3039 dev->stats.tx_bytes += skb->len; 3054 3040 priv->xstats.tx_tso_frames++; 3055 3041 priv->xstats.tx_tso_nfrags += nfrags; 3056 - 3057 - /* Manage tx mitigation */ 3058 - tx_q->tx_count_frames += nfrags + 1; 3059 - if (likely(priv->tx_coal_frames > tx_q->tx_count_frames) && 3060 - !(priv->synopsys_id >= DWMAC_CORE_4_00 && 3061 - (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 3062 - priv->hwts_tx_en)) { 3063 - stmmac_tx_timer_arm(priv, queue); 3064 - } else { 3065 - tx_q->tx_count_frames = 0; 3066 - stmmac_set_tx_ic(priv, desc); 3067 - priv->xstats.tx_set_ic_bit++; 3068 - } 3069 3042 3070 3043 if (priv->sarc_type) 3071 3044 stmmac_set_desc_sarc(priv, first, priv->sarc_type); ··· 3225 3224 /* Only the last descriptor gets to point to the skb. */ 3226 3225 tx_q->tx_skbuff[entry] = skb; 3227 3226 3227 + /* According to the coalesce parameter the IC bit for the latest 3228 + * segment is reset and the timer re-started to clean the tx status. 3229 + * This approach takes care about the fragments: desc is the first 3230 + * element in case of no SG. 3231 + */ 3232 + tx_q->tx_count_frames += nfrags + 1; 3233 + if (likely(priv->tx_coal_frames > tx_q->tx_count_frames) && 3234 + !((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 3235 + priv->hwts_tx_en)) { 3236 + stmmac_tx_timer_arm(priv, queue); 3237 + } else { 3238 + if (likely(priv->extend_desc)) 3239 + desc = &tx_q->dma_etx[entry].basic; 3240 + else 3241 + desc = &tx_q->dma_tx[entry]; 3242 + 3243 + tx_q->tx_count_frames = 0; 3244 + stmmac_set_tx_ic(priv, desc); 3245 + priv->xstats.tx_set_ic_bit++; 3246 + } 3247 + 3228 3248 /* We've used all descriptors we need for this skb, however, 3229 3249 * advance cur_tx so that it references a fresh descriptor. 3230 3250 * ndo_start_xmit will fill this descriptor the next time it's ··· 3280 3258 } 3281 3259 3282 3260 dev->stats.tx_bytes += skb->len; 3283 - 3284 - /* According to the coalesce parameter the IC bit for the latest 3285 - * segment is reset and the timer re-started to clean the tx status. 3286 - * This approach takes care about the fragments: desc is the first 3287 - * element in case of no SG. 3288 - */ 3289 - tx_q->tx_count_frames += nfrags + 1; 3290 - if (likely(priv->tx_coal_frames > tx_q->tx_count_frames) && 3291 - !(priv->synopsys_id >= DWMAC_CORE_4_00 && 3292 - (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 3293 - priv->hwts_tx_en)) { 3294 - stmmac_tx_timer_arm(priv, queue); 3295 - } else { 3296 - tx_q->tx_count_frames = 0; 3297 - stmmac_set_tx_ic(priv, desc); 3298 - priv->xstats.tx_set_ic_bit++; 3299 - } 3300 3261 3301 3262 if (priv->sarc_type) 3302 3263 stmmac_set_desc_sarc(priv, first, priv->sarc_type); ··· 3511 3506 if (unlikely(status & dma_own)) 3512 3507 break; 3513 3508 3514 - count++; 3515 - 3516 3509 rx_q->cur_rx = STMMAC_GET_ENTRY(rx_q->cur_rx, DMA_RX_SIZE); 3517 3510 next_entry = rx_q->cur_rx; 3518 3511 ··· 3537 3534 goto read_again; 3538 3535 if (unlikely(error)) { 3539 3536 dev_kfree_skb(skb); 3537 + count++; 3540 3538 continue; 3541 3539 } 3542 3540 ··· 3577 3573 skb = napi_alloc_skb(&ch->rx_napi, len); 3578 3574 if (!skb) { 3579 3575 priv->dev->stats.rx_dropped++; 3576 + count++; 3580 3577 continue; 3581 3578 } 3582 3579 ··· 3643 3638 3644 3639 priv->dev->stats.rx_packets++; 3645 3640 priv->dev->stats.rx_bytes += len; 3641 + count++; 3646 3642 } 3647 3643 3648 3644 if (status & rx_not_ls) {
+94 -40
drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c
··· 6 6 * Author: Jose Abreu <joabreu@synopsys.com> 7 7 */ 8 8 9 + #include <linux/bitrev.h> 9 10 #include <linux/completion.h> 11 + #include <linux/crc32.h> 10 12 #include <linux/ethtool.h> 11 13 #include <linux/ip.h> 12 14 #include <linux/phy.h> ··· 487 485 return -EOPNOTSUPP; 488 486 } 489 487 488 + static bool stmmac_hash_check(struct stmmac_priv *priv, unsigned char *addr) 489 + { 490 + int mc_offset = 32 - priv->hw->mcast_bits_log2; 491 + struct netdev_hw_addr *ha; 492 + u32 hash, hash_nr; 493 + 494 + /* First compute the hash for desired addr */ 495 + hash = bitrev32(~crc32_le(~0, addr, 6)) >> mc_offset; 496 + hash_nr = hash >> 5; 497 + hash = 1 << (hash & 0x1f); 498 + 499 + /* Now, check if it collides with any existing one */ 500 + netdev_for_each_mc_addr(ha, priv->dev) { 501 + u32 nr = bitrev32(~crc32_le(~0, ha->addr, ETH_ALEN)) >> mc_offset; 502 + if (((nr >> 5) == hash_nr) && ((1 << (nr & 0x1f)) == hash)) 503 + return false; 504 + } 505 + 506 + /* No collisions, address is good to go */ 507 + return true; 508 + } 509 + 510 + static bool stmmac_perfect_check(struct stmmac_priv *priv, unsigned char *addr) 511 + { 512 + struct netdev_hw_addr *ha; 513 + 514 + /* Check if it collides with any existing one */ 515 + netdev_for_each_uc_addr(ha, priv->dev) { 516 + if (!memcmp(ha->addr, addr, ETH_ALEN)) 517 + return false; 518 + } 519 + 520 + /* No collisions, address is good to go */ 521 + return true; 522 + } 523 + 490 524 static int stmmac_test_hfilt(struct stmmac_priv *priv) 491 525 { 492 - unsigned char gd_addr[ETH_ALEN] = {0x01, 0xee, 0xdd, 0xcc, 0xbb, 0xaa}; 493 - unsigned char bd_addr[ETH_ALEN] = {0x01, 0x01, 0x02, 0x03, 0x04, 0x05}; 526 + unsigned char gd_addr[ETH_ALEN] = {0xf1, 0xee, 0xdd, 0xcc, 0xbb, 0xaa}; 527 + unsigned char bd_addr[ETH_ALEN] = {0xf1, 0xff, 0xff, 0xff, 0xff, 0xff}; 494 528 struct stmmac_packet_attrs attr = { }; 495 - int ret; 529 + int ret, tries = 256; 496 530 497 531 ret = stmmac_filter_check(priv); 498 532 if (ret) 499 533 return ret; 500 534 501 535 if (netdev_mc_count(priv->dev) >= priv->hw->multicast_filter_bins) 536 + return -EOPNOTSUPP; 537 + 538 + while (--tries) { 539 + /* We only need to check the bd_addr for collisions */ 540 + bd_addr[ETH_ALEN - 1] = tries; 541 + if (stmmac_hash_check(priv, bd_addr)) 542 + break; 543 + } 544 + 545 + if (!tries) 502 546 return -EOPNOTSUPP; 503 547 504 548 ret = dev_mc_add(priv->dev, gd_addr); ··· 571 523 572 524 static int stmmac_test_pfilt(struct stmmac_priv *priv) 573 525 { 574 - unsigned char gd_addr[ETH_ALEN] = {0x00, 0x01, 0x44, 0x55, 0x66, 0x77}; 575 - unsigned char bd_addr[ETH_ALEN] = {0x08, 0x00, 0x22, 0x33, 0x44, 0x55}; 526 + unsigned char gd_addr[ETH_ALEN] = {0xf0, 0x01, 0x44, 0x55, 0x66, 0x77}; 527 + unsigned char bd_addr[ETH_ALEN] = {0xf0, 0xff, 0xff, 0xff, 0xff, 0xff}; 576 528 struct stmmac_packet_attrs attr = { }; 577 - int ret; 529 + int ret, tries = 256; 578 530 579 531 if (stmmac_filter_check(priv)) 532 + return -EOPNOTSUPP; 533 + if (netdev_uc_count(priv->dev) >= priv->hw->unicast_filter_entries) 534 + return -EOPNOTSUPP; 535 + 536 + while (--tries) { 537 + /* We only need to check the bd_addr for collisions */ 538 + bd_addr[ETH_ALEN - 1] = tries; 539 + if (stmmac_perfect_check(priv, bd_addr)) 540 + break; 541 + } 542 + 543 + if (!tries) 580 544 return -EOPNOTSUPP; 581 545 582 546 ret = dev_uc_add(priv->dev, gd_addr); ··· 613 553 return ret; 614 554 } 615 555 616 - static int stmmac_dummy_sync(struct net_device *netdev, const u8 *addr) 617 - { 618 - return 0; 619 - } 620 - 621 - static void stmmac_test_set_rx_mode(struct net_device *netdev) 622 - { 623 - /* As we are in test mode of ethtool we already own the rtnl lock 624 - * so no address will change from user. We can just call the 625 - * ndo_set_rx_mode() callback directly */ 626 - if (netdev->netdev_ops->ndo_set_rx_mode) 627 - netdev->netdev_ops->ndo_set_rx_mode(netdev); 628 - } 629 - 630 556 static int stmmac_test_mcfilt(struct stmmac_priv *priv) 631 557 { 632 - unsigned char uc_addr[ETH_ALEN] = {0x00, 0x01, 0x44, 0x55, 0x66, 0x77}; 633 - unsigned char mc_addr[ETH_ALEN] = {0x01, 0x01, 0x44, 0x55, 0x66, 0x77}; 558 + unsigned char uc_addr[ETH_ALEN] = {0xf0, 0xff, 0xff, 0xff, 0xff, 0xff}; 559 + unsigned char mc_addr[ETH_ALEN] = {0xf1, 0xff, 0xff, 0xff, 0xff, 0xff}; 634 560 struct stmmac_packet_attrs attr = { }; 635 - int ret; 561 + int ret, tries = 256; 636 562 637 563 if (stmmac_filter_check(priv)) 638 564 return -EOPNOTSUPP; 639 - if (!priv->hw->multicast_filter_bins) 565 + if (netdev_uc_count(priv->dev) >= priv->hw->unicast_filter_entries) 640 566 return -EOPNOTSUPP; 641 567 642 - /* Remove all MC addresses */ 643 - __dev_mc_unsync(priv->dev, NULL); 644 - stmmac_test_set_rx_mode(priv->dev); 568 + while (--tries) { 569 + /* We only need to check the mc_addr for collisions */ 570 + mc_addr[ETH_ALEN - 1] = tries; 571 + if (stmmac_hash_check(priv, mc_addr)) 572 + break; 573 + } 574 + 575 + if (!tries) 576 + return -EOPNOTSUPP; 645 577 646 578 ret = dev_uc_add(priv->dev, uc_addr); 647 579 if (ret) 648 - goto cleanup; 580 + return ret; 649 581 650 582 attr.dst = uc_addr; 651 583 ··· 654 602 655 603 cleanup: 656 604 dev_uc_del(priv->dev, uc_addr); 657 - __dev_mc_sync(priv->dev, stmmac_dummy_sync, NULL); 658 - stmmac_test_set_rx_mode(priv->dev); 659 605 return ret; 660 606 } 661 607 662 608 static int stmmac_test_ucfilt(struct stmmac_priv *priv) 663 609 { 664 - unsigned char uc_addr[ETH_ALEN] = {0x00, 0x01, 0x44, 0x55, 0x66, 0x77}; 665 - unsigned char mc_addr[ETH_ALEN] = {0x01, 0x01, 0x44, 0x55, 0x66, 0x77}; 610 + unsigned char uc_addr[ETH_ALEN] = {0xf0, 0xff, 0xff, 0xff, 0xff, 0xff}; 611 + unsigned char mc_addr[ETH_ALEN] = {0xf1, 0xff, 0xff, 0xff, 0xff, 0xff}; 666 612 struct stmmac_packet_attrs attr = { }; 667 - int ret; 613 + int ret, tries = 256; 668 614 669 615 if (stmmac_filter_check(priv)) 670 616 return -EOPNOTSUPP; 671 - if (!priv->hw->multicast_filter_bins) 617 + if (netdev_mc_count(priv->dev) >= priv->hw->multicast_filter_bins) 672 618 return -EOPNOTSUPP; 673 619 674 - /* Remove all UC addresses */ 675 - __dev_uc_unsync(priv->dev, NULL); 676 - stmmac_test_set_rx_mode(priv->dev); 620 + while (--tries) { 621 + /* We only need to check the uc_addr for collisions */ 622 + uc_addr[ETH_ALEN - 1] = tries; 623 + if (stmmac_perfect_check(priv, uc_addr)) 624 + break; 625 + } 626 + 627 + if (!tries) 628 + return -EOPNOTSUPP; 677 629 678 630 ret = dev_mc_add(priv->dev, mc_addr); 679 631 if (ret) 680 - goto cleanup; 632 + return ret; 681 633 682 634 attr.dst = mc_addr; 683 635 ··· 698 642 699 643 cleanup: 700 644 dev_mc_del(priv->dev, mc_addr); 701 - __dev_uc_sync(priv->dev, stmmac_dummy_sync, NULL); 702 - stmmac_test_set_rx_mode(priv->dev); 703 645 return ret; 704 646 } 705 647
+3 -3
drivers/net/usb/cdc_ncm.c
··· 578 578 /* read current mtu value from device */ 579 579 err = usbnet_read_cmd(dev, USB_CDC_GET_MAX_DATAGRAM_SIZE, 580 580 USB_TYPE_CLASS | USB_DIR_IN | USB_RECIP_INTERFACE, 581 - 0, iface_no, &max_datagram_size, 2); 582 - if (err < 0) { 581 + 0, iface_no, &max_datagram_size, sizeof(max_datagram_size)); 582 + if (err < sizeof(max_datagram_size)) { 583 583 dev_dbg(&dev->intf->dev, "GET_MAX_DATAGRAM_SIZE failed\n"); 584 584 goto out; 585 585 } ··· 590 590 max_datagram_size = cpu_to_le16(ctx->max_datagram_size); 591 591 err = usbnet_write_cmd(dev, USB_CDC_SET_MAX_DATAGRAM_SIZE, 592 592 USB_TYPE_CLASS | USB_DIR_OUT | USB_RECIP_INTERFACE, 593 - 0, iface_no, &max_datagram_size, 2); 593 + 0, iface_no, &max_datagram_size, sizeof(max_datagram_size)); 594 594 if (err < 0) 595 595 dev_dbg(&dev->intf->dev, "SET_MAX_DATAGRAM_SIZE failed\n"); 596 596
+1
drivers/net/usb/qmi_wwan.c
··· 1362 1362 {QMI_FIXED_INTF(0x413c, 0x81b6, 8)}, /* Dell Wireless 5811e */ 1363 1363 {QMI_FIXED_INTF(0x413c, 0x81b6, 10)}, /* Dell Wireless 5811e */ 1364 1364 {QMI_FIXED_INTF(0x413c, 0x81d7, 0)}, /* Dell Wireless 5821e */ 1365 + {QMI_FIXED_INTF(0x413c, 0x81e0, 0)}, /* Dell Wireless 5821e with eSIM support*/ 1365 1366 {QMI_FIXED_INTF(0x03f0, 0x4e1d, 8)}, /* HP lt4111 LTE/EV-DO/HSPA+ Gobi 4G Module */ 1366 1367 {QMI_FIXED_INTF(0x03f0, 0x9d1d, 1)}, /* HP lt4120 Snapdragon X5 LTE */ 1367 1368 {QMI_FIXED_INTF(0x22de, 0x9061, 3)}, /* WeTelecom WPD-600N */
+1 -1
drivers/nfc/fdp/i2c.c
··· 259 259 *fw_vsc_cfg, len); 260 260 261 261 if (r) { 262 - devm_kfree(dev, fw_vsc_cfg); 262 + devm_kfree(dev, *fw_vsc_cfg); 263 263 goto vsc_read_err; 264 264 } 265 265 } else {
+1
drivers/nfc/st21nfca/core.c
··· 708 708 NFC_PROTO_FELICA_MASK; 709 709 } else { 710 710 kfree_skb(nfcid_skb); 711 + nfcid_skb = NULL; 711 712 /* P2P in type A */ 712 713 r = nfc_hci_get_param(hdev, ST21NFCA_RF_READER_F_GATE, 713 714 ST21NFCA_RF_READER_F_NFCID1,
+2
drivers/nvme/host/multipath.c
··· 158 158 struct nvme_ns *ns; 159 159 160 160 mutex_lock(&ctrl->scan_lock); 161 + down_read(&ctrl->namespaces_rwsem); 161 162 list_for_each_entry(ns, &ctrl->namespaces, list) 162 163 if (nvme_mpath_clear_current_path(ns)) 163 164 kblockd_schedule_work(&ns->head->requeue_work); 165 + up_read(&ctrl->namespaces_rwsem); 164 166 mutex_unlock(&ctrl->scan_lock); 165 167 } 166 168
+8
drivers/nvme/host/rdma.c
··· 2133 2133 2134 2134 static void __exit nvme_rdma_cleanup_module(void) 2135 2135 { 2136 + struct nvme_rdma_ctrl *ctrl; 2137 + 2136 2138 nvmf_unregister_transport(&nvme_rdma_transport); 2137 2139 ib_unregister_client(&nvme_rdma_ib_client); 2140 + 2141 + mutex_lock(&nvme_rdma_ctrl_mutex); 2142 + list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) 2143 + nvme_delete_ctrl(&ctrl->ctrl); 2144 + mutex_unlock(&nvme_rdma_ctrl_mutex); 2145 + flush_workqueue(nvme_delete_wq); 2138 2146 } 2139 2147 2140 2148 module_init(nvme_rdma_init_module);
+1 -8
drivers/pwm/core.c
··· 472 472 if (err) 473 473 return err; 474 474 475 - /* 476 - * .apply might have to round some values in *state, if possible 477 - * read the actually implemented value back. 478 - */ 479 - if (chip->ops->get_state) 480 - chip->ops->get_state(chip, pwm, &pwm->state); 481 - else 482 - pwm->state = *state; 475 + pwm->state = *state; 483 476 } else { 484 477 /* 485 478 * FIXME: restore the initial state in case of error.
+1
drivers/pwm/pwm-bcm-iproc.c
··· 187 187 static const struct pwm_ops iproc_pwm_ops = { 188 188 .apply = iproc_pwmc_apply, 189 189 .get_state = iproc_pwmc_get_state, 190 + .owner = THIS_MODULE, 190 191 }; 191 192 192 193 static int iproc_pwmc_probe(struct platform_device *pdev)
+2 -2
drivers/scsi/lpfc/lpfc_nportdisc.c
··· 851 851 852 852 if (!(vport->fc_flag & FC_PT2PT)) { 853 853 /* Check config parameter use-adisc or FCP-2 */ 854 - if ((vport->cfg_use_adisc && (vport->fc_flag & FC_RSCN_MODE)) || 854 + if (vport->cfg_use_adisc && ((vport->fc_flag & FC_RSCN_MODE) || 855 855 ((ndlp->nlp_fcp_info & NLP_FCP_2_DEVICE) && 856 - (ndlp->nlp_type & NLP_FCP_TARGET))) { 856 + (ndlp->nlp_type & NLP_FCP_TARGET)))) { 857 857 spin_lock_irq(shost->host_lock); 858 858 ndlp->nlp_flag |= NLP_NPR_ADISC; 859 859 spin_unlock_irq(shost->host_lock);
+1 -1
drivers/scsi/lpfc/lpfc_sli.c
··· 7866 7866 if (sli4_hba->hdwq) { 7867 7867 for (eqidx = 0; eqidx < phba->cfg_irq_chann; eqidx++) { 7868 7868 eq = phba->sli4_hba.hba_eq_hdl[eqidx].eq; 7869 - if (eq->queue_id == sli4_hba->mbx_cq->assoc_qid) { 7869 + if (eq && eq->queue_id == sli4_hba->mbx_cq->assoc_qid) { 7870 7870 fpeq = eq; 7871 7871 break; 7872 7872 }
+3 -4
drivers/scsi/qla2xxx/qla_attr.c
··· 440 440 valid = 0; 441 441 if (ha->optrom_size == OPTROM_SIZE_2300 && start == 0) 442 442 valid = 1; 443 - else if (start == (ha->flt_region_boot * 4) || 444 - start == (ha->flt_region_fw * 4)) 445 - valid = 1; 446 443 else if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 447 444 valid = 1; 448 445 if (!valid) { ··· 486 489 "Writing flash region -- 0x%x/0x%x.\n", 487 490 ha->optrom_region_start, ha->optrom_region_size); 488 491 489 - ha->isp_ops->write_optrom(vha, ha->optrom_buffer, 492 + rval = ha->isp_ops->write_optrom(vha, ha->optrom_buffer, 490 493 ha->optrom_region_start, ha->optrom_region_size); 494 + if (rval) 495 + rval = -EIO; 491 496 break; 492 497 default: 493 498 rval = -EINVAL;
+3 -3
drivers/scsi/qla2xxx/qla_bsg.c
··· 253 253 srb_t *sp; 254 254 const char *type; 255 255 int req_sg_cnt, rsp_sg_cnt; 256 - int rval = (DRIVER_ERROR << 16); 256 + int rval = (DID_ERROR << 16); 257 257 uint16_t nextlid = 0; 258 258 259 259 if (bsg_request->msgcode == FC_BSG_RPT_ELS) { ··· 432 432 struct Scsi_Host *host = fc_bsg_to_shost(bsg_job); 433 433 scsi_qla_host_t *vha = shost_priv(host); 434 434 struct qla_hw_data *ha = vha->hw; 435 - int rval = (DRIVER_ERROR << 16); 435 + int rval = (DID_ERROR << 16); 436 436 int req_sg_cnt, rsp_sg_cnt; 437 437 uint16_t loop_id; 438 438 struct fc_port *fcport; ··· 1950 1950 struct Scsi_Host *host = fc_bsg_to_shost(bsg_job); 1951 1951 scsi_qla_host_t *vha = shost_priv(host); 1952 1952 struct qla_hw_data *ha = vha->hw; 1953 - int rval = (DRIVER_ERROR << 16); 1953 + int rval = (DID_ERROR << 16); 1954 1954 struct qla_mt_iocb_rqst_fx00 *piocb_rqst; 1955 1955 srb_t *sp; 1956 1956 int req_sg_cnt = 0, rsp_sg_cnt = 0;
+2 -1
drivers/scsi/qla2xxx/qla_mbx.c
··· 702 702 mcp->mb[2] = LSW(risc_addr); 703 703 mcp->mb[3] = 0; 704 704 mcp->mb[4] = 0; 705 + mcp->mb[11] = 0; 705 706 ha->flags.using_lr_setting = 0; 706 707 if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) || 707 708 IS_QLA27XX(ha) || IS_QLA28XX(ha)) { ··· 747 746 if (ha->flags.exchoffld_enabled) 748 747 mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD; 749 748 750 - mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1; 749 + mcp->out_mb |= MBX_4 | MBX_3 | MBX_2 | MBX_1 | MBX_11; 751 750 mcp->in_mb |= MBX_3 | MBX_2 | MBX_1; 752 751 } else { 753 752 mcp->mb[1] = LSW(risc_addr);
+4
drivers/scsi/qla2xxx/qla_os.c
··· 3535 3535 qla2x00_try_to_stop_firmware(vha); 3536 3536 } 3537 3537 3538 + /* Disable timer */ 3539 + if (vha->timer_active) 3540 + qla2x00_stop_timer(vha); 3541 + 3538 3542 /* Turn adapter off line */ 3539 3543 vha->flags.online = 0; 3540 3544
+2 -1
drivers/scsi/sd.c
··· 1166 1166 sector_t lba = sectors_to_logical(sdp, blk_rq_pos(rq)); 1167 1167 sector_t threshold; 1168 1168 unsigned int nr_blocks = sectors_to_logical(sdp, blk_rq_sectors(rq)); 1169 - bool dif, dix; 1170 1169 unsigned int mask = logical_to_sectors(sdp, 1) - 1; 1171 1170 bool write = rq_data_dir(rq) == WRITE; 1172 1171 unsigned char protect, fua; 1173 1172 blk_status_t ret; 1173 + unsigned int dif; 1174 + bool dix; 1174 1175 1175 1176 ret = scsi_init_io(cmd); 1176 1177 if (ret != BLK_STS_OK)
+4
drivers/scsi/ufs/ufs_bsg.c
··· 98 98 99 99 bsg_reply->reply_payload_rcv_len = 0; 100 100 101 + pm_runtime_get_sync(hba->dev); 102 + 101 103 msgcode = bsg_request->msgcode; 102 104 switch (msgcode) { 103 105 case UPIU_TRANSACTION_QUERY_REQ: ··· 136 134 137 135 break; 138 136 } 137 + 138 + pm_runtime_put_sync(hba->dev); 139 139 140 140 if (!desc_buff) 141 141 goto out;
+2 -1
drivers/target/iscsi/cxgbit/cxgbit_cm.c
··· 1831 1831 1832 1832 while (credits) { 1833 1833 struct sk_buff *p = cxgbit_sock_peek_wr(csk); 1834 - const u32 csum = (__force u32)p->csum; 1834 + u32 csum; 1835 1835 1836 1836 if (unlikely(!p)) { 1837 1837 pr_err("csk 0x%p,%u, cr %u,%u+%u, empty.\n", ··· 1840 1840 break; 1841 1841 } 1842 1842 1843 + csum = (__force u32)p->csum; 1843 1844 if (unlikely(credits < csum)) { 1844 1845 pr_warn("csk 0x%p,%u, cr %u,%u+%u, < %u.\n", 1845 1846 csk, csk->tid,
+28 -9
drivers/usb/cdns3/gadget.c
··· 2329 2329 writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, &regs->usb_conf); 2330 2330 2331 2331 cdns3_configure_dmult(priv_dev, NULL); 2332 - 2333 - cdns3_gadget_pullup(&priv_dev->gadget, 1); 2334 2332 } 2335 2333 2336 2334 /** ··· 2343 2345 { 2344 2346 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget); 2345 2347 unsigned long flags; 2348 + enum usb_device_speed max_speed = driver->max_speed; 2346 2349 2347 2350 spin_lock_irqsave(&priv_dev->lock, flags); 2348 2351 priv_dev->gadget_driver = driver; 2352 + 2353 + /* limit speed if necessary */ 2354 + max_speed = min(driver->max_speed, gadget->max_speed); 2355 + 2356 + switch (max_speed) { 2357 + case USB_SPEED_FULL: 2358 + writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf); 2359 + writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf); 2360 + break; 2361 + case USB_SPEED_HIGH: 2362 + writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf); 2363 + break; 2364 + case USB_SPEED_SUPER: 2365 + break; 2366 + default: 2367 + dev_err(priv_dev->dev, 2368 + "invalid maximum_speed parameter %d\n", 2369 + max_speed); 2370 + /* fall through */ 2371 + case USB_SPEED_UNKNOWN: 2372 + /* default to superspeed */ 2373 + max_speed = USB_SPEED_SUPER; 2374 + break; 2375 + } 2376 + 2349 2377 cdns3_gadget_config(priv_dev); 2350 2378 spin_unlock_irqrestore(&priv_dev->lock, flags); 2351 2379 return 0; ··· 2405 2381 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd); 2406 2382 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val, 2407 2383 !(val & EP_CMD_EPRST), 1, 100); 2384 + 2385 + priv_ep->flags &= ~EP_CLAIMED; 2408 2386 } 2409 2387 2410 2388 /* disable interrupt for device */ ··· 2601 2575 /* Check the maximum_speed parameter */ 2602 2576 switch (max_speed) { 2603 2577 case USB_SPEED_FULL: 2604 - writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf); 2605 - writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf); 2606 - break; 2607 2578 case USB_SPEED_HIGH: 2608 - writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf); 2609 - break; 2610 2579 case USB_SPEED_SUPER: 2611 2580 break; 2612 2581 default: ··· 2733 2712 2734 2713 /* disable interrupt for device */ 2735 2714 writel(0, &priv_dev->regs->usb_ien); 2736 - 2737 - cdns3_gadget_pullup(&priv_dev->gadget, 0); 2738 2715 2739 2716 return 0; 2740 2717 }
-1
drivers/usb/cdns3/host-export.h
··· 12 12 #ifdef CONFIG_USB_CDNS3_HOST 13 13 14 14 int cdns3_host_init(struct cdns3 *cdns); 15 - void cdns3_host_exit(struct cdns3 *cdns); 16 15 17 16 #else 18 17
+1
drivers/usb/cdns3/host.c
··· 12 12 #include <linux/platform_device.h> 13 13 #include "core.h" 14 14 #include "drd.h" 15 + #include "host-export.h" 15 16 16 17 static int __cdns3_host_init(struct cdns3 *cdns) 17 18 {
+5
drivers/usb/core/config.c
··· 348 348 349 349 /* Validate the wMaxPacketSize field */ 350 350 maxp = usb_endpoint_maxp(&endpoint->desc); 351 + if (maxp == 0) { 352 + dev_warn(ddev, "config %d interface %d altsetting %d endpoint 0x%X has wMaxPacketSize 0, skipping\n", 353 + cfgno, inum, asnum, d->bEndpointAddress); 354 + goto skip_to_next_endpoint_or_interface_descriptor; 355 + } 351 356 352 357 /* Find the highest legal maxpacket size for this endpoint */ 353 358 i = 0; /* additional transactions per microframe */
+1
drivers/usb/dwc3/Kconfig
··· 102 102 depends on ARCH_MESON || COMPILE_TEST 103 103 default USB_DWC3 104 104 select USB_ROLE_SWITCH 105 + select REGMAP_MMIO 105 106 help 106 107 Support USB2/3 functionality in Amlogic G12A platforms. 107 108 Say 'Y' or 'M' if you have one such device.
+1 -2
drivers/usb/dwc3/core.c
··· 312 312 313 313 reg = dwc3_readl(dwc->regs, DWC3_GFLADJ); 314 314 dft = reg & DWC3_GFLADJ_30MHZ_MASK; 315 - if (!dev_WARN_ONCE(dwc->dev, dft == dwc->fladj, 316 - "request value same as default, ignoring\n")) { 315 + if (dft != dwc->fladj) { 317 316 reg &= ~DWC3_GFLADJ_30MHZ_MASK; 318 317 reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | dwc->fladj; 319 318 dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
+1 -1
drivers/usb/dwc3/dwc3-pci.c
··· 258 258 259 259 ret = platform_device_add_properties(dwc->dwc3, p); 260 260 if (ret < 0) 261 - return ret; 261 + goto err; 262 262 263 263 ret = dwc3_pci_quirks(dwc); 264 264 if (ret)
+6
drivers/usb/dwc3/gadget.c
··· 707 707 708 708 dwc3_gadget_giveback(dep, req, -ESHUTDOWN); 709 709 } 710 + 711 + while (!list_empty(&dep->cancelled_list)) { 712 + req = next_request(&dep->cancelled_list); 713 + 714 + dwc3_gadget_giveback(dep, req, -ESHUTDOWN); 715 + } 710 716 } 711 717 712 718 /**
+4
drivers/usb/gadget/composite.c
··· 2170 2170 usb_ep_dequeue(cdev->gadget->ep0, cdev->os_desc_req); 2171 2171 2172 2172 kfree(cdev->os_desc_req->buf); 2173 + cdev->os_desc_req->buf = NULL; 2173 2174 usb_ep_free_request(cdev->gadget->ep0, cdev->os_desc_req); 2175 + cdev->os_desc_req = NULL; 2174 2176 } 2175 2177 if (cdev->req) { 2176 2178 if (cdev->setup_pending) 2177 2179 usb_ep_dequeue(cdev->gadget->ep0, cdev->req); 2178 2180 2179 2181 kfree(cdev->req->buf); 2182 + cdev->req->buf = NULL; 2180 2183 usb_ep_free_request(cdev->gadget->ep0, cdev->req); 2184 + cdev->req = NULL; 2181 2185 } 2182 2186 cdev->next_string_id = 0; 2183 2187 device_remove_file(&cdev->gadget->dev, &dev_attr_suspended);
+105 -5
drivers/usb/gadget/configfs.c
··· 61 61 bool use_os_desc; 62 62 char b_vendor_code; 63 63 char qw_sign[OS_STRING_QW_SIGN_LEN]; 64 + spinlock_t spinlock; 65 + bool unbind; 64 66 }; 65 67 66 68 static inline struct gadget_info *to_gadget_info(struct config_item *item) ··· 1246 1244 int ret; 1247 1245 1248 1246 /* the gi->lock is hold by the caller */ 1247 + gi->unbind = 0; 1249 1248 cdev->gadget = gadget; 1250 1249 set_gadget_data(gadget, cdev); 1251 1250 ret = composite_dev_prepare(composite, cdev); ··· 1379 1376 { 1380 1377 struct usb_composite_dev *cdev; 1381 1378 struct gadget_info *gi; 1379 + unsigned long flags; 1382 1380 1383 1381 /* the gi->lock is hold by the caller */ 1384 1382 1385 1383 cdev = get_gadget_data(gadget); 1386 1384 gi = container_of(cdev, struct gadget_info, cdev); 1385 + spin_lock_irqsave(&gi->spinlock, flags); 1386 + gi->unbind = 1; 1387 + spin_unlock_irqrestore(&gi->spinlock, flags); 1387 1388 1388 1389 kfree(otg_desc[0]); 1389 1390 otg_desc[0] = NULL; 1390 1391 purge_configs_funcs(gi); 1391 1392 composite_dev_cleanup(cdev); 1392 1393 usb_ep_autoconfig_reset(cdev->gadget); 1394 + spin_lock_irqsave(&gi->spinlock, flags); 1393 1395 cdev->gadget = NULL; 1394 1396 set_gadget_data(gadget, NULL); 1397 + spin_unlock_irqrestore(&gi->spinlock, flags); 1398 + } 1399 + 1400 + static int configfs_composite_setup(struct usb_gadget *gadget, 1401 + const struct usb_ctrlrequest *ctrl) 1402 + { 1403 + struct usb_composite_dev *cdev; 1404 + struct gadget_info *gi; 1405 + unsigned long flags; 1406 + int ret; 1407 + 1408 + cdev = get_gadget_data(gadget); 1409 + if (!cdev) 1410 + return 0; 1411 + 1412 + gi = container_of(cdev, struct gadget_info, cdev); 1413 + spin_lock_irqsave(&gi->spinlock, flags); 1414 + cdev = get_gadget_data(gadget); 1415 + if (!cdev || gi->unbind) { 1416 + spin_unlock_irqrestore(&gi->spinlock, flags); 1417 + return 0; 1418 + } 1419 + 1420 + ret = composite_setup(gadget, ctrl); 1421 + spin_unlock_irqrestore(&gi->spinlock, flags); 1422 + return ret; 1423 + } 1424 + 1425 + static void configfs_composite_disconnect(struct usb_gadget *gadget) 1426 + { 1427 + struct usb_composite_dev *cdev; 1428 + struct gadget_info *gi; 1429 + unsigned long flags; 1430 + 1431 + cdev = get_gadget_data(gadget); 1432 + if (!cdev) 1433 + return; 1434 + 1435 + gi = container_of(cdev, struct gadget_info, cdev); 1436 + spin_lock_irqsave(&gi->spinlock, flags); 1437 + cdev = get_gadget_data(gadget); 1438 + if (!cdev || gi->unbind) { 1439 + spin_unlock_irqrestore(&gi->spinlock, flags); 1440 + return; 1441 + } 1442 + 1443 + composite_disconnect(gadget); 1444 + spin_unlock_irqrestore(&gi->spinlock, flags); 1445 + } 1446 + 1447 + static void configfs_composite_suspend(struct usb_gadget *gadget) 1448 + { 1449 + struct usb_composite_dev *cdev; 1450 + struct gadget_info *gi; 1451 + unsigned long flags; 1452 + 1453 + cdev = get_gadget_data(gadget); 1454 + if (!cdev) 1455 + return; 1456 + 1457 + gi = container_of(cdev, struct gadget_info, cdev); 1458 + spin_lock_irqsave(&gi->spinlock, flags); 1459 + cdev = get_gadget_data(gadget); 1460 + if (!cdev || gi->unbind) { 1461 + spin_unlock_irqrestore(&gi->spinlock, flags); 1462 + return; 1463 + } 1464 + 1465 + composite_suspend(gadget); 1466 + spin_unlock_irqrestore(&gi->spinlock, flags); 1467 + } 1468 + 1469 + static void configfs_composite_resume(struct usb_gadget *gadget) 1470 + { 1471 + struct usb_composite_dev *cdev; 1472 + struct gadget_info *gi; 1473 + unsigned long flags; 1474 + 1475 + cdev = get_gadget_data(gadget); 1476 + if (!cdev) 1477 + return; 1478 + 1479 + gi = container_of(cdev, struct gadget_info, cdev); 1480 + spin_lock_irqsave(&gi->spinlock, flags); 1481 + cdev = get_gadget_data(gadget); 1482 + if (!cdev || gi->unbind) { 1483 + spin_unlock_irqrestore(&gi->spinlock, flags); 1484 + return; 1485 + } 1486 + 1487 + composite_resume(gadget); 1488 + spin_unlock_irqrestore(&gi->spinlock, flags); 1395 1489 } 1396 1490 1397 1491 static const struct usb_gadget_driver configfs_driver_template = { 1398 1492 .bind = configfs_composite_bind, 1399 1493 .unbind = configfs_composite_unbind, 1400 1494 1401 - .setup = composite_setup, 1402 - .reset = composite_disconnect, 1403 - .disconnect = composite_disconnect, 1495 + .setup = configfs_composite_setup, 1496 + .reset = configfs_composite_disconnect, 1497 + .disconnect = configfs_composite_disconnect, 1404 1498 1405 - .suspend = composite_suspend, 1406 - .resume = composite_resume, 1499 + .suspend = configfs_composite_suspend, 1500 + .resume = configfs_composite_resume, 1407 1501 1408 1502 .max_speed = USB_SPEED_SUPER, 1409 1503 .driver = {
+4 -2
drivers/usb/gadget/udc/atmel_usba_udc.c
··· 449 449 next_fifo_transaction(ep, req); 450 450 if (req->last_transaction) { 451 451 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); 452 - usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); 452 + if (ep_is_control(ep)) 453 + usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); 453 454 } else { 454 - usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 455 + if (ep_is_control(ep)) 456 + usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); 455 457 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); 456 458 } 457 459 }
+11
drivers/usb/gadget/udc/core.c
··· 98 98 if (ep->enabled) 99 99 goto out; 100 100 101 + /* UDC drivers can't handle endpoints with maxpacket size 0 */ 102 + if (usb_endpoint_maxp(ep->desc) == 0) { 103 + /* 104 + * We should log an error message here, but we can't call 105 + * dev_err() because there's no way to find the gadget 106 + * given only ep. 107 + */ 108 + ret = -EINVAL; 109 + goto out; 110 + } 111 + 101 112 ret = ep->ops->enable(ep, ep->desc); 102 113 if (ret) 103 114 goto out;
+1 -1
drivers/usb/gadget/udc/fsl_udc_core.c
··· 2576 2576 dma_pool_destroy(udc_controller->td_pool); 2577 2577 free_irq(udc_controller->irq, udc_controller); 2578 2578 iounmap(dr_regs); 2579 - if (pdata->operating_mode == FSL_USB2_DR_DEVICE) 2579 + if (res && (pdata->operating_mode == FSL_USB2_DR_DEVICE)) 2580 2580 release_mem_region(res->start, resource_size(res)); 2581 2581 2582 2582 /* free udc --wait for the release() finished */
+6 -5
drivers/usb/gadget/udc/renesas_usb3.c
··· 1544 1544 static bool usb3_std_req_set_address(struct renesas_usb3 *usb3, 1545 1545 struct usb_ctrlrequest *ctrl) 1546 1546 { 1547 - if (ctrl->wValue >= 128) 1547 + if (le16_to_cpu(ctrl->wValue) >= 128) 1548 1548 return true; /* stall */ 1549 1549 1550 - usb3_set_device_address(usb3, ctrl->wValue); 1550 + usb3_set_device_address(usb3, le16_to_cpu(ctrl->wValue)); 1551 1551 usb3_set_p0_con_for_no_data(usb3); 1552 1552 1553 1553 return false; ··· 1582 1582 struct renesas_usb3_ep *usb3_ep; 1583 1583 int num; 1584 1584 u16 status = 0; 1585 + __le16 tx_data; 1585 1586 1586 1587 switch (ctrl->bRequestType & USB_RECIP_MASK) { 1587 1588 case USB_RECIP_DEVICE: ··· 1605 1604 } 1606 1605 1607 1606 if (!stall) { 1608 - status = cpu_to_le16(status); 1607 + tx_data = cpu_to_le16(status); 1609 1608 dev_dbg(usb3_to_dev(usb3), "get_status: req = %p\n", 1610 1609 usb_req_to_usb3_req(usb3->ep0_req)); 1611 - usb3_pipe0_internal_xfer(usb3, &status, sizeof(status), 1610 + usb3_pipe0_internal_xfer(usb3, &tx_data, sizeof(tx_data), 1612 1611 usb3_pipe0_get_status_completion); 1613 1612 } 1614 1613 ··· 1773 1772 static bool usb3_std_req_set_configuration(struct renesas_usb3 *usb3, 1774 1773 struct usb_ctrlrequest *ctrl) 1775 1774 { 1776 - if (ctrl->wValue > 0) 1775 + if (le16_to_cpu(ctrl->wValue) > 0) 1777 1776 usb3_set_bit(usb3, USB_COM_CON_CONF, USB3_USB_COM_CON); 1778 1777 else 1779 1778 usb3_clear_bit(usb3, USB_COM_CON_CONF, USB3_USB_COM_CON);
+12 -12
drivers/usb/host/xhci-debugfs.c
··· 202 202 trb = &seg->trbs[i]; 203 203 dma = seg->dma + i * sizeof(*trb); 204 204 seq_printf(s, "%pad: %s\n", &dma, 205 - xhci_decode_trb(trb->generic.field[0], 206 - trb->generic.field[1], 207 - trb->generic.field[2], 208 - trb->generic.field[3])); 205 + xhci_decode_trb(le32_to_cpu(trb->generic.field[0]), 206 + le32_to_cpu(trb->generic.field[1]), 207 + le32_to_cpu(trb->generic.field[2]), 208 + le32_to_cpu(trb->generic.field[3]))); 209 209 } 210 210 } 211 211 ··· 263 263 xhci = hcd_to_xhci(bus_to_hcd(dev->udev->bus)); 264 264 slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx); 265 265 seq_printf(s, "%pad: %s\n", &dev->out_ctx->dma, 266 - xhci_decode_slot_context(slot_ctx->dev_info, 267 - slot_ctx->dev_info2, 268 - slot_ctx->tt_info, 269 - slot_ctx->dev_state)); 266 + xhci_decode_slot_context(le32_to_cpu(slot_ctx->dev_info), 267 + le32_to_cpu(slot_ctx->dev_info2), 268 + le32_to_cpu(slot_ctx->tt_info), 269 + le32_to_cpu(slot_ctx->dev_state))); 270 270 271 271 return 0; 272 272 } ··· 286 286 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, dci); 287 287 dma = dev->out_ctx->dma + dci * CTX_SIZE(xhci->hcc_params); 288 288 seq_printf(s, "%pad: %s\n", &dma, 289 - xhci_decode_ep_context(ep_ctx->ep_info, 290 - ep_ctx->ep_info2, 291 - ep_ctx->deq, 292 - ep_ctx->tx_info)); 289 + xhci_decode_ep_context(le32_to_cpu(ep_ctx->ep_info), 290 + le32_to_cpu(ep_ctx->ep_info2), 291 + le64_to_cpu(ep_ctx->deq), 292 + le32_to_cpu(ep_ctx->tx_info))); 293 293 } 294 294 295 295 return 0;
+2
drivers/usb/host/xhci-ring.c
··· 3330 3330 if (xhci_urb_suitable_for_idt(urb)) { 3331 3331 memcpy(&send_addr, urb->transfer_buffer, 3332 3332 trb_buff_len); 3333 + le64_to_cpus(&send_addr); 3333 3334 field |= TRB_IDT; 3334 3335 } 3335 3336 } ··· 3476 3475 if (xhci_urb_suitable_for_idt(urb)) { 3477 3476 memcpy(&addr, urb->transfer_buffer, 3478 3477 urb->transfer_buffer_length); 3478 + le64_to_cpus(&addr); 3479 3479 field |= TRB_IDT; 3480 3480 } else { 3481 3481 addr = (u64) urb->transfer_dma;
+45 -9
drivers/usb/host/xhci.c
··· 3071 3071 } 3072 3072 } 3073 3073 3074 + static void xhci_endpoint_disable(struct usb_hcd *hcd, 3075 + struct usb_host_endpoint *host_ep) 3076 + { 3077 + struct xhci_hcd *xhci; 3078 + struct xhci_virt_device *vdev; 3079 + struct xhci_virt_ep *ep; 3080 + struct usb_device *udev; 3081 + unsigned long flags; 3082 + unsigned int ep_index; 3083 + 3084 + xhci = hcd_to_xhci(hcd); 3085 + rescan: 3086 + spin_lock_irqsave(&xhci->lock, flags); 3087 + 3088 + udev = (struct usb_device *)host_ep->hcpriv; 3089 + if (!udev || !udev->slot_id) 3090 + goto done; 3091 + 3092 + vdev = xhci->devs[udev->slot_id]; 3093 + if (!vdev) 3094 + goto done; 3095 + 3096 + ep_index = xhci_get_endpoint_index(&host_ep->desc); 3097 + ep = &vdev->eps[ep_index]; 3098 + if (!ep) 3099 + goto done; 3100 + 3101 + /* wait for hub_tt_work to finish clearing hub TT */ 3102 + if (ep->ep_state & EP_CLEARING_TT) { 3103 + spin_unlock_irqrestore(&xhci->lock, flags); 3104 + schedule_timeout_uninterruptible(1); 3105 + goto rescan; 3106 + } 3107 + 3108 + if (ep->ep_state) 3109 + xhci_dbg(xhci, "endpoint disable with ep_state 0x%x\n", 3110 + ep->ep_state); 3111 + done: 3112 + host_ep->hcpriv = NULL; 3113 + spin_unlock_irqrestore(&xhci->lock, flags); 3114 + } 3115 + 3074 3116 /* 3075 3117 * Called after usb core issues a clear halt control message. 3076 3118 * The host side of the halt should already be cleared by a reset endpoint ··· 5280 5238 unsigned int ep_index; 5281 5239 unsigned long flags; 5282 5240 5283 - /* 5284 - * udev might be NULL if tt buffer is cleared during a failed device 5285 - * enumeration due to a halted control endpoint. Usb core might 5286 - * have allocated a new udev for the next enumeration attempt. 5287 - */ 5288 - 5289 5241 xhci = hcd_to_xhci(hcd); 5242 + 5243 + spin_lock_irqsave(&xhci->lock, flags); 5290 5244 udev = (struct usb_device *)ep->hcpriv; 5291 - if (!udev) 5292 - return; 5293 5245 slot_id = udev->slot_id; 5294 5246 ep_index = xhci_get_endpoint_index(&ep->desc); 5295 5247 5296 - spin_lock_irqsave(&xhci->lock, flags); 5297 5248 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_CLEARING_TT; 5298 5249 xhci_ring_doorbell_for_active_rings(xhci, slot_id, ep_index); 5299 5250 spin_unlock_irqrestore(&xhci->lock, flags); ··· 5323 5288 .free_streams = xhci_free_streams, 5324 5289 .add_endpoint = xhci_add_endpoint, 5325 5290 .drop_endpoint = xhci_drop_endpoint, 5291 + .endpoint_disable = xhci_endpoint_disable, 5326 5292 .endpoint_reset = xhci_endpoint_reset, 5327 5293 .check_bandwidth = xhci_check_bandwidth, 5328 5294 .reset_bandwidth = xhci_reset_bandwidth,
+7 -6
drivers/usb/misc/ldusb.c
··· 487 487 } 488 488 bytes_to_read = min(count, *actual_buffer); 489 489 if (bytes_to_read < *actual_buffer) 490 - dev_warn(&dev->intf->dev, "Read buffer overflow, %zd bytes dropped\n", 490 + dev_warn(&dev->intf->dev, "Read buffer overflow, %zu bytes dropped\n", 491 491 *actual_buffer-bytes_to_read); 492 492 493 493 /* copy one interrupt_in_buffer from ring_buffer into userspace */ ··· 495 495 retval = -EFAULT; 496 496 goto unlock_exit; 497 497 } 498 - dev->ring_tail = (dev->ring_tail+1) % ring_buffer_size; 499 - 500 498 retval = bytes_to_read; 501 499 502 500 spin_lock_irq(&dev->rbsl); 501 + dev->ring_tail = (dev->ring_tail + 1) % ring_buffer_size; 502 + 503 503 if (dev->buffer_overflow) { 504 504 dev->buffer_overflow = 0; 505 505 spin_unlock_irq(&dev->rbsl); ··· 562 562 /* write the data into interrupt_out_buffer from userspace */ 563 563 bytes_to_write = min(count, write_buffer_size*dev->interrupt_out_endpoint_size); 564 564 if (bytes_to_write < count) 565 - dev_warn(&dev->intf->dev, "Write buffer overflow, %zd bytes dropped\n", count-bytes_to_write); 566 - dev_dbg(&dev->intf->dev, "%s: count = %zd, bytes_to_write = %zd\n", 565 + dev_warn(&dev->intf->dev, "Write buffer overflow, %zu bytes dropped\n", 566 + count - bytes_to_write); 567 + dev_dbg(&dev->intf->dev, "%s: count = %zu, bytes_to_write = %zu\n", 567 568 __func__, count, bytes_to_write); 568 569 569 570 if (copy_from_user(dev->interrupt_out_buffer, buffer, bytes_to_write)) { ··· 581 580 1 << 8, 0, 582 581 dev->interrupt_out_buffer, 583 582 bytes_to_write, 584 - USB_CTRL_SET_TIMEOUT * HZ); 583 + USB_CTRL_SET_TIMEOUT); 585 584 if (retval < 0) 586 585 dev_err(&dev->intf->dev, 587 586 "Couldn't submit HID_REQ_SET_REPORT %d\n",
+1
drivers/usb/mtu3/mtu3_core.c
··· 16 16 #include <linux/platform_device.h> 17 17 18 18 #include "mtu3.h" 19 + #include "mtu3_dr.h" 19 20 #include "mtu3_debug.h" 20 21 #include "mtu3_trace.h" 21 22
+6 -6
drivers/usb/renesas_usbhs/common.c
··· 162 162 req->bRequest = (val >> 8) & 0xFF; 163 163 req->bRequestType = (val >> 0) & 0xFF; 164 164 165 - req->wValue = usbhs_read(priv, USBVAL); 166 - req->wIndex = usbhs_read(priv, USBINDX); 167 - req->wLength = usbhs_read(priv, USBLENG); 165 + req->wValue = cpu_to_le16(usbhs_read(priv, USBVAL)); 166 + req->wIndex = cpu_to_le16(usbhs_read(priv, USBINDX)); 167 + req->wLength = cpu_to_le16(usbhs_read(priv, USBLENG)); 168 168 } 169 169 170 170 void usbhs_usbreq_set_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req) 171 171 { 172 172 usbhs_write(priv, USBREQ, (req->bRequest << 8) | req->bRequestType); 173 - usbhs_write(priv, USBVAL, req->wValue); 174 - usbhs_write(priv, USBINDX, req->wIndex); 175 - usbhs_write(priv, USBLENG, req->wLength); 173 + usbhs_write(priv, USBVAL, le16_to_cpu(req->wValue)); 174 + usbhs_write(priv, USBINDX, le16_to_cpu(req->wIndex)); 175 + usbhs_write(priv, USBLENG, le16_to_cpu(req->wLength)); 176 176 177 177 usbhs_bset(priv, DCPCTR, SUREQ, SUREQ); 178 178 }
+2 -2
drivers/usb/renesas_usbhs/mod_gadget.c
··· 265 265 case USB_DEVICE_TEST_MODE: 266 266 usbhsg_recip_handler_std_control_done(priv, uep, ctrl); 267 267 udelay(100); 268 - usbhs_sys_set_test_mode(priv, le16_to_cpu(ctrl->wIndex >> 8)); 268 + usbhs_sys_set_test_mode(priv, le16_to_cpu(ctrl->wIndex) >> 8); 269 269 break; 270 270 default: 271 271 usbhsg_recip_handler_std_control_done(priv, uep, ctrl); ··· 315 315 struct usbhs_pipe *pipe = usbhsg_uep_to_pipe(dcp); 316 316 struct device *dev = usbhsg_gpriv_to_dev(gpriv); 317 317 struct usb_request *req; 318 - unsigned short *buf; 318 + __le16 *buf; 319 319 320 320 /* alloc new usb_request for recip */ 321 321 req = usb_ep_alloc_request(&dcp->ep, GFP_ATOMIC);
+10 -3
drivers/usb/serial/whiteheat.c
··· 559 559 560 560 command_port = port->serial->port[COMMAND_PORT]; 561 561 command_info = usb_get_serial_port_data(command_port); 562 + 563 + if (command_port->bulk_out_size < datasize + 1) 564 + return -EIO; 565 + 562 566 mutex_lock(&command_info->mutex); 563 567 command_info->command_finished = false; 564 568 ··· 636 632 struct device *dev = &port->dev; 637 633 struct whiteheat_port_settings port_settings; 638 634 unsigned int cflag = tty->termios.c_cflag; 635 + speed_t baud; 639 636 640 637 port_settings.port = port->port_number + 1; 641 638 ··· 697 692 dev_dbg(dev, "%s - XON = %2x, XOFF = %2x\n", __func__, port_settings.xon, port_settings.xoff); 698 693 699 694 /* get the baud rate wanted */ 700 - port_settings.baud = tty_get_baud_rate(tty); 701 - dev_dbg(dev, "%s - baud rate = %d\n", __func__, port_settings.baud); 695 + baud = tty_get_baud_rate(tty); 696 + port_settings.baud = cpu_to_le32(baud); 697 + dev_dbg(dev, "%s - baud rate = %u\n", __func__, baud); 702 698 703 699 /* fixme: should set validated settings */ 704 - tty_encode_baud_rate(tty, port_settings.baud, port_settings.baud); 700 + tty_encode_baud_rate(tty, baud, baud); 701 + 705 702 /* handle any settings that aren't specified in the tty structure */ 706 703 port_settings.lloop = 0; 707 704
+1 -1
drivers/usb/serial/whiteheat.h
··· 87 87 88 88 struct whiteheat_port_settings { 89 89 __u8 port; /* port number (1 to N) */ 90 - __u32 baud; /* any value 7 - 460800, firmware calculates 90 + __le32 baud; /* any value 7 - 460800, firmware calculates 91 91 best fit; arrives little endian */ 92 92 __u8 bits; /* 5, 6, 7, or 8 */ 93 93 __u8 stop; /* 1 or 2, default 1 (2 = 1.5 if bits = 5) */
-10
drivers/usb/storage/scsiglue.c
··· 68 68 static int slave_alloc (struct scsi_device *sdev) 69 69 { 70 70 struct us_data *us = host_to_us(sdev->host); 71 - int maxp; 72 71 73 72 /* 74 73 * Set the INQUIRY transfer length to 36. We don't use any of ··· 75 76 * less than 36 bytes. 76 77 */ 77 78 sdev->inquiry_len = 36; 78 - 79 - /* 80 - * USB has unusual scatter-gather requirements: the length of each 81 - * scatterlist element except the last must be divisible by the 82 - * Bulk maxpacket value. Fortunately this value is always a 83 - * power of 2. Inform the block layer about this requirement. 84 - */ 85 - maxp = usb_maxpacket(us->pusb_dev, us->recv_bulk_pipe, 0); 86 - blk_queue_virt_boundary(sdev->request_queue, maxp - 1); 87 79 88 80 /* 89 81 * Some host controllers may have alignment requirements.
-20
drivers/usb/storage/uas.c
··· 789 789 { 790 790 struct uas_dev_info *devinfo = 791 791 (struct uas_dev_info *)sdev->host->hostdata; 792 - int maxp; 793 792 794 793 sdev->hostdata = devinfo; 795 - 796 - /* 797 - * We have two requirements here. We must satisfy the requirements 798 - * of the physical HC and the demands of the protocol, as we 799 - * definitely want no additional memory allocation in this path 800 - * ruling out using bounce buffers. 801 - * 802 - * For a transmission on USB to continue we must never send 803 - * a package that is smaller than maxpacket. Hence the length of each 804 - * scatterlist element except the last must be divisible by the 805 - * Bulk maxpacket value. 806 - * If the HC does not ensure that through SG, 807 - * the upper layer must do that. We must assume nothing 808 - * about the capabilities off the HC, so we use the most 809 - * pessimistic requirement. 810 - */ 811 - 812 - maxp = usb_maxpacket(devinfo->udev, devinfo->data_in_pipe, 0); 813 - blk_queue_virt_boundary(sdev->request_queue, maxp - 1); 814 794 815 795 /* 816 796 * The protocol has no requirements on alignment in the strict sense.
+3
drivers/usb/usbip/vhci_tx.c
··· 147 147 } 148 148 149 149 kfree(iov); 150 + /* This is only for isochronous case */ 150 151 kfree(iso_buffer); 152 + iso_buffer = NULL; 153 + 151 154 usbip_dbg_vhci_tx("send txdata\n"); 152 155 153 156 total_size += txsize;
+4 -4
drivers/video/fbdev/c2p_core.h
··· 29 29 30 30 extern void c2p_unsupported(void); 31 31 32 - static inline u32 get_mask(unsigned int n) 32 + static __always_inline u32 get_mask(unsigned int n) 33 33 { 34 34 switch (n) { 35 35 case 1: ··· 57 57 * Transpose operations on 8 32-bit words 58 58 */ 59 59 60 - static inline void transp8(u32 d[], unsigned int n, unsigned int m) 60 + static __always_inline void transp8(u32 d[], unsigned int n, unsigned int m) 61 61 { 62 62 u32 mask = get_mask(n); 63 63 ··· 99 99 * Transpose operations on 4 32-bit words 100 100 */ 101 101 102 - static inline void transp4(u32 d[], unsigned int n, unsigned int m) 102 + static __always_inline void transp4(u32 d[], unsigned int n, unsigned int m) 103 103 { 104 104 u32 mask = get_mask(n); 105 105 ··· 126 126 * Transpose operations on 4 32-bit words (reverse order) 127 127 */ 128 128 129 - static inline void transp4x(u32 d[], unsigned int n, unsigned int m) 129 + static __always_inline void transp4x(u32 d[], unsigned int n, unsigned int m) 130 130 { 131 131 u32 mask = get_mask(n); 132 132
+5 -5
fs/ceph/caps.c
··· 1058 1058 1059 1059 dout("__ceph_remove_cap %p from %p\n", cap, &ci->vfs_inode); 1060 1060 1061 + /* remove from inode's cap rbtree, and clear auth cap */ 1062 + rb_erase(&cap->ci_node, &ci->i_caps); 1063 + if (ci->i_auth_cap == cap) 1064 + ci->i_auth_cap = NULL; 1065 + 1061 1066 /* remove from session list */ 1062 1067 spin_lock(&session->s_cap_lock); 1063 1068 if (session->s_cap_iterator == cap) { ··· 1095 1090 cap->cap_ino = ci->i_vino.ino; 1096 1091 1097 1092 spin_unlock(&session->s_cap_lock); 1098 - 1099 - /* remove from inode list */ 1100 - rb_erase(&cap->ci_node, &ci->i_caps); 1101 - if (ci->i_auth_cap == cap) 1102 - ci->i_auth_cap = NULL; 1103 1093 1104 1094 if (removed) 1105 1095 ceph_put_cap(mdsc, cap);
+8 -7
fs/ceph/dir.c
··· 1553 1553 { 1554 1554 int valid = 0; 1555 1555 struct dentry *parent; 1556 - struct inode *dir; 1556 + struct inode *dir, *inode; 1557 1557 1558 1558 if (flags & LOOKUP_RCU) { 1559 1559 parent = READ_ONCE(dentry->d_parent); 1560 1560 dir = d_inode_rcu(parent); 1561 1561 if (!dir) 1562 1562 return -ECHILD; 1563 + inode = d_inode_rcu(dentry); 1563 1564 } else { 1564 1565 parent = dget_parent(dentry); 1565 1566 dir = d_inode(parent); 1567 + inode = d_inode(dentry); 1566 1568 } 1567 1569 1568 1570 dout("d_revalidate %p '%pd' inode %p offset %lld\n", dentry, 1569 - dentry, d_inode(dentry), ceph_dentry(dentry)->offset); 1571 + dentry, inode, ceph_dentry(dentry)->offset); 1570 1572 1571 1573 /* always trust cached snapped dentries, snapdir dentry */ 1572 1574 if (ceph_snap(dir) != CEPH_NOSNAP) { 1573 1575 dout("d_revalidate %p '%pd' inode %p is SNAPPED\n", dentry, 1574 - dentry, d_inode(dentry)); 1576 + dentry, inode); 1575 1577 valid = 1; 1576 - } else if (d_really_is_positive(dentry) && 1577 - ceph_snap(d_inode(dentry)) == CEPH_SNAPDIR) { 1578 + } else if (inode && ceph_snap(inode) == CEPH_SNAPDIR) { 1578 1579 valid = 1; 1579 1580 } else { 1580 1581 valid = dentry_lease_is_valid(dentry, flags); 1581 1582 if (valid == -ECHILD) 1582 1583 return valid; 1583 1584 if (valid || dir_lease_is_valid(dir, dentry)) { 1584 - if (d_really_is_positive(dentry)) 1585 - valid = ceph_is_any_caps(d_inode(dentry)); 1585 + if (inode) 1586 + valid = ceph_is_any_caps(inode); 1586 1587 else 1587 1588 valid = 1; 1588 1589 }
+13 -2
fs/ceph/file.c
··· 462 462 err = ceph_security_init_secctx(dentry, mode, &as_ctx); 463 463 if (err < 0) 464 464 goto out_ctx; 465 + } else if (!d_in_lookup(dentry)) { 466 + /* If it's not being looked up, it's negative */ 467 + return -ENOENT; 465 468 } 466 469 467 470 /* do the open */ ··· 1959 1956 if (ceph_test_mount_opt(src_fsc, NOCOPYFROM)) 1960 1957 return -EOPNOTSUPP; 1961 1958 1959 + /* 1960 + * Striped file layouts require that we copy partial objects, but the 1961 + * OSD copy-from operation only supports full-object copies. Limit 1962 + * this to non-striped file layouts for now. 1963 + */ 1962 1964 if ((src_ci->i_layout.stripe_unit != dst_ci->i_layout.stripe_unit) || 1963 - (src_ci->i_layout.stripe_count != dst_ci->i_layout.stripe_count) || 1964 - (src_ci->i_layout.object_size != dst_ci->i_layout.object_size)) 1965 + (src_ci->i_layout.stripe_count != 1) || 1966 + (dst_ci->i_layout.stripe_count != 1) || 1967 + (src_ci->i_layout.object_size != dst_ci->i_layout.object_size)) { 1968 + dout("Invalid src/dst files layout\n"); 1965 1969 return -EOPNOTSUPP; 1970 + } 1966 1971 1967 1972 if (len < src_ci->i_layout.object_size) 1968 1973 return -EOPNOTSUPP; /* no remote copy will be done */
+1
fs/ceph/inode.c
··· 1434 1434 dout(" final dn %p\n", dn); 1435 1435 } else if ((req->r_op == CEPH_MDS_OP_LOOKUPSNAP || 1436 1436 req->r_op == CEPH_MDS_OP_MKSNAP) && 1437 + test_bit(CEPH_MDS_R_PARENT_LOCKED, &req->r_req_flags) && 1437 1438 !test_bit(CEPH_MDS_R_ABORTED, &req->r_req_flags)) { 1438 1439 struct inode *dir = req->r_parent; 1439 1440
+10 -1
fs/ceph/super.c
··· 268 268 } 269 269 break; 270 270 case Opt_fscache_uniq: 271 + #ifdef CONFIG_CEPH_FSCACHE 271 272 kfree(fsopt->fscache_uniq); 272 273 fsopt->fscache_uniq = kstrndup(argstr[0].from, 273 274 argstr[0].to-argstr[0].from, ··· 277 276 return -ENOMEM; 278 277 fsopt->flags |= CEPH_MOUNT_OPT_FSCACHE; 279 278 break; 280 - /* misc */ 279 + #else 280 + pr_err("fscache support is disabled\n"); 281 + return -EINVAL; 282 + #endif 281 283 case Opt_wsize: 282 284 if (intval < (int)PAGE_SIZE || intval > CEPH_MAX_WRITE_SIZE) 283 285 return -EINVAL; ··· 357 353 fsopt->flags &= ~CEPH_MOUNT_OPT_INO32; 358 354 break; 359 355 case Opt_fscache: 356 + #ifdef CONFIG_CEPH_FSCACHE 360 357 fsopt->flags |= CEPH_MOUNT_OPT_FSCACHE; 361 358 kfree(fsopt->fscache_uniq); 362 359 fsopt->fscache_uniq = NULL; 363 360 break; 361 + #else 362 + pr_err("fscache support is disabled\n"); 363 + return -EINVAL; 364 + #endif 364 365 case Opt_nofscache: 365 366 fsopt->flags &= ~CEPH_MOUNT_OPT_FSCACHE; 366 367 kfree(fsopt->fscache_uniq);
+2 -1
fs/cifs/smb2ops.c
··· 4084 4084 4085 4085 kfree(dw->ppages); 4086 4086 cifs_small_buf_release(dw->buf); 4087 + kfree(dw); 4087 4088 } 4088 4089 4089 4090 ··· 4158 4157 dw->server = server; 4159 4158 dw->ppages = pages; 4160 4159 dw->len = len; 4161 - queue_work(cifsiod_wq, &dw->decrypt); 4160 + queue_work(decrypt_wq, &dw->decrypt); 4162 4161 *num_mids = 0; /* worker thread takes care of finding mid */ 4163 4162 return -1; 4164 4163 }
+6 -3
fs/fs-writeback.c
··· 576 576 spin_unlock(&inode->i_lock); 577 577 578 578 /* 579 - * A dying wb indicates that the memcg-blkcg mapping has changed 580 - * and a new wb is already serving the memcg. Switch immediately. 579 + * A dying wb indicates that either the blkcg associated with the 580 + * memcg changed or the associated memcg is dying. In the first 581 + * case, a replacement wb should already be available and we should 582 + * refresh the wb immediately. In the second case, trying to 583 + * refresh will keep failing. 581 584 */ 582 - if (unlikely(wb_dying(wbc->wb))) 585 + if (unlikely(wb_dying(wbc->wb) && !css_is_dying(wbc->wb->memcg_css))) 583 586 inode_switch_wbs(inode, wbc->wb_id); 584 587 } 585 588 EXPORT_SYMBOL_GPL(wbc_attach_and_unlock_inode);
+91 -45
fs/ocfs2/file.c
··· 2098 2098 return 0; 2099 2099 } 2100 2100 2101 - static int ocfs2_prepare_inode_for_refcount(struct inode *inode, 2102 - struct file *file, 2103 - loff_t pos, size_t count, 2104 - int *meta_level) 2101 + static int ocfs2_inode_lock_for_extent_tree(struct inode *inode, 2102 + struct buffer_head **di_bh, 2103 + int meta_level, 2104 + int overwrite_io, 2105 + int write_sem, 2106 + int wait) 2105 2107 { 2106 - int ret; 2107 - struct buffer_head *di_bh = NULL; 2108 - u32 cpos = pos >> OCFS2_SB(inode->i_sb)->s_clustersize_bits; 2109 - u32 clusters = 2110 - ocfs2_clusters_for_bytes(inode->i_sb, pos + count) - cpos; 2108 + int ret = 0; 2111 2109 2112 - ret = ocfs2_inode_lock(inode, &di_bh, 1); 2113 - if (ret) { 2114 - mlog_errno(ret); 2110 + if (wait) 2111 + ret = ocfs2_inode_lock(inode, NULL, meta_level); 2112 + else 2113 + ret = ocfs2_try_inode_lock(inode, 2114 + overwrite_io ? NULL : di_bh, meta_level); 2115 + if (ret < 0) 2115 2116 goto out; 2117 + 2118 + if (wait) { 2119 + if (write_sem) 2120 + down_write(&OCFS2_I(inode)->ip_alloc_sem); 2121 + else 2122 + down_read(&OCFS2_I(inode)->ip_alloc_sem); 2123 + } else { 2124 + if (write_sem) 2125 + ret = down_write_trylock(&OCFS2_I(inode)->ip_alloc_sem); 2126 + else 2127 + ret = down_read_trylock(&OCFS2_I(inode)->ip_alloc_sem); 2128 + 2129 + if (!ret) { 2130 + ret = -EAGAIN; 2131 + goto out_unlock; 2132 + } 2116 2133 } 2117 2134 2118 - *meta_level = 1; 2119 - 2120 - ret = ocfs2_refcount_cow(inode, di_bh, cpos, clusters, UINT_MAX); 2121 - if (ret) 2122 - mlog_errno(ret); 2123 - out: 2124 - brelse(di_bh); 2125 2135 return ret; 2136 + 2137 + out_unlock: 2138 + brelse(*di_bh); 2139 + ocfs2_inode_unlock(inode, meta_level); 2140 + out: 2141 + return ret; 2142 + } 2143 + 2144 + static void ocfs2_inode_unlock_for_extent_tree(struct inode *inode, 2145 + struct buffer_head **di_bh, 2146 + int meta_level, 2147 + int write_sem) 2148 + { 2149 + if (write_sem) 2150 + up_write(&OCFS2_I(inode)->ip_alloc_sem); 2151 + else 2152 + up_read(&OCFS2_I(inode)->ip_alloc_sem); 2153 + 2154 + brelse(*di_bh); 2155 + *di_bh = NULL; 2156 + 2157 + if (meta_level >= 0) 2158 + ocfs2_inode_unlock(inode, meta_level); 2126 2159 } 2127 2160 2128 2161 static int ocfs2_prepare_inode_for_write(struct file *file, 2129 2162 loff_t pos, size_t count, int wait) 2130 2163 { 2131 2164 int ret = 0, meta_level = 0, overwrite_io = 0; 2165 + int write_sem = 0; 2132 2166 struct dentry *dentry = file->f_path.dentry; 2133 2167 struct inode *inode = d_inode(dentry); 2134 2168 struct buffer_head *di_bh = NULL; 2169 + u32 cpos; 2170 + u32 clusters; 2135 2171 2136 2172 /* 2137 2173 * We start with a read level meta lock and only jump to an ex 2138 2174 * if we need to make modifications here. 2139 2175 */ 2140 2176 for(;;) { 2141 - if (wait) 2142 - ret = ocfs2_inode_lock(inode, NULL, meta_level); 2143 - else 2144 - ret = ocfs2_try_inode_lock(inode, 2145 - overwrite_io ? NULL : &di_bh, meta_level); 2177 + ret = ocfs2_inode_lock_for_extent_tree(inode, 2178 + &di_bh, 2179 + meta_level, 2180 + overwrite_io, 2181 + write_sem, 2182 + wait); 2146 2183 if (ret < 0) { 2147 - meta_level = -1; 2148 2184 if (ret != -EAGAIN) 2149 2185 mlog_errno(ret); 2150 2186 goto out; ··· 2192 2156 */ 2193 2157 if (!wait && !overwrite_io) { 2194 2158 overwrite_io = 1; 2195 - if (!down_read_trylock(&OCFS2_I(inode)->ip_alloc_sem)) { 2196 - ret = -EAGAIN; 2197 - goto out_unlock; 2198 - } 2199 2159 2200 2160 ret = ocfs2_overwrite_io(inode, di_bh, pos, count); 2201 - brelse(di_bh); 2202 - di_bh = NULL; 2203 - up_read(&OCFS2_I(inode)->ip_alloc_sem); 2204 2161 if (ret < 0) { 2205 2162 if (ret != -EAGAIN) 2206 2163 mlog_errno(ret); ··· 2212 2183 * set inode->i_size at the end of a write. */ 2213 2184 if (should_remove_suid(dentry)) { 2214 2185 if (meta_level == 0) { 2215 - ocfs2_inode_unlock(inode, meta_level); 2186 + ocfs2_inode_unlock_for_extent_tree(inode, 2187 + &di_bh, 2188 + meta_level, 2189 + write_sem); 2216 2190 meta_level = 1; 2217 2191 continue; 2218 2192 } ··· 2229 2197 2230 2198 ret = ocfs2_check_range_for_refcount(inode, pos, count); 2231 2199 if (ret == 1) { 2232 - ocfs2_inode_unlock(inode, meta_level); 2233 - meta_level = -1; 2200 + ocfs2_inode_unlock_for_extent_tree(inode, 2201 + &di_bh, 2202 + meta_level, 2203 + write_sem); 2204 + ret = ocfs2_inode_lock_for_extent_tree(inode, 2205 + &di_bh, 2206 + meta_level, 2207 + overwrite_io, 2208 + 1, 2209 + wait); 2210 + write_sem = 1; 2211 + if (ret < 0) { 2212 + if (ret != -EAGAIN) 2213 + mlog_errno(ret); 2214 + goto out; 2215 + } 2234 2216 2235 - ret = ocfs2_prepare_inode_for_refcount(inode, 2236 - file, 2237 - pos, 2238 - count, 2239 - &meta_level); 2217 + cpos = pos >> OCFS2_SB(inode->i_sb)->s_clustersize_bits; 2218 + clusters = 2219 + ocfs2_clusters_for_bytes(inode->i_sb, pos + count) - cpos; 2220 + ret = ocfs2_refcount_cow(inode, di_bh, cpos, clusters, UINT_MAX); 2240 2221 } 2241 2222 2242 2223 if (ret < 0) { 2243 - mlog_errno(ret); 2224 + if (ret != -EAGAIN) 2225 + mlog_errno(ret); 2244 2226 goto out_unlock; 2245 2227 } 2246 2228 ··· 2265 2219 trace_ocfs2_prepare_inode_for_write(OCFS2_I(inode)->ip_blkno, 2266 2220 pos, count, wait); 2267 2221 2268 - brelse(di_bh); 2269 - 2270 - if (meta_level >= 0) 2271 - ocfs2_inode_unlock(inode, meta_level); 2222 + ocfs2_inode_unlock_for_extent_tree(inode, 2223 + &di_bh, 2224 + meta_level, 2225 + write_sem); 2272 2226 2273 2227 out: 2274 2228 return ret;
+13
include/drm/drm_gem_shmem_helper.h
··· 44 44 */ 45 45 unsigned int pages_use_count; 46 46 47 + /** 48 + * @madv: State for madvise 49 + * 50 + * 0 is active/inuse. 51 + * A negative value is the object is purged. 52 + * Positive values are driver specific and not used by the helpers. 53 + */ 47 54 int madv; 55 + 56 + /** 57 + * @madv_list: List entry for madvise tracking 58 + * 59 + * Typically used by drivers to track purgeable objects 60 + */ 48 61 struct list_head madv_list; 49 62 50 63 /**
+2 -1
include/drm/drm_self_refresh_helper.h
··· 13 13 14 14 void drm_self_refresh_helper_alter_state(struct drm_atomic_state *state); 15 15 void drm_self_refresh_helper_update_avg_times(struct drm_atomic_state *state, 16 - unsigned int commit_time_ms); 16 + unsigned int commit_time_ms, 17 + unsigned int new_self_refresh_mask); 17 18 18 19 int drm_self_refresh_helper_init(struct drm_crtc *crtc); 19 20 void drm_self_refresh_helper_cleanup(struct drm_crtc *crtc);
+2 -2
include/linux/bpf.h
··· 684 684 void bpf_map_put(struct bpf_map *map); 685 685 int bpf_map_charge_memlock(struct bpf_map *map, u32 pages); 686 686 void bpf_map_uncharge_memlock(struct bpf_map *map, u32 pages); 687 - int bpf_map_charge_init(struct bpf_map_memory *mem, size_t size); 687 + int bpf_map_charge_init(struct bpf_map_memory *mem, u64 size); 688 688 void bpf_map_charge_finish(struct bpf_map_memory *mem); 689 689 void bpf_map_charge_move(struct bpf_map_memory *dst, 690 690 struct bpf_map_memory *src); 691 - void *bpf_map_area_alloc(size_t size, int numa_node); 691 + void *bpf_map_area_alloc(u64 size, int numa_node); 692 692 void bpf_map_area_free(void *base); 693 693 void bpf_map_init_from_attr(struct bpf_map *map, union bpf_attr *attr); 694 694
+1 -1
include/linux/idr.h
··· 185 185 * is convenient for a "not found" value. 186 186 */ 187 187 #define idr_for_each_entry(idr, entry, id) \ 188 - for (id = 0; ((entry) = idr_get_next(idr, &(id))) != NULL; ++id) 188 + for (id = 0; ((entry) = idr_get_next(idr, &(id))) != NULL; id += 1U) 189 189 190 190 /** 191 191 * idr_for_each_entry_ul() - Iterate over an IDR's elements of a given type.
-5
include/linux/mm.h
··· 695 695 696 696 extern void kvfree(const void *addr); 697 697 698 - static inline atomic_t *compound_mapcount_ptr(struct page *page) 699 - { 700 - return &page[1].compound_mapcount; 701 - } 702 - 703 698 static inline int compound_mapcount(struct page *page) 704 699 { 705 700 VM_BUG_ON_PAGE(!PageCompound(page), page);
+5
include/linux/mm_types.h
··· 221 221 #endif 222 222 } _struct_page_alignment; 223 223 224 + static inline atomic_t *compound_mapcount_ptr(struct page *page) 225 + { 226 + return &page[1].compound_mapcount; 227 + } 228 + 224 229 /* 225 230 * Used for sizing the vmemmap region on some architectures 226 231 */
+18 -2
include/linux/page-flags.h
··· 622 622 * 623 623 * Unlike PageTransCompound, this is safe to be called only while 624 624 * split_huge_pmd() cannot run from under us, like if protected by the 625 - * MMU notifier, otherwise it may result in page->_mapcount < 0 false 625 + * MMU notifier, otherwise it may result in page->_mapcount check false 626 626 * positives. 627 + * 628 + * We have to treat page cache THP differently since every subpage of it 629 + * would get _mapcount inc'ed once it is PMD mapped. But, it may be PTE 630 + * mapped in the current process so comparing subpage's _mapcount to 631 + * compound_mapcount to filter out PTE mapped case. 627 632 */ 628 633 static inline int PageTransCompoundMap(struct page *page) 629 634 { 630 - return PageTransCompound(page) && atomic_read(&page->_mapcount) < 0; 635 + struct page *head; 636 + 637 + if (!PageTransCompound(page)) 638 + return 0; 639 + 640 + if (PageAnon(page)) 641 + return atomic_read(&page->_mapcount) < 0; 642 + 643 + head = compound_head(page); 644 + /* File THP is PMD mapped and not PTE mapped */ 645 + return atomic_read(&page->_mapcount) == 646 + atomic_read(compound_mapcount_ptr(head)); 631 647 } 632 648 633 649 /*
-18
include/linux/radix-tree.h
··· 316 316 } 317 317 318 318 /** 319 - * radix_tree_iter_find - find a present entry 320 - * @root: radix tree root 321 - * @iter: iterator state 322 - * @index: start location 323 - * 324 - * This function returns the slot containing the entry with the lowest index 325 - * which is at least @index. If @index is larger than any present entry, this 326 - * function returns NULL. The @iter is updated to describe the entry found. 327 - */ 328 - static inline void __rcu ** 329 - radix_tree_iter_find(const struct radix_tree_root *root, 330 - struct radix_tree_iter *iter, unsigned long index) 331 - { 332 - radix_tree_iter_init(iter, index); 333 - return radix_tree_next_chunk(root, iter, 0); 334 - } 335 - 336 - /** 337 319 * radix_tree_iter_retry - retry this chunk of the iteration 338 320 * @iter: iterator state 339 321 *
+6 -3
include/linux/skmsg.h
··· 140 140 } 141 141 } 142 142 143 + static inline u32 sk_msg_iter_dist(u32 start, u32 end) 144 + { 145 + return end >= start ? end - start : end + (MAX_MSG_FRAGS - start); 146 + } 147 + 143 148 #define sk_msg_iter_var_prev(var) \ 144 149 do { \ 145 150 if (var == 0) \ ··· 204 199 if (sk_msg_full(msg)) 205 200 return MAX_MSG_FRAGS; 206 201 207 - return msg->sg.end >= msg->sg.start ? 208 - msg->sg.end - msg->sg.start : 209 - msg->sg.end + (MAX_MSG_FRAGS - msg->sg.start); 202 + return sk_msg_iter_dist(msg->sg.start, msg->sg.end); 210 203 } 211 204 212 205 static inline struct scatterlist *sk_msg_elem(struct sk_msg *msg, int which)
+1 -2
include/net/bonding.h
··· 159 159 unsigned long target_last_arp_rx[BOND_MAX_ARP_TARGETS]; 160 160 s8 link; /* one of BOND_LINK_XXXX */ 161 161 s8 link_new_state; /* one of BOND_LINK_XXXX */ 162 - s8 new_link; 163 162 u8 backup:1, /* indicates backup slave. Value corresponds with 164 163 BOND_STATE_ACTIVE and BOND_STATE_BACKUP */ 165 164 inactive:1, /* indicates inactive slave */ ··· 548 549 549 550 static inline void bond_commit_link_state(struct slave *slave, bool notify) 550 551 { 551 - if (slave->link == slave->link_new_state) 552 + if (slave->link_new_state == BOND_LINK_NOCHANGE) 552 553 return; 553 554 554 555 slave->link = slave->link_new_state;
+2 -2
include/net/fq_impl.h
··· 313 313 fq->limit = 8192; 314 314 fq->memory_limit = 16 << 20; /* 16 MBytes */ 315 315 316 - fq->flows = kcalloc(fq->flows_cnt, sizeof(fq->flows[0]), GFP_KERNEL); 316 + fq->flows = kvcalloc(fq->flows_cnt, sizeof(fq->flows[0]), GFP_KERNEL); 317 317 if (!fq->flows) 318 318 return -ENOMEM; 319 319 ··· 331 331 for (i = 0; i < fq->flows_cnt; i++) 332 332 fq_flow_reset(fq, &fq->flows[i], free_func); 333 333 334 - kfree(fq->flows); 334 + kvfree(fq->flows); 335 335 fq->flows = NULL; 336 336 } 337 337
+2 -2
include/net/neighbour.h
··· 439 439 { 440 440 unsigned long now = jiffies; 441 441 442 - if (neigh->used != now) 443 - neigh->used = now; 442 + if (READ_ONCE(neigh->used) != now) 443 + WRITE_ONCE(neigh->used, now); 444 444 if (!(neigh->nud_state&(NUD_CONNECTED|NUD_DELAY|NUD_PROBE))) 445 445 return __neigh_event_send(neigh, skb); 446 446 return 0;
+2 -1
include/net/netfilter/nf_tables.h
··· 820 820 */ 821 821 struct nft_expr { 822 822 const struct nft_expr_ops *ops; 823 - unsigned char data[]; 823 + unsigned char data[] 824 + __attribute__((aligned(__alignof__(u64)))); 824 825 }; 825 826 826 827 static inline void *nft_expr_priv(const struct nft_expr *expr)
+4
include/net/sch_generic.h
··· 15 15 #include <linux/mutex.h> 16 16 #include <linux/rwsem.h> 17 17 #include <linux/atomic.h> 18 + #include <linux/hashtable.h> 18 19 #include <net/gen_stats.h> 19 20 #include <net/rtnetlink.h> 20 21 #include <net/flow_offload.h> ··· 363 362 bool deleting; 364 363 refcount_t refcnt; 365 364 struct rcu_head rcu; 365 + struct hlist_node destroy_ht_node; 366 366 }; 367 367 368 368 struct qdisc_skb_cb { ··· 416 414 struct list_head filter_chain_list; 417 415 } chain0; 418 416 struct rcu_head rcu; 417 + DECLARE_HASHTABLE(proto_destroy_ht, 7); 418 + struct mutex proto_destroy_lock; /* Lock for proto_destroy hashtable. */ 419 419 }; 420 420 421 421 #ifdef CONFIG_PROVE_LOCKING
+2 -2
include/net/sock.h
··· 2341 2341 2342 2342 return kt; 2343 2343 #else 2344 - return sk->sk_stamp; 2344 + return READ_ONCE(sk->sk_stamp); 2345 2345 #endif 2346 2346 } 2347 2347 ··· 2352 2352 sk->sk_stamp = kt; 2353 2353 write_sequnlock(&sk->sk_stamp_seq); 2354 2354 #else 2355 - sk->sk_stamp = kt; 2355 + WRITE_ONCE(sk->sk_stamp, kt); 2356 2356 #endif 2357 2357 } 2358 2358
+5
include/net/tls.h
··· 40 40 #include <linux/socket.h> 41 41 #include <linux/tcp.h> 42 42 #include <linux/skmsg.h> 43 + #include <linux/mutex.h> 43 44 #include <linux/netdevice.h> 44 45 #include <linux/rcupdate.h> 45 46 ··· 248 247 249 248 bool in_tcp_sendpages; 250 249 bool pending_open_record_frags; 250 + 251 + struct mutex tx_lock; /* protects partially_sent_* fields and 252 + * per-type TX fields 253 + */ 251 254 unsigned long flags; 252 255 253 256 /* cache cold stuff */
+1 -1
include/uapi/linux/can.h
··· 1 - /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ 1 + /* SPDX-License-Identifier: ((GPL-2.0-only WITH Linux-syscall-note) OR BSD-3-Clause) */ 2 2 /* 3 3 * linux/can.h 4 4 *
+1 -1
include/uapi/linux/can/bcm.h
··· 1 - /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ 1 + /* SPDX-License-Identifier: ((GPL-2.0-only WITH Linux-syscall-note) OR BSD-3-Clause) */ 2 2 /* 3 3 * linux/can/bcm.h 4 4 *
+1 -1
include/uapi/linux/can/error.h
··· 1 - /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ 1 + /* SPDX-License-Identifier: ((GPL-2.0-only WITH Linux-syscall-note) OR BSD-3-Clause) */ 2 2 /* 3 3 * linux/can/error.h 4 4 *
+1 -1
include/uapi/linux/can/gw.h
··· 1 - /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ 1 + /* SPDX-License-Identifier: ((GPL-2.0-only WITH Linux-syscall-note) OR BSD-3-Clause) */ 2 2 /* 3 3 * linux/can/gw.h 4 4 *
+1 -1
include/uapi/linux/can/j1939.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 1 + /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ 2 2 /* 3 3 * j1939.h 4 4 *
+1 -1
include/uapi/linux/can/netlink.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 1 + /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ 2 2 /* 3 3 * linux/can/netlink.h 4 4 *
+1 -1
include/uapi/linux/can/raw.h
··· 1 - /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ 1 + /* SPDX-License-Identifier: ((GPL-2.0-only WITH Linux-syscall-note) OR BSD-3-Clause) */ 2 2 /* 3 3 * linux/can/raw.h 4 4 *
+1 -1
include/uapi/linux/can/vxcan.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 1 + /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ 2 2 #ifndef _UAPI_CAN_VXCAN_H 3 3 #define _UAPI_CAN_VXCAN_H 4 4
+1
include/uapi/linux/nvme_ioctl.h
··· 63 63 __u32 cdw14; 64 64 __u32 cdw15; 65 65 __u32 timeout_ms; 66 + __u32 rsvd2; 66 67 __u64 result; 67 68 }; 68 69
+4
include/uapi/linux/sched.h
··· 51 51 * sent when the child exits. 52 52 * @stack: Specify the location of the stack for the 53 53 * child process. 54 + * Note, @stack is expected to point to the 55 + * lowest address. The stack direction will be 56 + * determined by the kernel and set up 57 + * appropriately based on @stack_size. 54 58 * @stack_size: The size of the stack for the child process. 55 59 * @tls: If CLONE_SETTLS is set, the tls descriptor 56 60 * is set to tls.
+2 -2
kernel/bpf/cgroup.c
··· 1311 1311 return false; 1312 1312 1313 1313 switch (off) { 1314 - case offsetof(struct bpf_sysctl, write): 1314 + case bpf_ctx_range(struct bpf_sysctl, write): 1315 1315 if (type != BPF_READ) 1316 1316 return false; 1317 1317 bpf_ctx_record_field_size(info, size_default); 1318 1318 return bpf_ctx_narrow_access_ok(off, size, size_default); 1319 - case offsetof(struct bpf_sysctl, file_pos): 1319 + case bpf_ctx_range(struct bpf_sysctl, file_pos): 1320 1320 if (type == BPF_READ) { 1321 1321 bpf_ctx_record_field_size(info, size_default); 1322 1322 return bpf_ctx_narrow_access_ok(off, size, size_default);
+5 -2
kernel/bpf/syscall.c
··· 127 127 return map; 128 128 } 129 129 130 - void *bpf_map_area_alloc(size_t size, int numa_node) 130 + void *bpf_map_area_alloc(u64 size, int numa_node) 131 131 { 132 132 /* We really just want to fail instead of triggering OOM killer 133 133 * under memory pressure, therefore we set __GFP_NORETRY to kmalloc, ··· 141 141 142 142 const gfp_t flags = __GFP_NOWARN | __GFP_ZERO; 143 143 void *area; 144 + 145 + if (size >= SIZE_MAX) 146 + return NULL; 144 147 145 148 if (size <= (PAGE_SIZE << PAGE_ALLOC_COSTLY_ORDER)) { 146 149 area = kmalloc_node(size, GFP_USER | __GFP_NORETRY | flags, ··· 201 198 atomic_long_sub(pages, &user->locked_vm); 202 199 } 203 200 204 - int bpf_map_charge_init(struct bpf_map_memory *mem, size_t size) 201 + int bpf_map_charge_init(struct bpf_map_memory *mem, u64 size) 205 202 { 206 203 u32 pages = round_up(size, PAGE_SIZE) >> PAGE_SHIFT; 207 204 struct user_struct *user;
+32 -1
kernel/fork.c
··· 2561 2561 return 0; 2562 2562 } 2563 2563 2564 - static bool clone3_args_valid(const struct kernel_clone_args *kargs) 2564 + /** 2565 + * clone3_stack_valid - check and prepare stack 2566 + * @kargs: kernel clone args 2567 + * 2568 + * Verify that the stack arguments userspace gave us are sane. 2569 + * In addition, set the stack direction for userspace since it's easy for us to 2570 + * determine. 2571 + */ 2572 + static inline bool clone3_stack_valid(struct kernel_clone_args *kargs) 2573 + { 2574 + if (kargs->stack == 0) { 2575 + if (kargs->stack_size > 0) 2576 + return false; 2577 + } else { 2578 + if (kargs->stack_size == 0) 2579 + return false; 2580 + 2581 + if (!access_ok((void __user *)kargs->stack, kargs->stack_size)) 2582 + return false; 2583 + 2584 + #if !defined(CONFIG_STACK_GROWSUP) && !defined(CONFIG_IA64) 2585 + kargs->stack += kargs->stack_size; 2586 + #endif 2587 + } 2588 + 2589 + return true; 2590 + } 2591 + 2592 + static bool clone3_args_valid(struct kernel_clone_args *kargs) 2565 2593 { 2566 2594 /* 2567 2595 * All lower bits of the flag word are taken. ··· 2607 2579 2608 2580 if ((kargs->flags & (CLONE_THREAD | CLONE_PARENT)) && 2609 2581 kargs->exit_signal) 2582 + return false; 2583 + 2584 + if (!clone3_stack_valid(kargs)) 2610 2585 return false; 2611 2586 2612 2587 return true;
+6 -1
lib/dump_stack.c
··· 106 106 was_locked = 1; 107 107 } else { 108 108 local_irq_restore(flags); 109 - cpu_relax(); 109 + /* 110 + * Wait for the lock to release before jumping to 111 + * atomic_cmpxchg() in order to mitigate the thundering herd 112 + * problem. 113 + */ 114 + do { cpu_relax(); } while (atomic_read(&dump_lock) != -1); 110 115 goto retry; 111 116 } 112 117
+11 -20
lib/idr.c
··· 215 215 EXPORT_SYMBOL(idr_for_each); 216 216 217 217 /** 218 - * idr_get_next() - Find next populated entry. 218 + * idr_get_next_ul() - Find next populated entry. 219 219 * @idr: IDR handle. 220 220 * @nextid: Pointer to an ID. 221 221 * ··· 224 224 * to the ID of the found value. To use in a loop, the value pointed to by 225 225 * nextid must be incremented by the user. 226 226 */ 227 - void *idr_get_next(struct idr *idr, int *nextid) 227 + void *idr_get_next_ul(struct idr *idr, unsigned long *nextid) 228 228 { 229 229 struct radix_tree_iter iter; 230 230 void __rcu **slot; ··· 245 245 } 246 246 if (!slot) 247 247 return NULL; 248 - id = iter.index + base; 249 248 250 - if (WARN_ON_ONCE(id > INT_MAX)) 251 - return NULL; 252 - 253 - *nextid = id; 249 + *nextid = iter.index + base; 254 250 return entry; 255 251 } 256 - EXPORT_SYMBOL(idr_get_next); 252 + EXPORT_SYMBOL(idr_get_next_ul); 257 253 258 254 /** 259 - * idr_get_next_ul() - Find next populated entry. 255 + * idr_get_next() - Find next populated entry. 260 256 * @idr: IDR handle. 261 257 * @nextid: Pointer to an ID. 262 258 * ··· 261 265 * to the ID of the found value. To use in a loop, the value pointed to by 262 266 * nextid must be incremented by the user. 263 267 */ 264 - void *idr_get_next_ul(struct idr *idr, unsigned long *nextid) 268 + void *idr_get_next(struct idr *idr, int *nextid) 265 269 { 266 - struct radix_tree_iter iter; 267 - void __rcu **slot; 268 - unsigned long base = idr->idr_base; 269 270 unsigned long id = *nextid; 271 + void *entry = idr_get_next_ul(idr, &id); 270 272 271 - id = (id < base) ? 0 : id - base; 272 - slot = radix_tree_iter_find(&idr->idr_rt, &iter, id); 273 - if (!slot) 273 + if (WARN_ON_ONCE(id > INT_MAX)) 274 274 return NULL; 275 - 276 - *nextid = iter.index + base; 277 - return rcu_dereference_raw(*slot); 275 + *nextid = id; 276 + return entry; 278 277 } 279 - EXPORT_SYMBOL(idr_get_next_ul); 278 + EXPORT_SYMBOL(idr_get_next); 280 279 281 280 /** 282 281 * idr_replace() - replace pointer for given ID.
+1 -1
lib/radix-tree.c
··· 1529 1529 offset = radix_tree_find_next_bit(node, IDR_FREE, 1530 1530 offset + 1); 1531 1531 start = next_index(start, node, offset); 1532 - if (start > max) 1532 + if (start > max || start == 0) 1533 1533 return ERR_PTR(-ENOSPC); 1534 1534 while (offset == RADIX_TREE_MAP_SIZE) { 1535 1535 offset = node->offset + 1;
+24
lib/test_xarray.c
··· 1110 1110 XA_BUG_ON(xa, !xa_empty(xa)); 1111 1111 } 1112 1112 1113 + static noinline void check_move_tiny(struct xarray *xa) 1114 + { 1115 + XA_STATE(xas, xa, 0); 1116 + 1117 + XA_BUG_ON(xa, !xa_empty(xa)); 1118 + rcu_read_lock(); 1119 + XA_BUG_ON(xa, xas_next(&xas) != NULL); 1120 + XA_BUG_ON(xa, xas_next(&xas) != NULL); 1121 + rcu_read_unlock(); 1122 + xa_store_index(xa, 0, GFP_KERNEL); 1123 + rcu_read_lock(); 1124 + xas_set(&xas, 0); 1125 + XA_BUG_ON(xa, xas_next(&xas) != xa_mk_index(0)); 1126 + XA_BUG_ON(xa, xas_next(&xas) != NULL); 1127 + xas_set(&xas, 0); 1128 + XA_BUG_ON(xa, xas_prev(&xas) != xa_mk_index(0)); 1129 + XA_BUG_ON(xa, xas_prev(&xas) != NULL); 1130 + rcu_read_unlock(); 1131 + xa_erase_index(xa, 0); 1132 + XA_BUG_ON(xa, !xa_empty(xa)); 1133 + } 1134 + 1113 1135 static noinline void check_move_small(struct xarray *xa, unsigned long idx) 1114 1136 { 1115 1137 XA_STATE(xas, xa, 0); ··· 1238 1216 rcu_read_unlock(); 1239 1217 1240 1218 xa_destroy(xa); 1219 + 1220 + check_move_tiny(xa); 1241 1221 1242 1222 for (i = 0; i < 16; i++) 1243 1223 check_move_small(xa, 1UL << i);
+4
lib/xarray.c
··· 994 994 995 995 if (!xas_frozen(xas->xa_node)) 996 996 xas->xa_index--; 997 + if (!xas->xa_node) 998 + return set_bounds(xas); 997 999 if (xas_not_node(xas->xa_node)) 998 1000 return xas_load(xas); 999 1001 ··· 1033 1031 1034 1032 if (!xas_frozen(xas->xa_node)) 1035 1033 xas->xa_index++; 1034 + if (!xas->xa_node) 1035 + return set_bounds(xas); 1036 1036 if (xas_not_node(xas->xa_node)) 1037 1037 return xas_load(xas); 1038 1038
+4 -3
mm/khugepaged.c
··· 1028 1028 1029 1029 anon_vma_lock_write(vma->anon_vma); 1030 1030 1031 - pte = pte_offset_map(pmd, address); 1032 - pte_ptl = pte_lockptr(mm, pmd); 1033 - 1034 1031 mmu_notifier_range_init(&range, MMU_NOTIFY_CLEAR, 0, NULL, mm, 1035 1032 address, address + HPAGE_PMD_SIZE); 1036 1033 mmu_notifier_invalidate_range_start(&range); 1034 + 1035 + pte = pte_offset_map(pmd, address); 1036 + pte_ptl = pte_lockptr(mm, pmd); 1037 + 1037 1038 pmd_ptl = pmd_lock(mm, pmd); /* probably unnecessary */ 1038 1039 /* 1039 1040 * After this gup_fast can't run anymore. This also removes
+16 -7
mm/memcontrol.c
··· 484 484 unsigned long ino = 0; 485 485 486 486 rcu_read_lock(); 487 - if (PageHead(page) && PageSlab(page)) 487 + if (PageSlab(page) && !PageTail(page)) 488 488 memcg = memcg_from_slab_page(page); 489 489 else 490 490 memcg = READ_ONCE(page->mem_cgroup); ··· 2533 2533 batch = nr_pages; 2534 2534 goto retry; 2535 2535 } 2536 + 2537 + /* 2538 + * Memcg doesn't have a dedicated reserve for atomic 2539 + * allocations. But like the global atomic pool, we need to 2540 + * put the burden of reclaim on regular allocation requests 2541 + * and let these go through as privileged allocations. 2542 + */ 2543 + if (gfp_mask & __GFP_ATOMIC) 2544 + goto force; 2536 2545 2537 2546 /* 2538 2547 * Unlike in global OOM situations, memcg is not in a physical ··· 5023 5014 { 5024 5015 int node; 5025 5016 5026 - /* 5027 - * Flush percpu vmstats and vmevents to guarantee the value correctness 5028 - * on parent's and all ancestor levels. 5029 - */ 5030 - memcg_flush_percpu_vmstats(memcg, false); 5031 - memcg_flush_percpu_vmevents(memcg); 5032 5017 for_each_node(node) 5033 5018 free_mem_cgroup_per_node_info(memcg, node); 5034 5019 free_percpu(memcg->vmstats_percpu); ··· 5033 5030 static void mem_cgroup_free(struct mem_cgroup *memcg) 5034 5031 { 5035 5032 memcg_wb_domain_exit(memcg); 5033 + /* 5034 + * Flush percpu vmstats and vmevents to guarantee the value correctness 5035 + * on parent's and all ancestor levels. 5036 + */ 5037 + memcg_flush_percpu_vmstats(memcg, false); 5038 + memcg_flush_percpu_vmevents(memcg); 5036 5039 __mem_cgroup_free(memcg); 5037 5040 } 5038 5041
+8
mm/memory_hotplug.c
··· 447 447 zone->spanned_pages; 448 448 449 449 /* No need to lock the zones, they can't change. */ 450 + if (!zone->spanned_pages) 451 + continue; 452 + if (!node_end_pfn) { 453 + node_start_pfn = zone->zone_start_pfn; 454 + node_end_pfn = zone_end_pfn; 455 + continue; 456 + } 457 + 450 458 if (zone_end_pfn > node_end_pfn) 451 459 node_end_pfn = zone_end_pfn; 452 460 if (zone->zone_start_pfn < node_start_pfn)
+1 -1
mm/mmu_notifier.c
··· 180 180 mn->ops->invalidate_range_start, _ret, 181 181 !mmu_notifier_range_blockable(range) ? "non-" : ""); 182 182 WARN_ON(mmu_notifier_range_blockable(range) || 183 - ret != -EAGAIN); 183 + _ret != -EAGAIN); 184 184 ret = _ret; 185 185 } 186 186 }
+9 -8
mm/page_alloc.c
··· 1948 1948 wait_for_completion(&pgdat_init_all_done_comp); 1949 1949 1950 1950 /* 1951 + * The number of managed pages has changed due to the initialisation 1952 + * so the pcpu batch and high limits needs to be updated or the limits 1953 + * will be artificially small. 1954 + */ 1955 + for_each_populated_zone(zone) 1956 + zone_pcp_update(zone); 1957 + 1958 + /* 1951 1959 * We initialized the rest of the deferred pages. Permanently disable 1952 1960 * on-demand struct page initialization. 1953 1961 */ ··· 3728 3720 static void warn_alloc_show_mem(gfp_t gfp_mask, nodemask_t *nodemask) 3729 3721 { 3730 3722 unsigned int filter = SHOW_MEM_FILTER_NODES; 3731 - static DEFINE_RATELIMIT_STATE(show_mem_rs, HZ, 1); 3732 - 3733 - if (!__ratelimit(&show_mem_rs)) 3734 - return; 3735 3723 3736 3724 /* 3737 3725 * This documents exceptions given to allocations in certain ··· 3748 3744 { 3749 3745 struct va_format vaf; 3750 3746 va_list args; 3751 - static DEFINE_RATELIMIT_STATE(nopage_rs, DEFAULT_RATELIMIT_INTERVAL, 3752 - DEFAULT_RATELIMIT_BURST); 3747 + static DEFINE_RATELIMIT_STATE(nopage_rs, 10*HZ, 1); 3753 3748 3754 3749 if ((gfp_mask & __GFP_NOWARN) || !__ratelimit(&nopage_rs)) 3755 3750 return; ··· 8517 8514 WARN(count != 0, "%d pages are still in use!\n", count); 8518 8515 } 8519 8516 8520 - #ifdef CONFIG_MEMORY_HOTPLUG 8521 8517 /* 8522 8518 * The zone indicated has a new number of managed_pages; batch sizes and percpu 8523 8519 * page high values need to be recalulated. ··· 8530 8528 per_cpu_ptr(zone->pageset, cpu)); 8531 8529 mutex_unlock(&pcp_batch_high_lock); 8532 8530 } 8533 - #endif 8534 8531 8535 8532 void zone_pcp_reset(struct zone *zone) 8536 8533 {
+2 -2
mm/slab.h
··· 323 323 * Expects a pointer to a slab page. Please note, that PageSlab() check 324 324 * isn't sufficient, as it returns true also for tail compound slab pages, 325 325 * which do not have slab_cache pointer set. 326 - * So this function assumes that the page can pass PageHead() and PageSlab() 327 - * checks. 326 + * So this function assumes that the page can pass PageSlab() && !PageTail() 327 + * check. 328 328 * 329 329 * The kmem_cache can be reparented asynchronously. The caller must ensure 330 330 * the memcg lifetime, e.g. by taking rcu_read_lock() or cgroup_mutex.
+21 -4
mm/vmstat.c
··· 1383 1383 unsigned long freecount = 0; 1384 1384 struct free_area *area; 1385 1385 struct list_head *curr; 1386 + bool overflow = false; 1386 1387 1387 1388 area = &(zone->free_area[order]); 1388 1389 1389 - list_for_each(curr, &area->free_list[mtype]) 1390 - freecount++; 1391 - seq_printf(m, "%6lu ", freecount); 1390 + list_for_each(curr, &area->free_list[mtype]) { 1391 + /* 1392 + * Cap the free_list iteration because it might 1393 + * be really large and we are under a spinlock 1394 + * so a long time spent here could trigger a 1395 + * hard lockup detector. Anyway this is a 1396 + * debugging tool so knowing there is a handful 1397 + * of pages of this order should be more than 1398 + * sufficient. 1399 + */ 1400 + if (++freecount >= 100000) { 1401 + overflow = true; 1402 + break; 1403 + } 1404 + } 1405 + seq_printf(m, "%s%6lu ", overflow ? ">" : "", freecount); 1406 + spin_unlock_irq(&zone->lock); 1407 + cond_resched(); 1408 + spin_lock_irq(&zone->lock); 1392 1409 } 1393 1410 seq_putc(m, '\n'); 1394 1411 } ··· 1989 1972 #endif 1990 1973 #ifdef CONFIG_PROC_FS 1991 1974 proc_create_seq("buddyinfo", 0444, NULL, &fragmentation_op); 1992 - proc_create_seq("pagetypeinfo", 0444, NULL, &pagetypeinfo_op); 1975 + proc_create_seq("pagetypeinfo", 0400, NULL, &pagetypeinfo_op); 1993 1976 proc_create_seq("vmstat", 0444, NULL, &vmstat_op); 1994 1977 proc_create_seq("zoneinfo", 0444, NULL, &zoneinfo_op); 1995 1978 #endif
+15 -4
net/bridge/netfilter/ebt_dnat.c
··· 20 20 ebt_dnat_tg(struct sk_buff *skb, const struct xt_action_param *par) 21 21 { 22 22 const struct ebt_nat_info *info = par->targinfo; 23 - struct net_device *dev; 24 23 25 24 if (skb_ensure_writable(skb, ETH_ALEN)) 26 25 return EBT_DROP; ··· 32 33 else 33 34 skb->pkt_type = PACKET_MULTICAST; 34 35 } else { 35 - if (xt_hooknum(par) != NF_BR_BROUTING) 36 - dev = br_port_get_rcu(xt_in(par))->br->dev; 37 - else 36 + const struct net_device *dev; 37 + 38 + switch (xt_hooknum(par)) { 39 + case NF_BR_BROUTING: 38 40 dev = xt_in(par); 41 + break; 42 + case NF_BR_PRE_ROUTING: 43 + dev = br_port_get_rcu(xt_in(par))->br->dev; 44 + break; 45 + default: 46 + dev = NULL; 47 + break; 48 + } 49 + 50 + if (!dev) /* NF_BR_LOCAL_OUT */ 51 + return info->target; 39 52 40 53 if (ether_addr_equal(info->mac, dev->dev_addr)) 41 54 skb->pkt_type = PACKET_HOST;
+7 -2
net/can/j1939/socket.c
··· 580 580 j1939_netdev_stop(priv); 581 581 } 582 582 583 + kfree(jsk->filters); 583 584 sock_orphan(sk); 584 585 sock->sk = NULL; 585 586 ··· 910 909 memset(serr, 0, sizeof(*serr)); 911 910 switch (type) { 912 911 case J1939_ERRQUEUE_ACK: 913 - if (!(sk->sk_tsflags & SOF_TIMESTAMPING_TX_ACK)) 912 + if (!(sk->sk_tsflags & SOF_TIMESTAMPING_TX_ACK)) { 913 + kfree_skb(skb); 914 914 return; 915 + } 915 916 916 917 serr->ee.ee_errno = ENOMSG; 917 918 serr->ee.ee_origin = SO_EE_ORIGIN_TIMESTAMPING; ··· 921 918 state = "ACK"; 922 919 break; 923 920 case J1939_ERRQUEUE_SCHED: 924 - if (!(sk->sk_tsflags & SOF_TIMESTAMPING_TX_SCHED)) 921 + if (!(sk->sk_tsflags & SOF_TIMESTAMPING_TX_SCHED)) { 922 + kfree_skb(skb); 925 923 return; 924 + } 926 925 927 926 serr->ee.ee_errno = ENOMSG; 928 927 serr->ee.ee_origin = SO_EE_ORIGIN_TIMESTAMPING;
+19 -1
net/can/j1939/transport.c
··· 1273 1273 static void 1274 1274 j1939_xtp_rx_eoma_one(struct j1939_session *session, struct sk_buff *skb) 1275 1275 { 1276 + struct j1939_sk_buff_cb *skcb = j1939_skb_to_cb(skb); 1277 + const u8 *dat; 1278 + int len; 1279 + 1276 1280 if (j1939_xtp_rx_cmd_bad_pgn(session, skb)) 1277 1281 return; 1282 + 1283 + dat = skb->data; 1284 + 1285 + if (skcb->addr.type == J1939_ETP) 1286 + len = j1939_etp_ctl_to_size(dat); 1287 + else 1288 + len = j1939_tp_ctl_to_size(dat); 1289 + 1290 + if (session->total_message_size != len) { 1291 + netdev_warn_once(session->priv->ndev, 1292 + "%s: 0x%p: Incorrect size. Expected: %i; got: %i.\n", 1293 + __func__, session, session->total_message_size, 1294 + len); 1295 + } 1278 1296 1279 1297 netdev_dbg(session->priv->ndev, "%s: 0x%p\n", __func__, session); 1280 1298 ··· 1450 1432 skcb = j1939_skb_to_cb(skb); 1451 1433 memcpy(skcb, rel_skcb, sizeof(*skcb)); 1452 1434 1453 - session = j1939_session_new(priv, skb, skb->len); 1435 + session = j1939_session_new(priv, skb, size); 1454 1436 if (!session) { 1455 1437 kfree_skb(skb); 1456 1438 return NULL;
+15 -5
net/core/skmsg.c
··· 270 270 271 271 msg->sg.data[i].length -= trim; 272 272 sk_mem_uncharge(sk, trim); 273 + /* Adjust copybreak if it falls into the trimmed part of last buf */ 274 + if (msg->sg.curr == i && msg->sg.copybreak > msg->sg.data[i].length) 275 + msg->sg.copybreak = msg->sg.data[i].length; 273 276 out: 274 - /* If we trim data before curr pointer update copybreak and current 275 - * so that any future copy operations start at new copy location. 277 + sk_msg_iter_var_next(i); 278 + msg->sg.end = i; 279 + 280 + /* If we trim data a full sg elem before curr pointer update 281 + * copybreak and current so that any future copy operations 282 + * start at new copy location. 276 283 * However trimed data that has not yet been used in a copy op 277 284 * does not require an update. 278 285 */ 279 - if (msg->sg.curr >= i) { 286 + if (!msg->sg.size) { 287 + msg->sg.curr = msg->sg.start; 288 + msg->sg.copybreak = 0; 289 + } else if (sk_msg_iter_dist(msg->sg.start, msg->sg.curr) >= 290 + sk_msg_iter_dist(msg->sg.start, msg->sg.end)) { 291 + sk_msg_iter_var_prev(i); 280 292 msg->sg.curr = i; 281 293 msg->sg.copybreak = msg->sg.data[i].length; 282 294 } 283 - sk_msg_iter_var_next(i); 284 - msg->sg.end = i; 285 295 } 286 296 EXPORT_SYMBOL_GPL(sk_msg_trim); 287 297
+1 -1
net/dccp/ipv4.c
··· 416 416 RCU_INIT_POINTER(newinet->inet_opt, rcu_dereference(ireq->ireq_opt)); 417 417 newinet->mc_index = inet_iif(skb); 418 418 newinet->mc_ttl = ip_hdr(skb)->ttl; 419 - newinet->inet_id = jiffies; 419 + newinet->inet_id = prandom_u32(); 420 420 421 421 if (dst == NULL && (dst = inet_csk_route_child_sock(sk, newsk, req)) == NULL) 422 422 goto put_and_exit;
+1 -1
net/ipv4/fib_semantics.c
··· 1814 1814 int ret = 0; 1815 1815 unsigned int hash = fib_laddr_hashfn(local); 1816 1816 struct hlist_head *head = &fib_info_laddrhash[hash]; 1817 + int tb_id = l3mdev_fib_table(dev) ? : RT_TABLE_MAIN; 1817 1818 struct net *net = dev_net(dev); 1818 - int tb_id = l3mdev_fib_table(dev); 1819 1819 struct fib_info *fi; 1820 1820 1821 1821 if (!fib_info_laddrhash || local == 0)
+10 -3
net/ipv6/route.c
··· 621 621 { 622 622 struct __rt6_probe_work *work = NULL; 623 623 const struct in6_addr *nh_gw; 624 + unsigned long last_probe; 624 625 struct neighbour *neigh; 625 626 struct net_device *dev; 626 627 struct inet6_dev *idev; ··· 640 639 nh_gw = &fib6_nh->fib_nh_gw6; 641 640 dev = fib6_nh->fib_nh_dev; 642 641 rcu_read_lock_bh(); 642 + last_probe = READ_ONCE(fib6_nh->last_probe); 643 643 idev = __in6_dev_get(dev); 644 644 neigh = __ipv6_neigh_lookup_noref(dev, nh_gw); 645 645 if (neigh) { ··· 656 654 __neigh_set_probe_once(neigh); 657 655 } 658 656 write_unlock(&neigh->lock); 659 - } else if (time_after(jiffies, fib6_nh->last_probe + 657 + } else if (time_after(jiffies, last_probe + 660 658 idev->cnf.rtr_probe_interval)) { 661 659 work = kmalloc(sizeof(*work), GFP_ATOMIC); 662 660 } 663 661 664 - if (work) { 665 - fib6_nh->last_probe = jiffies; 662 + if (!work || cmpxchg(&fib6_nh->last_probe, 663 + last_probe, jiffies) != last_probe) { 664 + kfree(work); 665 + } else { 666 666 INIT_WORK(&work->work, rt6_probe_deferred); 667 667 work->target = *nh_gw; 668 668 dev_hold(dev); ··· 3384 3380 int err; 3385 3381 3386 3382 fib6_nh->fib_nh_family = AF_INET6; 3383 + #ifdef CONFIG_IPV6_ROUTER_PREF 3384 + fib6_nh->last_probe = jiffies; 3385 + #endif 3387 3386 3388 3387 err = -ENODEV; 3389 3388 if (cfg->fc_ifindex) {
+1 -1
net/mac80211/main.c
··· 1292 1292 ieee80211_remove_interfaces(local); 1293 1293 fail_rate: 1294 1294 rtnl_unlock(); 1295 - ieee80211_led_exit(local); 1296 1295 fail_flows: 1296 + ieee80211_led_exit(local); 1297 1297 destroy_workqueue(local->workqueue); 1298 1298 fail_workqueue: 1299 1299 wiphy_unregister(local->hw.wiphy);
+2 -1
net/mac80211/sta_info.c
··· 2457 2457 { 2458 2458 struct ieee80211_sta_rx_stats *stats = sta_get_last_rx_stats(sta); 2459 2459 2460 - if (time_after(stats->last_rx, sta->status_stats.last_ack)) 2460 + if (!sta->status_stats.last_ack || 2461 + time_after(stats->last_rx, sta->status_stats.last_ack)) 2461 2462 return stats->last_rx; 2462 2463 return sta->status_stats.last_ack; 2463 2464 }
+33 -16
net/netfilter/ipset/ip_set_core.c
··· 296 296 297 297 if (unlikely(!flag_nested(nla))) 298 298 return -IPSET_ERR_PROTOCOL; 299 - if (nla_parse_nested_deprecated(tb, IPSET_ATTR_IPADDR_MAX, nla, ipaddr_policy, NULL)) 299 + if (nla_parse_nested(tb, IPSET_ATTR_IPADDR_MAX, nla, 300 + ipaddr_policy, NULL)) 300 301 return -IPSET_ERR_PROTOCOL; 301 302 if (unlikely(!ip_set_attr_netorder(tb, IPSET_ATTR_IPADDR_IPV4))) 302 303 return -IPSET_ERR_PROTOCOL; ··· 315 314 if (unlikely(!flag_nested(nla))) 316 315 return -IPSET_ERR_PROTOCOL; 317 316 318 - if (nla_parse_nested_deprecated(tb, IPSET_ATTR_IPADDR_MAX, nla, ipaddr_policy, NULL)) 317 + if (nla_parse_nested(tb, IPSET_ATTR_IPADDR_MAX, nla, 318 + ipaddr_policy, NULL)) 319 319 return -IPSET_ERR_PROTOCOL; 320 320 if (unlikely(!ip_set_attr_netorder(tb, IPSET_ATTR_IPADDR_IPV6))) 321 321 return -IPSET_ERR_PROTOCOL; ··· 1102 1100 1103 1101 /* Without holding any locks, create private part. */ 1104 1102 if (attr[IPSET_ATTR_DATA] && 1105 - nla_parse_nested_deprecated(tb, IPSET_ATTR_CREATE_MAX, attr[IPSET_ATTR_DATA], set->type->create_policy, NULL)) { 1103 + nla_parse_nested(tb, IPSET_ATTR_CREATE_MAX, attr[IPSET_ATTR_DATA], 1104 + set->type->create_policy, NULL)) { 1106 1105 ret = -IPSET_ERR_PROTOCOL; 1107 1106 goto put_out; 1108 1107 } ··· 1474 1471 } 1475 1472 } 1476 1473 1474 + static const struct nla_policy 1475 + ip_set_dump_policy[IPSET_ATTR_CMD_MAX + 1] = { 1476 + [IPSET_ATTR_PROTOCOL] = { .type = NLA_U8 }, 1477 + [IPSET_ATTR_SETNAME] = { .type = NLA_NUL_STRING, 1478 + .len = IPSET_MAXNAMELEN - 1 }, 1479 + [IPSET_ATTR_FLAGS] = { .type = NLA_U32 }, 1480 + }; 1481 + 1477 1482 static int 1478 1483 dump_init(struct netlink_callback *cb, struct ip_set_net *inst) 1479 1484 { ··· 1493 1482 ip_set_id_t index; 1494 1483 int ret; 1495 1484 1496 - ret = nla_parse_deprecated(cda, IPSET_ATTR_CMD_MAX, attr, 1497 - nlh->nlmsg_len - min_len, 1498 - ip_set_setname_policy, NULL); 1485 + ret = nla_parse(cda, IPSET_ATTR_CMD_MAX, attr, 1486 + nlh->nlmsg_len - min_len, 1487 + ip_set_dump_policy, NULL); 1499 1488 if (ret) 1500 1489 return ret; 1501 1490 ··· 1744 1733 memcpy(&errmsg->msg, nlh, nlh->nlmsg_len); 1745 1734 cmdattr = (void *)&errmsg->msg + min_len; 1746 1735 1747 - ret = nla_parse_deprecated(cda, IPSET_ATTR_CMD_MAX, cmdattr, 1748 - nlh->nlmsg_len - min_len, 1749 - ip_set_adt_policy, NULL); 1736 + ret = nla_parse(cda, IPSET_ATTR_CMD_MAX, cmdattr, 1737 + nlh->nlmsg_len - min_len, ip_set_adt_policy, 1738 + NULL); 1750 1739 1751 1740 if (ret) { 1752 1741 nlmsg_free(skb2); ··· 1797 1786 1798 1787 use_lineno = !!attr[IPSET_ATTR_LINENO]; 1799 1788 if (attr[IPSET_ATTR_DATA]) { 1800 - if (nla_parse_nested_deprecated(tb, IPSET_ATTR_ADT_MAX, attr[IPSET_ATTR_DATA], set->type->adt_policy, NULL)) 1789 + if (nla_parse_nested(tb, IPSET_ATTR_ADT_MAX, 1790 + attr[IPSET_ATTR_DATA], 1791 + set->type->adt_policy, NULL)) 1801 1792 return -IPSET_ERR_PROTOCOL; 1802 1793 ret = call_ad(ctnl, skb, set, tb, adt, flags, 1803 1794 use_lineno); ··· 1809 1796 nla_for_each_nested(nla, attr[IPSET_ATTR_ADT], nla_rem) { 1810 1797 if (nla_type(nla) != IPSET_ATTR_DATA || 1811 1798 !flag_nested(nla) || 1812 - nla_parse_nested_deprecated(tb, IPSET_ATTR_ADT_MAX, nla, set->type->adt_policy, NULL)) 1799 + nla_parse_nested(tb, IPSET_ATTR_ADT_MAX, nla, 1800 + set->type->adt_policy, NULL)) 1813 1801 return -IPSET_ERR_PROTOCOL; 1814 1802 ret = call_ad(ctnl, skb, set, tb, adt, 1815 1803 flags, use_lineno); ··· 1859 1845 if (!set) 1860 1846 return -ENOENT; 1861 1847 1862 - if (nla_parse_nested_deprecated(tb, IPSET_ATTR_ADT_MAX, attr[IPSET_ATTR_DATA], set->type->adt_policy, NULL)) 1848 + if (nla_parse_nested(tb, IPSET_ATTR_ADT_MAX, attr[IPSET_ATTR_DATA], 1849 + set->type->adt_policy, NULL)) 1863 1850 return -IPSET_ERR_PROTOCOL; 1864 1851 1865 1852 rcu_read_lock_bh(); ··· 2166 2151 [IPSET_CMD_LIST] = { 2167 2152 .call = ip_set_dump, 2168 2153 .attr_count = IPSET_ATTR_CMD_MAX, 2169 - .policy = ip_set_setname_policy, 2154 + .policy = ip_set_dump_policy, 2170 2155 }, 2171 2156 [IPSET_CMD_SAVE] = { 2172 2157 .call = ip_set_dump, ··· 2274 2259 } 2275 2260 2276 2261 req_version->version = IPSET_PROTOCOL; 2277 - ret = copy_to_user(user, req_version, 2278 - sizeof(struct ip_set_req_version)); 2262 + if (copy_to_user(user, req_version, 2263 + sizeof(struct ip_set_req_version))) 2264 + ret = -EFAULT; 2279 2265 goto done; 2280 2266 } 2281 2267 case IP_SET_OP_GET_BYNAME: { ··· 2335 2319 } /* end of switch(op) */ 2336 2320 2337 2321 copy: 2338 - ret = copy_to_user(user, data, copylen); 2322 + if (copy_to_user(user, data, copylen)) 2323 + ret = -EFAULT; 2339 2324 2340 2325 done: 2341 2326 vfree(data);
+1 -1
net/netfilter/ipset/ip_set_hash_ipmac.c
··· 209 209 (skb_mac_header(skb) + ETH_HLEN) > skb->data) 210 210 return -EINVAL; 211 211 212 - if (opt->flags & IPSET_DIM_ONE_SRC) 212 + if (opt->flags & IPSET_DIM_TWO_SRC) 213 213 ether_addr_copy(e.ether, eth_hdr(skb)->h_source); 214 214 else 215 215 ether_addr_copy(e.ether, eth_hdr(skb)->h_dest);
+1
net/netfilter/ipset/ip_set_hash_net.c
··· 368 368 [IPSET_ATTR_IP_TO] = { .type = NLA_NESTED }, 369 369 [IPSET_ATTR_CIDR] = { .type = NLA_U8 }, 370 370 [IPSET_ATTR_TIMEOUT] = { .type = NLA_U32 }, 371 + [IPSET_ATTR_LINENO] = { .type = NLA_U32 }, 371 372 [IPSET_ATTR_CADT_FLAGS] = { .type = NLA_U32 }, 372 373 [IPSET_ATTR_BYTES] = { .type = NLA_U64 }, 373 374 [IPSET_ATTR_PACKETS] = { .type = NLA_U64 },
+1
net/netfilter/ipset/ip_set_hash_netnet.c
··· 476 476 [IPSET_ATTR_CIDR] = { .type = NLA_U8 }, 477 477 [IPSET_ATTR_CIDR2] = { .type = NLA_U8 }, 478 478 [IPSET_ATTR_TIMEOUT] = { .type = NLA_U32 }, 479 + [IPSET_ATTR_LINENO] = { .type = NLA_U32 }, 479 480 [IPSET_ATTR_CADT_FLAGS] = { .type = NLA_U32 }, 480 481 [IPSET_ATTR_BYTES] = { .type = NLA_U64 }, 481 482 [IPSET_ATTR_PACKETS] = { .type = NLA_U64 },
+3 -4
net/netfilter/nf_tables_api.c
··· 2177 2177 if (nlh->nlmsg_flags & NLM_F_REPLACE) 2178 2178 return -EOPNOTSUPP; 2179 2179 2180 + flags |= chain->flags & NFT_BASE_CHAIN; 2180 2181 return nf_tables_updchain(&ctx, genmask, policy, flags); 2181 2182 } 2182 2183 ··· 5399 5398 struct nft_trans *trans; 5400 5399 int err; 5401 5400 5402 - if (!obj->ops->update) 5403 - return -EOPNOTSUPP; 5404 - 5405 5401 trans = nft_trans_alloc(ctx, NFT_MSG_NEWOBJ, 5406 5402 sizeof(struct nft_trans_obj)); 5407 5403 if (!trans) ··· 6731 6733 obj = nft_trans_obj(trans); 6732 6734 newobj = nft_trans_obj_newobj(trans); 6733 6735 6734 - obj->ops->update(obj, newobj); 6736 + if (obj->ops->update) 6737 + obj->ops->update(obj, newobj); 6735 6738 6736 6739 kfree(newobj); 6737 6740 }
+2 -1
net/netfilter/nf_tables_offload.c
··· 397 397 398 398 switch (trans->msg_type) { 399 399 case NFT_MSG_NEWCHAIN: 400 - if (!(trans->ctx.chain->flags & NFT_CHAIN_HW_OFFLOAD)) 400 + if (!(trans->ctx.chain->flags & NFT_CHAIN_HW_OFFLOAD) || 401 + nft_trans_chain_update(trans)) 401 402 continue; 402 403 403 404 policy = nft_trans_chain_policy(trans);
+3 -2
net/netfilter/nft_bitwise.c
··· 134 134 const struct nft_expr *expr) 135 135 { 136 136 const struct nft_bitwise *priv = nft_expr_priv(expr); 137 + struct nft_offload_reg *reg = &ctx->regs[priv->dreg]; 137 138 138 139 if (memcmp(&priv->xor, &zero, sizeof(priv->xor)) || 139 - priv->sreg != priv->dreg) 140 + priv->sreg != priv->dreg || priv->len != reg->len) 140 141 return -EOPNOTSUPP; 141 142 142 - memcpy(&ctx->regs[priv->dreg].mask, &priv->mask, sizeof(priv->mask)); 143 + memcpy(&reg->mask, &priv->mask, sizeof(priv->mask)); 143 144 144 145 return 0; 145 146 }
+1 -1
net/netfilter/nft_cmp.c
··· 116 116 u8 *mask = (u8 *)&flow->match.mask; 117 117 u8 *key = (u8 *)&flow->match.key; 118 118 119 - if (priv->op != NFT_CMP_EQ) 119 + if (priv->op != NFT_CMP_EQ || reg->len != priv->len) 120 120 return -EOPNOTSUPP; 121 121 122 122 memcpy(key + reg->offset, &priv->data, priv->len);
-2
net/nfc/netlink.c
··· 1091 1091 1092 1092 local = nfc_llcp_find_local(dev); 1093 1093 if (!local) { 1094 - nfc_put_device(dev); 1095 1094 rc = -ENODEV; 1096 1095 goto exit; 1097 1096 } ··· 1150 1151 1151 1152 local = nfc_llcp_find_local(dev); 1152 1153 if (!local) { 1153 - nfc_put_device(dev); 1154 1154 rc = -ENODEV; 1155 1155 goto exit; 1156 1156 }
+79 -4
net/sched/cls_api.c
··· 21 21 #include <linux/slab.h> 22 22 #include <linux/idr.h> 23 23 #include <linux/rhashtable.h> 24 + #include <linux/jhash.h> 24 25 #include <net/net_namespace.h> 25 26 #include <net/sock.h> 26 27 #include <net/netlink.h> ··· 47 46 48 47 /* Protects list of registered TC modules. It is pure SMP lock. */ 49 48 static DEFINE_RWLOCK(cls_mod_lock); 49 + 50 + static u32 destroy_obj_hashfn(const struct tcf_proto *tp) 51 + { 52 + return jhash_3words(tp->chain->index, tp->prio, 53 + (__force __u32)tp->protocol, 0); 54 + } 55 + 56 + static void tcf_proto_signal_destroying(struct tcf_chain *chain, 57 + struct tcf_proto *tp) 58 + { 59 + struct tcf_block *block = chain->block; 60 + 61 + mutex_lock(&block->proto_destroy_lock); 62 + hash_add_rcu(block->proto_destroy_ht, &tp->destroy_ht_node, 63 + destroy_obj_hashfn(tp)); 64 + mutex_unlock(&block->proto_destroy_lock); 65 + } 66 + 67 + static bool tcf_proto_cmp(const struct tcf_proto *tp1, 68 + const struct tcf_proto *tp2) 69 + { 70 + return tp1->chain->index == tp2->chain->index && 71 + tp1->prio == tp2->prio && 72 + tp1->protocol == tp2->protocol; 73 + } 74 + 75 + static bool tcf_proto_exists_destroying(struct tcf_chain *chain, 76 + struct tcf_proto *tp) 77 + { 78 + u32 hash = destroy_obj_hashfn(tp); 79 + struct tcf_proto *iter; 80 + bool found = false; 81 + 82 + rcu_read_lock(); 83 + hash_for_each_possible_rcu(chain->block->proto_destroy_ht, iter, 84 + destroy_ht_node, hash) { 85 + if (tcf_proto_cmp(tp, iter)) { 86 + found = true; 87 + break; 88 + } 89 + } 90 + rcu_read_unlock(); 91 + 92 + return found; 93 + } 94 + 95 + static void 96 + tcf_proto_signal_destroyed(struct tcf_chain *chain, struct tcf_proto *tp) 97 + { 98 + struct tcf_block *block = chain->block; 99 + 100 + mutex_lock(&block->proto_destroy_lock); 101 + if (hash_hashed(&tp->destroy_ht_node)) 102 + hash_del_rcu(&tp->destroy_ht_node); 103 + mutex_unlock(&block->proto_destroy_lock); 104 + } 50 105 51 106 /* Find classifier type by string name */ 52 107 ··· 291 234 static void tcf_chain_put(struct tcf_chain *chain); 292 235 293 236 static void tcf_proto_destroy(struct tcf_proto *tp, bool rtnl_held, 294 - struct netlink_ext_ack *extack) 237 + bool sig_destroy, struct netlink_ext_ack *extack) 295 238 { 296 239 tp->ops->destroy(tp, rtnl_held, extack); 240 + if (sig_destroy) 241 + tcf_proto_signal_destroyed(tp->chain, tp); 297 242 tcf_chain_put(tp->chain); 298 243 module_put(tp->ops->owner); 299 244 kfree_rcu(tp, rcu); ··· 305 246 struct netlink_ext_ack *extack) 306 247 { 307 248 if (refcount_dec_and_test(&tp->refcnt)) 308 - tcf_proto_destroy(tp, rtnl_held, extack); 249 + tcf_proto_destroy(tp, rtnl_held, true, extack); 309 250 } 310 251 311 252 static int walker_check_empty(struct tcf_proto *tp, void *fh, ··· 429 370 static void tcf_block_destroy(struct tcf_block *block) 430 371 { 431 372 mutex_destroy(&block->lock); 373 + mutex_destroy(&block->proto_destroy_lock); 432 374 kfree_rcu(block, rcu); 433 375 } 434 376 ··· 604 544 struct tcf_proto *tp, *tp_next; 605 545 606 546 mutex_lock(&chain->filter_chain_lock); 547 + tp = tcf_chain_dereference(chain->filter_chain, chain); 548 + while (tp) { 549 + tp_next = rcu_dereference_protected(tp->next, 1); 550 + tcf_proto_signal_destroying(chain, tp); 551 + tp = tp_next; 552 + } 607 553 tp = tcf_chain_dereference(chain->filter_chain, chain); 608 554 RCU_INIT_POINTER(chain->filter_chain, NULL); 609 555 tcf_chain0_head_change(chain, NULL); ··· 910 844 return ERR_PTR(-ENOMEM); 911 845 } 912 846 mutex_init(&block->lock); 847 + mutex_init(&block->proto_destroy_lock); 913 848 init_rwsem(&block->cb_lock); 914 849 flow_block_init(&block->flow_block); 915 850 INIT_LIST_HEAD(&block->chain_list); ··· 1688 1621 1689 1622 mutex_lock(&chain->filter_chain_lock); 1690 1623 1624 + if (tcf_proto_exists_destroying(chain, tp_new)) { 1625 + mutex_unlock(&chain->filter_chain_lock); 1626 + tcf_proto_destroy(tp_new, rtnl_held, false, NULL); 1627 + return ERR_PTR(-EAGAIN); 1628 + } 1629 + 1691 1630 tp = tcf_chain_tp_find(chain, &chain_info, 1692 1631 protocol, prio, false); 1693 1632 if (!tp) ··· 1701 1628 mutex_unlock(&chain->filter_chain_lock); 1702 1629 1703 1630 if (tp) { 1704 - tcf_proto_destroy(tp_new, rtnl_held, NULL); 1631 + tcf_proto_destroy(tp_new, rtnl_held, false, NULL); 1705 1632 tp_new = tp; 1706 1633 } else if (err) { 1707 - tcf_proto_destroy(tp_new, rtnl_held, NULL); 1634 + tcf_proto_destroy(tp_new, rtnl_held, false, NULL); 1708 1635 tp_new = ERR_PTR(err); 1709 1636 } 1710 1637 ··· 1742 1669 return; 1743 1670 } 1744 1671 1672 + tcf_proto_signal_destroying(chain, tp); 1745 1673 next = tcf_chain_dereference(chain_info.next, chain); 1746 1674 if (tp == chain->filter_chain) 1747 1675 tcf_chain0_head_change(chain, next); ··· 2262 2188 err = -EINVAL; 2263 2189 goto errout_locked; 2264 2190 } else if (t->tcm_handle == 0) { 2191 + tcf_proto_signal_destroying(chain, tp); 2265 2192 tcf_chain_tp_remove(chain, &chain_info, tp); 2266 2193 mutex_unlock(&chain->filter_chain_lock); 2267 2194
+3 -2
net/sched/sch_taprio.c
··· 1224 1224 goto done; 1225 1225 } 1226 1226 1227 - taprio_offload_config_changed(q); 1228 - 1229 1227 done: 1230 1228 taprio_offload_free(offload); 1231 1229 ··· 1503 1505 call_rcu(&admin->rcu, taprio_free_sched_cb); 1504 1506 1505 1507 spin_unlock_irqrestore(&q->current_entry_lock, flags); 1508 + 1509 + if (FULL_OFFLOAD_IS_ENABLED(taprio_flags)) 1510 + taprio_offload_config_changed(q); 1506 1511 } 1507 1512 1508 1513 new_admin = NULL;
-2
net/smc/smc_pnet.c
··· 376 376 return 0; 377 377 378 378 error: 379 - if (pnetelem->ndev) 380 - dev_put(pnetelem->ndev); 381 379 return rc; 382 380 } 383 381
+9 -1
net/tls/tls_device.c
··· 534 534 int tls_device_sendmsg(struct sock *sk, struct msghdr *msg, size_t size) 535 535 { 536 536 unsigned char record_type = TLS_RECORD_TYPE_DATA; 537 + struct tls_context *tls_ctx = tls_get_ctx(sk); 537 538 int rc; 538 539 540 + mutex_lock(&tls_ctx->tx_lock); 539 541 lock_sock(sk); 540 542 541 543 if (unlikely(msg->msg_controllen)) { ··· 551 549 552 550 out: 553 551 release_sock(sk); 552 + mutex_unlock(&tls_ctx->tx_lock); 554 553 return rc; 555 554 } 556 555 557 556 int tls_device_sendpage(struct sock *sk, struct page *page, 558 557 int offset, size_t size, int flags) 559 558 { 559 + struct tls_context *tls_ctx = tls_get_ctx(sk); 560 560 struct iov_iter msg_iter; 561 561 char *kaddr = kmap(page); 562 562 struct kvec iov; ··· 567 563 if (flags & MSG_SENDPAGE_NOTLAST) 568 564 flags |= MSG_MORE; 569 565 566 + mutex_lock(&tls_ctx->tx_lock); 570 567 lock_sock(sk); 571 568 572 569 if (flags & MSG_OOB) { ··· 584 579 585 580 out: 586 581 release_sock(sk); 582 + mutex_unlock(&tls_ctx->tx_lock); 587 583 return rc; 588 584 } 589 585 ··· 640 634 641 635 void tls_device_write_space(struct sock *sk, struct tls_context *ctx) 642 636 { 643 - if (!sk->sk_write_pending && tls_is_partially_sent_record(ctx)) { 637 + if (tls_is_partially_sent_record(ctx)) { 644 638 gfp_t sk_allocation = sk->sk_allocation; 639 + 640 + WARN_ON_ONCE(sk->sk_write_pending); 645 641 646 642 sk->sk_allocation = GFP_ATOMIC; 647 643 tls_push_partial_record(sk, ctx,
+2
net/tls/tls_main.c
··· 267 267 268 268 memzero_explicit(&ctx->crypto_send, sizeof(ctx->crypto_send)); 269 269 memzero_explicit(&ctx->crypto_recv, sizeof(ctx->crypto_recv)); 270 + mutex_destroy(&ctx->tx_lock); 270 271 271 272 if (sk) 272 273 kfree_rcu(ctx, rcu); ··· 628 627 if (!ctx) 629 628 return NULL; 630 629 630 + mutex_init(&ctx->tx_lock); 631 631 rcu_assign_pointer(icsk->icsk_ulp_data, ctx); 632 632 ctx->sk_proto = sk->sk_prot; 633 633 return ctx;
+10 -20
net/tls/tls_sw.c
··· 902 902 if (msg->msg_flags & ~(MSG_MORE | MSG_DONTWAIT | MSG_NOSIGNAL)) 903 903 return -ENOTSUPP; 904 904 905 + mutex_lock(&tls_ctx->tx_lock); 905 906 lock_sock(sk); 906 - 907 - /* Wait till there is any pending write on socket */ 908 - if (unlikely(sk->sk_write_pending)) { 909 - ret = wait_on_pending_writer(sk, &timeo); 910 - if (unlikely(ret)) 911 - goto send_end; 912 - } 913 907 914 908 if (unlikely(msg->msg_controllen)) { 915 909 ret = tls_proccess_cmsg(sk, msg, &record_type); ··· 1090 1096 ret = sk_stream_error(sk, msg->msg_flags, ret); 1091 1097 1092 1098 release_sock(sk); 1099 + mutex_unlock(&tls_ctx->tx_lock); 1093 1100 return copied ? copied : ret; 1094 1101 } 1095 1102 ··· 1113 1118 1114 1119 eor = !(flags & (MSG_MORE | MSG_SENDPAGE_NOTLAST)); 1115 1120 sk_clear_bit(SOCKWQ_ASYNC_NOSPACE, sk); 1116 - 1117 - /* Wait till there is any pending write on socket */ 1118 - if (unlikely(sk->sk_write_pending)) { 1119 - ret = wait_on_pending_writer(sk, &timeo); 1120 - if (unlikely(ret)) 1121 - goto sendpage_end; 1122 - } 1123 1121 1124 1122 /* Call the sk_stream functions to manage the sndbuf mem. */ 1125 1123 while (size > 0) { ··· 1212 1224 int tls_sw_sendpage(struct sock *sk, struct page *page, 1213 1225 int offset, size_t size, int flags) 1214 1226 { 1227 + struct tls_context *tls_ctx = tls_get_ctx(sk); 1215 1228 int ret; 1216 1229 1217 1230 if (flags & ~(MSG_MORE | MSG_DONTWAIT | MSG_NOSIGNAL | 1218 1231 MSG_SENDPAGE_NOTLAST | MSG_SENDPAGE_NOPOLICY)) 1219 1232 return -ENOTSUPP; 1220 1233 1234 + mutex_lock(&tls_ctx->tx_lock); 1221 1235 lock_sock(sk); 1222 1236 ret = tls_sw_do_sendpage(sk, page, offset, size, flags); 1223 1237 release_sock(sk); 1238 + mutex_unlock(&tls_ctx->tx_lock); 1224 1239 return ret; 1225 1240 } 1226 1241 ··· 2166 2175 2167 2176 if (!test_and_clear_bit(BIT_TX_SCHEDULED, &ctx->tx_bitmask)) 2168 2177 return; 2178 + mutex_lock(&tls_ctx->tx_lock); 2169 2179 lock_sock(sk); 2170 2180 tls_tx_records(sk, -1); 2171 2181 release_sock(sk); 2182 + mutex_unlock(&tls_ctx->tx_lock); 2172 2183 } 2173 2184 2174 2185 void tls_sw_write_space(struct sock *sk, struct tls_context *ctx) ··· 2178 2185 struct tls_sw_context_tx *tx_ctx = tls_sw_ctx_tx(ctx); 2179 2186 2180 2187 /* Schedule the transmission if tx list is ready */ 2181 - if (is_tx_ready(tx_ctx) && !sk->sk_write_pending) { 2182 - /* Schedule the transmission */ 2183 - if (!test_and_set_bit(BIT_TX_SCHEDULED, 2184 - &tx_ctx->tx_bitmask)) 2185 - schedule_delayed_work(&tx_ctx->tx_work.work, 0); 2186 - } 2188 + if (is_tx_ready(tx_ctx) && 2189 + !test_and_set_bit(BIT_TX_SCHEDULED, &tx_ctx->tx_bitmask)) 2190 + schedule_delayed_work(&tx_ctx->tx_work.work, 0); 2187 2191 } 2188 2192 2189 2193 void tls_sw_strparser_arm(struct sock *sk, struct tls_context *tls_ctx)
+5 -3
net/vmw_vsock/virtio_transport_common.c
··· 996 996 if (le32_to_cpu(pkt->hdr.flags) & VIRTIO_VSOCK_SHUTDOWN_SEND) 997 997 vsk->peer_shutdown |= SEND_SHUTDOWN; 998 998 if (vsk->peer_shutdown == SHUTDOWN_MASK && 999 - vsock_stream_has_data(vsk) <= 0) { 1000 - sock_set_flag(sk, SOCK_DONE); 1001 - sk->sk_state = TCP_CLOSING; 999 + vsock_stream_has_data(vsk) <= 0 && 1000 + !sock_flag(sk, SOCK_DONE)) { 1001 + (void)virtio_transport_reset(vsk, NULL); 1002 + 1003 + virtio_transport_do_close(vsk, true); 1002 1004 } 1003 1005 if (le32_to_cpu(pkt->hdr.flags)) 1004 1006 sk->sk_state_change(sk);
+1
samples/bpf/Makefile
··· 186 186 TPROGS_CFLAGS += -I$(srctree)/tools/lib/ 187 187 TPROGS_CFLAGS += -I$(srctree)/tools/include 188 188 TPROGS_CFLAGS += -I$(srctree)/tools/perf 189 + TPROGS_CFLAGS += -DHAVE_ATTR_TEST=0 189 190 190 191 ifdef SYSROOT 191 192 TPROGS_CFLAGS += --sysroot=$(SYSROOT)
+2 -1
scripts/gdb/linux/symbols.py
··· 99 99 attrs[n]['name'].string(): attrs[n]['address'] 100 100 for n in range(int(sect_attrs['nsections']))} 101 101 args = [] 102 - for section_name in [".data", ".data..read_mostly", ".rodata", ".bss"]: 102 + for section_name in [".data", ".data..read_mostly", ".rodata", ".bss", 103 + ".text", ".text.hot", ".text.unlikely"]: 103 104 address = section_name_to_address.get(section_name) 104 105 if address: 105 106 args.append(" -s {name} {addr}".format(
+3 -3
scripts/nsdeps
··· 31 31 local mod_file=`echo $@ | sed -e 's/\.ko/\.mod/'` 32 32 local ns_deps_file=`echo $@ | sed -e 's/\.ko/\.ns_deps/'` 33 33 if [ ! -f "$ns_deps_file" ]; then return; fi 34 - local mod_source_files=`cat $mod_file | sed -n 1p \ 34 + local mod_source_files="`cat $mod_file | sed -n 1p \ 35 35 | sed -e 's/\.o/\.c/g' \ 36 - | sed "s|[^ ]* *|${srctree}/&|g"` 36 + | sed "s|[^ ]* *|${srctree}/&|g"`" 37 37 for ns in `cat $ns_deps_file`; do 38 38 echo "Adding namespace $ns to module $mod_name (if needed)." 39 - generate_deps_for_ns $ns $mod_source_files 39 + generate_deps_for_ns $ns "$mod_source_files" 40 40 # sort the imports 41 41 for source_file in $mod_source_files; do 42 42 sed '/MODULE_IMPORT_NS/Q' $source_file > ${source_file}.tmp
+1 -1
sound/core/compress_offload.c
··· 528 528 { 529 529 /* first let's check the buffer parameter's */ 530 530 if (params->buffer.fragment_size == 0 || 531 - params->buffer.fragments > INT_MAX / params->buffer.fragment_size || 531 + params->buffer.fragments > U32_MAX / params->buffer.fragment_size || 532 532 params->buffer.fragments == 0) 533 533 return -EINVAL; 534 534
+3 -3
sound/core/timer.c
··· 284 284 goto unlock; 285 285 } 286 286 if (!list_empty(&timer->open_list_head)) { 287 - timeri = list_entry(timer->open_list_head.next, 287 + struct snd_timer_instance *t = 288 + list_entry(timer->open_list_head.next, 288 289 struct snd_timer_instance, open_list); 289 - if (timeri->flags & SNDRV_TIMER_IFLG_EXCLUSIVE) { 290 + if (t->flags & SNDRV_TIMER_IFLG_EXCLUSIVE) { 290 291 err = -EBUSY; 291 - timeri = NULL; 292 292 goto unlock; 293 293 } 294 294 }
+3
sound/firewire/bebob/bebob_focusrite.c
··· 27 27 #define SAFFIRE_CLOCK_SOURCE_SPDIF 1 28 28 29 29 /* clock sources as returned from register of Saffire Pro 10 and 26 */ 30 + #define SAFFIREPRO_CLOCK_SOURCE_SELECT_MASK 0x000000ff 31 + #define SAFFIREPRO_CLOCK_SOURCE_DETECT_MASK 0x0000ff00 30 32 #define SAFFIREPRO_CLOCK_SOURCE_INTERNAL 0 31 33 #define SAFFIREPRO_CLOCK_SOURCE_SKIP 1 /* never used on hardware */ 32 34 #define SAFFIREPRO_CLOCK_SOURCE_SPDIF 2 ··· 191 189 map = saffirepro_clk_maps[1]; 192 190 193 191 /* In a case that this driver cannot handle the value of register. */ 192 + value &= SAFFIREPRO_CLOCK_SOURCE_SELECT_MASK; 194 193 if (value >= SAFFIREPRO_CLOCK_SOURCE_COUNT || map[value] < 0) { 195 194 err = -EIO; 196 195 goto end;
+1 -1
sound/pci/hda/patch_ca0132.c
··· 7604 7604 /* Delay enabling the HP amp, to let the mic-detection 7605 7605 * state machine run. 7606 7606 */ 7607 - cancel_delayed_work_sync(&spec->unsol_hp_work); 7607 + cancel_delayed_work(&spec->unsol_hp_work); 7608 7608 schedule_delayed_work(&spec->unsol_hp_work, msecs_to_jiffies(500)); 7609 7609 tbl = snd_hda_jack_tbl_get(codec, cb->nid); 7610 7610 if (tbl)
+13
sound/pci/hda/patch_hdmi.c
··· 2851 2851 return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map)); 2852 2852 } 2853 2853 2854 + static int patch_i915_tgl_hdmi(struct hda_codec *codec) 2855 + { 2856 + /* 2857 + * pin to port mapping table where the value indicate the pin number and 2858 + * the index indicate the port number with 1 base. 2859 + */ 2860 + static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf}; 2861 + 2862 + return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map)); 2863 + } 2864 + 2865 + 2854 2866 /* Intel Baytrail and Braswell; with eld notifier */ 2855 2867 static int patch_i915_byt_hdmi(struct hda_codec *codec) 2856 2868 { ··· 4165 4153 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI", patch_i915_glk_hdmi), 4166 4154 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_glk_hdmi), 4167 4155 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI", patch_i915_icl_hdmi), 4156 + HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI", patch_i915_tgl_hdmi), 4168 4157 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi), 4169 4158 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi), 4170 4159 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi),
+1 -1
sound/soc/codecs/hdac_hda.c
··· 410 410 return; 411 411 } 412 412 413 - snd_hdac_ext_bus_link_put(hdev->bus, hlink); 414 413 pm_runtime_disable(&hdev->dev); 414 + snd_hdac_ext_bus_link_put(hdev->bus, hlink); 415 415 } 416 416 417 417 static const struct snd_soc_dapm_route hdac_hda_dapm_routes[] = {
+5 -7
sound/soc/codecs/hdmi-codec.c
··· 274 274 uint8_t eld[MAX_ELD_BYTES]; 275 275 struct snd_pcm_chmap *chmap_info; 276 276 unsigned int chmap_idx; 277 - struct mutex lock; 277 + unsigned long busy; 278 278 struct snd_soc_jack *jack; 279 279 unsigned int jack_status; 280 280 }; ··· 390 390 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 391 391 int ret = 0; 392 392 393 - ret = mutex_trylock(&hcp->lock); 394 - if (!ret) { 393 + ret = test_and_set_bit(0, &hcp->busy); 394 + if (ret) { 395 395 dev_err(dai->dev, "Only one simultaneous stream supported!\n"); 396 396 return -EINVAL; 397 397 } ··· 419 419 420 420 err: 421 421 /* Release the exclusive lock on error */ 422 - mutex_unlock(&hcp->lock); 422 + clear_bit(0, &hcp->busy); 423 423 return ret; 424 424 } 425 425 ··· 431 431 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; 432 432 hcp->hcd.ops->audio_shutdown(dai->dev->parent, hcp->hcd.data); 433 433 434 - mutex_unlock(&hcp->lock); 434 + clear_bit(0, &hcp->busy); 435 435 } 436 436 437 437 static int hdmi_codec_hw_params(struct snd_pcm_substream *substream, ··· 811 811 return -ENOMEM; 812 812 813 813 hcp->hcd = *hcd; 814 - mutex_init(&hcp->lock); 815 - 816 814 daidrv = devm_kcalloc(dev, dai_count, sizeof(*daidrv), GFP_KERNEL); 817 815 if (!daidrv) 818 816 return -ENOMEM;
+2 -2
sound/soc/codecs/max98373.c
··· 960 960 961 961 /* Power on device */ 962 962 if (gpio_is_valid(max98373->reset_gpio)) { 963 - ret = gpio_request(max98373->reset_gpio, "MAX98373_RESET"); 963 + ret = devm_gpio_request(&i2c->dev, max98373->reset_gpio, 964 + "MAX98373_RESET"); 964 965 if (ret) { 965 966 dev_err(&i2c->dev, "%s: Failed to request gpio %d\n", 966 967 __func__, max98373->reset_gpio); 967 - gpio_free(max98373->reset_gpio); 968 968 return -EINVAL; 969 969 } 970 970 gpio_direction_output(max98373->reset_gpio, 0);
+2 -2
sound/soc/codecs/msm8916-wcd-analog.c
··· 306 306 }; 307 307 308 308 static const char *const adc2_mux_text[] = { "ZERO", "INP2", "INP3" }; 309 - static const char *const rdac2_mux_text[] = { "ZERO", "RX2", "RX1" }; 309 + static const char *const rdac2_mux_text[] = { "RX1", "RX2" }; 310 310 static const char *const hph_text[] = { "ZERO", "Switch", }; 311 311 312 312 static const struct soc_enum hph_enum = SOC_ENUM_SINGLE_VIRT( ··· 321 321 322 322 /* RDAC2 MUX */ 323 323 static const struct soc_enum rdac2_mux_enum = SOC_ENUM_SINGLE( 324 - CDC_D_CDC_CONN_HPHR_DAC_CTL, 0, 3, rdac2_mux_text); 324 + CDC_D_CDC_CONN_HPHR_DAC_CTL, 0, 2, rdac2_mux_text); 325 325 326 326 static const struct snd_kcontrol_new spkr_switch[] = { 327 327 SOC_DAPM_SINGLE("Switch", CDC_A_SPKR_DAC_CTL, 7, 1, 0)
+6 -5
sound/soc/kirkwood/kirkwood-i2s.c
··· 555 555 return PTR_ERR(priv->clk); 556 556 } 557 557 558 - err = clk_prepare_enable(priv->clk); 559 - if (err < 0) 560 - return err; 561 - 562 558 priv->extclk = devm_clk_get(&pdev->dev, "extclk"); 563 559 if (IS_ERR(priv->extclk)) { 564 560 if (PTR_ERR(priv->extclk) == -EPROBE_DEFER) ··· 570 574 } 571 575 } 572 576 577 + err = clk_prepare_enable(priv->clk); 578 + if (err < 0) 579 + return err; 580 + 573 581 /* Some sensible defaults - this reflects the powerup values */ 574 582 priv->ctl_play = KIRKWOOD_PLAYCTL_SIZE_24; 575 583 priv->ctl_rec = KIRKWOOD_RECCTL_SIZE_24; ··· 587 587 priv->ctl_rec |= KIRKWOOD_RECCTL_BURST_128; 588 588 } 589 589 590 - err = devm_snd_soc_register_component(&pdev->dev, &kirkwood_soc_component, 590 + err = snd_soc_register_component(&pdev->dev, &kirkwood_soc_component, 591 591 soc_dai, 2); 592 592 if (err) { 593 593 dev_err(&pdev->dev, "snd_soc_register_component failed\n"); ··· 610 610 { 611 611 struct kirkwood_dma_data *priv = dev_get_drvdata(&pdev->dev); 612 612 613 + snd_soc_unregister_component(&pdev->dev); 613 614 if (!IS_ERR(priv->extclk)) 614 615 clk_disable_unprepare(priv->extclk); 615 616 clk_disable_unprepare(priv->clk);
+5 -2
sound/soc/rockchip/rockchip_max98090.c
··· 66 66 struct snd_soc_jack *jack = (struct snd_soc_jack *)data; 67 67 struct snd_soc_dapm_context *dapm = &jack->card->dapm; 68 68 69 - if (event & SND_JACK_MICROPHONE) 69 + if (event & SND_JACK_MICROPHONE) { 70 70 snd_soc_dapm_force_enable_pin(dapm, "MICBIAS"); 71 - else 71 + snd_soc_dapm_force_enable_pin(dapm, "SHDN"); 72 + } else { 72 73 snd_soc_dapm_disable_pin(dapm, "MICBIAS"); 74 + snd_soc_dapm_disable_pin(dapm, "SHDN"); 75 + } 73 76 74 77 snd_soc_dapm_sync(dapm); 75 78
+2 -2
sound/soc/sh/rcar/dma.c
··· 508 508 #define RDMA_SSI_I_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0x8) 509 509 #define RDMA_SSI_O_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0xc) 510 510 511 - #define RDMA_SSIU_I_N(addr, i, j) (addr ##_reg - 0x00441000 + (0x1000 * (i)) + (((j) / 4) * 0xA000) + (((j) % 4) * 0x400)) 511 + #define RDMA_SSIU_I_N(addr, i, j) (addr ##_reg - 0x00441000 + (0x1000 * (i)) + (((j) / 4) * 0xA000) + (((j) % 4) * 0x400) - (0x4000 * ((i) / 9) * ((j) / 4))) 512 512 #define RDMA_SSIU_O_N(addr, i, j) RDMA_SSIU_I_N(addr, i, j) 513 513 514 - #define RDMA_SSIU_I_P(addr, i, j) (addr ##_reg - 0x00141000 + (0x1000 * (i)) + (((j) / 4) * 0xA000) + (((j) % 4) * 0x400)) 514 + #define RDMA_SSIU_I_P(addr, i, j) (addr ##_reg - 0x00141000 + (0x1000 * (i)) + (((j) / 4) * 0xA000) + (((j) % 4) * 0x400) - (0x4000 * ((i) / 9) * ((j) / 4))) 515 515 #define RDMA_SSIU_O_P(addr, i, j) RDMA_SSIU_I_P(addr, i, j) 516 516 517 517 #define RDMA_SRC_I_N(addr, i) (addr ##_reg - 0x00500000 + (0x400 * i))
+4 -2
sound/soc/sof/debug.c
··· 152 152 */ 153 153 dentry = file->f_path.dentry; 154 154 if (strcmp(dentry->d_name.name, "ipc_flood_count") && 155 - strcmp(dentry->d_name.name, "ipc_flood_duration_ms")) 156 - return -EINVAL; 155 + strcmp(dentry->d_name.name, "ipc_flood_duration_ms")) { 156 + ret = -EINVAL; 157 + goto out; 158 + } 157 159 158 160 if (!strcmp(dentry->d_name.name, "ipc_flood_duration_ms")) 159 161 flood_duration_test = true;
+2 -2
sound/soc/sof/intel/hda-stream.c
··· 190 190 * Workaround to address a known issue with host DMA that results 191 191 * in xruns during pause/release in capture scenarios. 192 192 */ 193 - if (!IS_ENABLED(SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1)) 193 + if (!IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1)) 194 194 if (stream && direction == SNDRV_PCM_STREAM_CAPTURE) 195 195 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 196 196 HDA_VS_INTEL_EM2, ··· 228 228 spin_unlock_irq(&bus->reg_lock); 229 229 230 230 /* Enable DMI L1 entry if there are no capture streams open */ 231 - if (!IS_ENABLED(SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1)) 231 + if (!IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1)) 232 232 if (!active_capture_stream) 233 233 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 234 234 HDA_VS_INTEL_EM2,
+3 -1
sound/soc/sof/ipc.c
··· 572 572 else 573 573 err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata, 574 574 sparams); 575 - if (err < 0) 575 + if (err < 0) { 576 + kfree(partdata); 576 577 return err; 578 + } 577 579 578 580 msg_bytes = sparams->msg_bytes; 579 581 pl_size = sparams->pl_size;
+7 -6
sound/soc/sof/topology.c
··· 543 543 struct soc_bytes_ext *sbe = (struct soc_bytes_ext *)kc->private_value; 544 544 int max_size = sbe->max; 545 545 546 - if (le32_to_cpu(control->priv.size) > max_size) { 547 - dev_err(sdev->dev, "err: bytes data size %d exceeds max %d.\n", 548 - control->priv.size, max_size); 549 - return -EINVAL; 550 - } 551 - 552 546 /* init the get/put bytes data */ 553 547 scontrol->size = sizeof(struct sof_ipc_ctrl_data) + 554 548 le32_to_cpu(control->priv.size); 549 + 550 + if (scontrol->size > max_size) { 551 + dev_err(sdev->dev, "err: bytes data size %d exceeds max %d.\n", 552 + scontrol->size, max_size); 553 + return -EINVAL; 554 + } 555 + 555 556 scontrol->control_data = kzalloc(max_size, GFP_KERNEL); 556 557 cdata = scontrol->control_data; 557 558 if (!scontrol->control_data)
+11 -1
sound/soc/stm/stm32_sai_sub.c
··· 1218 1218 return 0; 1219 1219 } 1220 1220 1221 + /* No support of mmap in S/PDIF mode */ 1222 + static const struct snd_pcm_hardware stm32_sai_pcm_hw_spdif = { 1223 + .info = SNDRV_PCM_INFO_INTERLEAVED, 1224 + .buffer_bytes_max = 8 * PAGE_SIZE, 1225 + .period_bytes_min = 1024, 1226 + .period_bytes_max = PAGE_SIZE, 1227 + .periods_min = 2, 1228 + .periods_max = 8, 1229 + }; 1230 + 1221 1231 static const struct snd_pcm_hardware stm32_sai_pcm_hw = { 1222 1232 .info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_MMAP, 1223 1233 .buffer_bytes_max = 8 * PAGE_SIZE, ··· 1280 1270 }; 1281 1271 1282 1272 static const struct snd_dmaengine_pcm_config stm32_sai_pcm_config_spdif = { 1283 - .pcm_hardware = &stm32_sai_pcm_hw, 1273 + .pcm_hardware = &stm32_sai_pcm_hw_spdif, 1284 1274 .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, 1285 1275 .process = stm32_sai_pcm_process_spdif, 1286 1276 };
+1 -1
sound/soc/ti/sdma-pcm.c
··· 62 62 config->chan_names[0] = txdmachan; 63 63 config->chan_names[1] = rxdmachan; 64 64 65 - return devm_snd_dmaengine_pcm_register(dev, config, 0); 65 + return devm_snd_dmaengine_pcm_register(dev, config, flags); 66 66 } 67 67 EXPORT_SYMBOL_GPL(sdma_pcm_platform_register); 68 68
+5 -1
tools/gpio/Makefile
··· 3 3 4 4 bindir ?= /usr/bin 5 5 6 - ifeq ($(srctree),) 6 + # This will work when gpio is built in tools env. where srctree 7 + # isn't set and when invoked from selftests build, where srctree 8 + # is set to ".". building_out_of_srctree is undefined for in srctree 9 + # builds 10 + ifndef building_out_of_srctree 7 11 srctree := $(patsubst %/,%,$(dir $(CURDIR))) 8 12 srctree := $(patsubst %/,%,$(dir $(srctree))) 9 13 endif
+4 -2
tools/perf/perf-sys.h
··· 15 15 void test_attr__open(struct perf_event_attr *attr, pid_t pid, int cpu, 16 16 int fd, int group_fd, unsigned long flags); 17 17 18 - #define HAVE_ATTR_TEST 18 + #ifndef HAVE_ATTR_TEST 19 + #define HAVE_ATTR_TEST 1 20 + #endif 19 21 20 22 static inline int 21 23 sys_perf_event_open(struct perf_event_attr *attr, ··· 29 27 fd = syscall(__NR_perf_event_open, attr, pid, cpu, 30 28 group_fd, flags); 31 29 32 - #ifdef HAVE_ATTR_TEST 30 + #if HAVE_ATTR_TEST 33 31 if (unlikely(test_attr__enabled)) 34 32 test_attr__open(attr, pid, cpu, fd, group_fd, flags); 35 33 #endif
+7 -1
tools/testing/selftests/bpf/test_sysctl.c
··· 184 184 .descr = "ctx:file_pos sysctl:read read ok narrow", 185 185 .insns = { 186 186 /* If (file_pos == X) */ 187 + #if __BYTE_ORDER == __LITTLE_ENDIAN 187 188 BPF_LDX_MEM(BPF_B, BPF_REG_7, BPF_REG_1, 188 189 offsetof(struct bpf_sysctl, file_pos)), 189 - BPF_JMP_IMM(BPF_JNE, BPF_REG_7, 0, 2), 190 + #else 191 + BPF_LDX_MEM(BPF_B, BPF_REG_7, BPF_REG_1, 192 + offsetof(struct bpf_sysctl, file_pos) + 3), 193 + #endif 194 + BPF_JMP_IMM(BPF_JNE, BPF_REG_7, 4, 2), 190 195 191 196 /* return ALLOW; */ 192 197 BPF_MOV64_IMM(BPF_REG_0, 1), ··· 204 199 .attach_type = BPF_CGROUP_SYSCTL, 205 200 .sysctl = "kernel/ostype", 206 201 .open_flags = O_RDONLY, 202 + .seek = 4, 207 203 .result = SUCCESS, 208 204 }, 209 205 {
+108
tools/testing/selftests/net/tls.c
··· 898 898 } 899 899 } 900 900 901 + static void 902 + test_mutliproc(struct __test_metadata *_metadata, struct _test_data_tls *self, 903 + bool sendpg, unsigned int n_readers, unsigned int n_writers) 904 + { 905 + const unsigned int n_children = n_readers + n_writers; 906 + const size_t data = 6 * 1000 * 1000; 907 + const size_t file_sz = data / 100; 908 + size_t read_bias, write_bias; 909 + int i, fd, child_id; 910 + char buf[file_sz]; 911 + pid_t pid; 912 + 913 + /* Only allow multiples for simplicity */ 914 + ASSERT_EQ(!(n_readers % n_writers) || !(n_writers % n_readers), true); 915 + read_bias = n_writers / n_readers ?: 1; 916 + write_bias = n_readers / n_writers ?: 1; 917 + 918 + /* prep a file to send */ 919 + fd = open("/tmp/", O_TMPFILE | O_RDWR, 0600); 920 + ASSERT_GE(fd, 0); 921 + 922 + memset(buf, 0xac, file_sz); 923 + ASSERT_EQ(write(fd, buf, file_sz), file_sz); 924 + 925 + /* spawn children */ 926 + for (child_id = 0; child_id < n_children; child_id++) { 927 + pid = fork(); 928 + ASSERT_NE(pid, -1); 929 + if (!pid) 930 + break; 931 + } 932 + 933 + /* parent waits for all children */ 934 + if (pid) { 935 + for (i = 0; i < n_children; i++) { 936 + int status; 937 + 938 + wait(&status); 939 + EXPECT_EQ(status, 0); 940 + } 941 + 942 + return; 943 + } 944 + 945 + /* Split threads for reading and writing */ 946 + if (child_id < n_readers) { 947 + size_t left = data * read_bias; 948 + char rb[8001]; 949 + 950 + while (left) { 951 + int res; 952 + 953 + res = recv(self->cfd, rb, 954 + left > sizeof(rb) ? sizeof(rb) : left, 0); 955 + 956 + EXPECT_GE(res, 0); 957 + left -= res; 958 + } 959 + } else { 960 + size_t left = data * write_bias; 961 + 962 + while (left) { 963 + int res; 964 + 965 + ASSERT_EQ(lseek(fd, 0, SEEK_SET), 0); 966 + if (sendpg) 967 + res = sendfile(self->fd, fd, NULL, 968 + left > file_sz ? file_sz : left); 969 + else 970 + res = send(self->fd, buf, 971 + left > file_sz ? file_sz : left, 0); 972 + 973 + EXPECT_GE(res, 0); 974 + left -= res; 975 + } 976 + } 977 + } 978 + 979 + TEST_F(tls, mutliproc_even) 980 + { 981 + test_mutliproc(_metadata, self, false, 6, 6); 982 + } 983 + 984 + TEST_F(tls, mutliproc_readers) 985 + { 986 + test_mutliproc(_metadata, self, false, 4, 12); 987 + } 988 + 989 + TEST_F(tls, mutliproc_writers) 990 + { 991 + test_mutliproc(_metadata, self, false, 10, 2); 992 + } 993 + 994 + TEST_F(tls, mutliproc_sendpage_even) 995 + { 996 + test_mutliproc(_metadata, self, true, 6, 6); 997 + } 998 + 999 + TEST_F(tls, mutliproc_sendpage_readers) 1000 + { 1001 + test_mutliproc(_metadata, self, true, 4, 12); 1002 + } 1003 + 1004 + TEST_F(tls, mutliproc_sendpage_writers) 1005 + { 1006 + test_mutliproc(_metadata, self, true, 10, 2); 1007 + } 1008 + 901 1009 TEST_F(tls, control_msg) 902 1010 { 903 1011 if (self->notls)
+1 -1
tools/testing/selftests/vm/gup_benchmark.c
··· 71 71 flags |= MAP_SHARED; 72 72 break; 73 73 case 'H': 74 - flags |= MAP_HUGETLB; 74 + flags |= (MAP_HUGETLB | MAP_ANONYMOUS); 75 75 break; 76 76 default: 77 77 return -1;
+4 -2
tools/usb/usbip/libsrc/usbip_device_driver.c
··· 69 69 FILE *fd = NULL; 70 70 struct udev_device *plat; 71 71 const char *speed; 72 - int ret = 0; 72 + size_t ret; 73 73 74 74 plat = udev_device_get_parent(sdev); 75 75 path = udev_device_get_syspath(plat); ··· 79 79 if (!fd) 80 80 return -1; 81 81 ret = fread((char *) &descr, sizeof(descr), 1, fd); 82 - if (ret < 0) 82 + if (ret != 1) { 83 + err("Cannot read vudc device descr file: %s", strerror(errno)); 83 84 goto err; 85 + } 84 86 fclose(fd); 85 87 86 88 copy_descr_attr(dev, &descr, bDeviceClass);