Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

tools headers UAPI: Sync drm/i915_drm.h with the kernel sources

81b1b599dfd71c95 ("drm/i915: Allow user to set cache at BO creation")
98d2722a85c4ad5f ("drm/i915/huc: differentiate the 2 steps of the MTL HuC auth flow")
bc4be0a38b63b6d4 ("drm/i915/pmu: Prepare for multi-tile non-engine counters")
d1da138f245d4fb4 ("drm/i915/uapi/pxp: Add a GET_PARAM for PXP")

That adds some ioctls but use the __I915_PMU_OTHER() macro, not
supported yet in the tools/perf/trace/beauty/drm_ioctl.sh conversion
script.

This silences this perf build warning:

Warning: Kernel ABI header differences:
diff -u tools/include/uapi/drm/i915_drm.h include/uapi/drm/i915_drm.h

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Fei Yang <fei.yang@intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://lore.kernel.org/lkml/ZK1R%2FIyWcUKYQbQV@kernel.org/
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

+93 -2
+93 -2
tools/include/uapi/drm/i915_drm.h
··· 280 280 #define I915_PMU_ENGINE_SEMA(class, instance) \ 281 281 __I915_PMU_ENGINE(class, instance, I915_SAMPLE_SEMA) 282 282 283 - #define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x)) 283 + /* 284 + * Top 4 bits of every non-engine counter are GT id. 285 + */ 286 + #define __I915_PMU_GT_SHIFT (60) 287 + 288 + #define ___I915_PMU_OTHER(gt, x) \ 289 + (((__u64)__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x)) | \ 290 + ((__u64)(gt) << __I915_PMU_GT_SHIFT)) 291 + 292 + #define __I915_PMU_OTHER(x) ___I915_PMU_OTHER(0, x) 284 293 285 294 #define I915_PMU_ACTUAL_FREQUENCY __I915_PMU_OTHER(0) 286 295 #define I915_PMU_REQUESTED_FREQUENCY __I915_PMU_OTHER(1) ··· 298 289 #define I915_PMU_SOFTWARE_GT_AWAKE_TIME __I915_PMU_OTHER(4) 299 290 300 291 #define I915_PMU_LAST /* Deprecated - do not use */ I915_PMU_RC6_RESIDENCY 292 + 293 + #define __I915_PMU_ACTUAL_FREQUENCY(gt) ___I915_PMU_OTHER(gt, 0) 294 + #define __I915_PMU_REQUESTED_FREQUENCY(gt) ___I915_PMU_OTHER(gt, 1) 295 + #define __I915_PMU_INTERRUPTS(gt) ___I915_PMU_OTHER(gt, 2) 296 + #define __I915_PMU_RC6_RESIDENCY(gt) ___I915_PMU_OTHER(gt, 3) 297 + #define __I915_PMU_SOFTWARE_GT_AWAKE_TIME(gt) ___I915_PMU_OTHER(gt, 4) 301 298 302 299 /* Each region is a minimum of 16k, and there are at most 255 of them. 303 300 */ ··· 674 659 * If the IOCTL is successful, the returned parameter will be set to one of the 675 660 * following values: 676 661 * * 0 if HuC firmware load is not complete, 677 - * * 1 if HuC firmware is authenticated and running. 662 + * * 1 if HuC firmware is loaded and fully authenticated, 663 + * * 2 if HuC firmware is loaded and authenticated for clear media only 678 664 */ 679 665 #define I915_PARAM_HUC_STATUS 42 680 666 ··· 786 770 * timestamp frequency, but differs on some platforms. 787 771 */ 788 772 #define I915_PARAM_OA_TIMESTAMP_FREQUENCY 57 773 + 774 + /* 775 + * Query the status of PXP support in i915. 776 + * 777 + * The query can fail in the following scenarios with the listed error codes: 778 + * -ENODEV = PXP support is not available on the GPU device or in the 779 + * kernel due to missing component drivers or kernel configs. 780 + * 781 + * If the IOCTL is successful, the returned parameter will be set to one of 782 + * the following values: 783 + * 1 = PXP feature is supported and is ready for use. 784 + * 2 = PXP feature is supported but should be ready soon (pending 785 + * initialization of non-i915 system dependencies). 786 + * 787 + * NOTE: When param is supported (positive return values), user space should 788 + * still refer to the GEM PXP context-creation UAPI header specs to be 789 + * aware of possible failure due to system state machine at the time. 790 + */ 791 + #define I915_PARAM_PXP_STATUS 58 789 792 790 793 /* Must be kept compact -- no holes and well documented */ 791 794 ··· 2131 2096 * 2132 2097 * -ENODEV: feature not available 2133 2098 * -EPERM: trying to mark a recoverable or not bannable context as protected 2099 + * -ENXIO: A dependency such as a component driver or firmware is not yet 2100 + * loaded so user space may need to attempt again. Depending on the 2101 + * device, this error may be reported if protected context creation is 2102 + * attempted very early after kernel start because the internal timeout 2103 + * waiting for such dependencies is not guaranteed to be larger than 2104 + * required (numbers differ depending on system and kernel config): 2105 + * - ADL/RPL: dependencies may take up to 3 seconds from kernel start 2106 + * while context creation internal timeout is 250 milisecs 2107 + * - MTL: dependencies may take up to 8 seconds from kernel start 2108 + * while context creation internal timeout is 250 milisecs 2109 + * NOTE: such dependencies happen once, so a subsequent call to create a 2110 + * protected context after a prior successful call will not experience 2111 + * such timeouts and will not return -ENXIO (unless the driver is reloaded, 2112 + * or, depending on the device, resumes from a suspended state). 2113 + * -EIO: The firmware did not succeed in creating the protected context. 2134 2114 */ 2135 2115 #define I915_CONTEXT_PARAM_PROTECTED_CONTENT 0xd 2136 2116 /* Must be kept compact -- no holes and well documented */ ··· 3680 3630 * 3681 3631 * For I915_GEM_CREATE_EXT_PROTECTED_CONTENT usage see 3682 3632 * struct drm_i915_gem_create_ext_protected_content. 3633 + * 3634 + * For I915_GEM_CREATE_EXT_SET_PAT usage see 3635 + * struct drm_i915_gem_create_ext_set_pat. 3683 3636 */ 3684 3637 #define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0 3685 3638 #define I915_GEM_CREATE_EXT_PROTECTED_CONTENT 1 3639 + #define I915_GEM_CREATE_EXT_SET_PAT 2 3686 3640 __u64 extensions; 3687 3641 }; 3688 3642 ··· 3799 3745 struct i915_user_extension base; 3800 3746 /** @flags: reserved for future usage, currently MBZ */ 3801 3747 __u32 flags; 3748 + }; 3749 + 3750 + /** 3751 + * struct drm_i915_gem_create_ext_set_pat - The 3752 + * I915_GEM_CREATE_EXT_SET_PAT extension. 3753 + * 3754 + * If this extension is provided, the specified caching policy (PAT index) is 3755 + * applied to the buffer object. 3756 + * 3757 + * Below is an example on how to create an object with specific caching policy: 3758 + * 3759 + * .. code-block:: C 3760 + * 3761 + * struct drm_i915_gem_create_ext_set_pat set_pat_ext = { 3762 + * .base = { .name = I915_GEM_CREATE_EXT_SET_PAT }, 3763 + * .pat_index = 0, 3764 + * }; 3765 + * struct drm_i915_gem_create_ext create_ext = { 3766 + * .size = PAGE_SIZE, 3767 + * .extensions = (uintptr_t)&set_pat_ext, 3768 + * }; 3769 + * 3770 + * int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext); 3771 + * if (err) ... 3772 + */ 3773 + struct drm_i915_gem_create_ext_set_pat { 3774 + /** @base: Extension link. See struct i915_user_extension. */ 3775 + struct i915_user_extension base; 3776 + /** 3777 + * @pat_index: PAT index to be set 3778 + * PAT index is a bit field in Page Table Entry to control caching 3779 + * behaviors for GPU accesses. The definition of PAT index is 3780 + * platform dependent and can be found in hardware specifications, 3781 + */ 3782 + __u32 pat_index; 3783 + /** @rsvd: reserved for future use */ 3784 + __u32 rsvd; 3802 3785 }; 3803 3786 3804 3787 /* ID of the protected content session managed by i915 when PXP is active */