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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
arm64: dts: mt8183: add audio node
Add afe (audio front end) device node to the MT8183 dtsi.
Signed-off-by: Kansho Nishida <kansho@chromium.org>
Link: https://lore.kernel.org/r/20210706190111.v3.1.I88a52644e47e88b15f5db9841cb084dc53c5875c@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
authored by
Kansho Nishida
and committed by
Matthias Brugger
13dd23cf
5d2b897b
+93
-1
+93
-1
arch/arm64/boot/dts/mediatek/mt8183.dtsi
+93
-1
arch/arm64/boot/dts/mediatek/mt8183.dtsi
···
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1115
};
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};
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-
audiosys: syscon@11220000 {
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+
audiosys: audio-controller@11220000 {
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compatible = "mediatek,mt8183-audiosys", "syscon";
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reg = <0 0x11220000 0 0x1000>;
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#clock-cells = <1>;
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+
afe: mt8183-afe-pcm {
1123
+
compatible = "mediatek,mt8183-audio";
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+
interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;
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+
resets = <&watchdog MT8183_TOPRGU_AUDIO_SW_RST>;
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+
reset-names = "audiosys";
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+
power-domains =
1128
+
<&spm MT8183_POWER_DOMAIN_AUDIO>;
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+
clocks = <&audiosys CLK_AUDIO_AFE>,
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+
<&audiosys CLK_AUDIO_DAC>,
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+
<&audiosys CLK_AUDIO_DAC_PREDIS>,
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+
<&audiosys CLK_AUDIO_ADC>,
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+
<&audiosys CLK_AUDIO_PDN_ADDA6_ADC>,
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+
<&audiosys CLK_AUDIO_22M>,
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+
<&audiosys CLK_AUDIO_24M>,
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+
<&audiosys CLK_AUDIO_APLL_TUNER>,
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+
<&audiosys CLK_AUDIO_APLL2_TUNER>,
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+
<&audiosys CLK_AUDIO_I2S1>,
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+
<&audiosys CLK_AUDIO_I2S2>,
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+
<&audiosys CLK_AUDIO_I2S3>,
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+
<&audiosys CLK_AUDIO_I2S4>,
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+
<&audiosys CLK_AUDIO_TDM>,
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+
<&audiosys CLK_AUDIO_TML>,
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+
<&infracfg CLK_INFRA_AUDIO>,
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+
<&infracfg CLK_INFRA_AUDIO_26M_BCLK>,
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+
<&topckgen CLK_TOP_MUX_AUDIO>,
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+
<&topckgen CLK_TOP_MUX_AUD_INTBUS>,
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+
<&topckgen CLK_TOP_SYSPLL_D2_D4>,
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+
<&topckgen CLK_TOP_MUX_AUD_1>,
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+
<&topckgen CLK_TOP_APLL1_CK>,
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+
<&topckgen CLK_TOP_MUX_AUD_2>,
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+
<&topckgen CLK_TOP_APLL2_CK>,
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+
<&topckgen CLK_TOP_MUX_AUD_ENG1>,
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+
<&topckgen CLK_TOP_APLL1_D8>,
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+
<&topckgen CLK_TOP_MUX_AUD_ENG2>,
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+
<&topckgen CLK_TOP_APLL2_D8>,
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+
<&topckgen CLK_TOP_MUX_APLL_I2S0>,
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+
<&topckgen CLK_TOP_MUX_APLL_I2S1>,
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+
<&topckgen CLK_TOP_MUX_APLL_I2S2>,
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+
<&topckgen CLK_TOP_MUX_APLL_I2S3>,
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+
<&topckgen CLK_TOP_MUX_APLL_I2S4>,
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+
<&topckgen CLK_TOP_MUX_APLL_I2S5>,
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+
<&topckgen CLK_TOP_APLL12_DIV0>,
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+
<&topckgen CLK_TOP_APLL12_DIV1>,
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+
<&topckgen CLK_TOP_APLL12_DIV2>,
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+
<&topckgen CLK_TOP_APLL12_DIV3>,
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+
<&topckgen CLK_TOP_APLL12_DIV4>,
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+
<&topckgen CLK_TOP_APLL12_DIVB>,
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+
/*<&topckgen CLK_TOP_APLL12_DIV5>,*/
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+
<&clk26m>;
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+
clock-names = "aud_afe_clk",
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+
"aud_dac_clk",
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+
"aud_dac_predis_clk",
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+
"aud_adc_clk",
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+
"aud_adc_adda6_clk",
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+
"aud_apll22m_clk",
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+
"aud_apll24m_clk",
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+
"aud_apll1_tuner_clk",
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+
"aud_apll2_tuner_clk",
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+
"aud_i2s1_bclk_sw",
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+
"aud_i2s2_bclk_sw",
1182
+
"aud_i2s3_bclk_sw",
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+
"aud_i2s4_bclk_sw",
1184
+
"aud_tdm_clk",
1185
+
"aud_tml_clk",
1186
+
"aud_infra_clk",
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+
"mtkaif_26m_clk",
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+
"top_mux_audio",
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+
"top_mux_aud_intbus",
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+
"top_syspll_d2_d4",
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+
"top_mux_aud_1",
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+
"top_apll1_ck",
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+
"top_mux_aud_2",
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+
"top_apll2_ck",
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+
"top_mux_aud_eng1",
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+
"top_apll1_d8",
1197
+
"top_mux_aud_eng2",
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+
"top_apll2_d8",
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+
"top_i2s0_m_sel",
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+
"top_i2s1_m_sel",
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+
"top_i2s2_m_sel",
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+
"top_i2s3_m_sel",
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+
"top_i2s4_m_sel",
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+
"top_i2s5_m_sel",
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+
"top_apll12_div0",
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+
"top_apll12_div1",
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+
"top_apll12_div2",
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+
"top_apll12_div3",
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+
"top_apll12_div4",
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+
"top_apll12_divb",
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+
/*"top_apll12_div5",*/
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+
"top_clk26m_clk";
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+
};
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};
1123
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mmc0: mmc@11230000 {