i386: clean up io-apic accesses

This is preparation for fixing the ordering of the accesses that
got broken by the commit cf4c6a2f27f5db810b69dcb1da7f194489e8ff88 when
factoring out the "common" io apic routing entry accesses.

Move the accessor function (that were only used by io_apic.c) out
of a header file, and use proper memory-mapped accesses rather than
making up our own "volatile" pointers.

Signed-off-by: Linus Torvalds <torvalds@osdl.org>

+41 -28
+40
arch/i386/kernel/io_apic.c
··· 91 91 int apic, pin, next; 92 92 } irq_2_pin[PIN_MAP_SIZE]; 93 93 94 + struct io_apic { 95 + unsigned int index; 96 + unsigned int unused[3]; 97 + unsigned int data; 98 + }; 99 + 100 + static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) 101 + { 102 + return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) 103 + + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK); 104 + } 105 + 106 + static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) 107 + { 108 + struct io_apic __iomem *io_apic = io_apic_base(apic); 109 + writel(reg, &io_apic->index); 110 + return readl(&io_apic->data); 111 + } 112 + 113 + static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) 114 + { 115 + struct io_apic __iomem *io_apic = io_apic_base(apic); 116 + writel(reg, &io_apic->index); 117 + writel(value, &io_apic->data); 118 + } 119 + 120 + /* 121 + * Re-write a value: to be used for read-modify-write 122 + * cycles where the read already set up the index register. 123 + * 124 + * Older SiS APIC requires we rewrite the index register 125 + */ 126 + static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value) 127 + { 128 + volatile struct io_apic *io_apic = io_apic_base(apic); 129 + if (sis_apic_bug) 130 + writel(reg, &io_apic->index); 131 + writel(value, &io_apic->data); 132 + } 133 + 94 134 union entry_union { 95 135 struct { u32 w1, w2; }; 96 136 struct IO_APIC_route_entry entry;
+1 -28
include/asm-i386/io_apic.h
··· 12 12 13 13 #ifdef CONFIG_X86_IO_APIC 14 14 15 - #define IO_APIC_BASE(idx) \ 16 - ((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx) \ 17 - + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK))) 18 - 19 15 /* 20 16 * The structure of the IO-APIC: 21 17 */ ··· 115 119 /* non-0 if default (table-less) MP configuration */ 116 120 extern int mpc_default_type; 117 121 118 - static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) 119 - { 120 - *IO_APIC_BASE(apic) = reg; 121 - return *(IO_APIC_BASE(apic)+4); 122 - } 123 - 124 - static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) 125 - { 126 - *IO_APIC_BASE(apic) = reg; 127 - *(IO_APIC_BASE(apic)+4) = value; 128 - } 129 - 130 - /* 131 - * Re-write a value: to be used for read-modify-write 132 - * cycles where the read already set up the index register. 133 - * 134 - * Older SiS APIC requires we rewrite the index regiser 135 - */ 122 + /* Older SiS APIC requires we rewrite the index register */ 136 123 extern int sis_apic_bug; 137 - static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value) 138 - { 139 - if (sis_apic_bug) 140 - *IO_APIC_BASE(apic) = reg; 141 - *(IO_APIC_BASE(apic)+4) = value; 142 - } 143 124 144 125 /* 1 if "noapic" boot option passed */ 145 126 extern int skip_ioapic_setup;