tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

ARM: dts: imx7-colibri: add clarifying comments

- Add clarifying comments.
- Remove spurious new line.
- Add required new line.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Marcel Ziswiler and committed by
Shawn Guo 12c8aa9b 9b1617f9

+121 -63
+11
arch/arm/boot/dts/imx7-colibri-aster.dtsi
··· 3 3 * Copyright 2017-2022 Toradex 4 4 */ 5 5 6 + /* Colibri AD0 to AD3 */ 6 7 &adc1 { 7 8 status = "okay"; 8 9 }; ··· 18 17 status = "okay"; 19 18 }; 20 19 20 + /* Colibri Fast Ethernet */ 21 21 &fec1 { 22 22 status = "okay"; 23 23 }; 24 24 25 + /* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ 25 26 &i2c4 { 26 27 status = "okay"; 27 28 }; 28 29 30 + /* Colibri PWM<A> */ 29 31 &pwm1 { 30 32 status = "okay"; 31 33 }; 32 34 35 + /* Colibri PWM<B> */ 33 36 &pwm2 { 34 37 status = "okay"; 35 38 }; 36 39 40 + /* Colibri PWM<C> */ 37 41 &pwm3 { 38 42 status = "okay"; 39 43 }; 40 44 45 + /* Colibri PWM<D> */ 41 46 &pwm4 { 42 47 status = "okay"; 43 48 }; ··· 53 46 status = "okay"; 54 47 }; 55 48 49 + /* Colibri UART_A */ 56 50 &uart1 { 57 51 status = "okay"; 58 52 }; 59 53 54 + /* Colibri UART_B */ 60 55 &uart2 { 61 56 status = "okay"; 62 57 }; 63 58 59 + /* Colibri UART_C */ 64 60 &uart3 { 65 61 status = "okay"; 66 62 }; 67 63 64 + /* Colibri USBC */ 68 65 &usbotg1 { 69 66 status = "okay"; 70 67 };
+15
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
··· 12 12 }; 13 13 }; 14 14 15 + /* Colibri AD0 to AD3 */ 15 16 &adc1 { 16 17 status = "okay"; 17 18 }; ··· 29 28 status = "disabled"; 30 29 }; 31 30 31 + /* Colibri SSP */ 32 32 &ecspi3 { 33 33 status = "okay"; 34 34 ··· 48 46 }; 49 47 }; 50 48 49 + /* Colibri Fast Ethernet */ 51 50 &fec1 { 52 51 status = "okay"; 53 52 }; 54 53 54 + /* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ 55 55 &i2c4 { 56 56 status = "okay"; 57 57 }; 58 58 59 + /* Colibri PWM<A> */ 59 60 &pwm1 { 60 61 status = "okay"; 61 62 }; 62 63 64 + /* Colibri PWM<B> */ 63 65 &pwm2 { 66 + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 64 67 status = "okay"; 65 68 }; 66 69 70 + /* Colibri PWM<C> */ 67 71 &pwm3 { 72 + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 68 73 status = "okay"; 69 74 }; 70 75 76 + /* Colibri PWM<D> */ 71 77 &pwm4 { 72 78 status = "okay"; 73 79 }; ··· 85 75 status = "okay"; 86 76 }; 87 77 78 + /* Colibri UART_A */ 88 79 &uart1 { 89 80 status = "okay"; 90 81 }; 91 82 83 + /* Colibri UART_B */ 92 84 &uart2 { 93 85 status = "okay"; 94 86 }; 95 87 88 + /* Colibri UART_C */ 96 89 &uart3 { 97 90 status = "okay"; 98 91 }; 99 92 93 + /* Colibri USBC */ 100 94 &usbotg1 { 101 95 status = "okay"; 102 96 }; 103 97 98 + /* Colibri MMC/SD */ 104 99 &usdhc1 { 105 100 status = "okay"; 106 101 };
+78 -62
arch/arm/boot/dts/imx7-colibri.dtsi
··· 122 122 simple-audio-card,format = "i2s"; 123 123 simple-audio-card,bitclock-master = <&dailink_master>; 124 124 simple-audio-card,frame-master = <&dailink_master>; 125 + 125 126 simple-audio-card,cpu { 126 127 sound-dai = <&sai1>; 127 128 }; ··· 134 133 }; 135 134 }; 136 135 136 + /* Colibri AD0 to AD3 */ 137 137 &adc1 { 138 138 vref-supply = <&reg_DCDC3>; 139 139 }; ··· 148 146 cpu-supply = <&reg_DCDC2>; 149 147 }; 150 148 149 + /* Colibri SSP */ 151 150 &ecspi3 { 152 151 pinctrl-names = "default"; 153 152 pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; 154 - cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; 153 + cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */ 155 154 }; 156 155 156 + /* Colibri Fast Ethernet */ 157 157 &fec1 { 158 158 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; 159 159 assigned-clock-rates = <0>, <100000000>; ··· 178 174 #address-cells = <1>; 179 175 #size-cells = <0>; 180 176 177 + /* Micrel KSZ8041RNL */ 181 178 ethphy0: ethernet-phy@0 { 182 179 compatible = "ethernet-phy-ieee802.3-c22"; 183 180 max-speed = <100>; ··· 378 373 "SODIMM_137"; 379 374 }; 380 375 376 + /* NAND on such SKUs */ 381 377 &gpmi { 382 378 pinctrl-names = "default"; 383 379 pinctrl-0 = <&pinctrl_gpmi_nand>; ··· 387 381 nand-ecc-mode = "hw"; 388 382 }; 389 383 384 + /* On-module Power I2C */ 390 385 &i2c1 { 391 386 clock-frequency = <100000>; 392 387 pinctrl-names = "default", "gpio"; ··· 395 388 pinctrl-1 = <&pinctrl_i2c1_recovery &pinctrl_i2c1_int>; 396 389 scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 397 390 sda-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 398 - 399 391 status = "okay"; 400 392 401 393 codec: sgtl5000@a { ··· 494 488 }; 495 489 }; 496 490 491 + /* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ 497 492 &i2c4 { 498 493 clock-frequency = <100000>; 499 494 pinctrl-names = "default", "gpio"; ··· 539 532 }; 540 533 }; 541 534 535 + /* Colibri PWM<A> */ 542 536 &pwm1 { 543 537 pinctrl-names = "default"; 544 538 pinctrl-0 = <&pinctrl_pwm1>; 545 539 }; 546 540 541 + /* Colibri PWM<B> */ 547 542 &pwm2 { 548 543 pinctrl-names = "default"; 549 544 pinctrl-0 = <&pinctrl_pwm2>; 550 545 }; 551 546 547 + /* Colibri PWM<C> */ 552 548 &pwm3 { 553 549 pinctrl-names = "default"; 554 550 pinctrl-0 = <&pinctrl_pwm3>; 555 551 }; 556 552 553 + /* Colibri PWM<D> */ 557 554 &pwm4 { 558 555 pinctrl-names = "default"; 559 556 pinctrl-0 = <&pinctrl_pwm4>; 560 557 }; 561 558 562 559 &reg_1p0d { 563 - vin-supply = <&reg_DCDC3>; 560 + vin-supply = <&reg_DCDC3>; /* VDDA_1P8_IN */ 564 561 }; 565 562 566 563 &sai1 { ··· 573 562 status = "okay"; 574 563 }; 575 564 565 + /* Colibri UART_A */ 576 566 &uart1 { 577 567 pinctrl-names = "default"; 578 568 pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>; ··· 583 571 fsl,dte-mode; 584 572 }; 585 573 574 + /* Colibri UART_B */ 586 575 &uart2 { 587 576 pinctrl-names = "default"; 588 577 pinctrl-0 = <&pinctrl_uart2>; ··· 593 580 fsl,dte-mode; 594 581 }; 595 582 583 + /* Colibri UART_C */ 596 584 &uart3 { 597 585 pinctrl-names = "default"; 598 586 pinctrl-0 = <&pinctrl_uart3>; ··· 602 588 fsl,dte-mode; 603 589 }; 604 590 591 + /* Colibri USBC */ 605 592 &usbotg1 { 606 593 dr_mode = "otg"; 607 594 extcon = <0>, <&extcon_usbc_det>; ··· 623 608 wakeup-source; 624 609 }; 625 610 611 + /* eMMC on 1GB (eMMC) SKUs */ 626 612 &usdhc3 { 627 613 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 628 614 pinctrl-0 = <&pinctrl_usdhc3>; ··· 794 778 795 779 pinctrl_ecspi3_cs: ecspi3-cs-grp { 796 780 fsl,pins = < 797 - MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 781 + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ 798 782 >; 799 783 }; 800 784 801 785 pinctrl_ecspi3: ecspi3-grp { 802 786 fsl,pins = < 803 - MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 804 - MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 805 - MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 787 + MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ 788 + MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ 789 + MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */ 806 790 >; 807 791 }; 808 792 ··· 847 831 848 832 pinctrl_i2c4: i2c4-grp { 849 833 fsl,pins = < 850 - MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f 851 - MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f 834 + MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ 835 + MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */ 852 836 >; 853 837 }; 854 838 ··· 861 845 862 846 pinctrl_lcdif_dat: lcdif-dat-grp { 863 847 fsl,pins = < 864 - MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 865 - MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 866 - MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 867 - MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 868 - MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 869 - MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 870 - MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 871 - MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 872 - MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 873 - MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 874 - MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 875 - MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 876 - MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 877 - MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 878 - MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 879 - MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 880 - MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 881 - MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 848 + MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 /* SODIMM 76 */ 849 + MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 /* SODIMM 70 */ 850 + MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 /* SODIMM 60 */ 851 + MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 /* SODIMM 58 */ 852 + MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 /* SODIMM 78 */ 853 + MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 /* SODIMM 72 */ 854 + MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 /* SODIMM 80 */ 855 + MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 /* SODIMM 46 */ 856 + MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 /* SODIMM 62 */ 857 + MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 /* SODIMM 48 */ 858 + MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 /* SODIMM 74 */ 859 + MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 /* SODIMM 50 */ 860 + MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 /* SODIMM 52 */ 861 + MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 /* SODIMM 54 */ 862 + MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 /* SODIMM 66 */ 863 + MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 /* SODIMM 64 */ 864 + MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 /* SODIMM 57 */ 865 + MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 /* SODIMM 61 */ 882 866 >; 883 867 }; 884 868 885 869 pinctrl_lcdif_dat_24: lcdif-dat-24-grp { 886 870 fsl,pins = < 887 - MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 888 - MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 889 - MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 890 - MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 891 - MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 892 - MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 871 + MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 /* SODIMM 136 */ 872 + MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 /* SODIMM 138 */ 873 + MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 /* SODIMM 140 */ 874 + MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 /* SODIMM 142 */ 875 + MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 /* SODIMM 144 */ 876 + MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 /* SODIMM 146 */ 893 877 >; 894 878 }; 895 879 896 880 pinctrl_lcdif_ctrl: lcdif-ctrl-grp { 897 881 fsl,pins = < 898 - MX7D_PAD_LCD_CLK__LCD_CLK 0x79 899 - MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 900 - MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 901 - MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 882 + MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */ 883 + MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */ 884 + MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */ 885 + MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 /* SODIMM 68 */ 902 886 >; 903 887 }; 904 888 ··· 913 897 914 898 pinctrl_pwm1: pwm1-grp { 915 899 fsl,pins = < 916 - MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 917 - MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 900 + MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ 901 + MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */ 918 902 >; 919 903 }; 920 904 921 905 pinctrl_pwm2: pwm2-grp { 922 906 fsl,pins = < 923 - MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 907 + MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 /* SODIMM 28 */ 924 908 >; 925 909 }; 926 910 927 911 pinctrl_pwm3: pwm3-grp { 928 912 fsl,pins = < 929 - MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 913 + MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */ 930 914 >; 931 915 }; 932 916 933 917 pinctrl_pwm4: pwm4-grp { 934 918 fsl,pins = < 935 - MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 936 - MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 919 + MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ 920 + MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */ 937 921 >; 938 922 }; 939 923 940 924 pinctrl_uart1: uart1-grp { 941 925 fsl,pins = < 942 - MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 943 - MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 944 - MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 945 - MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 926 + MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */ 927 + MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */ 928 + MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */ 929 + MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */ 946 930 >; 947 931 }; 948 932 949 933 pinctrl_uart1_ctrl1: uart1-ctrl1-grp { 950 934 fsl,pins = < 951 - MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* DCD */ 952 - MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* DTR */ 935 + MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ 936 + MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */ 953 937 >; 954 938 }; 955 939 956 940 pinctrl_uart2: uart2-grp { 957 941 fsl,pins = < 958 - MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 959 - MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 960 - MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 961 - MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 942 + MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ 943 + MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */ 944 + MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */ 945 + MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */ 962 946 >; 963 947 }; 964 948 pinctrl_uart3: uart3-grp { 965 949 fsl,pins = < 966 - MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 967 - MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 950 + MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ 951 + MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */ 968 952 >; 969 953 }; 970 954 971 955 pinctrl_usbc_det: gpio-usbc-det { 972 956 fsl,pins = < 973 - MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 957 + MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 /* SODIMM 137 / USBC_DET */ 974 958 >; 975 959 }; 976 960 977 961 pinctrl_usbh_reg: gpio-usbh-vbus { 978 962 fsl,pins = < 979 - MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 USBH PEN */ 963 + MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 / USBH_PEN */ 980 964 >; 981 965 }; 982 966 ··· 1095 1079 1096 1080 pinctrl_gpio_lpsr: gpio1-grp { 1097 1081 fsl,pins = < 1098 - MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 1099 - MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 1082 + MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */ 1083 + MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 /* SODIMM 22 */ 1100 1084 >; 1101 1085 }; 1102 1086 1103 1087 pinctrl_gpiokeys: gpiokeysgrp { 1104 1088 fsl,pins = < 1105 - MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 1089 + MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 /* SODIMM 45 / WAKE_UP */ 1106 1090 >; 1107 1091 }; 1108 1092 ··· 1134 1118 1135 1119 pinctrl_uart1_ctrl2: uart1-ctrl2-grp { 1136 1120 fsl,pins = < 1137 - MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* DSR */ 1138 - MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* RI */ 1121 + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ 1122 + MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */ 1139 1123 >; 1140 1124 }; 1141 1125 };
+1 -1
arch/arm/boot/dts/imx7d-colibri-aster.dts
··· 1 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 3 * Copyright 2017-2022 Toradex 4 - * 5 4 */ 6 5 7 6 /dts-v1/; ··· 34 35 status = "okay"; 35 36 }; 36 37 38 + /* Colibri USBH */ 37 39 &usbotg2 { 38 40 status = "okay"; 39 41 };
+1
arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts
··· 16 16 "fsl,imx7d"; 17 17 }; 18 18 19 + /* Colibri USBH */ 19 20 &usbotg2 { 20 21 status = "okay"; 21 22 };
+1
arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
··· 15 15 "fsl,imx7d"; 16 16 }; 17 17 18 + /* Colibri USBH */ 18 19 &usbotg2 { 19 20 status = "okay"; 20 21 };
+2
arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
··· 49 49 "SODIMM_34"; 50 50 }; 51 51 52 + /* Colibri USBH */ 52 53 &usbotg2 { 53 54 dr_mode = "host"; 54 55 vbus-supply = <&reg_usbh_vbus>; 55 56 }; 56 57 58 + /* eMMC */ 57 59 &usdhc3 { 58 60 status = "okay"; 59 61 };
+5
arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
··· 38 38 status = "okay"; 39 39 }; 40 40 41 + /* Colibri PWM<B> */ 41 42 &pwm2 { 43 + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 42 44 status = "okay"; 43 45 }; 44 46 47 + /* Colibri PWM<C> */ 45 48 &pwm3 { 49 + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 46 50 status = "okay"; 47 51 }; 48 52 53 + /* Colibri USBH */ 49 54 &usbotg2 { 50 55 status = "okay"; 51 56 };
+2
arch/arm/boot/dts/imx7d-colibri.dtsi
··· 23 23 cpu-supply = <&reg_DCDC2>; 24 24 }; 25 25 26 + /* NAND */ 26 27 &gpmi { 27 28 status = "okay"; 28 29 }; 29 30 31 + /* Colibri USBH */ 30 32 &usbotg2 { 31 33 dr_mode = "host"; 32 34 vbus-supply = <&reg_usbh_vbus>;
+4
arch/arm/boot/dts/imx7s-colibri-eval-v3.dts
··· 38 38 status = "okay"; 39 39 }; 40 40 41 + /* Colibri PWM<B> */ 41 42 &pwm2 { 43 + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 42 44 status = "okay"; 43 45 }; 44 46 47 + /* Colibri PWM<C> */ 45 48 &pwm3 { 49 + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 46 50 status = "okay"; 47 51 };
+1
arch/arm/boot/dts/imx7s-colibri.dtsi
··· 13 13 }; 14 14 }; 15 15 16 + /* NAND */ 16 17 &gpmi { 17 18 status = "okay"; 18 19 };