Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: imx: Add GW5907 board support

The Gateworks GW5907 is an IMX6 SoC based single board computer with:
- IMX6Q or IMX6DL
- 32bit DDR3 DRAM
- FEC GbE Phy
- bi-color front-panel LED
- 256MB NAND boot device
- Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
- Digital IO expander (pca9555)
- Joystick 12bit adc (ads1015)

Signed-off-by: Robert Jones <rjones@gateworks.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Robert Jones and committed by
Shawn Guo
12512029 3b49b6cd

+429
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arch/arm/boot/dts/Makefile
··· 422 422 imx6dl-gw560x.dtb \ 423 423 imx6dl-gw5903.dtb \ 424 424 imx6dl-gw5904.dtb \ 425 + imx6dl-gw5907.dtb \ 425 426 imx6dl-hummingboard.dtb \ 426 427 imx6dl-hummingboard-emmc-som-v15.dtb \ 427 428 imx6dl-hummingboard-som-v15.dtb \ ··· 494 493 imx6q-gw560x.dtb \ 495 494 imx6q-gw5903.dtb \ 496 495 imx6q-gw5904.dtb \ 496 + imx6q-gw5907.dtb \ 497 497 imx6q-h100.dtb \ 498 498 imx6q-hummingboard.dtb \ 499 499 imx6q-hummingboard-emmc-som-v15.dtb \
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arch/arm/boot/dts/imx6dl-gw5907.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Copyright 2019 Gateworks Corporation 4 + */ 5 + 6 + /dts-v1/; 7 + 8 + #include "imx6dl.dtsi" 9 + #include "imx6qdl-gw5907.dtsi" 10 + 11 + / { 12 + model = "Gateworks Ventana i.MX6 DualLite/Solo GW5907"; 13 + compatible = "gw,imx6dl-gw5907", "gw,ventana", "fsl,imx6dl"; 14 + };
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arch/arm/boot/dts/imx6q-gw5907.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Copyright 2019 Gateworks Corporation 4 + */ 5 + 6 + /dts-v1/; 7 + 8 + #include "imx6q.dtsi" 9 + #include "imx6qdl-gw5907.dtsi" 10 + 11 + / { 12 + model = "Gateworks Ventana i.MX6 Dual/Quad GW5907"; 13 + compatible = "gw,imx6q-gw5907", "gw,ventana", "fsl,imx6q"; 14 + };
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arch/arm/boot/dts/imx6qdl-gw5907.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Copyright 2019 Gateworks Corporation 4 + */ 5 + 6 + #include <dt-bindings/gpio/gpio.h> 7 + 8 + / { 9 + /* these are used by bootloader for disabling nodes */ 10 + aliases { 11 + led0 = &led0; 12 + led1 = &led1; 13 + nand = &gpmi; 14 + usb0 = &usbh1; 15 + usb1 = &usbotg; 16 + }; 17 + 18 + chosen { 19 + stdout-path = &uart2; 20 + }; 21 + 22 + leds { 23 + compatible = "gpio-leds"; 24 + pinctrl-names = "default"; 25 + pinctrl-0 = <&pinctrl_gpio_leds>; 26 + 27 + led0: user1 { 28 + label = "user1"; 29 + gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ 30 + default-state = "on"; 31 + linux,default-trigger = "heartbeat"; 32 + }; 33 + 34 + led1: user2 { 35 + label = "user2"; 36 + gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ 37 + default-state = "off"; 38 + }; 39 + }; 40 + 41 + memory@10000000 { 42 + device_type = "memory"; 43 + reg = <0x10000000 0x20000000>; 44 + }; 45 + 46 + pps { 47 + compatible = "pps-gpio"; 48 + pinctrl-names = "default"; 49 + pinctrl-0 = <&pinctrl_pps>; 50 + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 51 + status = "okay"; 52 + }; 53 + 54 + reg_3p3v: regulator-3p3v { 55 + compatible = "regulator-fixed"; 56 + regulator-name = "3P3V"; 57 + regulator-min-microvolt = <3300000>; 58 + regulator-max-microvolt = <3300000>; 59 + regulator-always-on; 60 + }; 61 + 62 + reg_5p0v: regulator-5p0v { 63 + compatible = "regulator-fixed"; 64 + regulator-name = "5P0V"; 65 + regulator-min-microvolt = <5000000>; 66 + regulator-max-microvolt = <5000000>; 67 + regulator-always-on; 68 + }; 69 + 70 + reg_usb_otg_vbus: regulator-usb-otg-vbus { 71 + compatible = "regulator-fixed"; 72 + regulator-name = "usb_otg_vbus"; 73 + regulator-min-microvolt = <5000000>; 74 + regulator-max-microvolt = <5000000>; 75 + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 76 + enable-active-high; 77 + }; 78 + }; 79 + 80 + &fec { 81 + pinctrl-names = "default"; 82 + pinctrl-0 = <&pinctrl_enet>; 83 + phy-mode = "rgmii-id"; 84 + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; 85 + status = "okay"; 86 + }; 87 + 88 + &gpmi { 89 + pinctrl-names = "default"; 90 + pinctrl-0 = <&pinctrl_gpmi_nand>; 91 + status = "okay"; 92 + }; 93 + 94 + &hdmi { 95 + ddc-i2c-bus = <&i2c3>; 96 + status = "okay"; 97 + }; 98 + 99 + &i2c1 { 100 + clock-frequency = <100000>; 101 + pinctrl-names = "default"; 102 + pinctrl-0 = <&pinctrl_i2c1>; 103 + status = "okay"; 104 + 105 + gpio@23 { 106 + compatible = "nxp,pca9555"; 107 + reg = <0x23>; 108 + gpio-controller; 109 + #gpio-cells = <2>; 110 + }; 111 + 112 + eeprom@50 { 113 + compatible = "atmel,24c02"; 114 + reg = <0x50>; 115 + pagesize = <16>; 116 + }; 117 + 118 + eeprom@51 { 119 + compatible = "atmel,24c02"; 120 + reg = <0x51>; 121 + pagesize = <16>; 122 + }; 123 + 124 + eeprom@52 { 125 + compatible = "atmel,24c02"; 126 + reg = <0x52>; 127 + pagesize = <16>; 128 + }; 129 + 130 + eeprom@53 { 131 + compatible = "atmel,24c02"; 132 + reg = <0x53>; 133 + pagesize = <16>; 134 + }; 135 + 136 + rtc@68 { 137 + compatible = "dallas,ds1672"; 138 + reg = <0x68>; 139 + }; 140 + }; 141 + 142 + &i2c2 { 143 + clock-frequency = <100000>; 144 + pinctrl-names = "default"; 145 + pinctrl-0 = <&pinctrl_i2c2>; 146 + status = "okay"; 147 + }; 148 + 149 + &i2c3 { 150 + clock-frequency = <100000>; 151 + pinctrl-names = "default"; 152 + pinctrl-0 = <&pinctrl_i2c3>; 153 + status = "okay"; 154 + 155 + gpio@20 { 156 + compatible = "nxp,pca9555"; 157 + reg = <0x20>; 158 + gpio-controller; 159 + #gpio-cells = <2>; 160 + }; 161 + 162 + adc@48 { 163 + compatible = "ti,ads1015"; 164 + reg = <0x48>; 165 + #address-cells = <1>; 166 + #size-cells = <0>; 167 + 168 + channel@4 { 169 + reg = <4>; 170 + ti,gain = <0>; 171 + ti,datarate = <5>; 172 + }; 173 + 174 + channel@5 { 175 + reg = <5>; 176 + ti,gain = <0>; 177 + ti,datarate = <5>; 178 + }; 179 + 180 + channel@6 { 181 + reg = <6>; 182 + ti,gain = <0>; 183 + ti,datarate = <5>; 184 + }; 185 + }; 186 + }; 187 + 188 + &pcie { 189 + pinctrl-names = "default"; 190 + pinctrl-0 = <&pinctrl_pcie>; 191 + reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; 192 + status = "okay"; 193 + }; 194 + 195 + &pwm2 { 196 + pinctrl-names = "default"; 197 + pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ 198 + status = "disabled"; 199 + }; 200 + 201 + &pwm3 { 202 + pinctrl-names = "default"; 203 + pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ 204 + status = "disabled"; 205 + }; 206 + 207 + &pwm4 { 208 + pinctrl-names = "default"; 209 + pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ 210 + status = "disabled"; 211 + }; 212 + 213 + &uart1 { 214 + pinctrl-names = "default"; 215 + pinctrl-0 = <&pinctrl_uart1>; 216 + status = "okay"; 217 + }; 218 + 219 + &uart2 { 220 + pinctrl-names = "default"; 221 + pinctrl-0 = <&pinctrl_uart2>; 222 + status = "okay"; 223 + }; 224 + 225 + &uart3 { 226 + pinctrl-names = "default"; 227 + pinctrl-0 = <&pinctrl_uart3>; 228 + status = "okay"; 229 + }; 230 + 231 + &uart5 { 232 + pinctrl-names = "default"; 233 + pinctrl-0 = <&pinctrl_uart5>; 234 + status = "okay"; 235 + }; 236 + 237 + &usbotg { 238 + vbus-supply = <&reg_usb_otg_vbus>; 239 + pinctrl-names = "default"; 240 + pinctrl-0 = <&pinctrl_usbotg>; 241 + disable-over-current; 242 + status = "okay"; 243 + }; 244 + 245 + &usbh1 { 246 + status = "okay"; 247 + }; 248 + 249 + &wdog1 { 250 + pinctrl-names = "default"; 251 + pinctrl-0 = <&pinctrl_wdog>; 252 + fsl,ext-reset-output; 253 + }; 254 + 255 + &iomuxc { 256 + pinctrl_enet: enetgrp { 257 + fsl,pins = < 258 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 259 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 260 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 261 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 262 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 263 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 264 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 265 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 266 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 267 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 268 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 269 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 270 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 271 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 272 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 273 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 274 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 275 + >; 276 + }; 277 + 278 + pinctrl_gpio_leds: gpioledsgrp { 279 + fsl,pins = < 280 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 281 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 282 + >; 283 + }; 284 + 285 + pinctrl_gpmi_nand: gpminandgrp { 286 + fsl,pins = < 287 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 288 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 289 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 290 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 291 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 292 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 293 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 294 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 295 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 296 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 297 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 298 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 299 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 300 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 301 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 302 + >; 303 + }; 304 + 305 + pinctrl_i2c1: i2c1grp { 306 + fsl,pins = < 307 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 308 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 309 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 310 + >; 311 + }; 312 + 313 + pinctrl_i2c2: i2c2grp { 314 + fsl,pins = < 315 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 316 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 317 + >; 318 + }; 319 + 320 + pinctrl_i2c3: i2c3grp { 321 + fsl,pins = < 322 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 323 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 324 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 325 + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 326 + >; 327 + }; 328 + 329 + pinctrl_pcie: pciegrp { 330 + fsl,pins = < 331 + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 332 + >; 333 + }; 334 + 335 + pinctrl_pps: ppsgrp { 336 + fsl,pins = < 337 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 338 + >; 339 + }; 340 + 341 + pinctrl_pwm2: pwm2grp { 342 + fsl,pins = < 343 + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 344 + >; 345 + }; 346 + 347 + pinctrl_pwm3: pwm3grp { 348 + fsl,pins = < 349 + MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 350 + >; 351 + }; 352 + 353 + pinctrl_pwm4: pwm4grp { 354 + fsl,pins = < 355 + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 356 + >; 357 + }; 358 + 359 + pinctrl_uart1: uart1grp { 360 + fsl,pins = < 361 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 362 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 363 + >; 364 + }; 365 + 366 + pinctrl_uart2: uart2grp { 367 + fsl,pins = < 368 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 369 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 370 + >; 371 + }; 372 + 373 + pinctrl_uart3: uart3grp { 374 + fsl,pins = < 375 + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 376 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 377 + >; 378 + }; 379 + 380 + pinctrl_uart5: uart5grp { 381 + fsl,pins = < 382 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 383 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 384 + >; 385 + }; 386 + 387 + pinctrl_usbotg: usbotggrp { 388 + fsl,pins = < 389 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 390 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 391 + >; 392 + }; 393 + 394 + pinctrl_wdog: wdoggrp { 395 + fsl,pins = < 396 + MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 397 + >; 398 + }; 399 + };